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TARGET_MAX32630FTHR/TOOLCHAIN_GCC_ARM/icc_regs.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 * @file
AnnaBridge 171:3a7713b1edbc 3 * @brief Registers, Bit Masks and Bit Positions for the Instruction Cache Controller.
AnnaBridge 171:3a7713b1edbc 4 */
AnnaBridge 171:3a7713b1edbc 5
AnnaBridge 171:3a7713b1edbc 6 /* ****************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 171:3a7713b1edbc 10 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 171:3a7713b1edbc 11 * to deal in the Software without restriction, including without limitation
AnnaBridge 171:3a7713b1edbc 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 171:3a7713b1edbc 13 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 171:3a7713b1edbc 14 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 171:3a7713b1edbc 15 *
AnnaBridge 171:3a7713b1edbc 16 * The above copyright notice and this permission notice shall be included
AnnaBridge 171:3a7713b1edbc 17 * in all copies or substantial portions of the Software.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 171:3a7713b1edbc 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 171:3a7713b1edbc 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 171:3a7713b1edbc 22 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 171:3a7713b1edbc 23 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 171:3a7713b1edbc 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 171:3a7713b1edbc 25 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 171:3a7713b1edbc 26 *
AnnaBridge 171:3a7713b1edbc 27 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 171:3a7713b1edbc 28 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 171:3a7713b1edbc 29 * Products, Inc. Branding Policy.
AnnaBridge 171:3a7713b1edbc 30 *
AnnaBridge 171:3a7713b1edbc 31 * The mere transfer of this software does not imply any licenses
AnnaBridge 171:3a7713b1edbc 32 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 171:3a7713b1edbc 33 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 171:3a7713b1edbc 34 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 171:3a7713b1edbc 35 * ownership rights.
AnnaBridge 171:3a7713b1edbc 36 *
AnnaBridge 171:3a7713b1edbc 37 * $Date: 2016-10-10 19:01:16 -0500 (Mon, 10 Oct 2016) $
AnnaBridge 171:3a7713b1edbc 38 * $Revision: 24662 $
AnnaBridge 171:3a7713b1edbc 39 *
AnnaBridge 171:3a7713b1edbc 40 *************************************************************************** */
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 /* Define to prevent redundant inclusion */
AnnaBridge 171:3a7713b1edbc 43 #ifndef _MXC_ICC_REGS_H_
AnnaBridge 171:3a7713b1edbc 44 #define _MXC_ICC_REGS_H_
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /* **** Includes **** */
AnnaBridge 171:3a7713b1edbc 47 #include <stdint.h>
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 50 extern "C" {
AnnaBridge 171:3a7713b1edbc 51 #endif
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /// @cond
AnnaBridge 171:3a7713b1edbc 54 /*
AnnaBridge 171:3a7713b1edbc 55 If types are not defined elsewhere (CMSIS) define them here
AnnaBridge 171:3a7713b1edbc 56 */
AnnaBridge 171:3a7713b1edbc 57 #ifndef __IO
AnnaBridge 171:3a7713b1edbc 58 #define __IO volatile
AnnaBridge 171:3a7713b1edbc 59 #endif
AnnaBridge 171:3a7713b1edbc 60 #ifndef __I
AnnaBridge 171:3a7713b1edbc 61 #define __I volatile const
AnnaBridge 171:3a7713b1edbc 62 #endif
AnnaBridge 171:3a7713b1edbc 63 #ifndef __O
AnnaBridge 171:3a7713b1edbc 64 #define __O volatile
AnnaBridge 171:3a7713b1edbc 65 #endif
AnnaBridge 171:3a7713b1edbc 66 #ifndef __RO
AnnaBridge 171:3a7713b1edbc 67 #define __RO volatile const
AnnaBridge 171:3a7713b1edbc 68 #endif
AnnaBridge 171:3a7713b1edbc 69 ///@endcond
AnnaBridge 171:3a7713b1edbc 70
AnnaBridge 171:3a7713b1edbc 71 /* **** Definitions **** */
AnnaBridge 171:3a7713b1edbc 72
AnnaBridge 171:3a7713b1edbc 73 /**
AnnaBridge 171:3a7713b1edbc 74 * @ingroup icc
AnnaBridge 171:3a7713b1edbc 75 * @defgroup icc_registers Registers
AnnaBridge 171:3a7713b1edbc 76 * @brief Registers, Bit Masks and Bit Positions for the ICC.
AnnaBridge 171:3a7713b1edbc 77 * @{
AnnaBridge 171:3a7713b1edbc 78 */
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 /**
AnnaBridge 171:3a7713b1edbc 81 * Structure type to access the ICC Registers.
AnnaBridge 171:3a7713b1edbc 82 */
AnnaBridge 171:3a7713b1edbc 83 typedef struct {
AnnaBridge 171:3a7713b1edbc 84 __IO uint32_t id; /**< <tt>\b 0x0000: </tt> ICC_ID Register \warning INTERNAL USE ONLY, DO NOT MODIFY */
AnnaBridge 171:3a7713b1edbc 85 __IO uint32_t mem_cfg; /**< <tt>\b 0x0004: </tt> ICC_MEM_CFG Register */
AnnaBridge 171:3a7713b1edbc 86 __RO uint32_t rsv008[62]; /**< <tt>\b 0x0008-0x00FC: </tt> RESERVED */
AnnaBridge 171:3a7713b1edbc 87 __IO uint32_t ctrl_stat; /**< <tt>\b 0x0100: </tt> ICC_CTRL_STAT Register */
AnnaBridge 171:3a7713b1edbc 88 __RO uint32_t rsv104[383]; /**< <tt>\b 0x0104-0x06FC: </tt> RESERVED */
AnnaBridge 171:3a7713b1edbc 89 __IO uint32_t invdt_all; /**< <tt>\b 0x0700: </tt> ICC_INVDT_ALL Register */
AnnaBridge 171:3a7713b1edbc 90 } mxc_icc_regs_t;
AnnaBridge 171:3a7713b1edbc 91 /**@} end of group icc_registers*/
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 /*
AnnaBridge 171:3a7713b1edbc 98 Register offsets for module ICC.
AnnaBridge 171:3a7713b1edbc 99 */
AnnaBridge 171:3a7713b1edbc 100 /**
AnnaBridge 171:3a7713b1edbc 101 * @ingroup icc_registers
AnnaBridge 171:3a7713b1edbc 102 * @defgroup ICC_Register_Offsets Register Offsets
AnnaBridge 171:3a7713b1edbc 103 * @brief Instruction Cache Controller Register Offsets from the ICC Base Address.
AnnaBridge 171:3a7713b1edbc 104 * @{
AnnaBridge 171:3a7713b1edbc 105 */
AnnaBridge 171:3a7713b1edbc 106 #define MXC_R_ICC_OFFS_ID ((uint32_t)0x00000000UL) /**< Offset from ICC Base Address: <tt>\b 0x0000</tt> */
AnnaBridge 171:3a7713b1edbc 107 #define MXC_R_ICC_OFFS_MEM_CFG ((uint32_t)0x00000004UL) /**< Offset from ICC Base Address: <tt>\b 0x0004</tt> */
AnnaBridge 171:3a7713b1edbc 108 #define MXC_R_ICC_OFFS_CTRL_STAT ((uint32_t)0x00000100UL) /**< Offset from ICC Base Address: <tt>\b 0x0100</tt> */
AnnaBridge 171:3a7713b1edbc 109 #define MXC_R_ICC_OFFS_INVDT_ALL ((uint32_t)0x00000700UL) /**< Offset from ICC Base Address: <tt>\b 0x0700</tt> */
AnnaBridge 171:3a7713b1edbc 110 /**@} end of group icc_registers */
AnnaBridge 171:3a7713b1edbc 111
AnnaBridge 171:3a7713b1edbc 112 /*
AnnaBridge 171:3a7713b1edbc 113 Field positions and masks for module ICC.
AnnaBridge 171:3a7713b1edbc 114 */
AnnaBridge 171:3a7713b1edbc 115 /**
AnnaBridge 171:3a7713b1edbc 116 * @ingroup icc_registers
AnnaBridge 171:3a7713b1edbc 117 * @defgroup ICC_ID_Register ICC_ID
AnnaBridge 171:3a7713b1edbc 118 * @brief Field Positions and Bit Masks for the ICC_ID register
AnnaBridge 171:3a7713b1edbc 119 * @{
AnnaBridge 171:3a7713b1edbc 120 */
AnnaBridge 171:3a7713b1edbc 121 #define MXC_F_ICC_ID_RTL_VERSION_POS 0 /**< RTL_VERSION Position */
AnnaBridge 171:3a7713b1edbc 122 #define MXC_F_ICC_ID_RTL_VERSION ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_RTL_VERSION_POS)) /**< RTL_VERSION Mask */
AnnaBridge 171:3a7713b1edbc 123 #define MXC_F_ICC_ID_PART_NUM_POS 6 /**< PART_NUM Position */
AnnaBridge 171:3a7713b1edbc 124 #define MXC_F_ICC_ID_PART_NUM ((uint32_t)(0x0000000FUL << MXC_F_ICC_ID_PART_NUM_POS)) /**< PART_NUM Mask */
AnnaBridge 171:3a7713b1edbc 125 #define MXC_F_ICC_ID_CACHE_ID_POS 10 /**< CACHE_ID Position */
AnnaBridge 171:3a7713b1edbc 126 #define MXC_F_ICC_ID_CACHE_ID ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_CACHE_ID_POS)) /**< CACHE_ID Mask */
AnnaBridge 171:3a7713b1edbc 127 /**@} end of group ICC_ID_register */
AnnaBridge 171:3a7713b1edbc 128 /**
AnnaBridge 171:3a7713b1edbc 129 * @ingroup icc_registers
AnnaBridge 171:3a7713b1edbc 130 * @defgroup ICC_MEM_CFG_Register ICC_MEM_CFG
AnnaBridge 171:3a7713b1edbc 131 * @brief Field Positions and Bit Masks for the ICC_MEM_CFG register
AnnaBridge 171:3a7713b1edbc 132 * @{
AnnaBridge 171:3a7713b1edbc 133 */
AnnaBridge 171:3a7713b1edbc 134 #define MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS 0 /**< CACHE_SIZE Position */
AnnaBridge 171:3a7713b1edbc 135 #define MXC_F_ICC_MEM_CFG_CACHE_SIZE ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS)) /**< CACHE_SIZE Mask */
AnnaBridge 171:3a7713b1edbc 136 #define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS 16 /**< MAIN_MEMORY_SIZE Position */
AnnaBridge 171:3a7713b1edbc 137 #define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS)) /**< MAIN_MEMORY_SIZE Mask */
AnnaBridge 171:3a7713b1edbc 138 /**@} end of group ICC_MEM_CFG_register */
AnnaBridge 171:3a7713b1edbc 139 /**
AnnaBridge 171:3a7713b1edbc 140 * @ingroup icc_registers
AnnaBridge 171:3a7713b1edbc 141 * @defgroup ICC_CTRL_STAT_Register ICC_CTRL_STAT
AnnaBridge 171:3a7713b1edbc 142 * @brief Field Positions and Bit Masks for the ICC_CTRL_STAT register
AnnaBridge 171:3a7713b1edbc 143 * @{
AnnaBridge 171:3a7713b1edbc 144 */
AnnaBridge 171:3a7713b1edbc 145 #define MXC_F_ICC_CTRL_STAT_ENABLE_POS 0 /**< ENABLE Position */
AnnaBridge 171:3a7713b1edbc 146 #define MXC_F_ICC_CTRL_STAT_ENABLE ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_ENABLE_POS)) /**< ENABLE Mask */
AnnaBridge 171:3a7713b1edbc 147 #define MXC_F_ICC_CTRL_STAT_READY_POS 16 /**< READY Position */
AnnaBridge 171:3a7713b1edbc 148 #define MXC_F_ICC_CTRL_STAT_READY ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_READY_POS)) /**< READY Mask */
AnnaBridge 171:3a7713b1edbc 149 /**@} end of group ICC_CTRL_STAT_register */
AnnaBridge 171:3a7713b1edbc 150
AnnaBridge 171:3a7713b1edbc 151
AnnaBridge 171:3a7713b1edbc 152 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 153 }
AnnaBridge 171:3a7713b1edbc 154 #endif
AnnaBridge 171:3a7713b1edbc 155
AnnaBridge 171:3a7713b1edbc 156 #endif /* _MXC_ICC_REGS_H_ */
AnnaBridge 171:3a7713b1edbc 157