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TARGET_LPC54114/TOOLCHAIN_ARM_STD/fsl_spi.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 148:fd96258d940d 1 /*
Kojto 148:fd96258d940d 2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
Kojto 148:fd96258d940d 3 * All rights reserved.
Kojto 148:fd96258d940d 4 *
Kojto 148:fd96258d940d 5 * Redistribution and use in source and binary forms, with or without modification,
Kojto 148:fd96258d940d 6 * are permitted provided that the following conditions are met:
Kojto 148:fd96258d940d 7 *
Kojto 148:fd96258d940d 8 * o Redistributions of source code must retain the above copyright notice, this list
Kojto 148:fd96258d940d 9 * of conditions and the following disclaimer.
Kojto 148:fd96258d940d 10 *
Kojto 148:fd96258d940d 11 * o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 148:fd96258d940d 12 * list of conditions and the following disclaimer in the documentation and/or
Kojto 148:fd96258d940d 13 * other materials provided with the distribution.
Kojto 148:fd96258d940d 14 *
Kojto 148:fd96258d940d 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 148:fd96258d940d 16 * contributors may be used tom endorse or promote products derived from this
Kojto 148:fd96258d940d 17 * software without specific prior written permission.
Kojto 148:fd96258d940d 18 *
Kojto 148:fd96258d940d 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 148:fd96258d940d 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 148:fd96258d940d 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 148:fd96258d940d 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 148:fd96258d940d 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 148:fd96258d940d 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 148:fd96258d940d 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 148:fd96258d940d 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 148:fd96258d940d 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 148:fd96258d940d 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 148:fd96258d940d 29 */
Kojto 148:fd96258d940d 30 #ifndef _FSL_SPI_H_
Kojto 148:fd96258d940d 31 #define _FSL_SPI_H_
Kojto 148:fd96258d940d 32
Kojto 148:fd96258d940d 33 #include "fsl_common.h"
Kojto 148:fd96258d940d 34 #include "fsl_flexcomm.h"
Kojto 148:fd96258d940d 35
Kojto 148:fd96258d940d 36 /*!
Kojto 148:fd96258d940d 37 * @addtogroup spi_driver
Kojto 148:fd96258d940d 38 * @{
Kojto 148:fd96258d940d 39 */
Kojto 148:fd96258d940d 40
Kojto 148:fd96258d940d 41 /*! @file */
Kojto 148:fd96258d940d 42
Kojto 148:fd96258d940d 43 /*******************************************************************************
Kojto 148:fd96258d940d 44 * Definitions
Kojto 148:fd96258d940d 45 ******************************************************************************/
Kojto 148:fd96258d940d 46
Kojto 148:fd96258d940d 47 /*! @name Driver version */
Kojto 148:fd96258d940d 48 /*@{*/
Kojto 148:fd96258d940d 49 /*! @brief USART driver version 2.0.0. */
Kojto 148:fd96258d940d 50 #define FSL_SPI_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
Kojto 148:fd96258d940d 51 /*@}*/
Kojto 148:fd96258d940d 52
Kojto 148:fd96258d940d 53 #define SPI_DUMMYDATA (0xFFFF)
Kojto 148:fd96258d940d 54 #define SPI_DATA(n) (((uint32_t)(n)) & 0xFFFF)
Kojto 148:fd96258d940d 55 #define SPI_CTRLMASK (0xFFFF0000)
Kojto 148:fd96258d940d 56
Kojto 148:fd96258d940d 57 #define SPI_ASSERTNUM_SSEL(n) ((~(1U << ((n) + 16))) & 0xF0000)
Kojto 148:fd96258d940d 58 #define SPI_DEASSERTNUM_SSEL(n) (1U << ((n) + 16))
Kojto 148:fd96258d940d 59 #define SPI_DEASSERT_ALL (0xF0000)
Kojto 148:fd96258d940d 60
Kojto 148:fd96258d940d 61 #define SPI_FIFOWR_FLAGS_MASK (~(SPI_DEASSERT_ALL | SPI_FIFOWR_TXDATA_MASK | SPI_FIFOWR_LEN_MASK))
Kojto 148:fd96258d940d 62
Kojto 148:fd96258d940d 63 #define SPI_FIFOTRIG_TXLVL_GET(base) (((base)->FIFOTRIG & SPI_FIFOTRIG_TXLVL_MASK) >> SPI_FIFOTRIG_TXLVL_SHIFT)
Kojto 148:fd96258d940d 64 #define SPI_FIFOTRIG_RXLVL_GET(base) (((base)->FIFOTRIG & SPI_FIFOTRIG_RXLVL_MASK) >> SPI_FIFOTRIG_RXLVL_SHIFT)
Kojto 148:fd96258d940d 65
Kojto 148:fd96258d940d 66 /*! @brief SPI transfer option.*/
Kojto 148:fd96258d940d 67 typedef enum _spi_xfer_option {
Kojto 148:fd96258d940d 68 kSPI_FrameDelay = (SPI_FIFOWR_EOF_MASK), /*!< Delay chip select */
Kojto 148:fd96258d940d 69 kSPI_FrameAssert = (SPI_FIFOWR_EOT_MASK), /*!< When transfer ends, assert chip select */
Kojto 148:fd96258d940d 70 } spi_xfer_option_t;
Kojto 148:fd96258d940d 71
Kojto 148:fd96258d940d 72 /*! @brief SPI data shifter direction options.*/
Kojto 148:fd96258d940d 73 typedef enum _spi_shift_direction {
Kojto 148:fd96258d940d 74 kSPI_MsbFirst = 0U, /*!< Data transfers start with most significant bit. */
Kojto 148:fd96258d940d 75 kSPI_LsbFirst = 1U /*!< Data transfers start with least significant bit. */
Kojto 148:fd96258d940d 76 } spi_shift_direction_t;
Kojto 148:fd96258d940d 77
Kojto 148:fd96258d940d 78 /*! @brief SPI clock polarity configuration.*/
Kojto 148:fd96258d940d 79 typedef enum _spi_clock_polarity {
Kojto 148:fd96258d940d 80 kSPI_ClockPolarityActiveHigh = 0x0U, /*!< Active-high SPI clock (idles low). */
Kojto 148:fd96258d940d 81 kSPI_ClockPolarityActiveLow /*!< Active-low SPI clock (idles high). */
Kojto 148:fd96258d940d 82 } spi_clock_polarity_t;
Kojto 148:fd96258d940d 83
Kojto 148:fd96258d940d 84 /*! @brief SPI clock phase configuration.*/
Kojto 148:fd96258d940d 85 typedef enum _spi_clock_phase {
Kojto 148:fd96258d940d 86 kSPI_ClockPhaseFirstEdge = 0x0U, /*!< First edge on SCK occurs at the middle of the first
Kojto 148:fd96258d940d 87 * cycle of a data transfer. */
Kojto 148:fd96258d940d 88 kSPI_ClockPhaseSecondEdge /*!< First edge on SCK occurs at the start of the
Kojto 148:fd96258d940d 89 * first cycle of a data transfer. */
Kojto 148:fd96258d940d 90 } spi_clock_phase_t;
Kojto 148:fd96258d940d 91
Kojto 148:fd96258d940d 92 /*! @brief txFIFO watermark values */
Kojto 148:fd96258d940d 93 typedef enum _spi_txfifo_watermark {
Kojto 148:fd96258d940d 94 kSPI_TxFifo0 = 0, /*!< SPI tx watermark is empty */
Kojto 148:fd96258d940d 95 kSPI_TxFifo1 = 1, /*!< SPI tx watermark at 1 item */
Kojto 148:fd96258d940d 96 kSPI_TxFifo2 = 2, /*!< SPI tx watermark at 2 items */
Kojto 148:fd96258d940d 97 kSPI_TxFifo3 = 3, /*!< SPI tx watermark at 3 items */
Kojto 148:fd96258d940d 98 kSPI_TxFifo4 = 4, /*!< SPI tx watermark at 4 items */
Kojto 148:fd96258d940d 99 kSPI_TxFifo5 = 5, /*!< SPI tx watermark at 5 items */
Kojto 148:fd96258d940d 100 kSPI_TxFifo6 = 6, /*!< SPI tx watermark at 6 items */
Kojto 148:fd96258d940d 101 kSPI_TxFifo7 = 7, /*!< SPI tx watermark at 7 items */
Kojto 148:fd96258d940d 102 } spi_txfifo_watermark_t;
Kojto 148:fd96258d940d 103
Kojto 148:fd96258d940d 104 /*! @brief rxFIFO watermark values */
Kojto 148:fd96258d940d 105 typedef enum _spi_rxfifo_watermark {
Kojto 148:fd96258d940d 106 kSPI_RxFifo1 = 0, /*!< SPI rx watermark at 1 item */
Kojto 148:fd96258d940d 107 kSPI_RxFifo2 = 1, /*!< SPI rx watermark at 2 items */
Kojto 148:fd96258d940d 108 kSPI_RxFifo3 = 2, /*!< SPI rx watermark at 3 items */
Kojto 148:fd96258d940d 109 kSPI_RxFifo4 = 3, /*!< SPI rx watermark at 4 items */
Kojto 148:fd96258d940d 110 kSPI_RxFifo5 = 4, /*!< SPI rx watermark at 5 items */
Kojto 148:fd96258d940d 111 kSPI_RxFifo6 = 5, /*!< SPI rx watermark at 6 items */
Kojto 148:fd96258d940d 112 kSPI_RxFifo7 = 6, /*!< SPI rx watermark at 7 items */
Kojto 148:fd96258d940d 113 kSPI_RxFifo8 = 7, /*!< SPI rx watermark at 8 items */
Kojto 148:fd96258d940d 114 } spi_rxfifo_watermark_t;
Kojto 148:fd96258d940d 115
Kojto 148:fd96258d940d 116 /*! @brief Transfer data width */
Kojto 148:fd96258d940d 117 typedef enum _spi_data_width {
Kojto 148:fd96258d940d 118 kSPI_Data4Bits = 3, /*!< 4 bits data width */
Kojto 148:fd96258d940d 119 kSPI_Data5Bits = 4, /*!< 5 bits data width */
Kojto 148:fd96258d940d 120 kSPI_Data6Bits = 5, /*!< 6 bits data width */
Kojto 148:fd96258d940d 121 kSPI_Data7Bits = 6, /*!< 7 bits data width */
Kojto 148:fd96258d940d 122 kSPI_Data8Bits = 7, /*!< 8 bits data width */
Kojto 148:fd96258d940d 123 kSPI_Data9Bits = 8, /*!< 9 bits data width */
Kojto 148:fd96258d940d 124 kSPI_Data10Bits = 9, /*!< 10 bits data width */
Kojto 148:fd96258d940d 125 kSPI_Data11Bits = 10, /*!< 11 bits data width */
Kojto 148:fd96258d940d 126 kSPI_Data12Bits = 11, /*!< 12 bits data width */
Kojto 148:fd96258d940d 127 kSPI_Data13Bits = 12, /*!< 13 bits data width */
Kojto 148:fd96258d940d 128 kSPI_Data14Bits = 13, /*!< 14 bits data width */
Kojto 148:fd96258d940d 129 kSPI_Data15Bits = 14, /*!< 15 bits data width */
Kojto 148:fd96258d940d 130 kSPI_Data16Bits = 15, /*!< 16 bits data width */
Kojto 148:fd96258d940d 131 } spi_data_width_t;
Kojto 148:fd96258d940d 132
Kojto 148:fd96258d940d 133 /*! @brief Slave select */
Kojto 148:fd96258d940d 134 typedef enum _spi_ssel {
Kojto 148:fd96258d940d 135 kSPI_Ssel0 = 0, /*!< Slave select 0 */
Kojto 148:fd96258d940d 136 kSPI_Ssel1 = 1, /*!< Slave select 1 */
Kojto 148:fd96258d940d 137 kSPI_Ssel2 = 2, /*!< Slave select 2 */
Kojto 148:fd96258d940d 138 kSPI_Ssel3 = 3, /*!< Slave select 3 */
Kojto 148:fd96258d940d 139 } spi_ssel_t;
Kojto 148:fd96258d940d 140
Kojto 148:fd96258d940d 141 /*! @brief SPI master user configure structure.*/
Kojto 148:fd96258d940d 142 typedef struct _spi_master_config
Kojto 148:fd96258d940d 143 {
Kojto 148:fd96258d940d 144 bool enableLoopback; /*!< Enable loopback for test purpose */
Kojto 148:fd96258d940d 145 bool enableMaster; /*!< Enable SPI at initialization time */
Kojto 148:fd96258d940d 146 spi_clock_polarity_t polarity; /*!< Clock polarity */
Kojto 148:fd96258d940d 147 spi_clock_phase_t phase; /*!< Clock phase */
Kojto 148:fd96258d940d 148 spi_shift_direction_t direction; /*!< MSB or LSB */
Kojto 148:fd96258d940d 149 uint32_t baudRate_Bps; /*!< Baud Rate for SPI in Hz */
Kojto 148:fd96258d940d 150 spi_data_width_t dataWidth; /*!< Width of the data */
Kojto 148:fd96258d940d 151 spi_ssel_t sselNum; /*!< Slave select number */
Kojto 148:fd96258d940d 152 spi_txfifo_watermark_t txWatermark; /*!< txFIFO watermark */
Kojto 148:fd96258d940d 153 spi_rxfifo_watermark_t rxWatermark; /*!< rxFIFO watermark */
Kojto 148:fd96258d940d 154 } spi_master_config_t;
Kojto 148:fd96258d940d 155
Kojto 148:fd96258d940d 156 /*! @brief SPI slave user configure structure.*/
Kojto 148:fd96258d940d 157 typedef struct _spi_slave_config
Kojto 148:fd96258d940d 158 {
Kojto 148:fd96258d940d 159 bool enableSlave; /*!< Enable SPI at initialization time */
Kojto 148:fd96258d940d 160 spi_clock_polarity_t polarity; /*!< Clock polarity */
Kojto 148:fd96258d940d 161 spi_clock_phase_t phase; /*!< Clock phase */
Kojto 148:fd96258d940d 162 spi_shift_direction_t direction; /*!< MSB or LSB */
Kojto 148:fd96258d940d 163 spi_data_width_t dataWidth; /*!< Width of the data */
Kojto 148:fd96258d940d 164 spi_txfifo_watermark_t txWatermark; /*!< txFIFO watermark */
Kojto 148:fd96258d940d 165 spi_rxfifo_watermark_t rxWatermark; /*!< rxFIFO watermark */
Kojto 148:fd96258d940d 166 } spi_slave_config_t;
Kojto 148:fd96258d940d 167
Kojto 148:fd96258d940d 168 /*! @brief SPI transfer status.*/
Kojto 148:fd96258d940d 169 enum _spi_status
Kojto 148:fd96258d940d 170 {
Kojto 148:fd96258d940d 171 kStatus_SPI_Busy = MAKE_STATUS(kStatusGroup_LPC_SPI, 0), /*!< SPI bus is busy */
Kojto 148:fd96258d940d 172 kStatus_SPI_Idle = MAKE_STATUS(kStatusGroup_LPC_SPI, 1), /*!< SPI is idle */
Kojto 148:fd96258d940d 173 kStatus_SPI_Error = MAKE_STATUS(kStatusGroup_LPC_SPI, 2), /*!< SPI error */
Kojto 148:fd96258d940d 174 kStatus_SPI_BaudrateNotSupport =
Kojto 148:fd96258d940d 175 MAKE_STATUS(kStatusGroup_LPC_SPI, 3) /*!< Baudrate is not support in current clock source */
Kojto 148:fd96258d940d 176 };
Kojto 148:fd96258d940d 177
Kojto 148:fd96258d940d 178 /*! @brief SPI interrupt sources.*/
Kojto 148:fd96258d940d 179 enum _spi_interrupt_enable
Kojto 148:fd96258d940d 180 {
Kojto 148:fd96258d940d 181 kSPI_RxLvlIrq = SPI_FIFOINTENSET_RXLVL_MASK, /*!< Rx level interrupt */
Kojto 148:fd96258d940d 182 kSPI_TxLvlIrq = SPI_FIFOINTENSET_TXLVL_MASK, /*!< Tx level interrupt */
Kojto 148:fd96258d940d 183 };
Kojto 148:fd96258d940d 184
Kojto 148:fd96258d940d 185 /*! @brief SPI status flags.*/
Kojto 148:fd96258d940d 186 enum _spi_statusflags
Kojto 148:fd96258d940d 187 {
Kojto 148:fd96258d940d 188 kSPI_TxEmptyFlag = SPI_FIFOSTAT_TXEMPTY_MASK, /*!< txFifo is empty */
Kojto 148:fd96258d940d 189 kSPI_TxNotFullFlag = SPI_FIFOSTAT_TXNOTFULL_MASK, /*!< txFifo is not full */
Kojto 148:fd96258d940d 190 kSPI_RxNotEmptyFlag = SPI_FIFOSTAT_RXNOTEMPTY_MASK, /*!< rxFIFO is not empty */
Kojto 148:fd96258d940d 191 kSPI_RxFullFlag = SPI_FIFOSTAT_RXFULL_MASK, /*!< rxFIFO is full */
Kojto 148:fd96258d940d 192 };
Kojto 148:fd96258d940d 193
Kojto 148:fd96258d940d 194 /*! @brief SPI transfer structure */
Kojto 148:fd96258d940d 195 typedef struct _spi_transfer
Kojto 148:fd96258d940d 196 {
Kojto 148:fd96258d940d 197 uint8_t *txData; /*!< Send buffer */
Kojto 148:fd96258d940d 198 uint8_t *rxData; /*!< Receive buffer */
Kojto 148:fd96258d940d 199 uint32_t configFlags; /*!< Additional option to control transfer */
Kojto 148:fd96258d940d 200 size_t dataSize; /*!< Transfer bytes */
Kojto 148:fd96258d940d 201 } spi_transfer_t;
Kojto 148:fd96258d940d 202
Kojto 148:fd96258d940d 203 /*! @brief Internal configuration structure used in 'spi' and 'spi_dma' driver */
Kojto 148:fd96258d940d 204 typedef struct _spi_config
Kojto 148:fd96258d940d 205 {
Kojto 148:fd96258d940d 206 spi_data_width_t dataWidth;
Kojto 148:fd96258d940d 207 spi_ssel_t sselNum;
Kojto 148:fd96258d940d 208 } spi_config_t;
Kojto 148:fd96258d940d 209
Kojto 148:fd96258d940d 210 /*! @brief Master handle type */
Kojto 148:fd96258d940d 211 typedef struct _spi_master_handle spi_master_handle_t;
Kojto 148:fd96258d940d 212
Kojto 148:fd96258d940d 213 /*! @brief Slave handle type */
Kojto 148:fd96258d940d 214 typedef spi_master_handle_t spi_slave_handle_t;
Kojto 148:fd96258d940d 215
Kojto 148:fd96258d940d 216 /*! @brief SPI master callback for finished transmit */
Kojto 148:fd96258d940d 217 typedef void (*spi_master_callback_t)(SPI_Type *base, spi_master_handle_t *handle, status_t status, void *userData);
Kojto 148:fd96258d940d 218
Kojto 148:fd96258d940d 219 /*! @brief SPI slave callback for finished transmit */
Kojto 148:fd96258d940d 220 typedef void (*spi_slave_callback_t)(SPI_Type *base, spi_slave_handle_t *handle, status_t status, void *userData);
Kojto 148:fd96258d940d 221
Kojto 148:fd96258d940d 222 /*! @brief SPI transfer handle structure */
Kojto 148:fd96258d940d 223 struct _spi_master_handle
Kojto 148:fd96258d940d 224 {
Kojto 148:fd96258d940d 225 uint8_t *volatile txData; /*!< Transfer buffer */
Kojto 148:fd96258d940d 226 uint8_t *volatile rxData; /*!< Receive buffer */
Kojto 148:fd96258d940d 227 volatile size_t txRemainingBytes; /*!< Number of data to be transmitted [in bytes] */
Kojto 148:fd96258d940d 228 volatile size_t rxRemainingBytes; /*!< Number of data to be received [in bytes] */
Kojto 148:fd96258d940d 229 volatile size_t toReceiveCount; /*!< Receive data remaining in bytes */
Kojto 148:fd96258d940d 230 size_t totalByteCount; /*!< A number of transfer bytes */
Kojto 148:fd96258d940d 231 volatile uint32_t state; /*!< SPI internal state */
Kojto 148:fd96258d940d 232 spi_master_callback_t callback; /*!< SPI callback */
Kojto 148:fd96258d940d 233 void *userData; /*!< Callback parameter */
Kojto 148:fd96258d940d 234 uint8_t dataWidth; /*!< Width of the data [Valid values: 1 to 16] */
Kojto 148:fd96258d940d 235 uint8_t sselNum; /*!< Slave select number to be asserted when transferring data [Valid values: 0 to 3] */
Kojto 148:fd96258d940d 236 uint32_t configFlags; /*!< Additional option to control transfer */
Kojto 148:fd96258d940d 237 spi_txfifo_watermark_t txWatermark; /*!< txFIFO watermark */
Kojto 148:fd96258d940d 238 spi_rxfifo_watermark_t rxWatermark; /*!< rxFIFO watermark */
Kojto 148:fd96258d940d 239 };
Kojto 148:fd96258d940d 240
Kojto 148:fd96258d940d 241 #if defined(__cplusplus)
Kojto 148:fd96258d940d 242 extern "C" {
Kojto 148:fd96258d940d 243 #endif
Kojto 148:fd96258d940d 244 /*******************************************************************************
Kojto 148:fd96258d940d 245 * API
Kojto 148:fd96258d940d 246 ******************************************************************************/
Kojto 148:fd96258d940d 247 /*!
Kojto 148:fd96258d940d 248 * @name Initialization and deinitialization
Kojto 148:fd96258d940d 249 * @{
Kojto 148:fd96258d940d 250 */
Kojto 148:fd96258d940d 251
Kojto 148:fd96258d940d 252 /*!
Kojto 148:fd96258d940d 253 * @brief Sets the SPI master configuration structure to default values.
Kojto 148:fd96258d940d 254 *
Kojto 148:fd96258d940d 255 * The purpose of this API is to get the configuration structure initialized for use in SPI_MasterInit().
Kojto 148:fd96258d940d 256 * User may use the initialized structure unchanged in SPI_MasterInit(), or modify
Kojto 148:fd96258d940d 257 * some fields of the structure before calling SPI_MasterInit(). After calling this API,
Kojto 148:fd96258d940d 258 * the master is ready to transfer.
Kojto 148:fd96258d940d 259 * Example:
Kojto 148:fd96258d940d 260 @code
Kojto 148:fd96258d940d 261 spi_master_config_t config;
Kojto 148:fd96258d940d 262 SPI_MasterGetDefaultConfig(&config);
Kojto 148:fd96258d940d 263 @endcode
Kojto 148:fd96258d940d 264 *
Kojto 148:fd96258d940d 265 * @param config pointer to master config structure
Kojto 148:fd96258d940d 266 */
Kojto 148:fd96258d940d 267 void SPI_MasterGetDefaultConfig(spi_master_config_t *config);
Kojto 148:fd96258d940d 268
Kojto 148:fd96258d940d 269 /*!
Kojto 148:fd96258d940d 270 * @brief Initializes the SPI with master configuration.
Kojto 148:fd96258d940d 271 *
Kojto 148:fd96258d940d 272 * The configuration structure can be filled by user from scratch, or be set with default
Kojto 148:fd96258d940d 273 * values by SPI_MasterGetDefaultConfig(). After calling this API, the slave is ready to transfer.
Kojto 148:fd96258d940d 274 * Example
Kojto 148:fd96258d940d 275 @code
Kojto 148:fd96258d940d 276 spi_master_config_t config = {
Kojto 148:fd96258d940d 277 .baudRate_Bps = 400000,
Kojto 148:fd96258d940d 278 ...
Kojto 148:fd96258d940d 279 };
Kojto 148:fd96258d940d 280 SPI_MasterInit(SPI0, &config);
Kojto 148:fd96258d940d 281 @endcode
Kojto 148:fd96258d940d 282 *
Kojto 148:fd96258d940d 283 * @param base SPI base pointer
Kojto 148:fd96258d940d 284 * @param config pointer to master configuration structure
Kojto 148:fd96258d940d 285 * @param srcClock_Hz Source clock frequency.
Kojto 148:fd96258d940d 286 */
Kojto 148:fd96258d940d 287 status_t SPI_MasterInit(SPI_Type *base, const spi_master_config_t *config, uint32_t srcClock_Hz);
Kojto 148:fd96258d940d 288
Kojto 148:fd96258d940d 289 /*!
Kojto 148:fd96258d940d 290 * @brief Sets the SPI slave configuration structure to default values.
Kojto 148:fd96258d940d 291 *
Kojto 148:fd96258d940d 292 * The purpose of this API is to get the configuration structure initialized for use in SPI_SlaveInit().
Kojto 148:fd96258d940d 293 * Modify some fields of the structure before calling SPI_SlaveInit().
Kojto 148:fd96258d940d 294 * Example:
Kojto 148:fd96258d940d 295 @code
Kojto 148:fd96258d940d 296 spi_slave_config_t config;
Kojto 148:fd96258d940d 297 SPI_SlaveGetDefaultConfig(&config);
Kojto 148:fd96258d940d 298 @endcode
Kojto 148:fd96258d940d 299 *
Kojto 148:fd96258d940d 300 * @param config pointer to slave configuration structure
Kojto 148:fd96258d940d 301 */
Kojto 148:fd96258d940d 302 void SPI_SlaveGetDefaultConfig(spi_slave_config_t *config);
Kojto 148:fd96258d940d 303
Kojto 148:fd96258d940d 304 /*!
Kojto 148:fd96258d940d 305 * @brief Initializes the SPI with slave configuration.
Kojto 148:fd96258d940d 306 *
Kojto 148:fd96258d940d 307 * The configuration structure can be filled by user from scratch or be set with
Kojto 148:fd96258d940d 308 * default values by SPI_SlaveGetDefaultConfig().
Kojto 148:fd96258d940d 309 * After calling this API, the slave is ready to transfer.
Kojto 148:fd96258d940d 310 * Example
Kojto 148:fd96258d940d 311 @code
Kojto 148:fd96258d940d 312 spi_slave_config_t config = {
Kojto 148:fd96258d940d 313 .polarity = flexSPIClockPolarity_ActiveHigh;
Kojto 148:fd96258d940d 314 .phase = flexSPIClockPhase_FirstEdge;
Kojto 148:fd96258d940d 315 .direction = flexSPIMsbFirst;
Kojto 148:fd96258d940d 316 ...
Kojto 148:fd96258d940d 317 };
Kojto 148:fd96258d940d 318 SPI_SlaveInit(SPI0, &config);
Kojto 148:fd96258d940d 319 @endcode
Kojto 148:fd96258d940d 320 *
Kojto 148:fd96258d940d 321 * @param base SPI base pointer
Kojto 148:fd96258d940d 322 * @param config pointer to slave configuration structure
Kojto 148:fd96258d940d 323 */
Kojto 148:fd96258d940d 324 status_t SPI_SlaveInit(SPI_Type *base, const spi_slave_config_t *config);
Kojto 148:fd96258d940d 325
Kojto 148:fd96258d940d 326 /*!
Kojto 148:fd96258d940d 327 * @brief De-initializes the SPI.
Kojto 148:fd96258d940d 328 *
Kojto 148:fd96258d940d 329 * Calling this API resets the SPI module, gates the SPI clock.
Kojto 148:fd96258d940d 330 * The SPI module can't work unless calling the SPI_MasterInit/SPI_SlaveInit to initialize module.
Kojto 148:fd96258d940d 331 *
Kojto 148:fd96258d940d 332 * @param base SPI base pointer
Kojto 148:fd96258d940d 333 */
Kojto 148:fd96258d940d 334 void SPI_Deinit(SPI_Type *base);
Kojto 148:fd96258d940d 335
Kojto 148:fd96258d940d 336 /*!
Kojto 148:fd96258d940d 337 * @brief Enable or disable the SPI Master or Slave
Kojto 148:fd96258d940d 338 * @param base SPI base pointer
Kojto 148:fd96258d940d 339 * @param enable or disable ( true = enable, false = disable)
Kojto 148:fd96258d940d 340 */
Kojto 148:fd96258d940d 341 static inline void SPI_Enable(SPI_Type *base, bool enable)
Kojto 148:fd96258d940d 342 {
Kojto 148:fd96258d940d 343 if (enable)
Kojto 148:fd96258d940d 344 {
Kojto 148:fd96258d940d 345 base->CFG |= SPI_CFG_ENABLE_MASK;
Kojto 148:fd96258d940d 346 }
Kojto 148:fd96258d940d 347 else
Kojto 148:fd96258d940d 348 {
Kojto 148:fd96258d940d 349 base->CFG &= ~SPI_CFG_ENABLE_MASK;
Kojto 148:fd96258d940d 350 }
Kojto 148:fd96258d940d 351 }
Kojto 148:fd96258d940d 352
Kojto 148:fd96258d940d 353 /*! @} */
Kojto 148:fd96258d940d 354
Kojto 148:fd96258d940d 355 /*!
Kojto 148:fd96258d940d 356 * @name Status
Kojto 148:fd96258d940d 357 * @{
Kojto 148:fd96258d940d 358 */
Kojto 148:fd96258d940d 359
Kojto 148:fd96258d940d 360 /*!
Kojto 148:fd96258d940d 361 * @brief Gets the status flag.
Kojto 148:fd96258d940d 362 *
Kojto 148:fd96258d940d 363 * @param base SPI base pointer
Kojto 148:fd96258d940d 364 * @return SPI Status, use status flag to AND @ref _spi_statusflags could get the related status.
Kojto 148:fd96258d940d 365 */
Kojto 148:fd96258d940d 366 static inline uint32_t SPI_GetStatusFlags(SPI_Type *base)
Kojto 148:fd96258d940d 367 {
Kojto 148:fd96258d940d 368 assert(NULL != base);
Kojto 148:fd96258d940d 369 return base->FIFOSTAT;
Kojto 148:fd96258d940d 370 }
Kojto 148:fd96258d940d 371
Kojto 148:fd96258d940d 372 /*! @} */
Kojto 148:fd96258d940d 373
Kojto 148:fd96258d940d 374 /*!
Kojto 148:fd96258d940d 375 * @name Interrupts
Kojto 148:fd96258d940d 376 * @{
Kojto 148:fd96258d940d 377 */
Kojto 148:fd96258d940d 378
Kojto 148:fd96258d940d 379 /*!
Kojto 148:fd96258d940d 380 * @brief Enables the interrupt for the SPI.
Kojto 148:fd96258d940d 381 *
Kojto 148:fd96258d940d 382 * @param base SPI base pointer
Kojto 148:fd96258d940d 383 * @param irqs SPI interrupt source. The parameter can be any combination of the following values:
Kojto 148:fd96258d940d 384 * @arg kSPI_RxLvlIrq
Kojto 148:fd96258d940d 385 * @arg kSPI_TxLvlIrq
Kojto 148:fd96258d940d 386 */
Kojto 148:fd96258d940d 387 static inline void SPI_EnableInterrupts(SPI_Type *base, uint32_t irqs)
Kojto 148:fd96258d940d 388 {
Kojto 148:fd96258d940d 389 assert(NULL != base);
Kojto 148:fd96258d940d 390 base->FIFOINTENSET = irqs;
Kojto 148:fd96258d940d 391 }
Kojto 148:fd96258d940d 392
Kojto 148:fd96258d940d 393 /*!
Kojto 148:fd96258d940d 394 * @brief Disables the interrupt for the SPI.
Kojto 148:fd96258d940d 395 *
Kojto 148:fd96258d940d 396 * @param base SPI base pointer
Kojto 148:fd96258d940d 397 * @param irqs SPI interrupt source. The parameter can be any combination of the following values:
Kojto 148:fd96258d940d 398 * @arg kSPI_RxLvlIrq
Kojto 148:fd96258d940d 399 * @arg kSPI_TxLvlIrq
Kojto 148:fd96258d940d 400 */
Kojto 148:fd96258d940d 401 static inline void SPI_DisableInterrupts(SPI_Type *base, uint32_t irqs)
Kojto 148:fd96258d940d 402 {
Kojto 148:fd96258d940d 403 assert(NULL != base);
Kojto 148:fd96258d940d 404 base->FIFOINTENCLR = irqs;
Kojto 148:fd96258d940d 405 }
Kojto 148:fd96258d940d 406
Kojto 148:fd96258d940d 407 /*! @} */
Kojto 148:fd96258d940d 408
Kojto 148:fd96258d940d 409 /*!
Kojto 148:fd96258d940d 410 * @name DMA Control
Kojto 148:fd96258d940d 411 * @{
Kojto 148:fd96258d940d 412 */
Kojto 148:fd96258d940d 413
Kojto 148:fd96258d940d 414 /*!
Kojto 148:fd96258d940d 415 * @brief Enables the DMA request from SPI txFIFO.
Kojto 148:fd96258d940d 416 *
Kojto 148:fd96258d940d 417 * @param base SPI base pointer
Kojto 148:fd96258d940d 418 * @param enable True means enable DMA, false means disable DMA
Kojto 148:fd96258d940d 419 */
Kojto 148:fd96258d940d 420 void SPI_EnableTxDMA(SPI_Type *base, bool enable);
Kojto 148:fd96258d940d 421
Kojto 148:fd96258d940d 422 /*!
Kojto 148:fd96258d940d 423 * @brief Enables the DMA request from SPI rxFIFO.
Kojto 148:fd96258d940d 424 *
Kojto 148:fd96258d940d 425 * @param base SPI base pointer
Kojto 148:fd96258d940d 426 * @param enable True means enable DMA, false means disable DMA
Kojto 148:fd96258d940d 427 */
Kojto 148:fd96258d940d 428 void SPI_EnableRxDMA(SPI_Type *base, bool enable);
Kojto 148:fd96258d940d 429
Kojto 148:fd96258d940d 430 /*! @} */
Kojto 148:fd96258d940d 431
Kojto 148:fd96258d940d 432 /*!
Kojto 148:fd96258d940d 433 * @name Bus Operations
Kojto 148:fd96258d940d 434 * @{
Kojto 148:fd96258d940d 435 */
Kojto 148:fd96258d940d 436
Kojto 148:fd96258d940d 437 /*!
Kojto 148:fd96258d940d 438 * @brief Sets the baud rate for SPI transfer. This is only used in master.
Kojto 148:fd96258d940d 439 *
Kojto 148:fd96258d940d 440 * @param base SPI base pointer
Kojto 148:fd96258d940d 441 * @param baudrate_Bps baud rate needed in Hz.
Kojto 148:fd96258d940d 442 * @param srcClock_Hz SPI source clock frequency in Hz.
Kojto 148:fd96258d940d 443 */
Kojto 148:fd96258d940d 444 status_t SPI_MasterSetBaud(SPI_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz);
Kojto 148:fd96258d940d 445
Kojto 148:fd96258d940d 446 /*!
Kojto 148:fd96258d940d 447 * @brief Writes a data into the SPI data register.
Kojto 148:fd96258d940d 448 *
Kojto 148:fd96258d940d 449 * @param base SPI base pointer
Kojto 148:fd96258d940d 450 * @param data needs to be write.
Kojto 148:fd96258d940d 451 * @param configFlags transfer configuration options @ref spi_xfer_option_t
Kojto 148:fd96258d940d 452 */
Kojto 148:fd96258d940d 453 void SPI_WriteData(SPI_Type *base, uint16_t data, uint32_t configFlags);
Kojto 148:fd96258d940d 454
Kojto 148:fd96258d940d 455 /*!
Kojto 148:fd96258d940d 456 * @brief Gets a data from the SPI data register.
Kojto 148:fd96258d940d 457 *
Kojto 148:fd96258d940d 458 * @param base SPI base pointer
Kojto 148:fd96258d940d 459 * @return Data in the register.
Kojto 148:fd96258d940d 460 */
Kojto 148:fd96258d940d 461 static inline uint32_t SPI_ReadData(SPI_Type *base)
Kojto 148:fd96258d940d 462 {
Kojto 148:fd96258d940d 463 assert(NULL != base);
Kojto 148:fd96258d940d 464 return base->FIFORD;
Kojto 148:fd96258d940d 465 }
Kojto 148:fd96258d940d 466
Kojto 148:fd96258d940d 467 /*! @} */
Kojto 148:fd96258d940d 468
Kojto 148:fd96258d940d 469 /*!
Kojto 148:fd96258d940d 470 * @name Transactional
Kojto 148:fd96258d940d 471 * @{
Kojto 148:fd96258d940d 472 */
Kojto 148:fd96258d940d 473
Kojto 148:fd96258d940d 474 /*!
Kojto 148:fd96258d940d 475 * @brief Initializes the SPI master handle.
Kojto 148:fd96258d940d 476 *
Kojto 148:fd96258d940d 477 * This function initializes the SPI master handle which can be used for other SPI master transactional APIs. Usually,
Kojto 148:fd96258d940d 478 * for a specified SPI instance, call this API once to get the initialized handle.
Kojto 148:fd96258d940d 479 *
Kojto 148:fd96258d940d 480 * @param base SPI peripheral base address.
Kojto 148:fd96258d940d 481 * @param handle SPI handle pointer.
Kojto 148:fd96258d940d 482 * @param callback Callback function.
Kojto 148:fd96258d940d 483 * @param userData User data.
Kojto 148:fd96258d940d 484 */
Kojto 148:fd96258d940d 485 status_t SPI_MasterTransferCreateHandle(SPI_Type *base,
Kojto 148:fd96258d940d 486 spi_master_handle_t *handle,
Kojto 148:fd96258d940d 487 spi_master_callback_t callback,
Kojto 148:fd96258d940d 488 void *userData);
Kojto 148:fd96258d940d 489
Kojto 148:fd96258d940d 490 /*!
Kojto 148:fd96258d940d 491 * @brief Transfers a block of data using a polling method.
Kojto 148:fd96258d940d 492 *
Kojto 148:fd96258d940d 493 * @param base SPI base pointer
Kojto 148:fd96258d940d 494 * @param xfer pointer to spi_xfer_config_t structure
Kojto 148:fd96258d940d 495 * @retval kStatus_Success Successfully start a transfer.
Kojto 148:fd96258d940d 496 * @retval kStatus_InvalidArgument Input argument is invalid.
Kojto 148:fd96258d940d 497 */
Kojto 148:fd96258d940d 498 status_t SPI_MasterTransferBlocking(SPI_Type *base, spi_transfer_t *xfer);
Kojto 148:fd96258d940d 499
Kojto 148:fd96258d940d 500 /*!
Kojto 148:fd96258d940d 501 * @brief Performs a non-blocking SPI interrupt transfer.
Kojto 148:fd96258d940d 502 *
Kojto 148:fd96258d940d 503 * @param base SPI peripheral base address.
Kojto 148:fd96258d940d 504 * @param handle pointer to spi_master_handle_t structure which stores the transfer state
Kojto 148:fd96258d940d 505 * @param xfer pointer to spi_xfer_config_t structure
Kojto 148:fd96258d940d 506 * @retval kStatus_Success Successfully start a transfer.
Kojto 148:fd96258d940d 507 * @retval kStatus_InvalidArgument Input argument is invalid.
Kojto 148:fd96258d940d 508 * @retval kStatus_SPI_Busy SPI is not idle, is running another transfer.
Kojto 148:fd96258d940d 509 */
Kojto 148:fd96258d940d 510 status_t SPI_MasterTransferNonBlocking(SPI_Type *base, spi_master_handle_t *handle, spi_transfer_t *xfer);
Kojto 148:fd96258d940d 511
Kojto 148:fd96258d940d 512 /*!
Kojto 148:fd96258d940d 513 * @brief Gets the master transfer count.
Kojto 148:fd96258d940d 514 *
Kojto 148:fd96258d940d 515 * This function gets the master transfer count.
Kojto 148:fd96258d940d 516 *
Kojto 148:fd96258d940d 517 * @param base SPI peripheral base address.
Kojto 148:fd96258d940d 518 * @param handle Pointer to the spi_master_handle_t structure which stores the transfer state.
Kojto 148:fd96258d940d 519 * @param count The number of bytes transferred by using the non-blocking transaction.
Kojto 148:fd96258d940d 520 * @return status of status_t.
Kojto 148:fd96258d940d 521 */
Kojto 148:fd96258d940d 522 status_t SPI_MasterTransferGetCount(SPI_Type *base, spi_master_handle_t *handle, size_t *count);
Kojto 148:fd96258d940d 523
Kojto 148:fd96258d940d 524 /*!
Kojto 148:fd96258d940d 525 * @brief SPI master aborts a transfer using an interrupt.
Kojto 148:fd96258d940d 526 *
Kojto 148:fd96258d940d 527 * This function aborts a transfer using an interrupt.
Kojto 148:fd96258d940d 528 *
Kojto 148:fd96258d940d 529 * @param base SPI peripheral base address.
Kojto 148:fd96258d940d 530 * @param handle Pointer to the spi_master_handle_t structure which stores the transfer state.
Kojto 148:fd96258d940d 531 */
Kojto 148:fd96258d940d 532 void SPI_MasterTransferAbort(SPI_Type *base, spi_master_handle_t *handle);
Kojto 148:fd96258d940d 533
Kojto 148:fd96258d940d 534 /*!
Kojto 148:fd96258d940d 535 * @brief Interrupts the handler for the SPI.
Kojto 148:fd96258d940d 536 *
Kojto 148:fd96258d940d 537 * @param base SPI peripheral base address.
Kojto 148:fd96258d940d 538 * @param handle pointer to spi_master_handle_t structure which stores the transfer state.
Kojto 148:fd96258d940d 539 */
Kojto 148:fd96258d940d 540 void SPI_MasterTransferHandleIRQ(SPI_Type *base, spi_master_handle_t *handle);
Kojto 148:fd96258d940d 541
Kojto 148:fd96258d940d 542 /*!
Kojto 148:fd96258d940d 543 * @brief Initializes the SPI slave handle.
Kojto 148:fd96258d940d 544 *
Kojto 148:fd96258d940d 545 * This function initializes the SPI slave handle which can be used for other SPI slave transactional APIs. Usually,
Kojto 148:fd96258d940d 546 * for a specified SPI instance, call this API once to get the initialized handle.
Kojto 148:fd96258d940d 547 *
Kojto 148:fd96258d940d 548 * @param base SPI peripheral base address.
Kojto 148:fd96258d940d 549 * @param handle SPI handle pointer.
Kojto 148:fd96258d940d 550 * @param callback Callback function.
Kojto 148:fd96258d940d 551 * @param userData User data.
Kojto 148:fd96258d940d 552 */
Kojto 148:fd96258d940d 553 static inline status_t SPI_SlaveTransferCreateHandle(SPI_Type *base,
Kojto 148:fd96258d940d 554 spi_slave_handle_t *handle,
Kojto 148:fd96258d940d 555 spi_slave_callback_t callback,
Kojto 148:fd96258d940d 556 void *userData)
Kojto 148:fd96258d940d 557 {
Kojto 148:fd96258d940d 558 return SPI_MasterTransferCreateHandle(base, handle, callback, userData);
Kojto 148:fd96258d940d 559 }
Kojto 148:fd96258d940d 560
Kojto 148:fd96258d940d 561 /*!
Kojto 148:fd96258d940d 562 * @brief Performs a non-blocking SPI slave interrupt transfer.
Kojto 148:fd96258d940d 563 *
Kojto 148:fd96258d940d 564 * @note The API returns immediately after the transfer initialization is finished.
Kojto 148:fd96258d940d 565 *
Kojto 148:fd96258d940d 566 * @param base SPI peripheral base address.
Kojto 148:fd96258d940d 567 * @param handle pointer to spi_master_handle_t structure which stores the transfer state
Kojto 148:fd96258d940d 568 * @param xfer pointer to spi_xfer_config_t structure
Kojto 148:fd96258d940d 569 * @retval kStatus_Success Successfully start a transfer.
Kojto 148:fd96258d940d 570 * @retval kStatus_InvalidArgument Input argument is invalid.
Kojto 148:fd96258d940d 571 * @retval kStatus_SPI_Busy SPI is not idle, is running another transfer.
Kojto 148:fd96258d940d 572 */
Kojto 148:fd96258d940d 573 static inline status_t SPI_SlaveTransferNonBlocking(SPI_Type *base, spi_slave_handle_t *handle, spi_transfer_t *xfer)
Kojto 148:fd96258d940d 574 {
Kojto 148:fd96258d940d 575 return SPI_MasterTransferNonBlocking(base, handle, xfer);
Kojto 148:fd96258d940d 576 }
Kojto 148:fd96258d940d 577
Kojto 148:fd96258d940d 578 /*!
Kojto 148:fd96258d940d 579 * @brief Gets the slave transfer count.
Kojto 148:fd96258d940d 580 *
Kojto 148:fd96258d940d 581 * This function gets the slave transfer count.
Kojto 148:fd96258d940d 582 *
Kojto 148:fd96258d940d 583 * @param base SPI peripheral base address.
Kojto 148:fd96258d940d 584 * @param handle Pointer to the spi_master_handle_t structure which stores the transfer state.
Kojto 148:fd96258d940d 585 * @param count The number of bytes transferred by using the non-blocking transaction.
Kojto 148:fd96258d940d 586 * @return status of status_t.
Kojto 148:fd96258d940d 587 */
Kojto 148:fd96258d940d 588 static inline status_t SPI_SlaveTransferGetCount(SPI_Type *base, spi_slave_handle_t *handle, size_t *count)
Kojto 148:fd96258d940d 589 {
Kojto 148:fd96258d940d 590 return SPI_MasterTransferGetCount(base, (spi_master_handle_t*)handle, count);
Kojto 148:fd96258d940d 591 }
Kojto 148:fd96258d940d 592
Kojto 148:fd96258d940d 593 /*!
Kojto 148:fd96258d940d 594 * @brief SPI slave aborts a transfer using an interrupt.
Kojto 148:fd96258d940d 595 *
Kojto 148:fd96258d940d 596 * This function aborts a transfer using an interrupt.
Kojto 148:fd96258d940d 597 *
Kojto 148:fd96258d940d 598 * @param base SPI peripheral base address.
Kojto 148:fd96258d940d 599 * @param handle Pointer to the spi_slave_handle_t structure which stores the transfer state.
Kojto 148:fd96258d940d 600 */
Kojto 148:fd96258d940d 601 static inline void SPI_SlaveTransferAbort(SPI_Type *base, spi_slave_handle_t *handle)
Kojto 148:fd96258d940d 602 {
Kojto 148:fd96258d940d 603 SPI_MasterTransferAbort(base, (spi_master_handle_t*)handle);
Kojto 148:fd96258d940d 604 }
Kojto 148:fd96258d940d 605
Kojto 148:fd96258d940d 606 /*!
Kojto 148:fd96258d940d 607 * @brief Interrupts a handler for the SPI slave.
Kojto 148:fd96258d940d 608 *
Kojto 148:fd96258d940d 609 * @param base SPI peripheral base address.
Kojto 148:fd96258d940d 610 * @param handle pointer to spi_slave_handle_t structure which stores the transfer state
Kojto 148:fd96258d940d 611 */
Kojto 148:fd96258d940d 612 static inline void SPI_SlaveTransferHandleIRQ(SPI_Type *base, spi_slave_handle_t *handle)
Kojto 148:fd96258d940d 613 {
Kojto 148:fd96258d940d 614 SPI_MasterTransferHandleIRQ(base, handle);
Kojto 148:fd96258d940d 615 }
Kojto 148:fd96258d940d 616
Kojto 148:fd96258d940d 617 /*! @} */
Kojto 148:fd96258d940d 618
Kojto 148:fd96258d940d 619 #if defined(__cplusplus)
Kojto 148:fd96258d940d 620 }
Kojto 148:fd96258d940d 621 #endif
Kojto 148:fd96258d940d 622
Kojto 148:fd96258d940d 623 /*! @} */
Kojto 148:fd96258d940d 624
Kojto 148:fd96258d940d 625 #endif /* _FSL_SPI_H_*/