mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_KW41Z/TOOLCHAIN_GCC_ARM/fsl_dcdc.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30
AnnaBridge 171:3a7713b1edbc 31 #ifndef _FSL_DCDC_H_
AnnaBridge 171:3a7713b1edbc 32 #define _FSL_DCDC_H_
AnnaBridge 171:3a7713b1edbc 33
AnnaBridge 171:3a7713b1edbc 34 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /*!
AnnaBridge 171:3a7713b1edbc 37 * @addtogroup dcdc
AnnaBridge 171:3a7713b1edbc 38 * @{
AnnaBridge 171:3a7713b1edbc 39 */
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 42 * Definitions
AnnaBridge 171:3a7713b1edbc 43 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 44 /*! @brief DCDC driver version. */
AnnaBridge 171:3a7713b1edbc 45 #define FSL_DCDC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /*!
AnnaBridge 171:3a7713b1edbc 48 * @brief Status flags.
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50 enum _dcdc_status_flags_t
AnnaBridge 171:3a7713b1edbc 51 {
AnnaBridge 171:3a7713b1edbc 52 kDCDC_LockedOKStatus = (1U << 0), /*!< Status to indicate DCDC lock. Read only bit. */
AnnaBridge 171:3a7713b1edbc 53 kDCDC_PSwitchStatus = (1U << 1), /*!< Status to indicate PSWITCH signal. Read only bit. */
AnnaBridge 171:3a7713b1edbc 54 kDCDC_PSwitchInterruptStatus = (1U << 2), /*!< PSWITCH edge detection interrupt status. */
AnnaBridge 171:3a7713b1edbc 55 };
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /*!
AnnaBridge 171:3a7713b1edbc 58 * @brief Interrupts.
AnnaBridge 171:3a7713b1edbc 59 */
AnnaBridge 171:3a7713b1edbc 60 enum _dcdc_interrupt_enable_t
AnnaBridge 171:3a7713b1edbc 61 {
AnnaBridge 171:3a7713b1edbc 62 kDCDC_PSwitchEdgeDetectInterruptEnable = DCDC_REG6_PSWITCH_INT_MUTE_MASK, /*!< Enable the edge detect interrupt. */
AnnaBridge 171:3a7713b1edbc 63 };
AnnaBridge 171:3a7713b1edbc 64
AnnaBridge 171:3a7713b1edbc 65 /*!
AnnaBridge 171:3a7713b1edbc 66 * @brief Events for PSWITCH signal(pin).
AnnaBridge 171:3a7713b1edbc 67 */
AnnaBridge 171:3a7713b1edbc 68 enum _dcdc_pswitch_detect_event_t
AnnaBridge 171:3a7713b1edbc 69 {
AnnaBridge 171:3a7713b1edbc 70 kDCDC_PSwitchFallingEdgeDetectEnable = DCDC_REG6_PSWITCH_INT_FALL_EN_MASK, /*!< Enable falling edge detect. */
AnnaBridge 171:3a7713b1edbc 71 kDCDC_PSwitchRisingEdgeDetectEnable = DCDC_REG6_PSWITCH_INT_RISE_EN_MASK, /*!< Enable rising edge detect. */
AnnaBridge 171:3a7713b1edbc 72 };
AnnaBridge 171:3a7713b1edbc 73
AnnaBridge 171:3a7713b1edbc 74 /*!
AnnaBridge 171:3a7713b1edbc 75 * @brief DCDC work mode in SoC's low power condition.
AnnaBridge 171:3a7713b1edbc 76 */
AnnaBridge 171:3a7713b1edbc 77 typedef enum _dcdc_work_mode
AnnaBridge 171:3a7713b1edbc 78 {
AnnaBridge 171:3a7713b1edbc 79 kDCDC_WorkInContinuousMode = 0U, /*!< DCDC works in continuous mode when SOC is in low power mode. */
AnnaBridge 171:3a7713b1edbc 80 kDCDC_WorkInPulsedMode = 1U, /*!< DCDC works in pulsed mode when SOC is in low power mode. */
AnnaBridge 171:3a7713b1edbc 81 } dcdc_work_mode_t;
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 /*!
AnnaBridge 171:3a7713b1edbc 84 * @brief Hysteretic upper/lower threshold value in low power mode.
AnnaBridge 171:3a7713b1edbc 85 */
AnnaBridge 171:3a7713b1edbc 86 typedef enum _dcdc_hysteretic_threshold_offset_value
AnnaBridge 171:3a7713b1edbc 87 {
AnnaBridge 171:3a7713b1edbc 88 kDCDC_HystereticThresholdOffset0mV = 0U, /*!< Target voltage value +/- 0mV. */
AnnaBridge 171:3a7713b1edbc 89 kDCDC_HystereticThresholdOffset25mV = 1U, /*!< Target voltage value +/- 25mV. */
AnnaBridge 171:3a7713b1edbc 90 kDCDC_HystereticThresholdOffset50mV = 2U, /*!< Target voltage value +/- 50mV. */
AnnaBridge 171:3a7713b1edbc 91 kDCDC_HystereticThresholdOffset75mV = 3U, /*!< Target voltage value +/- 75mV. */
AnnaBridge 171:3a7713b1edbc 92 } dcdc_hysteretic_threshold_offset_value_t;
AnnaBridge 171:3a7713b1edbc 93
AnnaBridge 171:3a7713b1edbc 94 /*!
AnnaBridge 171:3a7713b1edbc 95 * @brief VBAT voltage divider.
AnnaBridge 171:3a7713b1edbc 96 */
AnnaBridge 171:3a7713b1edbc 97 typedef enum _dcdc_vbat_divider
AnnaBridge 171:3a7713b1edbc 98 {
AnnaBridge 171:3a7713b1edbc 99 kDCDC_VBatVoltageDividerOff = 0U, /*!< The sensor signal is disabled. */
AnnaBridge 171:3a7713b1edbc 100 kDCDC_VBatVoltageDivider1 = 1U, /*!< VBat. */
AnnaBridge 171:3a7713b1edbc 101 kDCDC_VBatVoltageDivider2 = 2U, /*!< VBat/2. */
AnnaBridge 171:3a7713b1edbc 102 kDCDC_VBatVoltageDivider4 = 3U, /*!< VBat/4 */
AnnaBridge 171:3a7713b1edbc 103 } dcdc_vbat_divider_t;
AnnaBridge 171:3a7713b1edbc 104
AnnaBridge 171:3a7713b1edbc 105 /*!
AnnaBridge 171:3a7713b1edbc 106 * @brief Oscillator clock option.
AnnaBridge 171:3a7713b1edbc 107 */
AnnaBridge 171:3a7713b1edbc 108 typedef enum _dcdc_clock_source_t
AnnaBridge 171:3a7713b1edbc 109 {
AnnaBridge 171:3a7713b1edbc 110 kDCDC_ClockAutoSwitch = 0U, /*!< Automatic clock switch from internal oscillator to external clock. */
AnnaBridge 171:3a7713b1edbc 111 kDCDC_ClockInternalOsc, /* Use internal oscillator. */
AnnaBridge 171:3a7713b1edbc 112 kDCDC_ClockExternalOsc, /* Use external 32M crystal oscillator. */
AnnaBridge 171:3a7713b1edbc 113 } dcdc_clock_source_t;
AnnaBridge 171:3a7713b1edbc 114
AnnaBridge 171:3a7713b1edbc 115 /*!
AnnaBridge 171:3a7713b1edbc 116 * @brief Configuration for the low power.
AnnaBridge 171:3a7713b1edbc 117 */
AnnaBridge 171:3a7713b1edbc 118 typedef struct _dcdc_low_power_config
AnnaBridge 171:3a7713b1edbc 119 {
AnnaBridge 171:3a7713b1edbc 120 dcdc_work_mode_t workModeInVLPRW; /*!< Select the behavior of DCDC in device VLPR and VLPW low power modes. */
AnnaBridge 171:3a7713b1edbc 121 dcdc_work_mode_t workModeInVLPS; /*!< Select the behavior of DCDC in device VLPS low power modes. */
AnnaBridge 171:3a7713b1edbc 122 bool enableHysteresisVoltageSense; /*!< Enable hysteresis in low power voltage sense. */
AnnaBridge 171:3a7713b1edbc 123 bool enableAdjustHystereticValueSense; /*!< Adjust hysteretic value in low power voltage sense. */
AnnaBridge 171:3a7713b1edbc 124 bool enableHystersisComparator; /*!< Enable hysteresis in low power comparator. */
AnnaBridge 171:3a7713b1edbc 125 bool enableAdjustHystereticValueComparator; /*!< Adjust hysteretic value in low power comparator. */
AnnaBridge 171:3a7713b1edbc 126 dcdc_hysteretic_threshold_offset_value_t hystereticUpperThresholdValue; /*!< Configure the hysteretic upper
AnnaBridge 171:3a7713b1edbc 127 threshold value in low power mode. */
AnnaBridge 171:3a7713b1edbc 128 dcdc_hysteretic_threshold_offset_value_t hystereticLowerThresholdValue; /*!< Configure the hysteretic lower
AnnaBridge 171:3a7713b1edbc 129 threshold value in low power mode. */
AnnaBridge 171:3a7713b1edbc 130 bool enableDiffComparators; /*!< Enable low power differential comparators, to sense lower supply in pulsed mode. */
AnnaBridge 171:3a7713b1edbc 131 } dcdc_low_power_config_t;
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 /*!
AnnaBridge 171:3a7713b1edbc 134 * @brief Configuration for the loop control.
AnnaBridge 171:3a7713b1edbc 135 */
AnnaBridge 171:3a7713b1edbc 136 typedef struct _dcdc_loop_control_config
AnnaBridge 171:3a7713b1edbc 137 {
AnnaBridge 171:3a7713b1edbc 138 bool enableDiffHysteresis; /*!< Enable hysteresis in switching converter differential mode analog comparators. This
AnnaBridge 171:3a7713b1edbc 139 feature improves transient supply ripple and efficiency. */
AnnaBridge 171:3a7713b1edbc 140 bool enableCommonHysteresis; /*!< Enable hysteresis in switching converter common mode analog comparators. This
AnnaBridge 171:3a7713b1edbc 141 feature improves transient supply ripple and efficiency. */
AnnaBridge 171:3a7713b1edbc 142 bool enableDiffHysteresisThresh; /*!< This field act the same rule as enableDiffHysteresis. However, if this field
AnnaBridge 171:3a7713b1edbc 143 is enabled along with the enableDiffHysteresis, the Hysteresis wuold be
AnnaBridge 171:3a7713b1edbc 144 doubled. */
AnnaBridge 171:3a7713b1edbc 145 bool enableCommonHysteresisThresh; /*!< This field act the same rule as enableCommonHysteresis. However, if this
AnnaBridge 171:3a7713b1edbc 146 field is enabled along with the enableCommonHysteresis, the Hysteresis wuold
AnnaBridge 171:3a7713b1edbc 147 be doubled. */
AnnaBridge 171:3a7713b1edbc 148 bool enableInvertHysteresisSign; /*!< Invert the sign of the hysteresis in DC-DC analog comparators. */
AnnaBridge 171:3a7713b1edbc 149 } dcdc_loop_control_config_t;
AnnaBridge 171:3a7713b1edbc 150
AnnaBridge 171:3a7713b1edbc 151 /*!
AnnaBridge 171:3a7713b1edbc 152 * @brief Configuration for min power setting.
AnnaBridge 171:3a7713b1edbc 153 */
AnnaBridge 171:3a7713b1edbc 154 typedef struct _dcdc_min_power_config
AnnaBridge 171:3a7713b1edbc 155 {
AnnaBridge 171:3a7713b1edbc 156 /* For Continuous Mode. */
AnnaBridge 171:3a7713b1edbc 157 bool enableUseHalfFetForContinuous; /*!< Use half switch FET for the continuous mode. */
AnnaBridge 171:3a7713b1edbc 158 bool enableUseDoubleFetForContinuous; /*!< Use double switch FET for the continuous mode. */
AnnaBridge 171:3a7713b1edbc 159 bool enableUseHalfFreqForContinuous; /*!< Set DCDC clock to half frequency for the continuous mode. */
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 /* For Pulsed Mode. */
AnnaBridge 171:3a7713b1edbc 162 bool enableUseHalfFetForPulsed; /*!< Use half switch FET for the Pulsed mode. */
AnnaBridge 171:3a7713b1edbc 163 bool enableUseDoubleFetForPulsed; /*!< Use double switch FET for the Pulsed mode. */
AnnaBridge 171:3a7713b1edbc 164 bool enableUseHalfFreqForPulsed; /*!< Set DCDC clock to half frequency for the Pulsed mode. */
AnnaBridge 171:3a7713b1edbc 165 } dcdc_min_power_config_t;
AnnaBridge 171:3a7713b1edbc 166
AnnaBridge 171:3a7713b1edbc 167 /*!
AnnaBridge 171:3a7713b1edbc 168 * @brief Configuration for the integrator in pulsed mode.
AnnaBridge 171:3a7713b1edbc 169 */
AnnaBridge 171:3a7713b1edbc 170 typedef struct _dcdc_pulsed_integrator_config_t
AnnaBridge 171:3a7713b1edbc 171 {
AnnaBridge 171:3a7713b1edbc 172 bool enableUseUserIntegratorValue; /*!< Enable to use the setting value in userIntegratorValue field. Otherwise, the
AnnaBridge 171:3a7713b1edbc 173 predefined hardware setting would be applied internally. */
AnnaBridge 171:3a7713b1edbc 174 uint32_t userIntegratorValue; /*!< User defined integrator value. The available value is 19-bit. */
AnnaBridge 171:3a7713b1edbc 175 bool enablePulseRunSpeedup; /*!< Enable pulse run speedup. */
AnnaBridge 171:3a7713b1edbc 176 } dcdc_pulsed_integrator_config_t;
AnnaBridge 171:3a7713b1edbc 177
AnnaBridge 171:3a7713b1edbc 178 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 179 extern "C" {
AnnaBridge 171:3a7713b1edbc 180 #endif
AnnaBridge 171:3a7713b1edbc 181
AnnaBridge 171:3a7713b1edbc 182 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 183 * API
AnnaBridge 171:3a7713b1edbc 184 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 185
AnnaBridge 171:3a7713b1edbc 186 /*!
AnnaBridge 171:3a7713b1edbc 187 * @name Initialization and deinitialization
AnnaBridge 171:3a7713b1edbc 188 * @{
AnnaBridge 171:3a7713b1edbc 189 */
AnnaBridge 171:3a7713b1edbc 190
AnnaBridge 171:3a7713b1edbc 191 /*!
AnnaBridge 171:3a7713b1edbc 192 * @brief Enable the access to DCDC registers.
AnnaBridge 171:3a7713b1edbc 193 *
AnnaBridge 171:3a7713b1edbc 194 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 195 */
AnnaBridge 171:3a7713b1edbc 196 void DCDC_Init(DCDC_Type *base);
AnnaBridge 171:3a7713b1edbc 197
AnnaBridge 171:3a7713b1edbc 198 /*!
AnnaBridge 171:3a7713b1edbc 199 * @brief Disable the access to DCDC registers.
AnnaBridge 171:3a7713b1edbc 200 *
AnnaBridge 171:3a7713b1edbc 201 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 202 */
AnnaBridge 171:3a7713b1edbc 203 void DCDC_Deinit(DCDC_Type *base);
AnnaBridge 171:3a7713b1edbc 204
AnnaBridge 171:3a7713b1edbc 205 /* @} */
AnnaBridge 171:3a7713b1edbc 206
AnnaBridge 171:3a7713b1edbc 207 /*!
AnnaBridge 171:3a7713b1edbc 208 * @name Status
AnnaBridge 171:3a7713b1edbc 209 * @{
AnnaBridge 171:3a7713b1edbc 210 */
AnnaBridge 171:3a7713b1edbc 211
AnnaBridge 171:3a7713b1edbc 212 /*!
AnnaBridge 171:3a7713b1edbc 213 * @brief Get status flags.
AnnaBridge 171:3a7713b1edbc 214 *
AnnaBridge 171:3a7713b1edbc 215 * @brief base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 216 * @return Masks of asserted status flags. See to "_dcdc_status_flags_t".
AnnaBridge 171:3a7713b1edbc 217 */
AnnaBridge 171:3a7713b1edbc 218 uint32_t DCDC_GetStatusFlags(DCDC_Type *base);
AnnaBridge 171:3a7713b1edbc 219
AnnaBridge 171:3a7713b1edbc 220 /*!
AnnaBridge 171:3a7713b1edbc 221 * @brief Clear status flags.
AnnaBridge 171:3a7713b1edbc 222 *
AnnaBridge 171:3a7713b1edbc 223 * @brief base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 224 * @brief mask Mask of status values that would be cleared. See to "_dcdc_status_flags_t".
AnnaBridge 171:3a7713b1edbc 225 */
AnnaBridge 171:3a7713b1edbc 226 void DCDC_ClearStatusFlags(DCDC_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 227
AnnaBridge 171:3a7713b1edbc 228 /* @} */
AnnaBridge 171:3a7713b1edbc 229
AnnaBridge 171:3a7713b1edbc 230 /*!
AnnaBridge 171:3a7713b1edbc 231 * @name Interrupts
AnnaBridge 171:3a7713b1edbc 232 * @{
AnnaBridge 171:3a7713b1edbc 233 */
AnnaBridge 171:3a7713b1edbc 234
AnnaBridge 171:3a7713b1edbc 235 /*!
AnnaBridge 171:3a7713b1edbc 236 * @brief Enable interrupts.
AnnaBridge 171:3a7713b1edbc 237 *
AnnaBridge 171:3a7713b1edbc 238 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 239 * @param mask Mask of interrupt events that would be enabled. See to "_dcdc_interrupt_enable_t".
AnnaBridge 171:3a7713b1edbc 240 */
AnnaBridge 171:3a7713b1edbc 241 static inline void DCDC_EnableInterrupts(DCDC_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 242 {
AnnaBridge 171:3a7713b1edbc 243 assert(0U == (mask & ~DCDC_REG6_PSWITCH_INT_MUTE_MASK)); /* Only the PSWITCH interrupt is supported. */
AnnaBridge 171:3a7713b1edbc 244
AnnaBridge 171:3a7713b1edbc 245 /* By default, the PSWITCH is enabled. */
AnnaBridge 171:3a7713b1edbc 246 base->REG6 &= ~mask;
AnnaBridge 171:3a7713b1edbc 247 }
AnnaBridge 171:3a7713b1edbc 248
AnnaBridge 171:3a7713b1edbc 249 /*!
AnnaBridge 171:3a7713b1edbc 250 * @brief Disable interrupts.
AnnaBridge 171:3a7713b1edbc 251 *
AnnaBridge 171:3a7713b1edbc 252 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 253 * @param mask Mask of interrupt events that would be disabled. See to "_dcdc_interrupt_enable_t".
AnnaBridge 171:3a7713b1edbc 254 */
AnnaBridge 171:3a7713b1edbc 255 static inline void DCDC_DisableInterrupts(DCDC_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 256 {
AnnaBridge 171:3a7713b1edbc 257 assert(0U == (mask & ~DCDC_REG6_PSWITCH_INT_MUTE_MASK)); /* Only the pswitch interrupt is supported. */
AnnaBridge 171:3a7713b1edbc 258
AnnaBridge 171:3a7713b1edbc 259 base->REG6 |= mask;
AnnaBridge 171:3a7713b1edbc 260 }
AnnaBridge 171:3a7713b1edbc 261
AnnaBridge 171:3a7713b1edbc 262 /*!
AnnaBridge 171:3a7713b1edbc 263 * @brief Configure the PSWITCH interrupts.
AnnaBridge 171:3a7713b1edbc 264 *
AnnaBridge 171:3a7713b1edbc 265 * There are PSWITCH interrupt events can be triggered by falling edge or rising edge. So user can set the interrupt
AnnaBridge 171:3a7713b1edbc 266 * events that would be triggered with this function. Un-asserted events would be disabled. The interrupt of PSwitch
AnnaBridge 171:3a7713b1edbc 267 * should be enabled as well if to sense the PSWTICH event.
AnnaBridge 171:3a7713b1edbc 268 * By default, no interrupt events would be enabled.
AnnaBridge 171:3a7713b1edbc 269 *
AnnaBridge 171:3a7713b1edbc 270 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 271 * @param mask Mask of interrupt events for PSwtich. See to "_dcdc_pswitch_detect_event_t".
AnnaBridge 171:3a7713b1edbc 272 */
AnnaBridge 171:3a7713b1edbc 273 void DCDC_SetPSwitchInterruptConfig(DCDC_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 274
AnnaBridge 171:3a7713b1edbc 275 /* @} */
AnnaBridge 171:3a7713b1edbc 276
AnnaBridge 171:3a7713b1edbc 277 /*!
AnnaBridge 171:3a7713b1edbc 278 * @name Misc control.
AnnaBridge 171:3a7713b1edbc 279 * @{
AnnaBridge 171:3a7713b1edbc 280 */
AnnaBridge 171:3a7713b1edbc 281 /*!
AnnaBridge 171:3a7713b1edbc 282 * @brief Get the default setting for low power configuration.
AnnaBridge 171:3a7713b1edbc 283 *
AnnaBridge 171:3a7713b1edbc 284 * The default configuration are set according to responding registers' setting when powered on.
AnnaBridge 171:3a7713b1edbc 285 * They are:
AnnaBridge 171:3a7713b1edbc 286 * @code
AnnaBridge 171:3a7713b1edbc 287 * config->workModeInVLPRW = kDCDC_WorkInPulsedMode;
AnnaBridge 171:3a7713b1edbc 288 * config->workModeInVLPS = kDCDC_WorkInPulsedMode;
AnnaBridge 171:3a7713b1edbc 289 * config->enableHysteresisVoltageSense = true;
AnnaBridge 171:3a7713b1edbc 290 * config->enableAdjustHystereticValueSense = false;
AnnaBridge 171:3a7713b1edbc 291 * config->enableHystersisComparator = true;
AnnaBridge 171:3a7713b1edbc 292 * config->enableAdjustHystereticValueComparator = false;
AnnaBridge 171:3a7713b1edbc 293 * config->hystereticUpperThresholdValue = kDCDC_HystereticThresholdOffset75mV;
AnnaBridge 171:3a7713b1edbc 294 * config->hystereticLowerThresholdValue = kDCDC_HystereticThresholdOffset0mV;
AnnaBridge 171:3a7713b1edbc 295 * config->enableDiffComparators = false;
AnnaBridge 171:3a7713b1edbc 296 * @endcode
AnnaBridge 171:3a7713b1edbc 297 *
AnnaBridge 171:3a7713b1edbc 298 * @param config Pointer to configuration structure. See to "dcdc_low_power_config_t".
AnnaBridge 171:3a7713b1edbc 299 */
AnnaBridge 171:3a7713b1edbc 300 void DCDC_GetDefaultLowPowerConfig(dcdc_low_power_config_t *config);
AnnaBridge 171:3a7713b1edbc 301
AnnaBridge 171:3a7713b1edbc 302 /*!
AnnaBridge 171:3a7713b1edbc 303 * @brief Configure the low power for DCDC.
AnnaBridge 171:3a7713b1edbc 304 *
AnnaBridge 171:3a7713b1edbc 305 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 306 * @param config Pointer to configuration structure. See to "dcdc_low_power_config_t".
AnnaBridge 171:3a7713b1edbc 307 */
AnnaBridge 171:3a7713b1edbc 308 void DCDC_SetLowPowerConfig(DCDC_Type *base, const dcdc_low_power_config_t *config);
AnnaBridge 171:3a7713b1edbc 309
AnnaBridge 171:3a7713b1edbc 310 /*!
AnnaBridge 171:3a7713b1edbc 311 * @brief Get the default setting for loop control configuration.
AnnaBridge 171:3a7713b1edbc 312 *
AnnaBridge 171:3a7713b1edbc 313 * The default configuration are set according to responding registers' setting when powered on.
AnnaBridge 171:3a7713b1edbc 314 * They are:
AnnaBridge 171:3a7713b1edbc 315 * @code
AnnaBridge 171:3a7713b1edbc 316 * config->enableDiffHysteresis = false;
AnnaBridge 171:3a7713b1edbc 317 * config->enableCommonHysteresis = false;
AnnaBridge 171:3a7713b1edbc 318 * config->enableDiffHysteresisThresh = false;
AnnaBridge 171:3a7713b1edbc 319 * config->enableCommonHysteresisThresh = false;
AnnaBridge 171:3a7713b1edbc 320 * config->enableInvertHysteresisSign = false;
AnnaBridge 171:3a7713b1edbc 321 * @endcode
AnnaBridge 171:3a7713b1edbc 322 *
AnnaBridge 171:3a7713b1edbc 323 * @param config Pointer to configuration structure. See to "dcdc_loop_control_config_t".
AnnaBridge 171:3a7713b1edbc 324 */
AnnaBridge 171:3a7713b1edbc 325 void DCDC_GetDefaultLoopControlConfig(dcdc_loop_control_config_t *config);
AnnaBridge 171:3a7713b1edbc 326
AnnaBridge 171:3a7713b1edbc 327 /*!
AnnaBridge 171:3a7713b1edbc 328 * @brief Configure the loop control for DCDC.
AnnaBridge 171:3a7713b1edbc 329 *
AnnaBridge 171:3a7713b1edbc 330 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 331 * @param config Pointer to configuration structure. See to "dcdc_loop_control_config_t".
AnnaBridge 171:3a7713b1edbc 332 */
AnnaBridge 171:3a7713b1edbc 333 void DCDC_SetLoopControlConfig(DCDC_Type *base, const dcdc_loop_control_config_t *config);
AnnaBridge 171:3a7713b1edbc 334
AnnaBridge 171:3a7713b1edbc 335 /*!
AnnaBridge 171:3a7713b1edbc 336 * @brief Enable the XTAL OK detection circuit.
AnnaBridge 171:3a7713b1edbc 337 *
AnnaBridge 171:3a7713b1edbc 338 * The XTAL OK detection circuit is enabled by default.
AnnaBridge 171:3a7713b1edbc 339 *
AnnaBridge 171:3a7713b1edbc 340 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 341 * @param enable Enable the feature or not.
AnnaBridge 171:3a7713b1edbc 342 */
AnnaBridge 171:3a7713b1edbc 343 static inline void DCDC_EnableXtalOKDetectionCircuit(DCDC_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 344 {
AnnaBridge 171:3a7713b1edbc 345 if (enable)
AnnaBridge 171:3a7713b1edbc 346 {
AnnaBridge 171:3a7713b1edbc 347 base->REG0 &= ~DCDC_REG0_DCDC_XTALOK_DISABLE_MASK;
AnnaBridge 171:3a7713b1edbc 348 }
AnnaBridge 171:3a7713b1edbc 349 else
AnnaBridge 171:3a7713b1edbc 350 {
AnnaBridge 171:3a7713b1edbc 351 base->REG0 |= DCDC_REG0_DCDC_XTALOK_DISABLE_MASK;
AnnaBridge 171:3a7713b1edbc 352 }
AnnaBridge 171:3a7713b1edbc 353 }
AnnaBridge 171:3a7713b1edbc 354
AnnaBridge 171:3a7713b1edbc 355 /*!
AnnaBridge 171:3a7713b1edbc 356 * @brief Enable the output range comparator.
AnnaBridge 171:3a7713b1edbc 357 *
AnnaBridge 171:3a7713b1edbc 358 * The output range comparator is enabled by default.
AnnaBridge 171:3a7713b1edbc 359 *
AnnaBridge 171:3a7713b1edbc 360 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 361 * @param enable Enable the feature or not.
AnnaBridge 171:3a7713b1edbc 362 */
AnnaBridge 171:3a7713b1edbc 363 static inline void DCDC_EnableOutputRangeComparator(DCDC_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 364 {
AnnaBridge 171:3a7713b1edbc 365 if (enable)
AnnaBridge 171:3a7713b1edbc 366 {
AnnaBridge 171:3a7713b1edbc 367 base->REG0 &= ~DCDC_REG0_PWD_CMP_OFFSET_MASK;
AnnaBridge 171:3a7713b1edbc 368 }
AnnaBridge 171:3a7713b1edbc 369 else
AnnaBridge 171:3a7713b1edbc 370 {
AnnaBridge 171:3a7713b1edbc 371 base->REG0 |= DCDC_REG0_PWD_CMP_OFFSET_MASK;
AnnaBridge 171:3a7713b1edbc 372 }
AnnaBridge 171:3a7713b1edbc 373 }
AnnaBridge 171:3a7713b1edbc 374
AnnaBridge 171:3a7713b1edbc 375 /*!
AnnaBridge 171:3a7713b1edbc 376 * @brief Enable to reduce the DCDC current.
AnnaBridge 171:3a7713b1edbc 377 *
AnnaBridge 171:3a7713b1edbc 378 * To enable this feature will save approximately 20 µA in RUN mode. This feature is disabled by default.
AnnaBridge 171:3a7713b1edbc 379 *
AnnaBridge 171:3a7713b1edbc 380 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 381 * @param enable Enable the feature or not.
AnnaBridge 171:3a7713b1edbc 382 */
AnnaBridge 171:3a7713b1edbc 383 static inline void DCDC_EnableReduceCurrent(DCDC_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 384 {
AnnaBridge 171:3a7713b1edbc 385 if (enable)
AnnaBridge 171:3a7713b1edbc 386 {
AnnaBridge 171:3a7713b1edbc 387 base->REG0 |= DCDC_REG0_DCDC_LESS_I_MASK;
AnnaBridge 171:3a7713b1edbc 388 }
AnnaBridge 171:3a7713b1edbc 389 else
AnnaBridge 171:3a7713b1edbc 390 {
AnnaBridge 171:3a7713b1edbc 391 base->REG0 &= ~DCDC_REG0_DCDC_LESS_I_MASK;
AnnaBridge 171:3a7713b1edbc 392 }
AnnaBridge 171:3a7713b1edbc 393 }
AnnaBridge 171:3a7713b1edbc 394
AnnaBridge 171:3a7713b1edbc 395 /*!
AnnaBridge 171:3a7713b1edbc 396 * @brief Set the clock source for DCDC.
AnnaBridge 171:3a7713b1edbc 397 *
AnnaBridge 171:3a7713b1edbc 398 * This function is to set the clock source for DCDC. By default, DCDC can switch the clock from internal oscillator to
AnnaBridge 171:3a7713b1edbc 399 * external clock automatically. Once the application choose to use the external clock with function, the internal
AnnaBridge 171:3a7713b1edbc 400 * oscillator would be powered down. However, the internal oscillator could be powered down only when 32MHz crystal
AnnaBridge 171:3a7713b1edbc 401 * oscillator is available.
AnnaBridge 171:3a7713b1edbc 402 *
AnnaBridge 171:3a7713b1edbc 403 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 404 * @param clockSource Clock source for DCDC. See to "dcdc_clock_source_t".
AnnaBridge 171:3a7713b1edbc 405 */
AnnaBridge 171:3a7713b1edbc 406 void DCDC_SetClockSource(DCDC_Type *base, dcdc_clock_source_t clockSource);
AnnaBridge 171:3a7713b1edbc 407
AnnaBridge 171:3a7713b1edbc 408 /*!
AnnaBridge 171:3a7713b1edbc 409 * @brief Set the battery voltage divider for ADC sample.
AnnaBridge 171:3a7713b1edbc 410 *
AnnaBridge 171:3a7713b1edbc 411 * This function controls VBAT voltage divider. The divided VBAT output is input to an ADC channel which allows the
AnnaBridge 171:3a7713b1edbc 412 * battery voltage to be measured.
AnnaBridge 171:3a7713b1edbc 413 *
AnnaBridge 171:3a7713b1edbc 414 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 415 * @param divider Setting divider selection. See to "dcdc_vbat_divider_t"
AnnaBridge 171:3a7713b1edbc 416 */
AnnaBridge 171:3a7713b1edbc 417 static inline void DCDC_SetBatteryVoltageDivider(DCDC_Type *base, dcdc_vbat_divider_t divider)
AnnaBridge 171:3a7713b1edbc 418 {
AnnaBridge 171:3a7713b1edbc 419 base->REG0 = (base->REG0 & ~DCDC_REG0_DCDC_VBAT_DIV_CTRL_MASK) | DCDC_REG0_DCDC_VBAT_DIV_CTRL(divider);
AnnaBridge 171:3a7713b1edbc 420 }
AnnaBridge 171:3a7713b1edbc 421
AnnaBridge 171:3a7713b1edbc 422 /*!
AnnaBridge 171:3a7713b1edbc 423 * @brief Set battery monitor value.
AnnaBridge 171:3a7713b1edbc 424 *
AnnaBridge 171:3a7713b1edbc 425 * This function is to set the battery monitor value. If the feature of monitoring battery voltage is enabled (with
AnnaBridge 171:3a7713b1edbc 426 * non-zero value set), user should set the battery voltage measured with an 8 mV LSB resolution from the ADC sample
AnnaBridge 171:3a7713b1edbc 427 * channel. It would improve efficiency and minimize ripple.
AnnaBridge 171:3a7713b1edbc 428 *
AnnaBridge 171:3a7713b1edbc 429 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 430 * @param battValue Battery voltage measured with an 8 mV LSB resolution with 10-bit ADC sample. Setting 0x0 would
AnnaBridge 171:3a7713b1edbc 431 * disable feature of monitoring battery voltage.
AnnaBridge 171:3a7713b1edbc 432 */
AnnaBridge 171:3a7713b1edbc 433 void DCDC_SetBatteryMonitorValue(DCDC_Type *base, uint32_t battValue);
AnnaBridge 171:3a7713b1edbc 434
AnnaBridge 171:3a7713b1edbc 435 /*!
AnnaBridge 171:3a7713b1edbc 436 * @brief Software shutdown the DCDC module to stop the power supply for chip.
AnnaBridge 171:3a7713b1edbc 437 *
AnnaBridge 171:3a7713b1edbc 438 * This function is to shutdown the DCDC module and stop the power supply for chip. In case the chip is powered by DCDC,
AnnaBridge 171:3a7713b1edbc 439 * which means the DCDC is working as Buck/Boost mode, to shutdown the DCDC would cause the chip to reset! Then, the
AnnaBridge 171:3a7713b1edbc 440 * DCDC_REG4_DCDC_SW_SHUTDOWN bit would be cleared automatically during power up sequence. If the DCDC is in bypass
AnnaBridge 171:3a7713b1edbc 441 * mode, which depends on the board's hardware connection, to shutdown the DCDC would not be meaningful.
AnnaBridge 171:3a7713b1edbc 442 *
AnnaBridge 171:3a7713b1edbc 443 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 444 */
AnnaBridge 171:3a7713b1edbc 445 static inline void DCDC_DoSoftShutdown(DCDC_Type *base)
AnnaBridge 171:3a7713b1edbc 446 {
AnnaBridge 171:3a7713b1edbc 447 base->REG4 = DCDC_REG4_UNLOCK(0x3E77) | DCDC_REG4_DCDC_SW_SHUTDOWN_MASK;
AnnaBridge 171:3a7713b1edbc 448 /* The unlock key must be set while set the shutdown command. */
AnnaBridge 171:3a7713b1edbc 449 }
AnnaBridge 171:3a7713b1edbc 450
AnnaBridge 171:3a7713b1edbc 451 /*!
AnnaBridge 171:3a7713b1edbc 452 * @brief Set upper limit duty cycle limit in DCDC converter in Boost mode.
AnnaBridge 171:3a7713b1edbc 453 *
AnnaBridge 171:3a7713b1edbc 454 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 455 * @param value Setting value for limit duty cycle. Available range is 0-127.
AnnaBridge 171:3a7713b1edbc 456 */
AnnaBridge 171:3a7713b1edbc 457 static inline void DCDC_SetUpperLimitDutyCycleBoost(DCDC_Type *base, uint32_t value)
AnnaBridge 171:3a7713b1edbc 458 {
AnnaBridge 171:3a7713b1edbc 459 base->REG1 = (~DCDC_REG1_POSLIMIT_BOOST_IN_MASK & base->REG1) | DCDC_REG1_POSLIMIT_BOOST_IN(value);
AnnaBridge 171:3a7713b1edbc 460 }
AnnaBridge 171:3a7713b1edbc 461
AnnaBridge 171:3a7713b1edbc 462 /*!
AnnaBridge 171:3a7713b1edbc 463 * @brief Set upper limit duty cycle limit in DCDC converter in Buck mode.
AnnaBridge 171:3a7713b1edbc 464 *
AnnaBridge 171:3a7713b1edbc 465 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 466 * @param value Setting value for limit duty cycle. Available range is 0-127.
AnnaBridge 171:3a7713b1edbc 467 */
AnnaBridge 171:3a7713b1edbc 468 static inline void DCDC_SetUpperLimitDutyCycleBuck(DCDC_Type *base, uint32_t value)
AnnaBridge 171:3a7713b1edbc 469 {
AnnaBridge 171:3a7713b1edbc 470 base->REG1 = (~DCDC_REG1_POSLIMIT_BUCK_IN_MASK & base->REG1) | DCDC_REG1_POSLIMIT_BUCK_IN(value);
AnnaBridge 171:3a7713b1edbc 471 }
AnnaBridge 171:3a7713b1edbc 472
AnnaBridge 171:3a7713b1edbc 473 /*!
AnnaBridge 171:3a7713b1edbc 474 * @brief Adjust value of duty cycle when switching between VDD1P45 and VDD1P8.
AnnaBridge 171:3a7713b1edbc 475 *
AnnaBridge 171:3a7713b1edbc 476 * Adjust value of duty cycle when switching between VDD1P45 and VDD1P8. The unit is 1/32 or 3.125%.
AnnaBridge 171:3a7713b1edbc 477 *
AnnaBridge 171:3a7713b1edbc 478 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 479 * @param value Setting adjust value. The available range is 0-15. The unit is 1/32 or 3.125&.
AnnaBridge 171:3a7713b1edbc 480 */
AnnaBridge 171:3a7713b1edbc 481 static inline void DCDC_AdjustDutyCycleSwitchingTargetOutput(DCDC_Type *base, uint32_t value)
AnnaBridge 171:3a7713b1edbc 482 {
AnnaBridge 171:3a7713b1edbc 483 base->REG3 = (~DCDC_REG3_DCDC_VDD1P5CTRL_ADJTN_MASK & base->REG3) | DCDC_REG3_DCDC_VDD1P5CTRL_ADJTN(value);
AnnaBridge 171:3a7713b1edbc 484 }
AnnaBridge 171:3a7713b1edbc 485
AnnaBridge 171:3a7713b1edbc 486 /*!
AnnaBridge 171:3a7713b1edbc 487 * @brief Lock the setting of target voltage.
AnnaBridge 171:3a7713b1edbc 488 *
AnnaBridge 171:3a7713b1edbc 489 * This function is to lock the setting of target voltage. This function should be called before entering the low power
AnnaBridge 171:3a7713b1edbc 490 * modes to lock the target voltage.
AnnaBridge 171:3a7713b1edbc 491 *
AnnaBridge 171:3a7713b1edbc 492 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 493 */
AnnaBridge 171:3a7713b1edbc 494 static inline void DCDC_LockTargetVoltage(DCDC_Type *base)
AnnaBridge 171:3a7713b1edbc 495 {
AnnaBridge 171:3a7713b1edbc 496 base->REG3 |= (DCDC_REG3_DCDC_VDD1P8CTRL_DISABLE_STEP_MASK | DCDC_REG3_DCDC_VDD1P5CTRL_DISABLE_STEP_MASK);
AnnaBridge 171:3a7713b1edbc 497 }
AnnaBridge 171:3a7713b1edbc 498
AnnaBridge 171:3a7713b1edbc 499 /*!
AnnaBridge 171:3a7713b1edbc 500 * @brief Adjust the target voltage of DCDC output.
AnnaBridge 171:3a7713b1edbc 501 *
AnnaBridge 171:3a7713b1edbc 502 * This function is to adjust the target voltage of DCDC output. It would unlock the setting of target voltages, change
AnnaBridge 171:3a7713b1edbc 503 * them and finally wait until the output is stabled.
AnnaBridge 171:3a7713b1edbc 504 *
AnnaBridge 171:3a7713b1edbc 505 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 506 * @param vdd1p45Boost Target value of VDD1P45 in boost mode, 25 mV each step from 0x00 to 0x0F. 0x00 is for 1.275V.
AnnaBridge 171:3a7713b1edbc 507 * @param vdd1p45Buck Target value of VDD1P45 in buck mode, 25 mV each step from 0x00 to 0x0F. 0x00 is for 1.275V.
AnnaBridge 171:3a7713b1edbc 508 * @param vdd1p8 Target value of VDD1P8, 25 mV each step in two ranges, from 0x00 to 0x11 and 0x20 to 0x3F.
AnnaBridge 171:3a7713b1edbc 509 * 0x00 is for 1.65V, 0x20 is for 2.8V.
AnnaBridge 171:3a7713b1edbc 510 */
AnnaBridge 171:3a7713b1edbc 511 void DCDC_AdjustTargetVoltage(DCDC_Type *base, uint32_t vdd1p45Boost, uint32_t vdd1p45Buck, uint32_t vdd1p8);
AnnaBridge 171:3a7713b1edbc 512
AnnaBridge 171:3a7713b1edbc 513 /*!
AnnaBridge 171:3a7713b1edbc 514 * @brief Get the default configuration for min power.
AnnaBridge 171:3a7713b1edbc 515 *
AnnaBridge 171:3a7713b1edbc 516 * The default configuration are set according to responding registers' setting when powered on.
AnnaBridge 171:3a7713b1edbc 517 * They are:
AnnaBridge 171:3a7713b1edbc 518 * @code
AnnaBridge 171:3a7713b1edbc 519 * config->enableUseHalfFetForContinuous = false;
AnnaBridge 171:3a7713b1edbc 520 * config->enableUseDoubleFetForContinuous = false;
AnnaBridge 171:3a7713b1edbc 521 * config->enableUseHalfFreqForContinuous = false;
AnnaBridge 171:3a7713b1edbc 522 * config->enableUseHalfFetForPulsed = false;
AnnaBridge 171:3a7713b1edbc 523 * config->enableUseDoubleFetForPulsed = false;
AnnaBridge 171:3a7713b1edbc 524 * config->enableUseHalfFreqForPulsed = false;
AnnaBridge 171:3a7713b1edbc 525 * @endcode
AnnaBridge 171:3a7713b1edbc 526 *
AnnaBridge 171:3a7713b1edbc 527 * @param config Pointer to configuration structure. See to "dcdc_min_power_config_t".
AnnaBridge 171:3a7713b1edbc 528 */
AnnaBridge 171:3a7713b1edbc 529 void DCDC_GetDefaultMinPowerDefault(dcdc_min_power_config_t *config);
AnnaBridge 171:3a7713b1edbc 530
AnnaBridge 171:3a7713b1edbc 531 /*!
AnnaBridge 171:3a7713b1edbc 532 * @brief Configure for the min power.
AnnaBridge 171:3a7713b1edbc 533 *
AnnaBridge 171:3a7713b1edbc 534 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 535 * @param config Pointer to configuration structure. See to "dcdc_min_power_config_t".
AnnaBridge 171:3a7713b1edbc 536 */
AnnaBridge 171:3a7713b1edbc 537 void DCDC_SetMinPowerConfig(DCDC_Type *base, const dcdc_min_power_config_t *config);
AnnaBridge 171:3a7713b1edbc 538
AnnaBridge 171:3a7713b1edbc 539 /*!
AnnaBridge 171:3a7713b1edbc 540 * @brief Get the default setting for integrator configuration in pulsed mode.
AnnaBridge 171:3a7713b1edbc 541 *
AnnaBridge 171:3a7713b1edbc 542 * The default configuration are set according to responding registers' setting when powered on.
AnnaBridge 171:3a7713b1edbc 543 * They are:
AnnaBridge 171:3a7713b1edbc 544 * @code
AnnaBridge 171:3a7713b1edbc 545 * config->enableUseUserIntegratorValue = false;
AnnaBridge 171:3a7713b1edbc 546 * config->userIntegratorValue = 0U;
AnnaBridge 171:3a7713b1edbc 547 * config->enablePulseRunSpeedup = false;
AnnaBridge 171:3a7713b1edbc 548 * @endcode
AnnaBridge 171:3a7713b1edbc 549 *
AnnaBridge 171:3a7713b1edbc 550 * @param config Pointer to configuration structure. See to "dcdc_pulsed_integrator_config_t".
AnnaBridge 171:3a7713b1edbc 551 */
AnnaBridge 171:3a7713b1edbc 552 void DCDC_GetDefaultPulsedIntegratorConfig(dcdc_pulsed_integrator_config_t *config);
AnnaBridge 171:3a7713b1edbc 553
AnnaBridge 171:3a7713b1edbc 554 /*!
AnnaBridge 171:3a7713b1edbc 555 * @brief Configure the integrator in pulsed mode.
AnnaBridge 171:3a7713b1edbc 556 *
AnnaBridge 171:3a7713b1edbc 557 * @param base DCDC peripheral base address.
AnnaBridge 171:3a7713b1edbc 558 * @config Pointer to configuration structure. See to "dcdc_pulsed_integrator_config_t".
AnnaBridge 171:3a7713b1edbc 559 */
AnnaBridge 171:3a7713b1edbc 560 void DCDC_SetPulsedIntegratorConfig(DCDC_Type *base, const dcdc_pulsed_integrator_config_t *config);
AnnaBridge 171:3a7713b1edbc 561
AnnaBridge 171:3a7713b1edbc 562 /* @} */
AnnaBridge 171:3a7713b1edbc 563
AnnaBridge 171:3a7713b1edbc 564 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 565 }
AnnaBridge 171:3a7713b1edbc 566 #endif
AnnaBridge 171:3a7713b1edbc 567 /*!
AnnaBridge 171:3a7713b1edbc 568 * @}
AnnaBridge 171:3a7713b1edbc 569 */
AnnaBridge 171:3a7713b1edbc 570 #endif /* _FSL_DCDC_H_ */