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TARGET_ARM_CM3DS_MPS2/TOOLCHAIN_GCC_ARM/spi_pl022_drv.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 165:d1b4690b3f8b 1 /*
AnnaBridge 165:d1b4690b3f8b 2 * Copyright (c) 2018 ARM Limited
AnnaBridge 165:d1b4690b3f8b 3 *
AnnaBridge 165:d1b4690b3f8b 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 165:d1b4690b3f8b 5 * you may not use this file except in compliance with the License.
AnnaBridge 165:d1b4690b3f8b 6 * You may obtain a copy of the License at
AnnaBridge 165:d1b4690b3f8b 7 *
AnnaBridge 165:d1b4690b3f8b 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 165:d1b4690b3f8b 9 *
AnnaBridge 165:d1b4690b3f8b 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 165:d1b4690b3f8b 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 165:d1b4690b3f8b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 165:d1b4690b3f8b 13 * See the License for the specific language governing permissions and
AnnaBridge 165:d1b4690b3f8b 14 * limitations under the License.
AnnaBridge 165:d1b4690b3f8b 15 */
AnnaBridge 165:d1b4690b3f8b 16
AnnaBridge 165:d1b4690b3f8b 17 /**
AnnaBridge 165:d1b4690b3f8b 18 * \file spi_pl022_drv.h
AnnaBridge 165:d1b4690b3f8b 19 * \brief Generic driver for ARM SPI PL022.
AnnaBridge 165:d1b4690b3f8b 20 */
AnnaBridge 165:d1b4690b3f8b 21
AnnaBridge 165:d1b4690b3f8b 22 #ifndef __SPI_PL022_DRV_H__
AnnaBridge 165:d1b4690b3f8b 23 #define __SPI_PL022_DRV_H__
AnnaBridge 165:d1b4690b3f8b 24
AnnaBridge 165:d1b4690b3f8b 25 #include <stdint.h>
AnnaBridge 165:d1b4690b3f8b 26 #include <string.h>
AnnaBridge 165:d1b4690b3f8b 27
AnnaBridge 165:d1b4690b3f8b 28 #ifdef __cplusplus
AnnaBridge 165:d1b4690b3f8b 29 extern "C" {
AnnaBridge 165:d1b4690b3f8b 30 #endif
AnnaBridge 165:d1b4690b3f8b 31
AnnaBridge 165:d1b4690b3f8b 32 /* Frame format */
AnnaBridge 165:d1b4690b3f8b 33 #define SPI_PL022_CFG_FRF_MOT 0
AnnaBridge 165:d1b4690b3f8b 34 #define SPI_PL022_CFG_FRF_TI 1
AnnaBridge 165:d1b4690b3f8b 35 #define SPI_PL022_CFG_FRF_MICROWIRE 2
AnnaBridge 165:d1b4690b3f8b 36
AnnaBridge 165:d1b4690b3f8b 37 enum spi_pl022_mode_select_t {
AnnaBridge 165:d1b4690b3f8b 38 SPI_PL022_MASTER_SELECT = 0,
AnnaBridge 165:d1b4690b3f8b 39 SPI_PL022_SLAVE_SELECT,
AnnaBridge 165:d1b4690b3f8b 40 };
AnnaBridge 165:d1b4690b3f8b 41
AnnaBridge 165:d1b4690b3f8b 42 enum spi_pl022_slave_output_mode_t {
AnnaBridge 165:d1b4690b3f8b 43 SPI_PL022_SLAVE_OUTPUT_EN = 0,
AnnaBridge 165:d1b4690b3f8b 44 SPI_PL022_SLAVE_OUTPUT_DIS,
AnnaBridge 165:d1b4690b3f8b 45 };
AnnaBridge 165:d1b4690b3f8b 46
AnnaBridge 165:d1b4690b3f8b 47 enum spi_pl022_loopback_select_t {
AnnaBridge 165:d1b4690b3f8b 48 SPI_PL022_LOOPBACK_MODE_DIS = 0,
AnnaBridge 165:d1b4690b3f8b 49 SPI_PL022_LOOPBACK_MODE_EN,
AnnaBridge 165:d1b4690b3f8b 50 };
AnnaBridge 165:d1b4690b3f8b 51
AnnaBridge 165:d1b4690b3f8b 52 struct spi_pl022_periphid_t {
AnnaBridge 165:d1b4690b3f8b 53 uint32_t partNumber;
AnnaBridge 165:d1b4690b3f8b 54 uint32_t designerID;
AnnaBridge 165:d1b4690b3f8b 55 uint32_t revision;
AnnaBridge 165:d1b4690b3f8b 56 uint32_t configuration;
AnnaBridge 165:d1b4690b3f8b 57 };
AnnaBridge 165:d1b4690b3f8b 58
AnnaBridge 165:d1b4690b3f8b 59 struct spi_pl022_primecell_id_t {
AnnaBridge 165:d1b4690b3f8b 60 uint8_t cellid0;
AnnaBridge 165:d1b4690b3f8b 61 uint8_t cellid1;
AnnaBridge 165:d1b4690b3f8b 62 uint8_t cellid2;
AnnaBridge 165:d1b4690b3f8b 63 uint8_t cellid3;
AnnaBridge 165:d1b4690b3f8b 64 };
AnnaBridge 165:d1b4690b3f8b 65
AnnaBridge 165:d1b4690b3f8b 66 /* ARM SPI PL022 device control configuration structure */
AnnaBridge 165:d1b4690b3f8b 67 struct spi_pl022_ctrl_cfg_t {
AnnaBridge 165:d1b4690b3f8b 68 enum spi_pl022_mode_select_t spi_mode; /*!< master-slave */
AnnaBridge 165:d1b4690b3f8b 69 uint8_t frame_format; /*!< frame format bitmap
AnnaBridge 165:d1b4690b3f8b 70 clock phase [7] polarity [6]
AnnaBridge 165:d1b4690b3f8b 71 reserved [5:3]
AnnaBridge 165:d1b4690b3f8b 72 frame_format [1:0] */
AnnaBridge 165:d1b4690b3f8b 73 uint8_t word_size; /*!< value 4 to 16 */
AnnaBridge 165:d1b4690b3f8b 74 uint8_t reserved[2]; /*!< to keep 32 bits aligned */
AnnaBridge 165:d1b4690b3f8b 75 uint32_t bit_rate; /*!< required bit rate */
AnnaBridge 165:d1b4690b3f8b 76 };
AnnaBridge 165:d1b4690b3f8b 77
AnnaBridge 165:d1b4690b3f8b 78 /* ARM SPI PL022 device configuration structure */
AnnaBridge 165:d1b4690b3f8b 79 struct spi_pl022_dev_cfg_t {
AnnaBridge 165:d1b4690b3f8b 80 const uint32_t base; /*!< SPI PL022 base address */
AnnaBridge 165:d1b4690b3f8b 81 const struct spi_pl022_ctrl_cfg_t default_ctrl_cfg; /*!< Default SPI
AnnaBridge 165:d1b4690b3f8b 82 configuration */
AnnaBridge 165:d1b4690b3f8b 83 };
AnnaBridge 165:d1b4690b3f8b 84
AnnaBridge 165:d1b4690b3f8b 85 /* ARM SPI PL022 device data structure */
AnnaBridge 165:d1b4690b3f8b 86 struct spi_pl022_dev_data_t {
AnnaBridge 165:d1b4690b3f8b 87 uint32_t state; /*!< SPI driver state */
AnnaBridge 165:d1b4690b3f8b 88 uint32_t sys_clk; /*!< System clock frequency */
AnnaBridge 165:d1b4690b3f8b 89 struct spi_pl022_ctrl_cfg_t ctrl_cfg; /*!< SPI control
AnnaBridge 165:d1b4690b3f8b 90 configuration data */
AnnaBridge 165:d1b4690b3f8b 91 };
AnnaBridge 165:d1b4690b3f8b 92
AnnaBridge 165:d1b4690b3f8b 93 /* ARM SPI PL022 device structure */
AnnaBridge 165:d1b4690b3f8b 94 struct spi_pl022_dev_t {
AnnaBridge 165:d1b4690b3f8b 95 const struct spi_pl022_dev_cfg_t* const cfg; /*!< SPI driver
AnnaBridge 165:d1b4690b3f8b 96 configuration */
AnnaBridge 165:d1b4690b3f8b 97 struct spi_pl022_dev_data_t* const data; /*!< SPI driver data */
AnnaBridge 165:d1b4690b3f8b 98 };
AnnaBridge 165:d1b4690b3f8b 99
AnnaBridge 165:d1b4690b3f8b 100 enum spi_pl022_error_t {
AnnaBridge 165:d1b4690b3f8b 101 SPI_PL022_ERR_NONE = 0, /*!< No error */
AnnaBridge 165:d1b4690b3f8b 102 SPI_PL022_ERR_INVALID_ARGS, /*!< Invalid input arguments */
AnnaBridge 165:d1b4690b3f8b 103 SPI_PL022_ERR_NOT_INIT, /*!< SPI driver is not initialized */
AnnaBridge 165:d1b4690b3f8b 104 SPI_PL022_ERR_NO_TX, /*!< SPI transm FIFO full */
AnnaBridge 165:d1b4690b3f8b 105 SPI_PL022_ERR_NO_RX, /*!< SPI receive FIFO empty */
AnnaBridge 165:d1b4690b3f8b 106 SPI_PL022_ERR_BAD_CONFIG, /*!< Bad SPI configuration */
AnnaBridge 165:d1b4690b3f8b 107 };
AnnaBridge 165:d1b4690b3f8b 108
AnnaBridge 165:d1b4690b3f8b 109
AnnaBridge 165:d1b4690b3f8b 110 /* Interrupt mask defines for the interrupt APIs */
AnnaBridge 165:d1b4690b3f8b 111
AnnaBridge 165:d1b4690b3f8b 112 /* Receive Overrun Interrupt */
AnnaBridge 165:d1b4690b3f8b 113 #define SPI_PL022_RX_OR_INTR_POS 0
AnnaBridge 165:d1b4690b3f8b 114 #define SPI_PL022_RX_OR_INTR_MSK (0x1ul<<SPI_PL022_RX_OR_INTR_POS)
AnnaBridge 165:d1b4690b3f8b 115
AnnaBridge 165:d1b4690b3f8b 116 /* Receive Timeout Interrupt */
AnnaBridge 165:d1b4690b3f8b 117 #define SPI_PL022_RX_TO_INTR_POS 1
AnnaBridge 165:d1b4690b3f8b 118 #define SPI_PL022_RX_TO_INTR_MSK (0x1ul<<SPI_PL022_RX_TO_INTR_POS)
AnnaBridge 165:d1b4690b3f8b 119
AnnaBridge 165:d1b4690b3f8b 120 /* Receive FIFO Interrupt */
AnnaBridge 165:d1b4690b3f8b 121 #define SPI_PL022_RX_FIFO_INTR_POS 2
AnnaBridge 165:d1b4690b3f8b 122 #define SPI_PL022_RX_FIFO_INTR_MSK (0x1ul<<SPI_PL022_RX_FIFO_INTR_POS)
AnnaBridge 165:d1b4690b3f8b 123
AnnaBridge 165:d1b4690b3f8b 124 /* Transmit FIFO Interrupt */
AnnaBridge 165:d1b4690b3f8b 125 #define SPI_PL022_TX_FIFO_INTR_POS 3
AnnaBridge 165:d1b4690b3f8b 126 #define SPI_PL022_TX_FIFO_INTR_MSK (0x1ul<<SPI_PL022_TX_FIFO_INTR_POS)
AnnaBridge 165:d1b4690b3f8b 127
AnnaBridge 165:d1b4690b3f8b 128 #define SPI_PL022_ALL_INTR_MSK \
AnnaBridge 165:d1b4690b3f8b 129 ((0x1ul<<(SPI_PL022_TX_FIFO_INTR_POS+1))-1)
AnnaBridge 165:d1b4690b3f8b 130
AnnaBridge 165:d1b4690b3f8b 131 /* Status register bit defines */
AnnaBridge 165:d1b4690b3f8b 132
AnnaBridge 165:d1b4690b3f8b 133 /* Transmit FIFO empty */
AnnaBridge 165:d1b4690b3f8b 134 #define SPI_PL022_SSPSR_TFE_POS 0
AnnaBridge 165:d1b4690b3f8b 135 #define SPI_PL022_SSPSR_TFE_MSK (0x1ul<<SPI_PL022_SSPSR_TFE_POS)
AnnaBridge 165:d1b4690b3f8b 136
AnnaBridge 165:d1b4690b3f8b 137 /* Transmit FIFO not full */
AnnaBridge 165:d1b4690b3f8b 138 #define SPI_PL022_SSPSR_TNF_POS 1
AnnaBridge 165:d1b4690b3f8b 139 #define SPI_PL022_SSPSR_TNF_MSK (0x1ul<<SPI_PL022_SSPSR_TNF_POS)
AnnaBridge 165:d1b4690b3f8b 140
AnnaBridge 165:d1b4690b3f8b 141 /* Receive FIFO not empty */
AnnaBridge 165:d1b4690b3f8b 142 #define SPI_PL022_SSPSR_RNE_POS 2
AnnaBridge 165:d1b4690b3f8b 143 #define SPI_PL022_SSPSR_RNE_MSK (0x1ul<<SPI_PL022_SSPSR_RNE_POS)
AnnaBridge 165:d1b4690b3f8b 144
AnnaBridge 165:d1b4690b3f8b 145 /* Receive FIFO full */
AnnaBridge 165:d1b4690b3f8b 146 #define SPI_PL022_SSPSR_RFF_POS 3
AnnaBridge 165:d1b4690b3f8b 147 #define SPI_PL022_SSPSR_RFF_MSK (0x1ul<<SPI_PL022_SSPSR_RFF_POS)
AnnaBridge 165:d1b4690b3f8b 148
AnnaBridge 165:d1b4690b3f8b 149 /* Busy either tx/rx or transmit fifo not empty */
AnnaBridge 165:d1b4690b3f8b 150 #define SPI_PL022_SSPSR_BSY_POS 4
AnnaBridge 165:d1b4690b3f8b 151 #define SPI_PL022_SSPSR_BSY_MSK (0x1ul<<SPI_PL022_SSPSR_BSY_POS)
AnnaBridge 165:d1b4690b3f8b 152
AnnaBridge 165:d1b4690b3f8b 153 /**
AnnaBridge 165:d1b4690b3f8b 154 * \brief Enables PL022 SPI device
AnnaBridge 165:d1b4690b3f8b 155 *
AnnaBridge 165:d1b4690b3f8b 156 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 157 *
AnnaBridge 165:d1b4690b3f8b 158 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 159 */
AnnaBridge 165:d1b4690b3f8b 160 void spi_pl022_dev_enable(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 161
AnnaBridge 165:d1b4690b3f8b 162 /**
AnnaBridge 165:d1b4690b3f8b 163 * \brief Disables PL022 SPI device
AnnaBridge 165:d1b4690b3f8b 164 *
AnnaBridge 165:d1b4690b3f8b 165 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 166 *
AnnaBridge 165:d1b4690b3f8b 167 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 168 */
AnnaBridge 165:d1b4690b3f8b 169 void spi_pl022_dev_disable(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 170
AnnaBridge 165:d1b4690b3f8b 171 /**
AnnaBridge 165:d1b4690b3f8b 172 * \brief Returns SPI status register
AnnaBridge 165:d1b4690b3f8b 173 *
AnnaBridge 165:d1b4690b3f8b 174 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 175 *
AnnaBridge 165:d1b4690b3f8b 176 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 177 */
AnnaBridge 165:d1b4690b3f8b 178 uint32_t spi_pl022_get_status(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 179
AnnaBridge 165:d1b4690b3f8b 180 /**
AnnaBridge 165:d1b4690b3f8b 181 * \brief Initializes the SPI PL022 device.
AnnaBridge 165:d1b4690b3f8b 182 *
AnnaBridge 165:d1b4690b3f8b 183 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 184 * \param[in] sys_clk System clock.
AnnaBridge 165:d1b4690b3f8b 185 *
AnnaBridge 165:d1b4690b3f8b 186 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 165:d1b4690b3f8b 187 *
AnnaBridge 165:d1b4690b3f8b 188 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 189 */
AnnaBridge 165:d1b4690b3f8b 190 enum spi_pl022_error_t spi_pl022_init(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 191 uint32_t sys_clk);
AnnaBridge 165:d1b4690b3f8b 192
AnnaBridge 165:d1b4690b3f8b 193 /**
AnnaBridge 165:d1b4690b3f8b 194 * \brief Sets the SPI PL022 device configuration.
AnnaBridge 165:d1b4690b3f8b 195 *
AnnaBridge 165:d1b4690b3f8b 196 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 197 * \param[in] ctrl_cfg SPI control configuration.
AnnaBridge 165:d1b4690b3f8b 198 *
AnnaBridge 165:d1b4690b3f8b 199 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 165:d1b4690b3f8b 200 *
AnnaBridge 165:d1b4690b3f8b 201 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 202 */
AnnaBridge 165:d1b4690b3f8b 203 enum spi_pl022_error_t spi_pl022_set_ctrl_cfg(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 204 const struct spi_pl022_ctrl_cfg_t* ctrl_cfg);
AnnaBridge 165:d1b4690b3f8b 205
AnnaBridge 165:d1b4690b3f8b 206 /**
AnnaBridge 165:d1b4690b3f8b 207 * \brief Gets the SPI PL022 device configuration.
AnnaBridge 165:d1b4690b3f8b 208 *
AnnaBridge 165:d1b4690b3f8b 209 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 210 * \param[out] ctrl_cfg Pointer to fill the SPI control configuration.
AnnaBridge 165:d1b4690b3f8b 211 *
AnnaBridge 165:d1b4690b3f8b 212 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 165:d1b4690b3f8b 213 *
AnnaBridge 165:d1b4690b3f8b 214 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 215 */
AnnaBridge 165:d1b4690b3f8b 216 enum spi_pl022_error_t spi_pl022_get_ctrl_cfg(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 217 struct spi_pl022_ctrl_cfg_t* ctrl_cfg);
AnnaBridge 165:d1b4690b3f8b 218
AnnaBridge 165:d1b4690b3f8b 219
AnnaBridge 165:d1b4690b3f8b 220 /**
AnnaBridge 165:d1b4690b3f8b 221 * \brief Selects SPI PL022 device as Master or Slave
AnnaBridge 165:d1b4690b3f8b 222 *
AnnaBridge 165:d1b4690b3f8b 223 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 224 * \param[in] mode Mode selection \ref spi_pl022_mode_select_t
AnnaBridge 165:d1b4690b3f8b 225 *
AnnaBridge 165:d1b4690b3f8b 226 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 227 */
AnnaBridge 165:d1b4690b3f8b 228 void spi_pl022_select_mode(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 229 enum spi_pl022_mode_select_t mode);
AnnaBridge 165:d1b4690b3f8b 230
AnnaBridge 165:d1b4690b3f8b 231 /**
AnnaBridge 165:d1b4690b3f8b 232 * \brief Enables/disables SPI PL022 Slave device output
AnnaBridge 165:d1b4690b3f8b 233 *
AnnaBridge 165:d1b4690b3f8b 234 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 235 * \param[in] mode Mode selection \ref spi_pl022_slave_output_mode_t
AnnaBridge 165:d1b4690b3f8b 236 *
AnnaBridge 165:d1b4690b3f8b 237 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 238 * \note This function doesn't check if dev is Slave or Master
AnnaBridge 165:d1b4690b3f8b 239 */
AnnaBridge 165:d1b4690b3f8b 240 void spi_pl022_set_slave_output(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 241 enum spi_pl022_slave_output_mode_t mode);
AnnaBridge 165:d1b4690b3f8b 242
AnnaBridge 165:d1b4690b3f8b 243 /**
AnnaBridge 165:d1b4690b3f8b 244 * \brief Enables SPI PL022 device in loopback mode
AnnaBridge 165:d1b4690b3f8b 245 *
AnnaBridge 165:d1b4690b3f8b 246 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 247 * \param[in] mode Mode selection \ref spi_pl022_loopback_select_t
AnnaBridge 165:d1b4690b3f8b 248 *
AnnaBridge 165:d1b4690b3f8b 249 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 250 */
AnnaBridge 165:d1b4690b3f8b 251 void spi_pl022_set_loopback_mode(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 252 enum spi_pl022_loopback_select_t mode);
AnnaBridge 165:d1b4690b3f8b 253
AnnaBridge 165:d1b4690b3f8b 254 /**
AnnaBridge 165:d1b4690b3f8b 255 * \brief Clears interrupt mask of SPI PL022
AnnaBridge 165:d1b4690b3f8b 256 *
AnnaBridge 165:d1b4690b3f8b 257 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 258 * \param[in] irq_mask Selection of interrupts to enable
AnnaBridge 165:d1b4690b3f8b 259 *
AnnaBridge 165:d1b4690b3f8b 260 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 261 */
AnnaBridge 165:d1b4690b3f8b 262 void spi_pl022_enable_interrupt(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 263 uint32_t irq_mask);
AnnaBridge 165:d1b4690b3f8b 264
AnnaBridge 165:d1b4690b3f8b 265 /**
AnnaBridge 165:d1b4690b3f8b 266 * \brief Sets interrupt mask of SPI PL022
AnnaBridge 165:d1b4690b3f8b 267 *
AnnaBridge 165:d1b4690b3f8b 268 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 269 * \param[in] irq_mask Selection of interrupts to disable
AnnaBridge 165:d1b4690b3f8b 270 *
AnnaBridge 165:d1b4690b3f8b 271 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 272 */
AnnaBridge 165:d1b4690b3f8b 273 void spi_pl022_disable_interrupt(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 274 uint32_t irq_mask);
AnnaBridge 165:d1b4690b3f8b 275
AnnaBridge 165:d1b4690b3f8b 276 /**
AnnaBridge 165:d1b4690b3f8b 277 * \brief Gets raw interrupt status of SPI PL022
AnnaBridge 165:d1b4690b3f8b 278 *
AnnaBridge 165:d1b4690b3f8b 279 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 280 *
AnnaBridge 165:d1b4690b3f8b 281 * \return Returns raw interrupt status value
AnnaBridge 165:d1b4690b3f8b 282 *
AnnaBridge 165:d1b4690b3f8b 283 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 284 */
AnnaBridge 165:d1b4690b3f8b 285 uint32_t spi_pl022_get_raw_irq_status(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 286
AnnaBridge 165:d1b4690b3f8b 287 /**
AnnaBridge 165:d1b4690b3f8b 288 * \brief Gets masked interrupt status of SPI PL022
AnnaBridge 165:d1b4690b3f8b 289 *
AnnaBridge 165:d1b4690b3f8b 290 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 291 *
AnnaBridge 165:d1b4690b3f8b 292 * \return Returns masked interrupt status value
AnnaBridge 165:d1b4690b3f8b 293 *
AnnaBridge 165:d1b4690b3f8b 294 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 295 */
AnnaBridge 165:d1b4690b3f8b 296 uint32_t spi_pl022_get_masked_irq_status(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 297
AnnaBridge 165:d1b4690b3f8b 298 /**
AnnaBridge 165:d1b4690b3f8b 299 * \brief Sets interrupt mask of SPI PL022
AnnaBridge 165:d1b4690b3f8b 300 *
AnnaBridge 165:d1b4690b3f8b 301 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 302 * \param[in] irq_mask Selection of interrupts to disable
AnnaBridge 165:d1b4690b3f8b 303 *
AnnaBridge 165:d1b4690b3f8b 304 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 305 */
AnnaBridge 165:d1b4690b3f8b 306 void spi_pl022_clear_interrupt(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 307 uint32_t irq_mask);
AnnaBridge 165:d1b4690b3f8b 308
AnnaBridge 165:d1b4690b3f8b 309 /**
AnnaBridge 165:d1b4690b3f8b 310 * \brief Enables transmit or receive DMA
AnnaBridge 165:d1b4690b3f8b 311 *
AnnaBridge 165:d1b4690b3f8b 312 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 313 * \param[in] dma Selects the DMA to be enabled
AnnaBridge 165:d1b4690b3f8b 314 * - bit position 0 - Receive DMA
AnnaBridge 165:d1b4690b3f8b 315 * - bit position 1 - Transmit DMA
AnnaBridge 165:d1b4690b3f8b 316 *
AnnaBridge 165:d1b4690b3f8b 317 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 318 */
AnnaBridge 165:d1b4690b3f8b 319 void spi_pl022_dma_mode_enable(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 320 uint32_t dma);
AnnaBridge 165:d1b4690b3f8b 321
AnnaBridge 165:d1b4690b3f8b 322 /**
AnnaBridge 165:d1b4690b3f8b 323 * \brief Disables transmit or receive DMA
AnnaBridge 165:d1b4690b3f8b 324 *
AnnaBridge 165:d1b4690b3f8b 325 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 326 * \param[in] dma Selects the DMA to be disabled
AnnaBridge 165:d1b4690b3f8b 327 * - bit position 0 - Receive DMA
AnnaBridge 165:d1b4690b3f8b 328 * - bit position 1 - Transmit DMA
AnnaBridge 165:d1b4690b3f8b 329 *
AnnaBridge 165:d1b4690b3f8b 330 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 331 */
AnnaBridge 165:d1b4690b3f8b 332 void spi_pl022_dma_mode_disable(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 333 uint32_t dma);
AnnaBridge 165:d1b4690b3f8b 334
AnnaBridge 165:d1b4690b3f8b 335 /**
AnnaBridge 165:d1b4690b3f8b 336 * \brief Gets peripheral identification of the device
AnnaBridge 165:d1b4690b3f8b 337 *
AnnaBridge 165:d1b4690b3f8b 338 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 339 * \param[out] periphid Pointer to fill peripheral ids
AnnaBridge 165:d1b4690b3f8b 340 *
AnnaBridge 165:d1b4690b3f8b 341 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 342 */
AnnaBridge 165:d1b4690b3f8b 343 void spi_pl022_get_periphID(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 344 struct spi_pl022_periphid_t* periphid);
AnnaBridge 165:d1b4690b3f8b 345
AnnaBridge 165:d1b4690b3f8b 346 /**
AnnaBridge 165:d1b4690b3f8b 347 * \brief Gets PrimeCell identification of the device
AnnaBridge 165:d1b4690b3f8b 348 *
AnnaBridge 165:d1b4690b3f8b 349 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 350 * \param[out] cellid Pointer to fill PrimeCell ids
AnnaBridge 165:d1b4690b3f8b 351 *
AnnaBridge 165:d1b4690b3f8b 352 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 353 */
AnnaBridge 165:d1b4690b3f8b 354 void spi_pl022_get_PrimeCell_ID(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 355 struct spi_pl022_primecell_id_t* cellid);
AnnaBridge 165:d1b4690b3f8b 356
AnnaBridge 165:d1b4690b3f8b 357 /**
AnnaBridge 165:d1b4690b3f8b 358 * \brief Sets system clock.
AnnaBridge 165:d1b4690b3f8b 359 *
AnnaBridge 165:d1b4690b3f8b 360 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 361 * \param[in] sys_clk System clock.
AnnaBridge 165:d1b4690b3f8b 362 *
AnnaBridge 165:d1b4690b3f8b 363 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 165:d1b4690b3f8b 364 *
AnnaBridge 165:d1b4690b3f8b 365 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 366 */
AnnaBridge 165:d1b4690b3f8b 367 enum spi_pl022_error_t spi_pl022_set_sys_clk(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 368 uint32_t sys_clk);
AnnaBridge 165:d1b4690b3f8b 369
AnnaBridge 165:d1b4690b3f8b 370 /**
AnnaBridge 165:d1b4690b3f8b 371 * \brief Reads single data from SPI. Non blocking.
AnnaBridge 165:d1b4690b3f8b 372 *
AnnaBridge 165:d1b4690b3f8b 373 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 374 * \param[out] rx_ptr Buffer pointer to be filled
AnnaBridge 165:d1b4690b3f8b 375 * must be enough for configured word size
AnnaBridge 165:d1b4690b3f8b 376 *
AnnaBridge 165:d1b4690b3f8b 377 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 165:d1b4690b3f8b 378 *
AnnaBridge 165:d1b4690b3f8b 379 * \note This function doesn't check if dev is NULL and
AnnaBridge 165:d1b4690b3f8b 380 * if the driver is initialized to reduce the number of checks and
AnnaBridge 165:d1b4690b3f8b 381 * make the function execution faster.
AnnaBridge 165:d1b4690b3f8b 382 */
AnnaBridge 165:d1b4690b3f8b 383 enum spi_pl022_error_t spi_pl022_read(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 384 void *rx_ptr);
AnnaBridge 165:d1b4690b3f8b 385
AnnaBridge 165:d1b4690b3f8b 386 /**
AnnaBridge 165:d1b4690b3f8b 387 * \brief Reads single data from slave SPI. Non blocking.
AnnaBridge 165:d1b4690b3f8b 388 *
AnnaBridge 165:d1b4690b3f8b 389 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 390 *
AnnaBridge 165:d1b4690b3f8b 391 * \return Returns data value from the device
AnnaBridge 165:d1b4690b3f8b 392 *
AnnaBridge 165:d1b4690b3f8b 393 * \note This function doesn't check if dev is NULL and
AnnaBridge 165:d1b4690b3f8b 394 * does not validate whether there is any data in the RX buffer
AnnaBridge 165:d1b4690b3f8b 395 */
AnnaBridge 165:d1b4690b3f8b 396 uint32_t spi_pl022_slave_read(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 397
AnnaBridge 165:d1b4690b3f8b 398 /**
AnnaBridge 165:d1b4690b3f8b 399 * \brief Writes single data to SPI. Non blocking.
AnnaBridge 165:d1b4690b3f8b 400 *
AnnaBridge 165:d1b4690b3f8b 401 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 402 * \param[in] mode Master or slave \ref spi_pl022_mode_select_t
AnnaBridge 165:d1b4690b3f8b 403 * \param[out] tx_ptr Pointer to the data to be sent
AnnaBridge 165:d1b4690b3f8b 404 *
AnnaBridge 165:d1b4690b3f8b 405 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 165:d1b4690b3f8b 406 *
AnnaBridge 165:d1b4690b3f8b 407 * \note This function doesn't check if dev is NULL and
AnnaBridge 165:d1b4690b3f8b 408 * if the driver is initialized to reduce the number of checks and
AnnaBridge 165:d1b4690b3f8b 409 * make the function execution faster.
AnnaBridge 165:d1b4690b3f8b 410 */
AnnaBridge 165:d1b4690b3f8b 411 enum spi_pl022_error_t spi_pl022_write(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 412 const enum spi_pl022_mode_select_t mode,
AnnaBridge 165:d1b4690b3f8b 413 const void *tx_ptr);
AnnaBridge 165:d1b4690b3f8b 414
AnnaBridge 165:d1b4690b3f8b 415 /**
AnnaBridge 165:d1b4690b3f8b 416 * \brief Transmit and Receive data on SPI in a blocking call
AnnaBridge 165:d1b4690b3f8b 417 *
AnnaBridge 165:d1b4690b3f8b 418 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 419 * \param[in] tx_ptr Buffer pointer to be filled
AnnaBridge 165:d1b4690b3f8b 420 * \param[in/out] tx_len_ptr Num values to transfer (updated on error)
AnnaBridge 165:d1b4690b3f8b 421 * need to be multiples of transfer word length
AnnaBridge 165:d1b4690b3f8b 422 * \param[out] rx_ptr Buffer pointer to be filled
AnnaBridge 165:d1b4690b3f8b 423 * \param[in/out] rx_len_ptr Num values to receive (updated on error)
AnnaBridge 165:d1b4690b3f8b 424 * need to be multiples of transfer word length
AnnaBridge 165:d1b4690b3f8b 425 *
AnnaBridge 165:d1b4690b3f8b 426 * \return Error code from \ref spi_pl022_error_t
AnnaBridge 165:d1b4690b3f8b 427 *
AnnaBridge 165:d1b4690b3f8b 428 * \note This function doesn't check if dev is NULL and
AnnaBridge 165:d1b4690b3f8b 429 * if the driver is initialized to reduce the number of checks and
AnnaBridge 165:d1b4690b3f8b 430 * make the function execution faster.
AnnaBridge 165:d1b4690b3f8b 431 */
AnnaBridge 165:d1b4690b3f8b 432 enum spi_pl022_error_t spi_pl022_txrx_blocking(struct spi_pl022_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 433 const void *tx_ptr,
AnnaBridge 165:d1b4690b3f8b 434 uint32_t *tx_len_ptr,
AnnaBridge 165:d1b4690b3f8b 435 void *rx_ptr,
AnnaBridge 165:d1b4690b3f8b 436 uint32_t *rx_len_ptr);
AnnaBridge 165:d1b4690b3f8b 437
AnnaBridge 165:d1b4690b3f8b 438
AnnaBridge 165:d1b4690b3f8b 439 /************************** TEST APIs ****************************/
AnnaBridge 165:d1b4690b3f8b 440
AnnaBridge 165:d1b4690b3f8b 441 /**
AnnaBridge 165:d1b4690b3f8b 442 * \brief Enables Test FIFO mode
AnnaBridge 165:d1b4690b3f8b 443 *
AnnaBridge 165:d1b4690b3f8b 444 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 445 *
AnnaBridge 165:d1b4690b3f8b 446 * \note This function doesn't check if dev is NULL
AnnaBridge 165:d1b4690b3f8b 447 */
AnnaBridge 165:d1b4690b3f8b 448 void spi_pl022_test_fifo_enable(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 449
AnnaBridge 165:d1b4690b3f8b 450 /**
AnnaBridge 165:d1b4690b3f8b 451 * \brief Disables Test FIFO mode
AnnaBridge 165:d1b4690b3f8b 452 *
AnnaBridge 165:d1b4690b3f8b 453 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 454 *
AnnaBridge 165:d1b4690b3f8b 455 * \note This function doesn't check if dev is NULL
AnnaBridge 165:d1b4690b3f8b 456 */
AnnaBridge 165:d1b4690b3f8b 457 void spi_pl022_test_fifo_disable(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 458
AnnaBridge 165:d1b4690b3f8b 459 /**
AnnaBridge 165:d1b4690b3f8b 460 * \brief Enables Integration Test mode
AnnaBridge 165:d1b4690b3f8b 461 *
AnnaBridge 165:d1b4690b3f8b 462 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 463 *
AnnaBridge 165:d1b4690b3f8b 464 * \note This function doesn't check if dev is NULL
AnnaBridge 165:d1b4690b3f8b 465 */
AnnaBridge 165:d1b4690b3f8b 466 void spi_pl022_integration_test_enable(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 467
AnnaBridge 165:d1b4690b3f8b 468 /**
AnnaBridge 165:d1b4690b3f8b 469 * \brief Disables Integration Test mode
AnnaBridge 165:d1b4690b3f8b 470 *
AnnaBridge 165:d1b4690b3f8b 471 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 472 *
AnnaBridge 165:d1b4690b3f8b 473 * \note This function doesn't check if dev is NULL
AnnaBridge 165:d1b4690b3f8b 474 */
AnnaBridge 165:d1b4690b3f8b 475 void spi_pl022_integration_test_disable(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 476
AnnaBridge 165:d1b4690b3f8b 477
AnnaBridge 165:d1b4690b3f8b 478 /**
AnnaBridge 165:d1b4690b3f8b 479 * \brief Writes data to Test data register
AnnaBridge 165:d1b4690b3f8b 480 *
AnnaBridge 165:d1b4690b3f8b 481 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 482 *
AnnaBridge 165:d1b4690b3f8b 483 * \note This function doesn't check if dev is NULL and
AnnaBridge 165:d1b4690b3f8b 484 * whether Test FIFO mode is enabled
AnnaBridge 165:d1b4690b3f8b 485 */
AnnaBridge 165:d1b4690b3f8b 486 void spi_pl022_write_test_data(struct spi_pl022_dev_t* dev, void *tx_ptr);
AnnaBridge 165:d1b4690b3f8b 487
AnnaBridge 165:d1b4690b3f8b 488 /**
AnnaBridge 165:d1b4690b3f8b 489 * \brief Reads integration test output register
AnnaBridge 165:d1b4690b3f8b 490 *
AnnaBridge 165:d1b4690b3f8b 491 * \param[in] dev SPI device structure \ref spi_pl022_dev_t
AnnaBridge 165:d1b4690b3f8b 492 *
AnnaBridge 165:d1b4690b3f8b 493 * \note This function doesn't check if dev is NULL
AnnaBridge 165:d1b4690b3f8b 494 */
AnnaBridge 165:d1b4690b3f8b 495 uint32_t spi_pl022_read_test_output_reg(struct spi_pl022_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 496
AnnaBridge 165:d1b4690b3f8b 497
AnnaBridge 165:d1b4690b3f8b 498 #ifdef __cplusplus
AnnaBridge 165:d1b4690b3f8b 499 }
AnnaBridge 165:d1b4690b3f8b 500 #endif
AnnaBridge 165:d1b4690b3f8b 501 #endif /* __SPI_PL022_DRV_H__ */