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TARGET_ARM_CM3DS_MPS2/TOOLCHAIN_GCC_ARM/smsc9220_eth_drv.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:65be27845400 1 /*
AnnaBridge 172:65be27845400 2 * Copyright (c) 2016-2018 ARM Limited
AnnaBridge 172:65be27845400 3 *
AnnaBridge 172:65be27845400 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 172:65be27845400 5 * you may not use this file except in compliance with the License.
AnnaBridge 172:65be27845400 6 * You may obtain a copy of the License at
AnnaBridge 172:65be27845400 7 *
AnnaBridge 172:65be27845400 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 172:65be27845400 9 *
AnnaBridge 172:65be27845400 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 172:65be27845400 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 172:65be27845400 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 172:65be27845400 13 * See the License for the specific language governing permissions and
AnnaBridge 172:65be27845400 14 * limitations under the License.
AnnaBridge 172:65be27845400 15 */
AnnaBridge 172:65be27845400 16
AnnaBridge 172:65be27845400 17 /**
AnnaBridge 172:65be27845400 18 * \file smsc9220_drv.h
AnnaBridge 172:65be27845400 19 * \brief Generic driver for SMSC9220 Ethernet controller
AnnaBridge 172:65be27845400 20 */
AnnaBridge 172:65be27845400 21
AnnaBridge 172:65be27845400 22 #ifndef __SMSC9220_ETH_H__
AnnaBridge 172:65be27845400 23 #define __SMSC9220_ETH_H__
AnnaBridge 172:65be27845400 24
AnnaBridge 172:65be27845400 25 #include "stdbool.h"
AnnaBridge 172:65be27845400 26 #include "stdint.h"
AnnaBridge 172:65be27845400 27
AnnaBridge 172:65be27845400 28 #ifdef __cplusplus
AnnaBridge 172:65be27845400 29 extern "C" {
AnnaBridge 172:65be27845400 30 #endif
AnnaBridge 172:65be27845400 31
AnnaBridge 172:65be27845400 32 /** SMSC9220 device configuration structure */
AnnaBridge 172:65be27845400 33 struct smsc9220_eth_dev_cfg_t {
AnnaBridge 172:65be27845400 34 const uint32_t base; /*!< SMSC9220 base address */
AnnaBridge 172:65be27845400 35 };
AnnaBridge 172:65be27845400 36
AnnaBridge 172:65be27845400 37 /** SMSC9220 device data structure */
AnnaBridge 172:65be27845400 38 struct smsc9220_eth_dev_data_t {
AnnaBridge 172:65be27845400 39 uint32_t state; /*!< Indicates if the SMSC9220 driver
AnnaBridge 172:65be27845400 40 is initialized and enabled */
AnnaBridge 172:65be27845400 41 void (*wait_ms) (int);/*!< function pointer to system's millisec delay
AnnaBridge 172:65be27845400 42 function, will be used for delays */
AnnaBridge 172:65be27845400 43 uint32_t ongoing_packet_length;/*!< size in bytes of the packet
AnnaBridge 172:65be27845400 44 is being sent */
AnnaBridge 172:65be27845400 45 uint32_t ongoing_packet_length_sent; /*!< size in bytes of the packet
AnnaBridge 172:65be27845400 46 has been sent */
AnnaBridge 172:65be27845400 47 uint32_t current_rx_size_words; /*!< Data length in words,
AnnaBridge 172:65be27845400 48 currently is being read */
AnnaBridge 172:65be27845400 49 };
AnnaBridge 172:65be27845400 50
AnnaBridge 172:65be27845400 51 /** SMSC9220 device structure */
AnnaBridge 172:65be27845400 52 struct smsc9220_eth_dev_t {
AnnaBridge 172:65be27845400 53 const struct smsc9220_eth_dev_cfg_t* const cfg; /*!< configuration */
AnnaBridge 172:65be27845400 54 struct smsc9220_eth_dev_data_t* const data; /*!< data */
AnnaBridge 172:65be27845400 55 };
AnnaBridge 172:65be27845400 56
AnnaBridge 172:65be27845400 57 /**
AnnaBridge 172:65be27845400 58 * \brief Error code definitions
AnnaBridge 172:65be27845400 59 *
AnnaBridge 172:65be27845400 60 */
AnnaBridge 172:65be27845400 61 enum smsc9220_error_t{
AnnaBridge 172:65be27845400 62 SMSC9220_ERROR_NONE = 0U, /*!< no error */
AnnaBridge 172:65be27845400 63 SMSC9220_ERROR_TIMEOUT = 1U, /*!< timeout */
AnnaBridge 172:65be27845400 64 SMSC9220_ERROR_BUSY = 2U, /*!< no error */
AnnaBridge 172:65be27845400 65 SMSC9220_ERROR_PARAM = 3U, /*!< invalid parameter */
AnnaBridge 172:65be27845400 66 SMSC9220_ERROR_INTERNAL = 4U /*!< internal error */
AnnaBridge 172:65be27845400 67 };
AnnaBridge 172:65be27845400 68
AnnaBridge 172:65be27845400 69 /**
AnnaBridge 172:65be27845400 70 * \brief Interrupt source definitions
AnnaBridge 172:65be27845400 71 *
AnnaBridge 172:65be27845400 72 */
AnnaBridge 172:65be27845400 73 enum smsc9220_interrupt_source {
AnnaBridge 172:65be27845400 74 SMSC9220_INTERRUPT_GPIO0 = 0U,
AnnaBridge 172:65be27845400 75 SMSC9220_INTERRUPT_GPIO1 = 1U,
AnnaBridge 172:65be27845400 76 SMSC9220_INTERRUPT_GPIO2 = 2U,
AnnaBridge 172:65be27845400 77 SMSC9220_INTERRUPT_RX_STATUS_FIFO_LEVEL = 3U,
AnnaBridge 172:65be27845400 78 SMSC9220_INTERRUPT_RX_STATUS_FIFO_FULL = 4U,
AnnaBridge 172:65be27845400 79 /* 5 Reserved according to Datasheet */
AnnaBridge 172:65be27845400 80 SMSC9220_INTERRUPT_RX_DROPPED_FRAME = 6U,
AnnaBridge 172:65be27845400 81 SMSC9220_INTERRUPT_TX_STATUS_FIFO_LEVEL = 7U,
AnnaBridge 172:65be27845400 82 SMSC9220_INTERRUPT_TX_STATUS_FIFO_FULL = 8U,
AnnaBridge 172:65be27845400 83 SMSC9220_INTERRUPT_TX_DATA_FIFO_AVAILABLE = 9U,
AnnaBridge 172:65be27845400 84 SMSC9220_INTERRUPT_TX_DATA_FIFO_OVERRUN = 10U,
AnnaBridge 172:65be27845400 85 /* 11, 12 Reserved according to Datasheet */
AnnaBridge 172:65be27845400 86 SMSC9220_INTERRUPT_TX_ERROR = 13U,
AnnaBridge 172:65be27845400 87 SMSC9220_INTERRUPT_RX_ERROR = 14U,
AnnaBridge 172:65be27845400 88 SMSC9220_INTERRUPT_RX_WATCHDOG_TIMEOUT = 15U,
AnnaBridge 172:65be27845400 89 SMSC9220_INTERRUPT_TX_STATUS_OVERFLOW = 16U,
AnnaBridge 172:65be27845400 90 SMSC9220_INTERRUPT_TX_POWER_MANAGEMENT = 17U,
AnnaBridge 172:65be27845400 91 SMSC9220_INTERRUPT_PHY = 18U,
AnnaBridge 172:65be27845400 92 SMSC9220_INTERRUPT_GP_TIMER = 19U,
AnnaBridge 172:65be27845400 93 SMSC9220_INTERRUPT_RX_DMA = 20U,
AnnaBridge 172:65be27845400 94 SMSC9220_INTERRUPT_TX_IOC = 21U,
AnnaBridge 172:65be27845400 95 /* 22 Reserved according to Datasheet*/
AnnaBridge 172:65be27845400 96 SMSC9220_INTERRUPT_RX_DROPPED_FRAME_HALF = 23U,
AnnaBridge 172:65be27845400 97 SMSC9220_INTERRUPT_RX_STOPPED = 24U,
AnnaBridge 172:65be27845400 98 SMSC9220_INTERRUPT_TX_STOPPED = 25U,
AnnaBridge 172:65be27845400 99 /* 26 - 30 Reserved according to Datasheet*/
AnnaBridge 172:65be27845400 100 SMSC9220_INTERRUPT_SW = 31U
AnnaBridge 172:65be27845400 101 };
AnnaBridge 172:65be27845400 102
AnnaBridge 172:65be27845400 103 /**
AnnaBridge 172:65be27845400 104 * \brief MAC register offset definitions
AnnaBridge 172:65be27845400 105 *
AnnaBridge 172:65be27845400 106 */
AnnaBridge 172:65be27845400 107 enum smsc9220_mac_reg_offsets_t{
AnnaBridge 172:65be27845400 108 SMSC9220_MAC_REG_OFFSET_CR = 0x1U,
AnnaBridge 172:65be27845400 109 SMSC9220_MAC_REG_OFFSET_ADDRH = 0x2U,
AnnaBridge 172:65be27845400 110 SMSC9220_MAC_REG_OFFSET_ADDRL = 0x3U,
AnnaBridge 172:65be27845400 111 SMSC9220_MAC_REG_OFFSET_HASHH = 0x4U,
AnnaBridge 172:65be27845400 112 SMSC9220_MAC_REG_OFFSET_HASHL = 0x5U,
AnnaBridge 172:65be27845400 113 SMSC9220_MAC_REG_OFFSET_MII_ACC = 0x6U,
AnnaBridge 172:65be27845400 114 SMSC9220_MAC_REG_OFFSET_MII_DATA = 0x7U,
AnnaBridge 172:65be27845400 115 SMSC9220_MAC_REG_OFFSET_FLOW = 0x8U,
AnnaBridge 172:65be27845400 116 SMSC9220_MAC_REG_OFFSET_VLAN1 = 0x9U,
AnnaBridge 172:65be27845400 117 SMSC9220_MAC_REG_OFFSET_VLAN2 = 0xAU,
AnnaBridge 172:65be27845400 118 SMSC9220_MAC_REG_OFFSET_WUFF = 0xBU,
AnnaBridge 172:65be27845400 119 SMSC9220_MAC_REG_OFFSET_WUCSR = 0xCU,
AnnaBridge 172:65be27845400 120 SMSC9220_MAC_REG_OFFSET_COE_CR = 0xDU
AnnaBridge 172:65be27845400 121 };
AnnaBridge 172:65be27845400 122
AnnaBridge 172:65be27845400 123 /**
AnnaBridge 172:65be27845400 124 * \brief PHY register offset definitions
AnnaBridge 172:65be27845400 125 *
AnnaBridge 172:65be27845400 126 */
AnnaBridge 172:65be27845400 127 enum phy_reg_offsets_t{
AnnaBridge 172:65be27845400 128 SMSC9220_PHY_REG_OFFSET_BCTRL = 0U,
AnnaBridge 172:65be27845400 129 SMSC9220_PHY_REG_OFFSET_BSTATUS = 1U,
AnnaBridge 172:65be27845400 130 SMSC9220_PHY_REG_OFFSET_ID1 = 2U,
AnnaBridge 172:65be27845400 131 SMSC9220_PHY_REG_OFFSET_ID2 = 3U,
AnnaBridge 172:65be27845400 132 SMSC9220_PHY_REG_OFFSET_ANEG_ADV = 4U,
AnnaBridge 172:65be27845400 133 SMSC9220_PHY_REG_OFFSET_ANEG_LPA = 5U,
AnnaBridge 172:65be27845400 134 SMSC9220_PHY_REG_OFFSET_ANEG_EXP = 6U,
AnnaBridge 172:65be27845400 135 SMSC9220_PHY_REG_OFFSET_MCONTROL = 17U,
AnnaBridge 172:65be27845400 136 SMSC9220_PHY_REG_OFFSET_MSTATUS = 18U,
AnnaBridge 172:65be27845400 137 SMSC9220_PHY_REG_OFFSET_CSINDICATE = 27U,
AnnaBridge 172:65be27845400 138 SMSC9220_PHY_REG_OFFSET_INTSRC = 29U,
AnnaBridge 172:65be27845400 139 SMSC9220_PHY_REG_OFFSET_INTMASK = 30U,
AnnaBridge 172:65be27845400 140 SMSC9220_PHY_REG_OFFSET_CS = 31U
AnnaBridge 172:65be27845400 141 };
AnnaBridge 172:65be27845400 142
AnnaBridge 172:65be27845400 143 /* Bit definitions for PHY Basic Status Register */
AnnaBridge 172:65be27845400 144 #define PHY_REG_BSTATUS_EXTENDED_CAPABILITIES_INDEX 0U
AnnaBridge 172:65be27845400 145 #define PHY_REG_BSTATUS_JABBER_DETECT_INDEX 1U
AnnaBridge 172:65be27845400 146 #define PHY_REG_BSTATUS_LINK_STATUS_INDEX 2U
AnnaBridge 172:65be27845400 147 #define PHY_REG_BSTATUS_AUTO_NEG_ABILITY_INDEX 3U
AnnaBridge 172:65be27845400 148 #define PHY_REG_BSTATUS_REMOTE_FAULT_INDEX 4U
AnnaBridge 172:65be27845400 149 #define PHY_REG_BSTATUS_AUTO_NEG_COMPLETE_INDEX 5U
AnnaBridge 172:65be27845400 150 #define PHY_REG_BSTATUS_10BASE_T_HALF_DUPLEX_INDEX 11U
AnnaBridge 172:65be27845400 151 #define PHY_REG_BSTATUS_10BASE_T_FULL_DUPLEX_INDEX 12U
AnnaBridge 172:65be27845400 152 #define PHY_REG_BSTATUS_100BASE_TX_HALF_DUPLEX_INDEX 13U
AnnaBridge 172:65be27845400 153 #define PHY_REG_BSTATUS_100BASE_TX_FULL_DUPLEX_INDEX 14U
AnnaBridge 172:65be27845400 154 #define PHY_REG_BSTATUS_100BASE_T4_INDEX 15U
AnnaBridge 172:65be27845400 155
AnnaBridge 172:65be27845400 156 /**
AnnaBridge 172:65be27845400 157 * \brief FIFO Level Interrupt bit definitions
AnnaBridge 172:65be27845400 158 *
AnnaBridge 172:65be27845400 159 */
AnnaBridge 172:65be27845400 160 enum smsc9220_fifo_level_irq_pos_t{
AnnaBridge 172:65be27845400 161 SMSC9220_FIFO_LEVEL_IRQ_RX_STATUS_POS = 0U,
AnnaBridge 172:65be27845400 162 SMSC9220_FIFO_LEVEL_IRQ_TX_STATUS_POS = 16U,
AnnaBridge 172:65be27845400 163 SMSC9220_FIFO_LEVEL_IRQ_TX_DATA_POS = 24U
AnnaBridge 172:65be27845400 164 };
AnnaBridge 172:65be27845400 165
AnnaBridge 172:65be27845400 166 /**
AnnaBridge 172:65be27845400 167 * \brief FIFO Level Interrupt limits
AnnaBridge 172:65be27845400 168 *
AnnaBridge 172:65be27845400 169 */
AnnaBridge 172:65be27845400 170 #define SMSC9220_FIFO_LEVEL_IRQ_MASK 0xFFU
AnnaBridge 172:65be27845400 171 #define SMSC9220_FIFO_LEVEL_IRQ_LEVEL_MIN 0U
AnnaBridge 172:65be27845400 172 #define SMSC9220_FIFO_LEVEL_IRQ_LEVEL_MAX SMSC9220_FIFO_LEVEL_IRQ_MASK
AnnaBridge 172:65be27845400 173
AnnaBridge 172:65be27845400 174 /**
AnnaBridge 172:65be27845400 175 * \brief Initializes SMSC9220 Ethernet controller to a known default state:
AnnaBridge 172:65be27845400 176 * - device ID is checked
AnnaBridge 172:65be27845400 177 * - global interrupt is enabled, but all irq sources are disabled
AnnaBridge 172:65be27845400 178 * - all capabilities are advertised
AnnaBridge 172:65be27845400 179 * - 10Mbps able
AnnaBridge 172:65be27845400 180 * - 10Mbps with full duplex
AnnaBridge 172:65be27845400 181 * - 100Mbps Tx able
AnnaBridge 172:65be27845400 182 * - 100Mbps with full duplex
AnnaBridge 172:65be27845400 183 * - Symmetric Pause
AnnaBridge 172:65be27845400 184 * - Asymmetric Pause
AnnaBridge 172:65be27845400 185 * - Establish link enabled
AnnaBridge 172:65be27845400 186 * - Rx enabled
AnnaBridge 172:65be27845400 187 * - Tx enabled
AnnaBridge 172:65be27845400 188 * Init should be called prior to any other process and
AnnaBridge 172:65be27845400 189 * it's the caller's responsibility to follow proper call order.
AnnaBridge 172:65be27845400 190 *
AnnaBridge 172:65be27845400 191 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 192 * \param[in] wait_ms_function function pointer to a millisec delay function
AnnaBridge 172:65be27845400 193 * for proper timing of some processes
AnnaBridge 172:65be27845400 194 *
AnnaBridge 172:65be27845400 195 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 196 */
AnnaBridge 172:65be27845400 197 enum smsc9220_error_t smsc9220_init(const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 198 void(* wait_ms_function)(int));
AnnaBridge 172:65be27845400 199
AnnaBridge 172:65be27845400 200 /**
AnnaBridge 172:65be27845400 201 * \brief Read MAC register.
AnnaBridge 172:65be27845400 202 *
AnnaBridge 172:65be27845400 203 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 204 * \param[in] regoffset Register offset
AnnaBridge 172:65be27845400 205 * \param[in, out] data Pointer to register will be read
AnnaBridge 172:65be27845400 206 *
AnnaBridge 172:65be27845400 207 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 208 */
AnnaBridge 172:65be27845400 209 enum smsc9220_error_t smsc9220_mac_regread(
AnnaBridge 172:65be27845400 210 const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 211 enum smsc9220_mac_reg_offsets_t regoffset,
AnnaBridge 172:65be27845400 212 uint32_t *data);
AnnaBridge 172:65be27845400 213
AnnaBridge 172:65be27845400 214 /**
AnnaBridge 172:65be27845400 215 * \brief Write MAC register.
AnnaBridge 172:65be27845400 216 *
AnnaBridge 172:65be27845400 217 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 218 * \param[in] regoffset Register offset
AnnaBridge 172:65be27845400 219 * \param[in] data Register value to write
AnnaBridge 172:65be27845400 220 *
AnnaBridge 172:65be27845400 221 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 222 */
AnnaBridge 172:65be27845400 223 enum smsc9220_error_t smsc9220_mac_regwrite(
AnnaBridge 172:65be27845400 224 const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 225 enum smsc9220_mac_reg_offsets_t regoffset,
AnnaBridge 172:65be27845400 226 uint32_t data);
AnnaBridge 172:65be27845400 227
AnnaBridge 172:65be27845400 228 /**
AnnaBridge 172:65be27845400 229 * \brief Read PHY register.
AnnaBridge 172:65be27845400 230 *
AnnaBridge 172:65be27845400 231 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 232 * \param[in] regoffset Register offset
AnnaBridge 172:65be27845400 233 * \param[out] data Register value is read
AnnaBridge 172:65be27845400 234 *
AnnaBridge 172:65be27845400 235 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 236 */
AnnaBridge 172:65be27845400 237 enum smsc9220_error_t smsc9220_phy_regread(
AnnaBridge 172:65be27845400 238 const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 239 enum phy_reg_offsets_t,
AnnaBridge 172:65be27845400 240 uint32_t *data);
AnnaBridge 172:65be27845400 241
AnnaBridge 172:65be27845400 242 /**
AnnaBridge 172:65be27845400 243 * \brief Write PHY register.
AnnaBridge 172:65be27845400 244 *
AnnaBridge 172:65be27845400 245 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 246 * \param[in] regoffset Register offset
AnnaBridge 172:65be27845400 247 * \param[in] data Register value to write
AnnaBridge 172:65be27845400 248 *
AnnaBridge 172:65be27845400 249 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 250 */
AnnaBridge 172:65be27845400 251 enum smsc9220_error_t smsc9220_phy_regwrite(
AnnaBridge 172:65be27845400 252 const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 253 enum phy_reg_offsets_t,
AnnaBridge 172:65be27845400 254 uint32_t data);
AnnaBridge 172:65be27845400 255
AnnaBridge 172:65be27845400 256 /**
AnnaBridge 172:65be27845400 257 * \brief Read SMSC9220 ID.
AnnaBridge 172:65be27845400 258 *
AnnaBridge 172:65be27845400 259 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 260 *
AnnaBridge 172:65be27845400 261 * \return ID number
AnnaBridge 172:65be27845400 262 */
AnnaBridge 172:65be27845400 263 uint32_t smsc9220_read_id(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 264
AnnaBridge 172:65be27845400 265 /**
AnnaBridge 172:65be27845400 266 * \brief Initiates a soft reset, returns failure or success.
AnnaBridge 172:65be27845400 267 *
AnnaBridge 172:65be27845400 268 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 269 *
AnnaBridge 172:65be27845400 270 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 271 */
AnnaBridge 172:65be27845400 272 enum smsc9220_error_t smsc9220_soft_reset(
AnnaBridge 172:65be27845400 273 const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 274
AnnaBridge 172:65be27845400 275 /**
AnnaBridge 172:65be27845400 276 * \brief Set maximum transition unit by Tx fifo size.
AnnaBridge 172:65be27845400 277 * Note: The MTU will be smaller by 512 bytes,
AnnaBridge 172:65be27845400 278 * because the status uses this fixed space.
AnnaBridge 172:65be27845400 279 *
AnnaBridge 172:65be27845400 280 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 281 * \param[in] val Size of the fifo in kbytes
AnnaBridge 172:65be27845400 282 * \ref HW_CFG_REG_TX_FIFO_SIZE_MIN
AnnaBridge 172:65be27845400 283 * \ref HW_CFG_REG_TX_FIFO_SIZE_MAX
AnnaBridge 172:65be27845400 284 */
AnnaBridge 172:65be27845400 285 void smsc9220_set_txfifo(const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 286 uint32_t val);
AnnaBridge 172:65be27845400 287
AnnaBridge 172:65be27845400 288 /**
AnnaBridge 172:65be27845400 289 * \brief Set FIFO level interrupt for a given source
AnnaBridge 172:65be27845400 290 *
AnnaBridge 172:65be27845400 291 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 292 * \param[in] irq_level_pos Bit position of the FIFO to set
AnnaBridge 172:65be27845400 293 * \ref smsc9220_fifo_level_irq_pos_t
AnnaBridge 172:65be27845400 294 * \param[in] level Level of the FIFO, when the FIFO used space is greater
AnnaBridge 172:65be27845400 295 * than this value, corresponding interrupt will be generated.
AnnaBridge 172:65be27845400 296 *
AnnaBridge 172:65be27845400 297 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 298 */
AnnaBridge 172:65be27845400 299 enum smsc9220_error_t smsc9220_set_fifo_level_irq(
AnnaBridge 172:65be27845400 300 const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 301 enum smsc9220_fifo_level_irq_pos_t irq_level_pos,
AnnaBridge 172:65be27845400 302 uint32_t level);
AnnaBridge 172:65be27845400 303
AnnaBridge 172:65be27845400 304 /**
AnnaBridge 172:65be27845400 305 * \brief Wait for EEPROM to be ready to use.
AnnaBridge 172:65be27845400 306 *
AnnaBridge 172:65be27845400 307 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 308 *
AnnaBridge 172:65be27845400 309 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 310 */
AnnaBridge 172:65be27845400 311 enum smsc9220_error_t smsc9220_wait_eeprom(
AnnaBridge 172:65be27845400 312 const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 313
AnnaBridge 172:65be27845400 314 /**
AnnaBridge 172:65be27845400 315 * \brief Initialise irqs by clearing and disabling all interrupt sources
AnnaBridge 172:65be27845400 316 * and enable interrupts. Since all interrupt sources are disabled,
AnnaBridge 172:65be27845400 317 * interrupt won't be triggered, until interrupt sources won't be
AnnaBridge 172:65be27845400 318 * enabled by \ref smsc9220_enable_interrupt
AnnaBridge 172:65be27845400 319 *
AnnaBridge 172:65be27845400 320 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 321 */
AnnaBridge 172:65be27845400 322 void smsc9220_init_irqs(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 323
AnnaBridge 172:65be27845400 324 /**
AnnaBridge 172:65be27845400 325 * \brief Check PHY ID registers.
AnnaBridge 172:65be27845400 326 *
AnnaBridge 172:65be27845400 327 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 328 *
AnnaBridge 172:65be27845400 329 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 330 */
AnnaBridge 172:65be27845400 331 enum smsc9220_error_t smsc9220_check_phy(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 332
AnnaBridge 172:65be27845400 333 /**
AnnaBridge 172:65be27845400 334 * \brief Reset PHY
AnnaBridge 172:65be27845400 335 *
AnnaBridge 172:65be27845400 336 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 337 *
AnnaBridge 172:65be27845400 338 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 339 */
AnnaBridge 172:65be27845400 340 enum smsc9220_error_t smsc9220_reset_phy(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 341
AnnaBridge 172:65be27845400 342 /**
AnnaBridge 172:65be27845400 343 * \brief Advertise all speeds and pause capabilities
AnnaBridge 172:65be27845400 344 *
AnnaBridge 172:65be27845400 345 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 346 */
AnnaBridge 172:65be27845400 347 void smsc9220_advertise_cap(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 348
AnnaBridge 172:65be27845400 349 /**
AnnaBridge 172:65be27845400 350 * \brief Enable transmission
AnnaBridge 172:65be27845400 351 *
AnnaBridge 172:65be27845400 352 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 353 */
AnnaBridge 172:65be27845400 354 void smsc9220_enable_xmit(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 355
AnnaBridge 172:65be27845400 356 /**
AnnaBridge 172:65be27845400 357 * \brief Disable transmission
AnnaBridge 172:65be27845400 358 *
AnnaBridge 172:65be27845400 359 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 360 */
AnnaBridge 172:65be27845400 361 void smsc9220_disable_xmit(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 362
AnnaBridge 172:65be27845400 363 /**
AnnaBridge 172:65be27845400 364 * \brief Enable MAC transmitter
AnnaBridge 172:65be27845400 365 *
AnnaBridge 172:65be27845400 366 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 367 */
AnnaBridge 172:65be27845400 368 void smsc9220_enable_mac_xmit(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 369
AnnaBridge 172:65be27845400 370 /**
AnnaBridge 172:65be27845400 371 * \brief Disable MAC transmitter
AnnaBridge 172:65be27845400 372 *
AnnaBridge 172:65be27845400 373 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 374 */
AnnaBridge 172:65be27845400 375 void smsc9220_disable_mac_xmit(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 376
AnnaBridge 172:65be27845400 377 /**
AnnaBridge 172:65be27845400 378 * \brief Enable receive
AnnaBridge 172:65be27845400 379 *
AnnaBridge 172:65be27845400 380 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 381 */
AnnaBridge 172:65be27845400 382 void smsc9220_enable_mac_recv(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 383
AnnaBridge 172:65be27845400 384 /**
AnnaBridge 172:65be27845400 385 * \brief Disable receive
AnnaBridge 172:65be27845400 386 *
AnnaBridge 172:65be27845400 387 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 388 */
AnnaBridge 172:65be27845400 389 void smsc9220_disable_mac_recv(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 390
AnnaBridge 172:65be27845400 391 /**
AnnaBridge 172:65be27845400 392 * \brief Enable the given interrupt source.
AnnaBridge 172:65be27845400 393 *
AnnaBridge 172:65be27845400 394 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 395 * \param[in] source Enum of the interrupt source.
AnnaBridge 172:65be27845400 396 */
AnnaBridge 172:65be27845400 397 void smsc9220_enable_interrupt(const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 398 enum smsc9220_interrupt_source source);
AnnaBridge 172:65be27845400 399
AnnaBridge 172:65be27845400 400 /**
AnnaBridge 172:65be27845400 401 * \brief Disable the given interrupt source.
AnnaBridge 172:65be27845400 402 *
AnnaBridge 172:65be27845400 403 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 404 * \param[in] source Enum of the interrupt source.
AnnaBridge 172:65be27845400 405 */
AnnaBridge 172:65be27845400 406 void smsc9220_disable_interrupt(const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 407 enum smsc9220_interrupt_source source);
AnnaBridge 172:65be27845400 408
AnnaBridge 172:65be27845400 409 /**
AnnaBridge 172:65be27845400 410 * \brief Disable all of the interrupt sources.
AnnaBridge 172:65be27845400 411 *
AnnaBridge 172:65be27845400 412 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 413 */
AnnaBridge 172:65be27845400 414 void smsc9220_disable_all_interrupts(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 415
AnnaBridge 172:65be27845400 416 /**
AnnaBridge 172:65be27845400 417 * \brief Clear the given interrupt source.
AnnaBridge 172:65be27845400 418 *
AnnaBridge 172:65be27845400 419 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 420 * \param[in] source Enum of the interrupt source.
AnnaBridge 172:65be27845400 421 */
AnnaBridge 172:65be27845400 422 void smsc9220_clear_interrupt(const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 423 enum smsc9220_interrupt_source source);
AnnaBridge 172:65be27845400 424
AnnaBridge 172:65be27845400 425 /**
AnnaBridge 172:65be27845400 426 * \brief Clear all of the interrupt sources.
AnnaBridge 172:65be27845400 427 *
AnnaBridge 172:65be27845400 428 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 429 */
AnnaBridge 172:65be27845400 430 void smsc9220_clear_all_interrupts(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 431
AnnaBridge 172:65be27845400 432 /**
AnnaBridge 172:65be27845400 433 * \brief Get the status of the given interrupt source.
AnnaBridge 172:65be27845400 434 *
AnnaBridge 172:65be27845400 435 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 436 * \param[in] source Enum of the interrupt source.
AnnaBridge 172:65be27845400 437 *
AnnaBridge 172:65be27845400 438 * \return non-zero if the given interrupt source is triggered, zero otherwise
AnnaBridge 172:65be27845400 439 */
AnnaBridge 172:65be27845400 440 int smsc9220_get_interrupt(const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 441 enum smsc9220_interrupt_source source);
AnnaBridge 172:65be27845400 442
AnnaBridge 172:65be27845400 443 /**
AnnaBridge 172:65be27845400 444 * \brief Establish link
AnnaBridge 172:65be27845400 445 *
AnnaBridge 172:65be27845400 446 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 447 */
AnnaBridge 172:65be27845400 448 void smsc9220_establish_link(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 449
AnnaBridge 172:65be27845400 450 /**
AnnaBridge 172:65be27845400 451 * \brief Read MAC address from EEPROM.
AnnaBridge 172:65be27845400 452 *
AnnaBridge 172:65be27845400 453 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 454 * \param[in,out] mac array will include the read MAC address in
AnnaBridge 172:65be27845400 455 * 6 bytes hexadecimal format.
AnnaBridge 172:65be27845400 456 * It should be allocated by the caller to 6 bytes.
AnnaBridge 172:65be27845400 457 *
AnnaBridge 172:65be27845400 458 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 459 */
AnnaBridge 172:65be27845400 460 enum smsc9220_error_t smsc9220_read_mac_address(
AnnaBridge 172:65be27845400 461 const struct smsc9220_eth_dev_t* dev, char *mac);
AnnaBridge 172:65be27845400 462
AnnaBridge 172:65be27845400 463 /**
AnnaBridge 172:65be27845400 464 * \brief Check device ID.
AnnaBridge 172:65be27845400 465 *
AnnaBridge 172:65be27845400 466 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 467 */
AnnaBridge 172:65be27845400 468 int smsc9220_check_id(const struct smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 469
AnnaBridge 172:65be27845400 470 /**
AnnaBridge 172:65be27845400 471 * \brief Get the data size of the Tx buffer, aka Maximum Transition Unit
AnnaBridge 172:65be27845400 472 *
AnnaBridge 172:65be27845400 473 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 474 *
AnnaBridge 172:65be27845400 475 * \return Fifo data size in bytes
AnnaBridge 172:65be27845400 476 */
AnnaBridge 172:65be27845400 477 uint32_t smsc9220_get_tx_data_fifo_size(const struct
AnnaBridge 172:65be27845400 478 smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 479
AnnaBridge 172:65be27845400 480 /**
AnnaBridge 172:65be27845400 481 * \brief Send Ethernet packet from buffer chain.
AnnaBridge 172:65be27845400 482 * The full packet length should be known in the beginning
AnnaBridge 172:65be27845400 483 * of a new packet.
AnnaBridge 172:65be27845400 484 *
AnnaBridge 172:65be27845400 485 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 486 * \param[in] total_payload_length Length of the ethernet payload.
AnnaBridge 172:65be27845400 487 * Should be equal to the sum of passed buffers within a packet.
AnnaBridge 172:65be27845400 488 * \param[in] is_new_packet Should be set to true if the input buffer has to
AnnaBridge 172:65be27845400 489 * be sent as the start of a new packet or as a full packet.
AnnaBridge 172:65be27845400 490 * \param[in] data Pointer to the data should be sent.
AnnaBridge 172:65be27845400 491 * \param[in] current_size Size of the data in bytes.
AnnaBridge 172:65be27845400 492 *
AnnaBridge 172:65be27845400 493 * \return error code /ref smsc9220_error_t
AnnaBridge 172:65be27845400 494 */
AnnaBridge 172:65be27845400 495 enum smsc9220_error_t smsc9220_send_by_chunks(
AnnaBridge 172:65be27845400 496 const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 497 uint32_t total_payload_length,
AnnaBridge 172:65be27845400 498 bool is_new_packet,
AnnaBridge 172:65be27845400 499 const char *data, uint32_t current_size);
AnnaBridge 172:65be27845400 500
AnnaBridge 172:65be27845400 501 /**
AnnaBridge 172:65be27845400 502 * \brief Receive Ethernet packet from Rx FIFO to the passed buffer.
AnnaBridge 172:65be27845400 503 * Stops reading at packet border.
AnnaBridge 172:65be27845400 504 * If the passed buffer is larger than the current packet,
AnnaBridge 172:65be27845400 505 * the whole packet will be read into the buffer.
AnnaBridge 172:65be27845400 506 * If the current packet is larger than the passed buffer,
AnnaBridge 172:65be27845400 507 * the buffer will be filled with data and the next call
AnnaBridge 172:65be27845400 508 * will continue the read from that point.
AnnaBridge 172:65be27845400 509 *
AnnaBridge 172:65be27845400 510 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 511 * \param[in,out] data Pointer where the data will be read to.
AnnaBridge 172:65be27845400 512 * The caller is responsible to allocate it.
AnnaBridge 172:65be27845400 513 * \param[in] dlen Length of the allocated data in bytes.
AnnaBridge 172:65be27845400 514 *
AnnaBridge 172:65be27845400 515 * \return Remaining bytes left in the fifo of the current packet.
AnnaBridge 172:65be27845400 516 */
AnnaBridge 172:65be27845400 517 uint32_t smsc9220_receive_by_chunks(const struct smsc9220_eth_dev_t* dev,
AnnaBridge 172:65be27845400 518 char *data, uint32_t dlen);
AnnaBridge 172:65be27845400 519
AnnaBridge 172:65be27845400 520 /**
AnnaBridge 172:65be27845400 521 * \brief Get the used space of Rx fifo in bytes.
AnnaBridge 172:65be27845400 522 *
AnnaBridge 172:65be27845400 523 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 524 *
AnnaBridge 172:65be27845400 525 * \return Data received and waiting for read in bytes
AnnaBridge 172:65be27845400 526 */
AnnaBridge 172:65be27845400 527 uint32_t smsc9220_get_rxfifo_data_used_space(const struct
AnnaBridge 172:65be27845400 528 smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 529
AnnaBridge 172:65be27845400 530 /**
AnnaBridge 172:65be27845400 531 * \brief Get the size of next unread packet in Rx buffer, using the peak
AnnaBridge 172:65be27845400 532 * register, which is not destructive so can be read asynchronously.
AnnaBridge 172:65be27845400 533 * Warning: In case of heavy receiving load, it's possible this register
AnnaBridge 172:65be27845400 534 * is not perfectly in sync.
AnnaBridge 172:65be27845400 535 *
AnnaBridge 172:65be27845400 536 * \param[in] dev Ethernet device structure \ref smsc9220_eth_dev_t
AnnaBridge 172:65be27845400 537 *
AnnaBridge 172:65be27845400 538 * \return Size in bytes of the next packet can be read from Rx fifo, according
AnnaBridge 172:65be27845400 539 * to the peek register.
AnnaBridge 172:65be27845400 540 */
AnnaBridge 172:65be27845400 541 uint32_t smsc9220_peek_next_packet_size(const struct
AnnaBridge 172:65be27845400 542 smsc9220_eth_dev_t* dev);
AnnaBridge 172:65be27845400 543
AnnaBridge 172:65be27845400 544 #ifdef __cplusplus
AnnaBridge 172:65be27845400 545 }
AnnaBridge 172:65be27845400 546 #endif
AnnaBridge 172:65be27845400 547
AnnaBridge 172:65be27845400 548 #endif /* __SMSC9220_ETH_H__ */