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TARGET_ARM_CM3DS_MPS2/TOOLCHAIN_GCC_ARM/arm_gpio_drv.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 165:d1b4690b3f8b 1 /*
AnnaBridge 165:d1b4690b3f8b 2 * Copyright (c) 2016-2018 ARM Limited
AnnaBridge 165:d1b4690b3f8b 3 *
AnnaBridge 165:d1b4690b3f8b 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 165:d1b4690b3f8b 5 * you may not use this file except in compliance with the License.
AnnaBridge 165:d1b4690b3f8b 6 * You may obtain a copy of the License at
AnnaBridge 165:d1b4690b3f8b 7 *
AnnaBridge 165:d1b4690b3f8b 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 165:d1b4690b3f8b 9 *
AnnaBridge 165:d1b4690b3f8b 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 165:d1b4690b3f8b 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 165:d1b4690b3f8b 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 165:d1b4690b3f8b 13 * See the License for the specific language governing permissions and
AnnaBridge 165:d1b4690b3f8b 14 * limitations under the License.
AnnaBridge 165:d1b4690b3f8b 15 */
AnnaBridge 165:d1b4690b3f8b 16
AnnaBridge 165:d1b4690b3f8b 17 /**
AnnaBridge 165:d1b4690b3f8b 18 * \file arm_gpio_drv.h
AnnaBridge 165:d1b4690b3f8b 19 * \brief Generic driver for ARM GPIO.
AnnaBridge 165:d1b4690b3f8b 20 */
AnnaBridge 165:d1b4690b3f8b 21
AnnaBridge 165:d1b4690b3f8b 22 #ifndef __ARM_GPIO_DRV_H__
AnnaBridge 165:d1b4690b3f8b 23 #define __ARM_GPIO_DRV_H__
AnnaBridge 165:d1b4690b3f8b 24
AnnaBridge 165:d1b4690b3f8b 25 #include <stdint.h>
AnnaBridge 165:d1b4690b3f8b 26
AnnaBridge 165:d1b4690b3f8b 27 #ifdef __cplusplus
AnnaBridge 165:d1b4690b3f8b 28 extern "C" {
AnnaBridge 165:d1b4690b3f8b 29 #endif
AnnaBridge 165:d1b4690b3f8b 30
AnnaBridge 165:d1b4690b3f8b 31 #define DEFAULT_PORT_MASK 0xFFFF /* Default port mask */
AnnaBridge 165:d1b4690b3f8b 32
AnnaBridge 165:d1b4690b3f8b 33 /* GPIO flags */
AnnaBridge 165:d1b4690b3f8b 34 #define ARM_GPIO_PIN_DISABLE (1 << 0)
AnnaBridge 165:d1b4690b3f8b 35 #define ARM_GPIO_PIN_ENABLE (1 << 1)
AnnaBridge 165:d1b4690b3f8b 36 #define ARM_GPIO_OUTPUT (1 << 2)
AnnaBridge 165:d1b4690b3f8b 37 #define ARM_GPIO_INPUT (1 << 3)
AnnaBridge 165:d1b4690b3f8b 38 #define ARM_GPIO_IRQ (1 << 4)
AnnaBridge 165:d1b4690b3f8b 39 #define ARM_GPIO_IRQ_EDGE (1 << 5)
AnnaBridge 165:d1b4690b3f8b 40 #define ARM_GPIO_IRQ_LEVEL (1 << 6)
AnnaBridge 165:d1b4690b3f8b 41 #define ARM_GPIO_IRQ_ACTIVE_LOW (1 << 7)
AnnaBridge 165:d1b4690b3f8b 42 #define ARM_GPIO_IRQ_ACTIVE_HIGH (1 << 8)
AnnaBridge 165:d1b4690b3f8b 43
AnnaBridge 165:d1b4690b3f8b 44 /* ARM GPIO enumeration types */
AnnaBridge 165:d1b4690b3f8b 45 enum arm_gpio_access_t {
AnnaBridge 165:d1b4690b3f8b 46 ARM_GPIO_ACCESS_PIN = 0, /*!< Pin access to GPIO */
AnnaBridge 165:d1b4690b3f8b 47 ARM_GPIO_ACCESS_PORT /*!< Port access to GPIO */
AnnaBridge 165:d1b4690b3f8b 48 };
AnnaBridge 165:d1b4690b3f8b 49
AnnaBridge 165:d1b4690b3f8b 50 enum arm_gpio_irq_status_t {
AnnaBridge 165:d1b4690b3f8b 51 ARM_GPIO_IRQ_DISABLE = 0, /*!< Disable interruptions */
AnnaBridge 165:d1b4690b3f8b 52 ARM_GPIO_IRQ_ENABLE /*!< Enable interruptions */
AnnaBridge 165:d1b4690b3f8b 53 };
AnnaBridge 165:d1b4690b3f8b 54
AnnaBridge 165:d1b4690b3f8b 55 enum arm_gpio_error_t {
AnnaBridge 165:d1b4690b3f8b 56 ARM_GPIO_ERR_NONE = 0, /*!< No error */
AnnaBridge 165:d1b4690b3f8b 57 ARM_GPIO_ERR_INVALID_ARG, /*!< Error invalid input argument */
AnnaBridge 165:d1b4690b3f8b 58 ARM_GPIO_ERR_PORT_NOT_INIT /*!< Error GPIO port not initialized */
AnnaBridge 165:d1b4690b3f8b 59 };
AnnaBridge 165:d1b4690b3f8b 60
AnnaBridge 165:d1b4690b3f8b 61 /* ARM GPIO device configuration structure */
AnnaBridge 165:d1b4690b3f8b 62 struct arm_gpio_dev_cfg_t {
AnnaBridge 165:d1b4690b3f8b 63 const uint32_t base; /*!< GPIO base address */
AnnaBridge 165:d1b4690b3f8b 64 };
AnnaBridge 165:d1b4690b3f8b 65
AnnaBridge 165:d1b4690b3f8b 66 /* ARM GPIO device data structure */
AnnaBridge 165:d1b4690b3f8b 67 struct arm_gpio_dev_data_t {
AnnaBridge 165:d1b4690b3f8b 68 uint32_t state; /*!< Indicates if the gpio driver
AnnaBridge 165:d1b4690b3f8b 69 is initialized and enabled */
AnnaBridge 165:d1b4690b3f8b 70 uint32_t port_mask; /*!< Port mask used for any port access */
AnnaBridge 165:d1b4690b3f8b 71 };
AnnaBridge 165:d1b4690b3f8b 72
AnnaBridge 165:d1b4690b3f8b 73 /* ARM GPIO device structure */
AnnaBridge 165:d1b4690b3f8b 74 struct arm_gpio_dev_t {
AnnaBridge 165:d1b4690b3f8b 75 const struct arm_gpio_dev_cfg_t* const cfg; /*!< GPIO configuration */
AnnaBridge 165:d1b4690b3f8b 76 struct arm_gpio_dev_data_t* const data; /*!< GPIO data */
AnnaBridge 165:d1b4690b3f8b 77 };
AnnaBridge 165:d1b4690b3f8b 78
AnnaBridge 165:d1b4690b3f8b 79 /* ARM GPIO pin structure */
AnnaBridge 165:d1b4690b3f8b 80 struct arm_gpio_pin_t {
AnnaBridge 165:d1b4690b3f8b 81 uint32_t number; /*!< Pin number */
AnnaBridge 165:d1b4690b3f8b 82 enum arm_gpio_access_t access_type; /*!< Type of access in the
AnnaBridge 165:d1b4690b3f8b 83 GPIO block */
AnnaBridge 165:d1b4690b3f8b 84 };
AnnaBridge 165:d1b4690b3f8b 85
AnnaBridge 165:d1b4690b3f8b 86 /**
AnnaBridge 165:d1b4690b3f8b 87 * \brief Initializes GPIO port.
AnnaBridge 165:d1b4690b3f8b 88 *
AnnaBridge 165:d1b4690b3f8b 89 * \param[in] dev GPIO port to initalize \ref arm_gpio_dev_t
AnnaBridge 165:d1b4690b3f8b 90 *
AnnaBridge 165:d1b4690b3f8b 91 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 92 */
AnnaBridge 165:d1b4690b3f8b 93 void arm_gpio_init(struct arm_gpio_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 94
AnnaBridge 165:d1b4690b3f8b 95 /**
AnnaBridge 165:d1b4690b3f8b 96 * \brief Configurates pin or port.
AnnaBridge 165:d1b4690b3f8b 97 *
AnnaBridge 165:d1b4690b3f8b 98 * \param[in] dev GPIO port to initalize \ref arm_gpio_dev_t
AnnaBridge 165:d1b4690b3f8b 99 * \param[in] access Access type \ref arm_gpio_access_t
AnnaBridge 165:d1b4690b3f8b 100 * \param[in] pin_num Pin number.
AnnaBridge 165:d1b4690b3f8b 101 * \param[in] flags Pin flags \ref arm_gpio_flags_t
AnnaBridge 165:d1b4690b3f8b 102 *
AnnaBridge 165:d1b4690b3f8b 103 * \return Returns error code as specified in \ref arm_gpio_error_t
AnnaBridge 165:d1b4690b3f8b 104 *
AnnaBridge 165:d1b4690b3f8b 105 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 106 */
AnnaBridge 165:d1b4690b3f8b 107 enum arm_gpio_error_t arm_gpio_config(struct arm_gpio_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 108 enum arm_gpio_access_t access,
AnnaBridge 165:d1b4690b3f8b 109 uint8_t pin_num,
AnnaBridge 165:d1b4690b3f8b 110 uint32_t flags);
AnnaBridge 165:d1b4690b3f8b 111
AnnaBridge 165:d1b4690b3f8b 112 /**
AnnaBridge 165:d1b4690b3f8b 113 * \brief Writes to output pin or port.
AnnaBridge 165:d1b4690b3f8b 114 *
AnnaBridge 165:d1b4690b3f8b 115 * \param[in] dev GPIO port to initalize \ref arm_gpio_dev_t
AnnaBridge 165:d1b4690b3f8b 116 * \param[in] access Access type \ref arm_gpio_access_t
AnnaBridge 165:d1b4690b3f8b 117 * \param[in] pin_num Pin number.
AnnaBridge 165:d1b4690b3f8b 118 * \param[in] value Value(s) to set.
AnnaBridge 165:d1b4690b3f8b 119 *
AnnaBridge 165:d1b4690b3f8b 120 * \return Returns error code as specified in \ref arm_gpio_error_t
AnnaBridge 165:d1b4690b3f8b 121 *
AnnaBridge 165:d1b4690b3f8b 122 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 123 * \note As ARM is a read-modify-write architecture, before writing a
AnnaBridge 165:d1b4690b3f8b 124 * value on a GPIO pin it is required to disable the
AnnaBridge 165:d1b4690b3f8b 125 * interrupts to prevent problems in a multitasking
AnnaBridge 165:d1b4690b3f8b 126 * environment.
AnnaBridge 165:d1b4690b3f8b 127 */
AnnaBridge 165:d1b4690b3f8b 128 enum arm_gpio_error_t arm_gpio_write(struct arm_gpio_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 129 enum arm_gpio_access_t access,
AnnaBridge 165:d1b4690b3f8b 130 uint8_t pin_num,
AnnaBridge 165:d1b4690b3f8b 131 uint32_t value);
AnnaBridge 165:d1b4690b3f8b 132
AnnaBridge 165:d1b4690b3f8b 133 /**
AnnaBridge 165:d1b4690b3f8b 134 * \brief Reads the pin or port status.
AnnaBridge 165:d1b4690b3f8b 135 *
AnnaBridge 165:d1b4690b3f8b 136 * \param[in] dev GPIO port to initalize \ref arm_gpio_dev_t
AnnaBridge 165:d1b4690b3f8b 137 * \param[in] access Access type \ref arm_gpio_access_t
AnnaBridge 165:d1b4690b3f8b 138 * \param[in] pin_num Pin number.
AnnaBridge 165:d1b4690b3f8b 139 * \param[in] value Value of input pin(s).
AnnaBridge 165:d1b4690b3f8b 140 *
AnnaBridge 165:d1b4690b3f8b 141 * \return Returns bit value for Pin access or port value for port access.
AnnaBridge 165:d1b4690b3f8b 142 * Negative value for error.
AnnaBridge 165:d1b4690b3f8b 143 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 144 */
AnnaBridge 165:d1b4690b3f8b 145 int32_t arm_gpio_read(struct arm_gpio_dev_t* dev, enum arm_gpio_access_t access,
AnnaBridge 165:d1b4690b3f8b 146 uint8_t pin_num);
AnnaBridge 165:d1b4690b3f8b 147
AnnaBridge 165:d1b4690b3f8b 148 /**
AnnaBridge 165:d1b4690b3f8b 149 * \brief Sets interrupt status for the given pin or port.
AnnaBridge 165:d1b4690b3f8b 150 *
AnnaBridge 165:d1b4690b3f8b 151 * \param[in] dev GPIO port to initalize \ref arm_gpio_dev_t
AnnaBridge 165:d1b4690b3f8b 152 * \param[in] access Access type \ref arm_gpio_access_t
AnnaBridge 165:d1b4690b3f8b 153 * \param[in] pin_num Pin number.
AnnaBridge 165:d1b4690b3f8b 154 * \param[in] status Interrupt status \ref arm_gpio_irq_status
AnnaBridge 165:d1b4690b3f8b 155 *
AnnaBridge 165:d1b4690b3f8b 156 * \return Returns error code as specified in \ref arm_gpio_error_t
AnnaBridge 165:d1b4690b3f8b 157 *
AnnaBridge 165:d1b4690b3f8b 158 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 159 */
AnnaBridge 165:d1b4690b3f8b 160 enum arm_gpio_error_t arm_gpio_set_interrupt(struct arm_gpio_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 161 enum arm_gpio_access_t access,
AnnaBridge 165:d1b4690b3f8b 162 uint8_t pin_num,
AnnaBridge 165:d1b4690b3f8b 163 enum arm_gpio_irq_status_t status);
AnnaBridge 165:d1b4690b3f8b 164
AnnaBridge 165:d1b4690b3f8b 165 /**
AnnaBridge 165:d1b4690b3f8b 166 * \brief Gets interrupt status for the given pin or port.
AnnaBridge 165:d1b4690b3f8b 167 *
AnnaBridge 165:d1b4690b3f8b 168 * \param[in] dev GPIO port to initalize \ref arm_gpio_dev_t
AnnaBridge 165:d1b4690b3f8b 169 * \param[in] access Access type \ref arm_gpio_access_t
AnnaBridge 165:d1b4690b3f8b 170 * \param[in] pin_num Pin number.
AnnaBridge 165:d1b4690b3f8b 171 * \param[out] status Interrupt status values. If the access is by pin, then
AnnaBridge 165:d1b4690b3f8b 172 * the status will be 0 or 1.
AnnaBridge 165:d1b4690b3f8b 173 *
AnnaBridge 165:d1b4690b3f8b 174 * \return Returns error code as specified in \ref arm_gpio_error_t
AnnaBridge 165:d1b4690b3f8b 175 *
AnnaBridge 165:d1b4690b3f8b 176 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 177 */
AnnaBridge 165:d1b4690b3f8b 178 enum arm_gpio_error_t arm_gpio_get_irq_status(struct arm_gpio_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 179 enum arm_gpio_access_t access,
AnnaBridge 165:d1b4690b3f8b 180 uint8_t pin_num,
AnnaBridge 165:d1b4690b3f8b 181 uint32_t* status);
AnnaBridge 165:d1b4690b3f8b 182
AnnaBridge 165:d1b4690b3f8b 183 /**
AnnaBridge 165:d1b4690b3f8b 184 * \brief Clears gpio interrupt.
AnnaBridge 165:d1b4690b3f8b 185 *
AnnaBridge 165:d1b4690b3f8b 186 * \param[in] dev GPIO port to initalize \ref arm_gpio_dev_t
AnnaBridge 165:d1b4690b3f8b 187 * \param[in] pin_num Pin number.
AnnaBridge 165:d1b4690b3f8b 188 *
AnnaBridge 165:d1b4690b3f8b 189 * \return Returns error code as specified in \ref arm_gpio_error_t
AnnaBridge 165:d1b4690b3f8b 190 *
AnnaBridge 165:d1b4690b3f8b 191 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 192 */
AnnaBridge 165:d1b4690b3f8b 193 enum arm_gpio_error_t arm_gpio_clear_interrupt(struct arm_gpio_dev_t* dev,
AnnaBridge 165:d1b4690b3f8b 194 uint8_t pin_num);
AnnaBridge 165:d1b4690b3f8b 195
AnnaBridge 165:d1b4690b3f8b 196 /**
AnnaBridge 165:d1b4690b3f8b 197 * \brief Sets gpio mask for port access.
AnnaBridge 165:d1b4690b3f8b 198 *
AnnaBridge 165:d1b4690b3f8b 199 * \param[in] dev GPIO port \ref arm_gpio_dev_t
AnnaBridge 165:d1b4690b3f8b 200 * \param[in] port_mask New port mask to set, only the 16 LSb are taken into
AnnaBridge 165:d1b4690b3f8b 201 * account
AnnaBridge 165:d1b4690b3f8b 202 *
AnnaBridge 165:d1b4690b3f8b 203 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 204 */
AnnaBridge 165:d1b4690b3f8b 205 void arm_gpio_set_port_mask(struct arm_gpio_dev_t* dev, uint32_t port_mask);
AnnaBridge 165:d1b4690b3f8b 206
AnnaBridge 165:d1b4690b3f8b 207 /**
AnnaBridge 165:d1b4690b3f8b 208 * \brief Gets gpio mask for port access.
AnnaBridge 165:d1b4690b3f8b 209 *
AnnaBridge 165:d1b4690b3f8b 210 * \param[in] dev GPIO port \ref arm_gpio_dev_t
AnnaBridge 165:d1b4690b3f8b 211 *
AnnaBridge 165:d1b4690b3f8b 212 * \return Returns the current port mask
AnnaBridge 165:d1b4690b3f8b 213 *
AnnaBridge 165:d1b4690b3f8b 214 * \note This function doesn't check if dev is NULL.
AnnaBridge 165:d1b4690b3f8b 215 */
AnnaBridge 165:d1b4690b3f8b 216 uint32_t arm_gpio_get_port_mask(struct arm_gpio_dev_t* dev);
AnnaBridge 165:d1b4690b3f8b 217
AnnaBridge 165:d1b4690b3f8b 218 #ifdef __cplusplus
AnnaBridge 165:d1b4690b3f8b 219 }
AnnaBridge 165:d1b4690b3f8b 220 #endif
AnnaBridge 165:d1b4690b3f8b 221 #endif /* __ARM_GPIO_DRV_H__ */