mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_KL05Z/core_ca_mmu.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Child:
108:34e6b704fe68
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 ;/**************************************************************************//**
bogdanm 92:4fc01daae5a5 2 ; * @file core_ca_mmu.h
bogdanm 92:4fc01daae5a5 3 ; * @brief MMU Startup File for
bogdanm 92:4fc01daae5a5 4 ; * VE_A9_MP Device Series
bogdanm 92:4fc01daae5a5 5 ; * @version V1.01
bogdanm 92:4fc01daae5a5 6 ; * @date 25 March 2013
bogdanm 92:4fc01daae5a5 7 ; *
bogdanm 92:4fc01daae5a5 8 ; * @note
bogdanm 92:4fc01daae5a5 9 ; *
bogdanm 92:4fc01daae5a5 10 ; ******************************************************************************/
bogdanm 92:4fc01daae5a5 11 ;/* Copyright (c) 2012 ARM LIMITED
bogdanm 92:4fc01daae5a5 12 ;
bogdanm 92:4fc01daae5a5 13 ; All rights reserved.
bogdanm 92:4fc01daae5a5 14 ; Redistribution and use in source and binary forms, with or without
bogdanm 92:4fc01daae5a5 15 ; modification, are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 16 ; - Redistributions of source code must retain the above copyright
bogdanm 92:4fc01daae5a5 17 ; notice, this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 18 ; - Redistributions in binary form must reproduce the above copyright
bogdanm 92:4fc01daae5a5 19 ; notice, this list of conditions and the following disclaimer in the
bogdanm 92:4fc01daae5a5 20 ; documentation and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 21 ; - Neither the name of ARM nor the names of its contributors may be used
bogdanm 92:4fc01daae5a5 22 ; to endorse or promote products derived from this software without
bogdanm 92:4fc01daae5a5 23 ; specific prior written permission.
bogdanm 92:4fc01daae5a5 24 ; *
bogdanm 92:4fc01daae5a5 25 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 26 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 27 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 92:4fc01daae5a5 28 ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 92:4fc01daae5a5 29 ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 92:4fc01daae5a5 30 ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 92:4fc01daae5a5 31 ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 92:4fc01daae5a5 32 ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 92:4fc01daae5a5 33 ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 92:4fc01daae5a5 34 ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 92:4fc01daae5a5 35 ; POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 36 ; ---------------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 37
bogdanm 92:4fc01daae5a5 38 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 39 extern "C" {
bogdanm 92:4fc01daae5a5 40 #endif
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42 #ifndef _MMU_FUNC_H
bogdanm 92:4fc01daae5a5 43 #define _MMU_FUNC_H
bogdanm 92:4fc01daae5a5 44
bogdanm 92:4fc01daae5a5 45 #define SECTION_DESCRIPTOR (0x2)
bogdanm 92:4fc01daae5a5 46 #define SECTION_MASK (0xFFFFFFFC)
bogdanm 92:4fc01daae5a5 47
bogdanm 92:4fc01daae5a5 48 #define SECTION_TEXCB_MASK (0xFFFF8FF3)
bogdanm 92:4fc01daae5a5 49 #define SECTION_B_SHIFT (2)
bogdanm 92:4fc01daae5a5 50 #define SECTION_C_SHIFT (3)
bogdanm 92:4fc01daae5a5 51 #define SECTION_TEX0_SHIFT (12)
bogdanm 92:4fc01daae5a5 52 #define SECTION_TEX1_SHIFT (13)
bogdanm 92:4fc01daae5a5 53 #define SECTION_TEX2_SHIFT (14)
bogdanm 92:4fc01daae5a5 54
bogdanm 92:4fc01daae5a5 55 #define SECTION_XN_MASK (0xFFFFFFEF)
bogdanm 92:4fc01daae5a5 56 #define SECTION_XN_SHIFT (4)
bogdanm 92:4fc01daae5a5 57
bogdanm 92:4fc01daae5a5 58 #define SECTION_DOMAIN_MASK (0xFFFFFE1F)
bogdanm 92:4fc01daae5a5 59 #define SECTION_DOMAIN_SHIFT (5)
bogdanm 92:4fc01daae5a5 60
bogdanm 92:4fc01daae5a5 61 #define SECTION_P_MASK (0xFFFFFDFF)
bogdanm 92:4fc01daae5a5 62 #define SECTION_P_SHIFT (9)
bogdanm 92:4fc01daae5a5 63
bogdanm 92:4fc01daae5a5 64 #define SECTION_AP_MASK (0xFFFF73FF)
bogdanm 92:4fc01daae5a5 65 #define SECTION_AP_SHIFT (10)
bogdanm 92:4fc01daae5a5 66 #define SECTION_AP2_SHIFT (15)
bogdanm 92:4fc01daae5a5 67
bogdanm 92:4fc01daae5a5 68 #define SECTION_S_MASK (0xFFFEFFFF)
bogdanm 92:4fc01daae5a5 69 #define SECTION_S_SHIFT (16)
bogdanm 92:4fc01daae5a5 70
bogdanm 92:4fc01daae5a5 71 #define SECTION_NG_MASK (0xFFFDFFFF)
bogdanm 92:4fc01daae5a5 72 #define SECTION_NG_SHIFT (17)
bogdanm 92:4fc01daae5a5 73
bogdanm 92:4fc01daae5a5 74 #define SECTION_NS_MASK (0xFFF7FFFF)
bogdanm 92:4fc01daae5a5 75 #define SECTION_NS_SHIFT (19)
bogdanm 92:4fc01daae5a5 76
bogdanm 92:4fc01daae5a5 77
bogdanm 92:4fc01daae5a5 78 #define PAGE_L1_DESCRIPTOR (0x1)
bogdanm 92:4fc01daae5a5 79 #define PAGE_L1_MASK (0xFFFFFFFC)
bogdanm 92:4fc01daae5a5 80
bogdanm 92:4fc01daae5a5 81 #define PAGE_L2_4K_DESC (0x2)
bogdanm 92:4fc01daae5a5 82 #define PAGE_L2_4K_MASK (0xFFFFFFFD)
bogdanm 92:4fc01daae5a5 83
bogdanm 92:4fc01daae5a5 84 #define PAGE_L2_64K_DESC (0x1)
bogdanm 92:4fc01daae5a5 85 #define PAGE_L2_64K_MASK (0xFFFFFFFC)
bogdanm 92:4fc01daae5a5 86
bogdanm 92:4fc01daae5a5 87 #define PAGE_4K_TEXCB_MASK (0xFFFFFE33)
bogdanm 92:4fc01daae5a5 88 #define PAGE_4K_B_SHIFT (2)
bogdanm 92:4fc01daae5a5 89 #define PAGE_4K_C_SHIFT (3)
bogdanm 92:4fc01daae5a5 90 #define PAGE_4K_TEX0_SHIFT (6)
bogdanm 92:4fc01daae5a5 91 #define PAGE_4K_TEX1_SHIFT (7)
bogdanm 92:4fc01daae5a5 92 #define PAGE_4K_TEX2_SHIFT (8)
bogdanm 92:4fc01daae5a5 93
bogdanm 92:4fc01daae5a5 94 #define PAGE_64K_TEXCB_MASK (0xFFFF8FF3)
bogdanm 92:4fc01daae5a5 95 #define PAGE_64K_B_SHIFT (2)
bogdanm 92:4fc01daae5a5 96 #define PAGE_64K_C_SHIFT (3)
bogdanm 92:4fc01daae5a5 97 #define PAGE_64K_TEX0_SHIFT (12)
bogdanm 92:4fc01daae5a5 98 #define PAGE_64K_TEX1_SHIFT (13)
bogdanm 92:4fc01daae5a5 99 #define PAGE_64K_TEX2_SHIFT (14)
bogdanm 92:4fc01daae5a5 100
bogdanm 92:4fc01daae5a5 101 #define PAGE_TEXCB_MASK (0xFFFF8FF3)
bogdanm 92:4fc01daae5a5 102 #define PAGE_B_SHIFT (2)
bogdanm 92:4fc01daae5a5 103 #define PAGE_C_SHIFT (3)
bogdanm 92:4fc01daae5a5 104 #define PAGE_TEX_SHIFT (12)
bogdanm 92:4fc01daae5a5 105
bogdanm 92:4fc01daae5a5 106 #define PAGE_XN_4K_MASK (0xFFFFFFFE)
bogdanm 92:4fc01daae5a5 107 #define PAGE_XN_4K_SHIFT (0)
bogdanm 92:4fc01daae5a5 108 #define PAGE_XN_64K_MASK (0xFFFF7FFF)
bogdanm 92:4fc01daae5a5 109 #define PAGE_XN_64K_SHIFT (15)
bogdanm 92:4fc01daae5a5 110
bogdanm 92:4fc01daae5a5 111
bogdanm 92:4fc01daae5a5 112 #define PAGE_DOMAIN_MASK (0xFFFFFE1F)
bogdanm 92:4fc01daae5a5 113 #define PAGE_DOMAIN_SHIFT (5)
bogdanm 92:4fc01daae5a5 114
bogdanm 92:4fc01daae5a5 115 #define PAGE_P_MASK (0xFFFFFDFF)
bogdanm 92:4fc01daae5a5 116 #define PAGE_P_SHIFT (9)
bogdanm 92:4fc01daae5a5 117
bogdanm 92:4fc01daae5a5 118 #define PAGE_AP_MASK (0xFFFFFDCF)
bogdanm 92:4fc01daae5a5 119 #define PAGE_AP_SHIFT (4)
bogdanm 92:4fc01daae5a5 120 #define PAGE_AP2_SHIFT (9)
bogdanm 92:4fc01daae5a5 121
bogdanm 92:4fc01daae5a5 122 #define PAGE_S_MASK (0xFFFFFBFF)
bogdanm 92:4fc01daae5a5 123 #define PAGE_S_SHIFT (10)
bogdanm 92:4fc01daae5a5 124
bogdanm 92:4fc01daae5a5 125 #define PAGE_NG_MASK (0xFFFFF7FF)
bogdanm 92:4fc01daae5a5 126 #define PAGE_NG_SHIFT (11)
bogdanm 92:4fc01daae5a5 127
bogdanm 92:4fc01daae5a5 128 #define PAGE_NS_MASK (0xFFFFFFF7)
bogdanm 92:4fc01daae5a5 129 #define PAGE_NS_SHIFT (3)
bogdanm 92:4fc01daae5a5 130
bogdanm 92:4fc01daae5a5 131 #define OFFSET_1M (0x00100000)
bogdanm 92:4fc01daae5a5 132 #define OFFSET_64K (0x00010000)
bogdanm 92:4fc01daae5a5 133 #define OFFSET_4K (0x00001000)
bogdanm 92:4fc01daae5a5 134
bogdanm 92:4fc01daae5a5 135 #define DESCRIPTOR_FAULT (0x00000000)
bogdanm 92:4fc01daae5a5 136
bogdanm 92:4fc01daae5a5 137 /* ########################### MMU Function Access ########################### */
bogdanm 92:4fc01daae5a5 138 /** \ingroup MMU_FunctionInterface
bogdanm 92:4fc01daae5a5 139 \defgroup MMU_Functions MMU Functions Interface
bogdanm 92:4fc01daae5a5 140 @{
bogdanm 92:4fc01daae5a5 141 */
bogdanm 92:4fc01daae5a5 142
bogdanm 92:4fc01daae5a5 143 /* Attributes enumerations */
bogdanm 92:4fc01daae5a5 144
bogdanm 92:4fc01daae5a5 145 /* Region size attributes */
bogdanm 92:4fc01daae5a5 146 typedef enum
bogdanm 92:4fc01daae5a5 147 {
bogdanm 92:4fc01daae5a5 148 SECTION,
bogdanm 92:4fc01daae5a5 149 PAGE_4k,
bogdanm 92:4fc01daae5a5 150 PAGE_64k,
bogdanm 92:4fc01daae5a5 151 } mmu_region_size_Type;
bogdanm 92:4fc01daae5a5 152
bogdanm 92:4fc01daae5a5 153 /* Region type attributes */
bogdanm 92:4fc01daae5a5 154 typedef enum
bogdanm 92:4fc01daae5a5 155 {
bogdanm 92:4fc01daae5a5 156 NORMAL,
bogdanm 92:4fc01daae5a5 157 DEVICE,
bogdanm 92:4fc01daae5a5 158 SHARED_DEVICE,
bogdanm 92:4fc01daae5a5 159 NON_SHARED_DEVICE,
bogdanm 92:4fc01daae5a5 160 STRONGLY_ORDERED
bogdanm 92:4fc01daae5a5 161 } mmu_memory_Type;
bogdanm 92:4fc01daae5a5 162
bogdanm 92:4fc01daae5a5 163 /* Region cacheability attributes */
bogdanm 92:4fc01daae5a5 164 typedef enum
bogdanm 92:4fc01daae5a5 165 {
bogdanm 92:4fc01daae5a5 166 NON_CACHEABLE,
bogdanm 92:4fc01daae5a5 167 WB_WA,
bogdanm 92:4fc01daae5a5 168 WT,
bogdanm 92:4fc01daae5a5 169 WB_NO_WA,
bogdanm 92:4fc01daae5a5 170 } mmu_cacheability_Type;
bogdanm 92:4fc01daae5a5 171
bogdanm 92:4fc01daae5a5 172 /* Region parity check attributes */
bogdanm 92:4fc01daae5a5 173 typedef enum
bogdanm 92:4fc01daae5a5 174 {
bogdanm 92:4fc01daae5a5 175 ECC_DISABLED,
bogdanm 92:4fc01daae5a5 176 ECC_ENABLED,
bogdanm 92:4fc01daae5a5 177 } mmu_ecc_check_Type;
bogdanm 92:4fc01daae5a5 178
bogdanm 92:4fc01daae5a5 179 /* Region execution attributes */
bogdanm 92:4fc01daae5a5 180 typedef enum
bogdanm 92:4fc01daae5a5 181 {
bogdanm 92:4fc01daae5a5 182 EXECUTE,
bogdanm 92:4fc01daae5a5 183 NON_EXECUTE,
bogdanm 92:4fc01daae5a5 184 } mmu_execute_Type;
bogdanm 92:4fc01daae5a5 185
bogdanm 92:4fc01daae5a5 186 /* Region global attributes */
bogdanm 92:4fc01daae5a5 187 typedef enum
bogdanm 92:4fc01daae5a5 188 {
bogdanm 92:4fc01daae5a5 189 GLOBAL,
bogdanm 92:4fc01daae5a5 190 NON_GLOBAL,
bogdanm 92:4fc01daae5a5 191 } mmu_global_Type;
bogdanm 92:4fc01daae5a5 192
bogdanm 92:4fc01daae5a5 193 /* Region shareability attributes */
bogdanm 92:4fc01daae5a5 194 typedef enum
bogdanm 92:4fc01daae5a5 195 {
bogdanm 92:4fc01daae5a5 196 NON_SHARED,
bogdanm 92:4fc01daae5a5 197 SHARED,
bogdanm 92:4fc01daae5a5 198 } mmu_shared_Type;
bogdanm 92:4fc01daae5a5 199
bogdanm 92:4fc01daae5a5 200 /* Region security attributes */
bogdanm 92:4fc01daae5a5 201 typedef enum
bogdanm 92:4fc01daae5a5 202 {
bogdanm 92:4fc01daae5a5 203 SECURE,
bogdanm 92:4fc01daae5a5 204 NON_SECURE,
bogdanm 92:4fc01daae5a5 205 } mmu_secure_Type;
bogdanm 92:4fc01daae5a5 206
bogdanm 92:4fc01daae5a5 207 /* Region access attributes */
bogdanm 92:4fc01daae5a5 208 typedef enum
bogdanm 92:4fc01daae5a5 209 {
bogdanm 92:4fc01daae5a5 210 NO_ACCESS,
bogdanm 92:4fc01daae5a5 211 RW,
bogdanm 92:4fc01daae5a5 212 READ,
bogdanm 92:4fc01daae5a5 213 } mmu_access_Type;
bogdanm 92:4fc01daae5a5 214
bogdanm 92:4fc01daae5a5 215 /* Memory Region definition */
bogdanm 92:4fc01daae5a5 216 typedef struct RegionStruct {
bogdanm 92:4fc01daae5a5 217 mmu_region_size_Type rg_t;
bogdanm 92:4fc01daae5a5 218 mmu_memory_Type mem_t;
bogdanm 92:4fc01daae5a5 219 uint8_t domain;
bogdanm 92:4fc01daae5a5 220 mmu_cacheability_Type inner_norm_t;
bogdanm 92:4fc01daae5a5 221 mmu_cacheability_Type outer_norm_t;
bogdanm 92:4fc01daae5a5 222 mmu_ecc_check_Type e_t;
bogdanm 92:4fc01daae5a5 223 mmu_execute_Type xn_t;
bogdanm 92:4fc01daae5a5 224 mmu_global_Type g_t;
bogdanm 92:4fc01daae5a5 225 mmu_secure_Type sec_t;
bogdanm 92:4fc01daae5a5 226 mmu_access_Type priv_t;
bogdanm 92:4fc01daae5a5 227 mmu_access_Type user_t;
bogdanm 92:4fc01daae5a5 228 mmu_shared_Type sh_t;
bogdanm 92:4fc01daae5a5 229
bogdanm 92:4fc01daae5a5 230 } mmu_region_attributes_Type;
bogdanm 92:4fc01daae5a5 231
bogdanm 92:4fc01daae5a5 232 /** \brief Set section execution-never attribute
bogdanm 92:4fc01daae5a5 233
bogdanm 92:4fc01daae5a5 234 The function sets section execution-never attribute
bogdanm 92:4fc01daae5a5 235
bogdanm 92:4fc01daae5a5 236 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 237 \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE.
bogdanm 92:4fc01daae5a5 238
bogdanm 92:4fc01daae5a5 239 \return 0
bogdanm 92:4fc01daae5a5 240 */
bogdanm 92:4fc01daae5a5 241 __STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn)
bogdanm 92:4fc01daae5a5 242 {
bogdanm 92:4fc01daae5a5 243 *descriptor_l1 &= SECTION_XN_MASK;
bogdanm 92:4fc01daae5a5 244 *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);
bogdanm 92:4fc01daae5a5 245 return 0;
bogdanm 92:4fc01daae5a5 246 }
bogdanm 92:4fc01daae5a5 247
bogdanm 92:4fc01daae5a5 248 /** \brief Set section domain
bogdanm 92:4fc01daae5a5 249
bogdanm 92:4fc01daae5a5 250 The function sets section domain
bogdanm 92:4fc01daae5a5 251
bogdanm 92:4fc01daae5a5 252 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 253 \param [in] domain Section domain
bogdanm 92:4fc01daae5a5 254
bogdanm 92:4fc01daae5a5 255 \return 0
bogdanm 92:4fc01daae5a5 256 */
bogdanm 92:4fc01daae5a5 257 __STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain)
bogdanm 92:4fc01daae5a5 258 {
bogdanm 92:4fc01daae5a5 259 *descriptor_l1 &= SECTION_DOMAIN_MASK;
bogdanm 92:4fc01daae5a5 260 *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);
bogdanm 92:4fc01daae5a5 261 return 0;
bogdanm 92:4fc01daae5a5 262 }
bogdanm 92:4fc01daae5a5 263
bogdanm 92:4fc01daae5a5 264 /** \brief Set section parity check
bogdanm 92:4fc01daae5a5 265
bogdanm 92:4fc01daae5a5 266 The function sets section parity check
bogdanm 92:4fc01daae5a5 267
bogdanm 92:4fc01daae5a5 268 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 269 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
bogdanm 92:4fc01daae5a5 270
bogdanm 92:4fc01daae5a5 271 \return 0
bogdanm 92:4fc01daae5a5 272 */
bogdanm 92:4fc01daae5a5 273 __STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
bogdanm 92:4fc01daae5a5 274 {
bogdanm 92:4fc01daae5a5 275 *descriptor_l1 &= SECTION_P_MASK;
bogdanm 92:4fc01daae5a5 276 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
bogdanm 92:4fc01daae5a5 277 return 0;
bogdanm 92:4fc01daae5a5 278 }
bogdanm 92:4fc01daae5a5 279
bogdanm 92:4fc01daae5a5 280 /** \brief Set section access privileges
bogdanm 92:4fc01daae5a5 281
bogdanm 92:4fc01daae5a5 282 The function sets section access privileges
bogdanm 92:4fc01daae5a5 283
bogdanm 92:4fc01daae5a5 284 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 285 \param [in] user User Level Access: NO_ACCESS, RW, READ
bogdanm 92:4fc01daae5a5 286 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
bogdanm 92:4fc01daae5a5 287 \param [in] afe Access flag enable
bogdanm 92:4fc01daae5a5 288
bogdanm 92:4fc01daae5a5 289 \return 0
bogdanm 92:4fc01daae5a5 290 */
bogdanm 92:4fc01daae5a5 291 __STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
bogdanm 92:4fc01daae5a5 292 {
bogdanm 92:4fc01daae5a5 293 uint32_t ap = 0;
bogdanm 92:4fc01daae5a5 294
bogdanm 92:4fc01daae5a5 295 if (afe == 0) { //full access
bogdanm 92:4fc01daae5a5 296 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
bogdanm 92:4fc01daae5a5 297 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
bogdanm 92:4fc01daae5a5 298 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
bogdanm 92:4fc01daae5a5 299 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
bogdanm 92:4fc01daae5a5 300 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
bogdanm 92:4fc01daae5a5 301 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
bogdanm 92:4fc01daae5a5 302 }
bogdanm 92:4fc01daae5a5 303
bogdanm 92:4fc01daae5a5 304 else { //Simplified access
bogdanm 92:4fc01daae5a5 305 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
bogdanm 92:4fc01daae5a5 306 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
bogdanm 92:4fc01daae5a5 307 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
bogdanm 92:4fc01daae5a5 308 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
bogdanm 92:4fc01daae5a5 309 }
bogdanm 92:4fc01daae5a5 310
bogdanm 92:4fc01daae5a5 311 *descriptor_l1 &= SECTION_AP_MASK;
bogdanm 92:4fc01daae5a5 312 *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;
bogdanm 92:4fc01daae5a5 313 *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;
bogdanm 92:4fc01daae5a5 314
bogdanm 92:4fc01daae5a5 315 return 0;
bogdanm 92:4fc01daae5a5 316 }
bogdanm 92:4fc01daae5a5 317
bogdanm 92:4fc01daae5a5 318 /** \brief Set section shareability
bogdanm 92:4fc01daae5a5 319
bogdanm 92:4fc01daae5a5 320 The function sets section shareability
bogdanm 92:4fc01daae5a5 321
bogdanm 92:4fc01daae5a5 322 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 323 \param [in] s_bit Section shareability: NON_SHARED, SHARED
bogdanm 92:4fc01daae5a5 324
bogdanm 92:4fc01daae5a5 325 \return 0
bogdanm 92:4fc01daae5a5 326 */
bogdanm 92:4fc01daae5a5 327 __STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit)
bogdanm 92:4fc01daae5a5 328 {
bogdanm 92:4fc01daae5a5 329 *descriptor_l1 &= SECTION_S_MASK;
bogdanm 92:4fc01daae5a5 330 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);
bogdanm 92:4fc01daae5a5 331 return 0;
bogdanm 92:4fc01daae5a5 332 }
bogdanm 92:4fc01daae5a5 333
bogdanm 92:4fc01daae5a5 334 /** \brief Set section Global attribute
bogdanm 92:4fc01daae5a5 335
bogdanm 92:4fc01daae5a5 336 The function sets section Global attribute
bogdanm 92:4fc01daae5a5 337
bogdanm 92:4fc01daae5a5 338 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 339 \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL
bogdanm 92:4fc01daae5a5 340
bogdanm 92:4fc01daae5a5 341 \return 0
bogdanm 92:4fc01daae5a5 342 */
bogdanm 92:4fc01daae5a5 343 __STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit)
bogdanm 92:4fc01daae5a5 344 {
bogdanm 92:4fc01daae5a5 345 *descriptor_l1 &= SECTION_NG_MASK;
bogdanm 92:4fc01daae5a5 346 *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);
bogdanm 92:4fc01daae5a5 347 return 0;
bogdanm 92:4fc01daae5a5 348 }
bogdanm 92:4fc01daae5a5 349
bogdanm 92:4fc01daae5a5 350 /** \brief Set section Security attribute
bogdanm 92:4fc01daae5a5 351
bogdanm 92:4fc01daae5a5 352 The function sets section Global attribute
bogdanm 92:4fc01daae5a5 353
bogdanm 92:4fc01daae5a5 354 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 355 \param [in] s_bit Section Security attribute: SECURE, NON_SECURE
bogdanm 92:4fc01daae5a5 356
bogdanm 92:4fc01daae5a5 357 \return 0
bogdanm 92:4fc01daae5a5 358 */
bogdanm 92:4fc01daae5a5 359 __STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
bogdanm 92:4fc01daae5a5 360 {
bogdanm 92:4fc01daae5a5 361 *descriptor_l1 &= SECTION_NS_MASK;
bogdanm 92:4fc01daae5a5 362 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);
bogdanm 92:4fc01daae5a5 363 return 0;
bogdanm 92:4fc01daae5a5 364 }
bogdanm 92:4fc01daae5a5 365
bogdanm 92:4fc01daae5a5 366 /* Page 4k or 64k */
bogdanm 92:4fc01daae5a5 367 /** \brief Set 4k/64k page execution-never attribute
bogdanm 92:4fc01daae5a5 368
bogdanm 92:4fc01daae5a5 369 The function sets 4k/64k page execution-never attribute
bogdanm 92:4fc01daae5a5 370
bogdanm 92:4fc01daae5a5 371 \param [out] descriptor_l2 L2 descriptor.
bogdanm 92:4fc01daae5a5 372 \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE.
bogdanm 92:4fc01daae5a5 373 \param [in] page Page size: PAGE_4k, PAGE_64k,
bogdanm 92:4fc01daae5a5 374
bogdanm 92:4fc01daae5a5 375 \return 0
bogdanm 92:4fc01daae5a5 376 */
bogdanm 92:4fc01daae5a5 377 __STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)
bogdanm 92:4fc01daae5a5 378 {
bogdanm 92:4fc01daae5a5 379 if (page == PAGE_4k)
bogdanm 92:4fc01daae5a5 380 {
bogdanm 92:4fc01daae5a5 381 *descriptor_l2 &= PAGE_XN_4K_MASK;
bogdanm 92:4fc01daae5a5 382 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);
bogdanm 92:4fc01daae5a5 383 }
bogdanm 92:4fc01daae5a5 384 else
bogdanm 92:4fc01daae5a5 385 {
bogdanm 92:4fc01daae5a5 386 *descriptor_l2 &= PAGE_XN_64K_MASK;
bogdanm 92:4fc01daae5a5 387 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);
bogdanm 92:4fc01daae5a5 388 }
bogdanm 92:4fc01daae5a5 389 return 0;
bogdanm 92:4fc01daae5a5 390 }
bogdanm 92:4fc01daae5a5 391
bogdanm 92:4fc01daae5a5 392 /** \brief Set 4k/64k page domain
bogdanm 92:4fc01daae5a5 393
bogdanm 92:4fc01daae5a5 394 The function sets 4k/64k page domain
bogdanm 92:4fc01daae5a5 395
bogdanm 92:4fc01daae5a5 396 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 397 \param [in] domain Page domain
bogdanm 92:4fc01daae5a5 398
bogdanm 92:4fc01daae5a5 399 \return 0
bogdanm 92:4fc01daae5a5 400 */
bogdanm 92:4fc01daae5a5 401 __STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain)
bogdanm 92:4fc01daae5a5 402 {
bogdanm 92:4fc01daae5a5 403 *descriptor_l1 &= PAGE_DOMAIN_MASK;
bogdanm 92:4fc01daae5a5 404 *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);
bogdanm 92:4fc01daae5a5 405 return 0;
bogdanm 92:4fc01daae5a5 406 }
bogdanm 92:4fc01daae5a5 407
bogdanm 92:4fc01daae5a5 408 /** \brief Set 4k/64k page parity check
bogdanm 92:4fc01daae5a5 409
bogdanm 92:4fc01daae5a5 410 The function sets 4k/64k page parity check
bogdanm 92:4fc01daae5a5 411
bogdanm 92:4fc01daae5a5 412 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 413 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
bogdanm 92:4fc01daae5a5 414
bogdanm 92:4fc01daae5a5 415 \return 0
bogdanm 92:4fc01daae5a5 416 */
bogdanm 92:4fc01daae5a5 417 __STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
bogdanm 92:4fc01daae5a5 418 {
bogdanm 92:4fc01daae5a5 419 *descriptor_l1 &= SECTION_P_MASK;
bogdanm 92:4fc01daae5a5 420 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
bogdanm 92:4fc01daae5a5 421 return 0;
bogdanm 92:4fc01daae5a5 422 }
bogdanm 92:4fc01daae5a5 423
bogdanm 92:4fc01daae5a5 424 /** \brief Set 4k/64k page access privileges
bogdanm 92:4fc01daae5a5 425
bogdanm 92:4fc01daae5a5 426 The function sets 4k/64k page access privileges
bogdanm 92:4fc01daae5a5 427
bogdanm 92:4fc01daae5a5 428 \param [out] descriptor_l2 L2 descriptor.
bogdanm 92:4fc01daae5a5 429 \param [in] user User Level Access: NO_ACCESS, RW, READ
bogdanm 92:4fc01daae5a5 430 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
bogdanm 92:4fc01daae5a5 431 \param [in] afe Access flag enable
bogdanm 92:4fc01daae5a5 432
bogdanm 92:4fc01daae5a5 433 \return 0
bogdanm 92:4fc01daae5a5 434 */
bogdanm 92:4fc01daae5a5 435 __STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
bogdanm 92:4fc01daae5a5 436 {
bogdanm 92:4fc01daae5a5 437 uint32_t ap = 0;
bogdanm 92:4fc01daae5a5 438
bogdanm 92:4fc01daae5a5 439 if (afe == 0) { //full access
bogdanm 92:4fc01daae5a5 440 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
bogdanm 92:4fc01daae5a5 441 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
bogdanm 92:4fc01daae5a5 442 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
bogdanm 92:4fc01daae5a5 443 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
bogdanm 92:4fc01daae5a5 444 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
bogdanm 92:4fc01daae5a5 445 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
bogdanm 92:4fc01daae5a5 446 }
bogdanm 92:4fc01daae5a5 447
bogdanm 92:4fc01daae5a5 448 else { //Simplified access
bogdanm 92:4fc01daae5a5 449 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
bogdanm 92:4fc01daae5a5 450 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
bogdanm 92:4fc01daae5a5 451 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
bogdanm 92:4fc01daae5a5 452 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
bogdanm 92:4fc01daae5a5 453 }
bogdanm 92:4fc01daae5a5 454
bogdanm 92:4fc01daae5a5 455 *descriptor_l2 &= PAGE_AP_MASK;
bogdanm 92:4fc01daae5a5 456 *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;
bogdanm 92:4fc01daae5a5 457 *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;
bogdanm 92:4fc01daae5a5 458
bogdanm 92:4fc01daae5a5 459 return 0;
bogdanm 92:4fc01daae5a5 460 }
bogdanm 92:4fc01daae5a5 461
bogdanm 92:4fc01daae5a5 462 /** \brief Set 4k/64k page shareability
bogdanm 92:4fc01daae5a5 463
bogdanm 92:4fc01daae5a5 464 The function sets 4k/64k page shareability
bogdanm 92:4fc01daae5a5 465
bogdanm 92:4fc01daae5a5 466 \param [out] descriptor_l2 L2 descriptor.
bogdanm 92:4fc01daae5a5 467 \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED
bogdanm 92:4fc01daae5a5 468
bogdanm 92:4fc01daae5a5 469 \return 0
bogdanm 92:4fc01daae5a5 470 */
bogdanm 92:4fc01daae5a5 471 __STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit)
bogdanm 92:4fc01daae5a5 472 {
bogdanm 92:4fc01daae5a5 473 *descriptor_l2 &= PAGE_S_MASK;
bogdanm 92:4fc01daae5a5 474 *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);
bogdanm 92:4fc01daae5a5 475 return 0;
bogdanm 92:4fc01daae5a5 476 }
bogdanm 92:4fc01daae5a5 477
bogdanm 92:4fc01daae5a5 478 /** \brief Set 4k/64k page Global attribute
bogdanm 92:4fc01daae5a5 479
bogdanm 92:4fc01daae5a5 480 The function sets 4k/64k page Global attribute
bogdanm 92:4fc01daae5a5 481
bogdanm 92:4fc01daae5a5 482 \param [out] descriptor_l2 L2 descriptor.
bogdanm 92:4fc01daae5a5 483 \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL
bogdanm 92:4fc01daae5a5 484
bogdanm 92:4fc01daae5a5 485 \return 0
bogdanm 92:4fc01daae5a5 486 */
bogdanm 92:4fc01daae5a5 487 __STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit)
bogdanm 92:4fc01daae5a5 488 {
bogdanm 92:4fc01daae5a5 489 *descriptor_l2 &= PAGE_NG_MASK;
bogdanm 92:4fc01daae5a5 490 *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);
bogdanm 92:4fc01daae5a5 491 return 0;
bogdanm 92:4fc01daae5a5 492 }
bogdanm 92:4fc01daae5a5 493
bogdanm 92:4fc01daae5a5 494 /** \brief Set 4k/64k page Security attribute
bogdanm 92:4fc01daae5a5 495
bogdanm 92:4fc01daae5a5 496 The function sets 4k/64k page Global attribute
bogdanm 92:4fc01daae5a5 497
bogdanm 92:4fc01daae5a5 498 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 499 \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE
bogdanm 92:4fc01daae5a5 500
bogdanm 92:4fc01daae5a5 501 \return 0
bogdanm 92:4fc01daae5a5 502 */
bogdanm 92:4fc01daae5a5 503 __STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
bogdanm 92:4fc01daae5a5 504 {
bogdanm 92:4fc01daae5a5 505 *descriptor_l1 &= PAGE_NS_MASK;
bogdanm 92:4fc01daae5a5 506 *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);
bogdanm 92:4fc01daae5a5 507 return 0;
bogdanm 92:4fc01daae5a5 508 }
bogdanm 92:4fc01daae5a5 509
bogdanm 92:4fc01daae5a5 510
bogdanm 92:4fc01daae5a5 511 /** \brief Set Section memory attributes
bogdanm 92:4fc01daae5a5 512
bogdanm 92:4fc01daae5a5 513 The function sets section memory attributes
bogdanm 92:4fc01daae5a5 514
bogdanm 92:4fc01daae5a5 515 \param [out] descriptor_l1 L1 descriptor.
bogdanm 92:4fc01daae5a5 516 \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
bogdanm 92:4fc01daae5a5 517 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
bogdanm 92:4fc01daae5a5 518 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
bogdanm 92:4fc01daae5a5 519
bogdanm 92:4fc01daae5a5 520 \return 0
bogdanm 92:4fc01daae5a5 521 */
bogdanm 92:4fc01daae5a5 522 __STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)
bogdanm 92:4fc01daae5a5 523 {
bogdanm 92:4fc01daae5a5 524 *descriptor_l1 &= SECTION_TEXCB_MASK;
bogdanm 92:4fc01daae5a5 525
bogdanm 92:4fc01daae5a5 526 if (STRONGLY_ORDERED == mem)
bogdanm 92:4fc01daae5a5 527 {
bogdanm 92:4fc01daae5a5 528 return 0;
bogdanm 92:4fc01daae5a5 529 }
bogdanm 92:4fc01daae5a5 530 else if (SHARED_DEVICE == mem)
bogdanm 92:4fc01daae5a5 531 {
bogdanm 92:4fc01daae5a5 532 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
bogdanm 92:4fc01daae5a5 533 }
bogdanm 92:4fc01daae5a5 534 else if (NON_SHARED_DEVICE == mem)
bogdanm 92:4fc01daae5a5 535 {
bogdanm 92:4fc01daae5a5 536 *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);
bogdanm 92:4fc01daae5a5 537 }
bogdanm 92:4fc01daae5a5 538 else if (NORMAL == mem)
bogdanm 92:4fc01daae5a5 539 {
bogdanm 92:4fc01daae5a5 540 *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;
bogdanm 92:4fc01daae5a5 541 switch(inner)
bogdanm 92:4fc01daae5a5 542 {
bogdanm 92:4fc01daae5a5 543 case NON_CACHEABLE:
bogdanm 92:4fc01daae5a5 544 break;
bogdanm 92:4fc01daae5a5 545 case WB_WA:
bogdanm 92:4fc01daae5a5 546 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
bogdanm 92:4fc01daae5a5 547 break;
bogdanm 92:4fc01daae5a5 548 case WT:
bogdanm 92:4fc01daae5a5 549 *descriptor_l1 |= 1 << SECTION_C_SHIFT;
bogdanm 92:4fc01daae5a5 550 break;
bogdanm 92:4fc01daae5a5 551 case WB_NO_WA:
bogdanm 92:4fc01daae5a5 552 *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);
bogdanm 92:4fc01daae5a5 553 break;
bogdanm 92:4fc01daae5a5 554 }
bogdanm 92:4fc01daae5a5 555 switch(outer)
bogdanm 92:4fc01daae5a5 556 {
bogdanm 92:4fc01daae5a5 557 case NON_CACHEABLE:
bogdanm 92:4fc01daae5a5 558 break;
bogdanm 92:4fc01daae5a5 559 case WB_WA:
bogdanm 92:4fc01daae5a5 560 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);
bogdanm 92:4fc01daae5a5 561 break;
bogdanm 92:4fc01daae5a5 562 case WT:
bogdanm 92:4fc01daae5a5 563 *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;
bogdanm 92:4fc01daae5a5 564 break;
bogdanm 92:4fc01daae5a5 565 case WB_NO_WA:
bogdanm 92:4fc01daae5a5 566 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);
bogdanm 92:4fc01daae5a5 567 break;
bogdanm 92:4fc01daae5a5 568 }
bogdanm 92:4fc01daae5a5 569 }
bogdanm 92:4fc01daae5a5 570
bogdanm 92:4fc01daae5a5 571 return 0;
bogdanm 92:4fc01daae5a5 572 }
bogdanm 92:4fc01daae5a5 573
bogdanm 92:4fc01daae5a5 574 /** \brief Set 4k/64k page memory attributes
bogdanm 92:4fc01daae5a5 575
bogdanm 92:4fc01daae5a5 576 The function sets 4k/64k page memory attributes
bogdanm 92:4fc01daae5a5 577
bogdanm 92:4fc01daae5a5 578 \param [out] descriptor_l2 L2 descriptor.
bogdanm 92:4fc01daae5a5 579 \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
bogdanm 92:4fc01daae5a5 580 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
bogdanm 92:4fc01daae5a5 581 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
bogdanm 92:4fc01daae5a5 582
bogdanm 92:4fc01daae5a5 583 \return 0
bogdanm 92:4fc01daae5a5 584 */
bogdanm 92:4fc01daae5a5 585 __STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)
bogdanm 92:4fc01daae5a5 586 {
bogdanm 92:4fc01daae5a5 587 *descriptor_l2 &= PAGE_4K_TEXCB_MASK;
bogdanm 92:4fc01daae5a5 588
bogdanm 92:4fc01daae5a5 589 if (page == PAGE_64k)
bogdanm 92:4fc01daae5a5 590 {
bogdanm 92:4fc01daae5a5 591 //same as section
bogdanm 92:4fc01daae5a5 592 __memory_section(descriptor_l2, mem, outer, inner);
bogdanm 92:4fc01daae5a5 593 }
bogdanm 92:4fc01daae5a5 594 else
bogdanm 92:4fc01daae5a5 595 {
bogdanm 92:4fc01daae5a5 596 if (STRONGLY_ORDERED == mem)
bogdanm 92:4fc01daae5a5 597 {
bogdanm 92:4fc01daae5a5 598 return 0;
bogdanm 92:4fc01daae5a5 599 }
bogdanm 92:4fc01daae5a5 600 else if (SHARED_DEVICE == mem)
bogdanm 92:4fc01daae5a5 601 {
bogdanm 92:4fc01daae5a5 602 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
bogdanm 92:4fc01daae5a5 603 }
bogdanm 92:4fc01daae5a5 604 else if (NON_SHARED_DEVICE == mem)
bogdanm 92:4fc01daae5a5 605 {
bogdanm 92:4fc01daae5a5 606 *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);
bogdanm 92:4fc01daae5a5 607 }
bogdanm 92:4fc01daae5a5 608 else if (NORMAL == mem)
bogdanm 92:4fc01daae5a5 609 {
bogdanm 92:4fc01daae5a5 610 *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;
bogdanm 92:4fc01daae5a5 611 switch(inner)
bogdanm 92:4fc01daae5a5 612 {
bogdanm 92:4fc01daae5a5 613 case NON_CACHEABLE:
bogdanm 92:4fc01daae5a5 614 break;
bogdanm 92:4fc01daae5a5 615 case WB_WA:
bogdanm 92:4fc01daae5a5 616 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
bogdanm 92:4fc01daae5a5 617 break;
bogdanm 92:4fc01daae5a5 618 case WT:
bogdanm 92:4fc01daae5a5 619 *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;
bogdanm 92:4fc01daae5a5 620 break;
bogdanm 92:4fc01daae5a5 621 case WB_NO_WA:
bogdanm 92:4fc01daae5a5 622 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);
bogdanm 92:4fc01daae5a5 623 break;
bogdanm 92:4fc01daae5a5 624 }
bogdanm 92:4fc01daae5a5 625 switch(outer)
bogdanm 92:4fc01daae5a5 626 {
bogdanm 92:4fc01daae5a5 627 case NON_CACHEABLE:
bogdanm 92:4fc01daae5a5 628 break;
bogdanm 92:4fc01daae5a5 629 case WB_WA:
bogdanm 92:4fc01daae5a5 630 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);
bogdanm 92:4fc01daae5a5 631 break;
bogdanm 92:4fc01daae5a5 632 case WT:
bogdanm 92:4fc01daae5a5 633 *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;
bogdanm 92:4fc01daae5a5 634 break;
bogdanm 92:4fc01daae5a5 635 case WB_NO_WA:
bogdanm 92:4fc01daae5a5 636 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT);
bogdanm 92:4fc01daae5a5 637 break;
bogdanm 92:4fc01daae5a5 638 }
bogdanm 92:4fc01daae5a5 639 }
bogdanm 92:4fc01daae5a5 640 }
bogdanm 92:4fc01daae5a5 641
bogdanm 92:4fc01daae5a5 642 return 0;
bogdanm 92:4fc01daae5a5 643 }
bogdanm 92:4fc01daae5a5 644
bogdanm 92:4fc01daae5a5 645 /** \brief Create a L1 section descriptor
bogdanm 92:4fc01daae5a5 646
bogdanm 92:4fc01daae5a5 647 The function creates a section descriptor.
bogdanm 92:4fc01daae5a5 648
bogdanm 92:4fc01daae5a5 649 Assumptions:
bogdanm 92:4fc01daae5a5 650 - 16MB super sections not suported
bogdanm 92:4fc01daae5a5 651 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
bogdanm 92:4fc01daae5a5 652 - Functions always return 0
bogdanm 92:4fc01daae5a5 653
bogdanm 92:4fc01daae5a5 654 \param [out] descriptor L1 descriptor
bogdanm 92:4fc01daae5a5 655 \param [out] descriptor2 L2 descriptor
bogdanm 92:4fc01daae5a5 656 \param [in] reg Section attributes
bogdanm 92:4fc01daae5a5 657
bogdanm 92:4fc01daae5a5 658 \return 0
bogdanm 92:4fc01daae5a5 659 */
bogdanm 92:4fc01daae5a5 660 __STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)
bogdanm 92:4fc01daae5a5 661 {
bogdanm 92:4fc01daae5a5 662 *descriptor = 0;
bogdanm 92:4fc01daae5a5 663
bogdanm 92:4fc01daae5a5 664 __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);
bogdanm 92:4fc01daae5a5 665 __xn_section(descriptor,reg.xn_t);
bogdanm 92:4fc01daae5a5 666 __domain_section(descriptor, reg.domain);
bogdanm 92:4fc01daae5a5 667 __p_section(descriptor, reg.e_t);
bogdanm 92:4fc01daae5a5 668 __ap_section(descriptor, reg.priv_t, reg.user_t, 1);
bogdanm 92:4fc01daae5a5 669 __shared_section(descriptor,reg.sh_t);
bogdanm 92:4fc01daae5a5 670 __global_section(descriptor,reg.g_t);
bogdanm 92:4fc01daae5a5 671 __secure_section(descriptor,reg.sec_t);
bogdanm 92:4fc01daae5a5 672 *descriptor &= SECTION_MASK;
bogdanm 92:4fc01daae5a5 673 *descriptor |= SECTION_DESCRIPTOR;
bogdanm 92:4fc01daae5a5 674
bogdanm 92:4fc01daae5a5 675 return 0;
bogdanm 92:4fc01daae5a5 676
bogdanm 92:4fc01daae5a5 677 }
bogdanm 92:4fc01daae5a5 678
bogdanm 92:4fc01daae5a5 679
bogdanm 92:4fc01daae5a5 680 /** \brief Create a L1 and L2 4k/64k page descriptor
bogdanm 92:4fc01daae5a5 681
bogdanm 92:4fc01daae5a5 682 The function creates a 4k/64k page descriptor.
bogdanm 92:4fc01daae5a5 683 Assumptions:
bogdanm 92:4fc01daae5a5 684 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
bogdanm 92:4fc01daae5a5 685 - Functions always return 0
bogdanm 92:4fc01daae5a5 686
bogdanm 92:4fc01daae5a5 687 \param [out] descriptor L1 descriptor
bogdanm 92:4fc01daae5a5 688 \param [out] descriptor2 L2 descriptor
bogdanm 92:4fc01daae5a5 689 \param [in] reg 4k/64k page attributes
bogdanm 92:4fc01daae5a5 690
bogdanm 92:4fc01daae5a5 691 \return 0
bogdanm 92:4fc01daae5a5 692 */
bogdanm 92:4fc01daae5a5 693 __STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)
bogdanm 92:4fc01daae5a5 694 {
bogdanm 92:4fc01daae5a5 695 *descriptor = 0;
bogdanm 92:4fc01daae5a5 696 *descriptor2 = 0;
bogdanm 92:4fc01daae5a5 697
bogdanm 92:4fc01daae5a5 698 switch (reg.rg_t)
bogdanm 92:4fc01daae5a5 699 {
bogdanm 92:4fc01daae5a5 700 case PAGE_4k:
bogdanm 92:4fc01daae5a5 701 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);
bogdanm 92:4fc01daae5a5 702 __xn_page(descriptor2, reg.xn_t, PAGE_4k);
bogdanm 92:4fc01daae5a5 703 __domain_page(descriptor, reg.domain);
bogdanm 92:4fc01daae5a5 704 __p_page(descriptor, reg.e_t);
bogdanm 92:4fc01daae5a5 705 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
bogdanm 92:4fc01daae5a5 706 __shared_page(descriptor2,reg.sh_t);
bogdanm 92:4fc01daae5a5 707 __global_page(descriptor2,reg.g_t);
bogdanm 92:4fc01daae5a5 708 __secure_page(descriptor,reg.sec_t);
bogdanm 92:4fc01daae5a5 709 *descriptor &= PAGE_L1_MASK;
bogdanm 92:4fc01daae5a5 710 *descriptor |= PAGE_L1_DESCRIPTOR;
bogdanm 92:4fc01daae5a5 711 *descriptor2 &= PAGE_L2_4K_MASK;
bogdanm 92:4fc01daae5a5 712 *descriptor2 |= PAGE_L2_4K_DESC;
bogdanm 92:4fc01daae5a5 713 break;
bogdanm 92:4fc01daae5a5 714
bogdanm 92:4fc01daae5a5 715 case PAGE_64k:
bogdanm 92:4fc01daae5a5 716 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);
bogdanm 92:4fc01daae5a5 717 __xn_page(descriptor2, reg.xn_t, PAGE_64k);
bogdanm 92:4fc01daae5a5 718 __domain_page(descriptor, reg.domain);
bogdanm 92:4fc01daae5a5 719 __p_page(descriptor, reg.e_t);
bogdanm 92:4fc01daae5a5 720 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
bogdanm 92:4fc01daae5a5 721 __shared_page(descriptor2,reg.sh_t);
bogdanm 92:4fc01daae5a5 722 __global_page(descriptor2,reg.g_t);
bogdanm 92:4fc01daae5a5 723 __secure_page(descriptor,reg.sec_t);
bogdanm 92:4fc01daae5a5 724 *descriptor &= PAGE_L1_MASK;
bogdanm 92:4fc01daae5a5 725 *descriptor |= PAGE_L1_DESCRIPTOR;
bogdanm 92:4fc01daae5a5 726 *descriptor2 &= PAGE_L2_64K_MASK;
bogdanm 92:4fc01daae5a5 727 *descriptor2 |= PAGE_L2_64K_DESC;
bogdanm 92:4fc01daae5a5 728 break;
bogdanm 92:4fc01daae5a5 729
bogdanm 92:4fc01daae5a5 730 case SECTION:
bogdanm 92:4fc01daae5a5 731 //error
bogdanm 92:4fc01daae5a5 732 break;
bogdanm 92:4fc01daae5a5 733
bogdanm 92:4fc01daae5a5 734 }
bogdanm 92:4fc01daae5a5 735
bogdanm 92:4fc01daae5a5 736 return 0;
bogdanm 92:4fc01daae5a5 737
bogdanm 92:4fc01daae5a5 738 }
bogdanm 92:4fc01daae5a5 739
bogdanm 92:4fc01daae5a5 740 /** \brief Create a 1MB Section
bogdanm 92:4fc01daae5a5 741
bogdanm 92:4fc01daae5a5 742 \param [in] ttb Translation table base address
bogdanm 92:4fc01daae5a5 743 \param [in] base_address Section base address
bogdanm 92:4fc01daae5a5 744 \param [in] count Number of sections to create
bogdanm 92:4fc01daae5a5 745 \param [in] descriptor_l1 L1 descriptor (region attributes)
bogdanm 92:4fc01daae5a5 746
bogdanm 92:4fc01daae5a5 747 */
bogdanm 92:4fc01daae5a5 748 __STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)
bogdanm 92:4fc01daae5a5 749 {
bogdanm 92:4fc01daae5a5 750 uint32_t offset;
bogdanm 92:4fc01daae5a5 751 uint32_t entry;
bogdanm 92:4fc01daae5a5 752 uint32_t i;
bogdanm 92:4fc01daae5a5 753
bogdanm 92:4fc01daae5a5 754 offset = base_address >> 20;
bogdanm 92:4fc01daae5a5 755 entry = (base_address & 0xFFF00000) | descriptor_l1;
bogdanm 92:4fc01daae5a5 756
bogdanm 92:4fc01daae5a5 757 //4 bytes aligned
bogdanm 92:4fc01daae5a5 758 ttb = ttb + offset;
bogdanm 92:4fc01daae5a5 759
bogdanm 92:4fc01daae5a5 760 for (i = 0; i < count; i++ )
bogdanm 92:4fc01daae5a5 761 {
bogdanm 92:4fc01daae5a5 762 //4 bytes aligned
bogdanm 92:4fc01daae5a5 763 *ttb++ = entry;
bogdanm 92:4fc01daae5a5 764 entry += OFFSET_1M;
bogdanm 92:4fc01daae5a5 765 }
bogdanm 92:4fc01daae5a5 766 }
bogdanm 92:4fc01daae5a5 767
bogdanm 92:4fc01daae5a5 768 /** \brief Create a 4k page entry
bogdanm 92:4fc01daae5a5 769
bogdanm 92:4fc01daae5a5 770 \param [in] ttb L1 table base address
bogdanm 92:4fc01daae5a5 771 \param [in] base_address 4k base address
bogdanm 92:4fc01daae5a5 772 \param [in] count Number of 4k pages to create
bogdanm 92:4fc01daae5a5 773 \param [in] descriptor_l1 L1 descriptor (region attributes)
bogdanm 92:4fc01daae5a5 774 \param [in] ttb_l2 L2 table base address
bogdanm 92:4fc01daae5a5 775 \param [in] descriptor_l2 L2 descriptor (region attributes)
bogdanm 92:4fc01daae5a5 776
bogdanm 92:4fc01daae5a5 777 */
bogdanm 92:4fc01daae5a5 778 __STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
bogdanm 92:4fc01daae5a5 779 {
bogdanm 92:4fc01daae5a5 780
bogdanm 92:4fc01daae5a5 781 uint32_t offset, offset2;
bogdanm 92:4fc01daae5a5 782 uint32_t entry, entry2;
bogdanm 92:4fc01daae5a5 783 uint32_t i;
bogdanm 92:4fc01daae5a5 784
bogdanm 92:4fc01daae5a5 785
bogdanm 92:4fc01daae5a5 786 offset = base_address >> 20;
bogdanm 92:4fc01daae5a5 787 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
bogdanm 92:4fc01daae5a5 788
bogdanm 92:4fc01daae5a5 789 //4 bytes aligned
bogdanm 92:4fc01daae5a5 790 ttb += offset;
bogdanm 92:4fc01daae5a5 791 //create l1_entry
bogdanm 92:4fc01daae5a5 792 *ttb = entry;
bogdanm 92:4fc01daae5a5 793
bogdanm 92:4fc01daae5a5 794 offset2 = (base_address & 0xff000) >> 12;
bogdanm 92:4fc01daae5a5 795 ttb_l2 += offset2;
bogdanm 92:4fc01daae5a5 796 entry2 = (base_address & 0xFFFFF000) | descriptor_l2;
bogdanm 92:4fc01daae5a5 797 for (i = 0; i < count; i++ )
bogdanm 92:4fc01daae5a5 798 {
bogdanm 92:4fc01daae5a5 799 //4 bytes aligned
bogdanm 92:4fc01daae5a5 800 *ttb_l2++ = entry2;
bogdanm 92:4fc01daae5a5 801 entry2 += OFFSET_4K;
bogdanm 92:4fc01daae5a5 802 }
bogdanm 92:4fc01daae5a5 803 }
bogdanm 92:4fc01daae5a5 804
bogdanm 92:4fc01daae5a5 805 /** \brief Create a 64k page entry
bogdanm 92:4fc01daae5a5 806
bogdanm 92:4fc01daae5a5 807 \param [in] ttb L1 table base address
bogdanm 92:4fc01daae5a5 808 \param [in] base_address 64k base address
bogdanm 92:4fc01daae5a5 809 \param [in] count Number of 64k pages to create
bogdanm 92:4fc01daae5a5 810 \param [in] descriptor_l1 L1 descriptor (region attributes)
bogdanm 92:4fc01daae5a5 811 \param [in] ttb_l2 L2 table base address
bogdanm 92:4fc01daae5a5 812 \param [in] descriptor_l2 L2 descriptor (region attributes)
bogdanm 92:4fc01daae5a5 813
bogdanm 92:4fc01daae5a5 814 */
bogdanm 92:4fc01daae5a5 815 __STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
bogdanm 92:4fc01daae5a5 816 {
bogdanm 92:4fc01daae5a5 817 uint32_t offset, offset2;
bogdanm 92:4fc01daae5a5 818 uint32_t entry, entry2;
bogdanm 92:4fc01daae5a5 819 uint32_t i,j;
bogdanm 92:4fc01daae5a5 820
bogdanm 92:4fc01daae5a5 821
bogdanm 92:4fc01daae5a5 822 offset = base_address >> 20;
bogdanm 92:4fc01daae5a5 823 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
bogdanm 92:4fc01daae5a5 824
bogdanm 92:4fc01daae5a5 825 //4 bytes aligned
bogdanm 92:4fc01daae5a5 826 ttb += offset;
bogdanm 92:4fc01daae5a5 827 //create l1_entry
bogdanm 92:4fc01daae5a5 828 *ttb = entry;
bogdanm 92:4fc01daae5a5 829
bogdanm 92:4fc01daae5a5 830 offset2 = (base_address & 0xff000) >> 12;
bogdanm 92:4fc01daae5a5 831 ttb_l2 += offset2;
bogdanm 92:4fc01daae5a5 832 entry2 = (base_address & 0xFFFF0000) | descriptor_l2;
bogdanm 92:4fc01daae5a5 833 for (i = 0; i < count; i++ )
bogdanm 92:4fc01daae5a5 834 {
bogdanm 92:4fc01daae5a5 835 //create 16 entries
bogdanm 92:4fc01daae5a5 836 for (j = 0; j < 16; j++)
bogdanm 92:4fc01daae5a5 837 //4 bytes aligned
bogdanm 92:4fc01daae5a5 838 *ttb_l2++ = entry2;
bogdanm 92:4fc01daae5a5 839 entry2 += OFFSET_64K;
bogdanm 92:4fc01daae5a5 840 }
bogdanm 92:4fc01daae5a5 841 }
bogdanm 92:4fc01daae5a5 842
bogdanm 92:4fc01daae5a5 843 /*@} end of MMU_Functions */
bogdanm 92:4fc01daae5a5 844 #endif
bogdanm 92:4fc01daae5a5 845
bogdanm 92:4fc01daae5a5 846 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 847 }
bogdanm 92:4fc01daae5a5 848 #endif