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TARGET_UBLOX_EVK_NINA_B1/arm_common_tables.h@138:093f2bd7b9eb, 2017-03-14 (annotated)
- Committer:
- <>
- Date:
- Tue Mar 14 16:20:51 2017 +0000
- Revision:
- 138:093f2bd7b9eb
- Parent:
- 133:99b5ccf27215
Release 138 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716
3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741
3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780
3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831
3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836
3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840
3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844
3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850
3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860
3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880
3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795
3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828
3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842
3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843
3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879
3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902
3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| <> | 133:99b5ccf27215 | 1 | /* ---------------------------------------------------------------------- |
| <> | 133:99b5ccf27215 | 2 | * Copyright (C) 2010-2014 ARM Limited. All rights reserved. |
| <> | 133:99b5ccf27215 | 3 | * |
| <> | 133:99b5ccf27215 | 4 | * $Date: 19. March 2015 |
| <> | 133:99b5ccf27215 | 5 | * $Revision: V.1.4.5 |
| <> | 133:99b5ccf27215 | 6 | * |
| <> | 133:99b5ccf27215 | 7 | * Project: CMSIS DSP Library |
| <> | 133:99b5ccf27215 | 8 | * Title: arm_common_tables.h |
| <> | 133:99b5ccf27215 | 9 | * |
| <> | 133:99b5ccf27215 | 10 | * Description: This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions |
| <> | 133:99b5ccf27215 | 11 | * |
| <> | 133:99b5ccf27215 | 12 | * Target Processor: Cortex-M4/Cortex-M3 |
| <> | 133:99b5ccf27215 | 13 | * |
| <> | 133:99b5ccf27215 | 14 | * Redistribution and use in source and binary forms, with or without |
| <> | 133:99b5ccf27215 | 15 | * modification, are permitted provided that the following conditions |
| <> | 133:99b5ccf27215 | 16 | * are met: |
| <> | 133:99b5ccf27215 | 17 | * - Redistributions of source code must retain the above copyright |
| <> | 133:99b5ccf27215 | 18 | * notice, this list of conditions and the following disclaimer. |
| <> | 133:99b5ccf27215 | 19 | * - Redistributions in binary form must reproduce the above copyright |
| <> | 133:99b5ccf27215 | 20 | * notice, this list of conditions and the following disclaimer in |
| <> | 133:99b5ccf27215 | 21 | * the documentation and/or other materials provided with the |
| <> | 133:99b5ccf27215 | 22 | * distribution. |
| <> | 133:99b5ccf27215 | 23 | * - Neither the name of ARM LIMITED nor the names of its contributors |
| <> | 133:99b5ccf27215 | 24 | * may be used to endorse or promote products derived from this |
| <> | 133:99b5ccf27215 | 25 | * software without specific prior written permission. |
| <> | 133:99b5ccf27215 | 26 | * |
| <> | 133:99b5ccf27215 | 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| <> | 133:99b5ccf27215 | 28 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| <> | 133:99b5ccf27215 | 29 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| <> | 133:99b5ccf27215 | 30 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| <> | 133:99b5ccf27215 | 31 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| <> | 133:99b5ccf27215 | 32 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| <> | 133:99b5ccf27215 | 33 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| <> | 133:99b5ccf27215 | 34 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| <> | 133:99b5ccf27215 | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| <> | 133:99b5ccf27215 | 36 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
| <> | 133:99b5ccf27215 | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| <> | 133:99b5ccf27215 | 38 | * POSSIBILITY OF SUCH DAMAGE. |
| <> | 133:99b5ccf27215 | 39 | * -------------------------------------------------------------------- */ |
| <> | 133:99b5ccf27215 | 40 | |
| <> | 133:99b5ccf27215 | 41 | #ifndef _ARM_COMMON_TABLES_H |
| <> | 133:99b5ccf27215 | 42 | #define _ARM_COMMON_TABLES_H |
| <> | 133:99b5ccf27215 | 43 | |
| <> | 133:99b5ccf27215 | 44 | #include "arm_math.h" |
| <> | 133:99b5ccf27215 | 45 | |
| <> | 133:99b5ccf27215 | 46 | extern const uint16_t armBitRevTable[1024]; |
| <> | 133:99b5ccf27215 | 47 | extern const q15_t armRecipTableQ15[64]; |
| <> | 133:99b5ccf27215 | 48 | extern const q31_t armRecipTableQ31[64]; |
| <> | 133:99b5ccf27215 | 49 | //extern const q31_t realCoefAQ31[1024]; |
| <> | 133:99b5ccf27215 | 50 | //extern const q31_t realCoefBQ31[1024]; |
| <> | 133:99b5ccf27215 | 51 | extern const float32_t twiddleCoef_16[32]; |
| <> | 133:99b5ccf27215 | 52 | extern const float32_t twiddleCoef_32[64]; |
| <> | 133:99b5ccf27215 | 53 | extern const float32_t twiddleCoef_64[128]; |
| <> | 133:99b5ccf27215 | 54 | extern const float32_t twiddleCoef_128[256]; |
| <> | 133:99b5ccf27215 | 55 | extern const float32_t twiddleCoef_256[512]; |
| <> | 133:99b5ccf27215 | 56 | extern const float32_t twiddleCoef_512[1024]; |
| <> | 133:99b5ccf27215 | 57 | extern const float32_t twiddleCoef_1024[2048]; |
| <> | 133:99b5ccf27215 | 58 | extern const float32_t twiddleCoef_2048[4096]; |
| <> | 133:99b5ccf27215 | 59 | extern const float32_t twiddleCoef_4096[8192]; |
| <> | 133:99b5ccf27215 | 60 | #define twiddleCoef twiddleCoef_4096 |
| <> | 133:99b5ccf27215 | 61 | extern const q31_t twiddleCoef_16_q31[24]; |
| <> | 133:99b5ccf27215 | 62 | extern const q31_t twiddleCoef_32_q31[48]; |
| <> | 133:99b5ccf27215 | 63 | extern const q31_t twiddleCoef_64_q31[96]; |
| <> | 133:99b5ccf27215 | 64 | extern const q31_t twiddleCoef_128_q31[192]; |
| <> | 133:99b5ccf27215 | 65 | extern const q31_t twiddleCoef_256_q31[384]; |
| <> | 133:99b5ccf27215 | 66 | extern const q31_t twiddleCoef_512_q31[768]; |
| <> | 133:99b5ccf27215 | 67 | extern const q31_t twiddleCoef_1024_q31[1536]; |
| <> | 133:99b5ccf27215 | 68 | extern const q31_t twiddleCoef_2048_q31[3072]; |
| <> | 133:99b5ccf27215 | 69 | extern const q31_t twiddleCoef_4096_q31[6144]; |
| <> | 133:99b5ccf27215 | 70 | extern const q15_t twiddleCoef_16_q15[24]; |
| <> | 133:99b5ccf27215 | 71 | extern const q15_t twiddleCoef_32_q15[48]; |
| <> | 133:99b5ccf27215 | 72 | extern const q15_t twiddleCoef_64_q15[96]; |
| <> | 133:99b5ccf27215 | 73 | extern const q15_t twiddleCoef_128_q15[192]; |
| <> | 133:99b5ccf27215 | 74 | extern const q15_t twiddleCoef_256_q15[384]; |
| <> | 133:99b5ccf27215 | 75 | extern const q15_t twiddleCoef_512_q15[768]; |
| <> | 133:99b5ccf27215 | 76 | extern const q15_t twiddleCoef_1024_q15[1536]; |
| <> | 133:99b5ccf27215 | 77 | extern const q15_t twiddleCoef_2048_q15[3072]; |
| <> | 133:99b5ccf27215 | 78 | extern const q15_t twiddleCoef_4096_q15[6144]; |
| <> | 133:99b5ccf27215 | 79 | extern const float32_t twiddleCoef_rfft_32[32]; |
| <> | 133:99b5ccf27215 | 80 | extern const float32_t twiddleCoef_rfft_64[64]; |
| <> | 133:99b5ccf27215 | 81 | extern const float32_t twiddleCoef_rfft_128[128]; |
| <> | 133:99b5ccf27215 | 82 | extern const float32_t twiddleCoef_rfft_256[256]; |
| <> | 133:99b5ccf27215 | 83 | extern const float32_t twiddleCoef_rfft_512[512]; |
| <> | 133:99b5ccf27215 | 84 | extern const float32_t twiddleCoef_rfft_1024[1024]; |
| <> | 133:99b5ccf27215 | 85 | extern const float32_t twiddleCoef_rfft_2048[2048]; |
| <> | 133:99b5ccf27215 | 86 | extern const float32_t twiddleCoef_rfft_4096[4096]; |
| <> | 133:99b5ccf27215 | 87 | |
| <> | 133:99b5ccf27215 | 88 | |
| <> | 133:99b5ccf27215 | 89 | /* floating-point bit reversal tables */ |
| <> | 133:99b5ccf27215 | 90 | #define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20 ) |
| <> | 133:99b5ccf27215 | 91 | #define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48 ) |
| <> | 133:99b5ccf27215 | 92 | #define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56 ) |
| <> | 133:99b5ccf27215 | 93 | #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 ) |
| <> | 133:99b5ccf27215 | 94 | #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 ) |
| <> | 133:99b5ccf27215 | 95 | #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 ) |
| <> | 133:99b5ccf27215 | 96 | #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800) |
| <> | 133:99b5ccf27215 | 97 | #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808) |
| <> | 133:99b5ccf27215 | 98 | #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032) |
| <> | 133:99b5ccf27215 | 99 | |
| <> | 133:99b5ccf27215 | 100 | extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 101 | extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 102 | extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 103 | extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 104 | extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 105 | extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 106 | extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 107 | extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 108 | extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 109 | |
| <> | 133:99b5ccf27215 | 110 | /* fixed-point bit reversal tables */ |
| <> | 133:99b5ccf27215 | 111 | #define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12 ) |
| <> | 133:99b5ccf27215 | 112 | #define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24 ) |
| <> | 133:99b5ccf27215 | 113 | #define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56 ) |
| <> | 133:99b5ccf27215 | 114 | #define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 ) |
| <> | 133:99b5ccf27215 | 115 | #define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 ) |
| <> | 133:99b5ccf27215 | 116 | #define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 ) |
| <> | 133:99b5ccf27215 | 117 | #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 ) |
| <> | 133:99b5ccf27215 | 118 | #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984) |
| <> | 133:99b5ccf27215 | 119 | #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032) |
| <> | 133:99b5ccf27215 | 120 | |
| <> | 133:99b5ccf27215 | 121 | extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 122 | extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 123 | extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 124 | extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 125 | extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 126 | extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 127 | extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 128 | extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 129 | extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH]; |
| <> | 133:99b5ccf27215 | 130 | |
| <> | 133:99b5ccf27215 | 131 | /* Tables for Fast Math Sine and Cosine */ |
| <> | 133:99b5ccf27215 | 132 | extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1]; |
| <> | 133:99b5ccf27215 | 133 | extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1]; |
| <> | 133:99b5ccf27215 | 134 | extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1]; |
| <> | 133:99b5ccf27215 | 135 | |
| <> | 133:99b5ccf27215 | 136 | #endif /* ARM_COMMON_TABLES_H */ |
