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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_L053R8/core_cmFunc.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
110:165afa46840b 
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 84:0b3ab51c8877 1 /**************************************************************************//**
bogdanm 84:0b3ab51c8877 2 * @file core_cmFunc.h
bogdanm 84:0b3ab51c8877 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 110:165afa46840b 4 * @version V4.10
Kojto 110:165afa46840b 5 * @date 18. March 2015
bogdanm 84:0b3ab51c8877 6 *
bogdanm 84:0b3ab51c8877 7 * @note
bogdanm 84:0b3ab51c8877 8 *
bogdanm 84:0b3ab51c8877 9 ******************************************************************************/
Kojto 110:165afa46840b 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
bogdanm 84:0b3ab51c8877 11
bogdanm 84:0b3ab51c8877 12 All rights reserved.
bogdanm 84:0b3ab51c8877 13 Redistribution and use in source and binary forms, with or without
bogdanm 84:0b3ab51c8877 14 modification, are permitted provided that the following conditions are met:
bogdanm 84:0b3ab51c8877 15 - Redistributions of source code must retain the above copyright
bogdanm 84:0b3ab51c8877 16 notice, this list of conditions and the following disclaimer.
bogdanm 84:0b3ab51c8877 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 84:0b3ab51c8877 18 notice, this list of conditions and the following disclaimer in the
bogdanm 84:0b3ab51c8877 19 documentation and/or other materials provided with the distribution.
bogdanm 84:0b3ab51c8877 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 84:0b3ab51c8877 21 to endorse or promote products derived from this software without
bogdanm 84:0b3ab51c8877 22 specific prior written permission.
bogdanm 84:0b3ab51c8877 23 *
bogdanm 84:0b3ab51c8877 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 84:0b3ab51c8877 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 84:0b3ab51c8877 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 84:0b3ab51c8877 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 84:0b3ab51c8877 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 84:0b3ab51c8877 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 84:0b3ab51c8877 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 84:0b3ab51c8877 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 84:0b3ab51c8877 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 84:0b3ab51c8877 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 84:0b3ab51c8877 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 84:0b3ab51c8877 35 ---------------------------------------------------------------------------*/
bogdanm 84:0b3ab51c8877 36
bogdanm 84:0b3ab51c8877 37
bogdanm 84:0b3ab51c8877 38 #ifndef __CORE_CMFUNC_H
bogdanm 84:0b3ab51c8877 39 #define __CORE_CMFUNC_H
bogdanm 84:0b3ab51c8877 40
bogdanm 84:0b3ab51c8877 41
bogdanm 84:0b3ab51c8877 42 /* ########################### Core Function Access ########################### */
bogdanm 84:0b3ab51c8877 43 /** \ingroup CMSIS_Core_FunctionInterface
bogdanm 84:0b3ab51c8877 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
bogdanm 84:0b3ab51c8877 45 @{
bogdanm 84:0b3ab51c8877 46 */
bogdanm 84:0b3ab51c8877 47
bogdanm 84:0b3ab51c8877 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 84:0b3ab51c8877 49 /* ARM armcc specific functions */
bogdanm 84:0b3ab51c8877 50
bogdanm 84:0b3ab51c8877 51 #if (__ARMCC_VERSION < 400677)
bogdanm 84:0b3ab51c8877 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 84:0b3ab51c8877 53 #endif
bogdanm 84:0b3ab51c8877 54
bogdanm 84:0b3ab51c8877 55 /* intrinsic void __enable_irq(); */
bogdanm 84:0b3ab51c8877 56 /* intrinsic void __disable_irq(); */
bogdanm 84:0b3ab51c8877 57
bogdanm 84:0b3ab51c8877 58 /** \brief Get Control Register
bogdanm 84:0b3ab51c8877 59
bogdanm 84:0b3ab51c8877 60 This function returns the content of the Control Register.
bogdanm 84:0b3ab51c8877 61
bogdanm 84:0b3ab51c8877 62 \return Control Register value
bogdanm 84:0b3ab51c8877 63 */
bogdanm 84:0b3ab51c8877 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 84:0b3ab51c8877 65 {
bogdanm 84:0b3ab51c8877 66 register uint32_t __regControl __ASM("control");
bogdanm 84:0b3ab51c8877 67 return(__regControl);
bogdanm 84:0b3ab51c8877 68 }
bogdanm 84:0b3ab51c8877 69
bogdanm 84:0b3ab51c8877 70
bogdanm 84:0b3ab51c8877 71 /** \brief Set Control Register
bogdanm 84:0b3ab51c8877 72
bogdanm 84:0b3ab51c8877 73 This function writes the given value to the Control Register.
bogdanm 84:0b3ab51c8877 74
bogdanm 84:0b3ab51c8877 75 \param [in] control Control Register value to set
bogdanm 84:0b3ab51c8877 76 */
bogdanm 84:0b3ab51c8877 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 84:0b3ab51c8877 78 {
bogdanm 84:0b3ab51c8877 79 register uint32_t __regControl __ASM("control");
bogdanm 84:0b3ab51c8877 80 __regControl = control;
bogdanm 84:0b3ab51c8877 81 }
bogdanm 84:0b3ab51c8877 82
bogdanm 84:0b3ab51c8877 83
bogdanm 84:0b3ab51c8877 84 /** \brief Get IPSR Register
bogdanm 84:0b3ab51c8877 85
bogdanm 84:0b3ab51c8877 86 This function returns the content of the IPSR Register.
bogdanm 84:0b3ab51c8877 87
bogdanm 84:0b3ab51c8877 88 \return IPSR Register value
bogdanm 84:0b3ab51c8877 89 */
bogdanm 84:0b3ab51c8877 90 __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 84:0b3ab51c8877 91 {
bogdanm 84:0b3ab51c8877 92 register uint32_t __regIPSR __ASM("ipsr");
bogdanm 84:0b3ab51c8877 93 return(__regIPSR);
bogdanm 84:0b3ab51c8877 94 }
bogdanm 84:0b3ab51c8877 95
bogdanm 84:0b3ab51c8877 96
bogdanm 84:0b3ab51c8877 97 /** \brief Get APSR Register
bogdanm 84:0b3ab51c8877 98
bogdanm 84:0b3ab51c8877 99 This function returns the content of the APSR Register.
bogdanm 84:0b3ab51c8877 100
bogdanm 84:0b3ab51c8877 101 \return APSR Register value
bogdanm 84:0b3ab51c8877 102 */
bogdanm 84:0b3ab51c8877 103 __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 84:0b3ab51c8877 104 {
bogdanm 84:0b3ab51c8877 105 register uint32_t __regAPSR __ASM("apsr");
bogdanm 84:0b3ab51c8877 106 return(__regAPSR);
bogdanm 84:0b3ab51c8877 107 }
bogdanm 84:0b3ab51c8877 108
bogdanm 84:0b3ab51c8877 109
bogdanm 84:0b3ab51c8877 110 /** \brief Get xPSR Register
bogdanm 84:0b3ab51c8877 111
bogdanm 84:0b3ab51c8877 112 This function returns the content of the xPSR Register.
bogdanm 84:0b3ab51c8877 113
bogdanm 84:0b3ab51c8877 114 \return xPSR Register value
bogdanm 84:0b3ab51c8877 115 */
bogdanm 84:0b3ab51c8877 116 __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 84:0b3ab51c8877 117 {
bogdanm 84:0b3ab51c8877 118 register uint32_t __regXPSR __ASM("xpsr");
bogdanm 84:0b3ab51c8877 119 return(__regXPSR);
bogdanm 84:0b3ab51c8877 120 }
bogdanm 84:0b3ab51c8877 121
bogdanm 84:0b3ab51c8877 122
bogdanm 84:0b3ab51c8877 123 /** \brief Get Process Stack Pointer
bogdanm 84:0b3ab51c8877 124
bogdanm 84:0b3ab51c8877 125 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 84:0b3ab51c8877 126
bogdanm 84:0b3ab51c8877 127 \return PSP Register value
bogdanm 84:0b3ab51c8877 128 */
bogdanm 84:0b3ab51c8877 129 __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 84:0b3ab51c8877 130 {
bogdanm 84:0b3ab51c8877 131 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 84:0b3ab51c8877 132 return(__regProcessStackPointer);
bogdanm 84:0b3ab51c8877 133 }
bogdanm 84:0b3ab51c8877 134
bogdanm 84:0b3ab51c8877 135
bogdanm 84:0b3ab51c8877 136 /** \brief Set Process Stack Pointer
bogdanm 84:0b3ab51c8877 137
bogdanm 84:0b3ab51c8877 138 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 84:0b3ab51c8877 139
bogdanm 84:0b3ab51c8877 140 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 84:0b3ab51c8877 141 */
bogdanm 84:0b3ab51c8877 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 84:0b3ab51c8877 143 {
bogdanm 84:0b3ab51c8877 144 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 84:0b3ab51c8877 145 __regProcessStackPointer = topOfProcStack;
bogdanm 84:0b3ab51c8877 146 }
bogdanm 84:0b3ab51c8877 147
bogdanm 84:0b3ab51c8877 148
bogdanm 84:0b3ab51c8877 149 /** \brief Get Main Stack Pointer
bogdanm 84:0b3ab51c8877 150
bogdanm 84:0b3ab51c8877 151 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 84:0b3ab51c8877 152
bogdanm 84:0b3ab51c8877 153 \return MSP Register value
bogdanm 84:0b3ab51c8877 154 */
bogdanm 84:0b3ab51c8877 155 __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 84:0b3ab51c8877 156 {
bogdanm 84:0b3ab51c8877 157 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 84:0b3ab51c8877 158 return(__regMainStackPointer);
bogdanm 84:0b3ab51c8877 159 }
bogdanm 84:0b3ab51c8877 160
bogdanm 84:0b3ab51c8877 161
bogdanm 84:0b3ab51c8877 162 /** \brief Set Main Stack Pointer
bogdanm 84:0b3ab51c8877 163
bogdanm 84:0b3ab51c8877 164 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 84:0b3ab51c8877 165
bogdanm 84:0b3ab51c8877 166 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 84:0b3ab51c8877 167 */
bogdanm 84:0b3ab51c8877 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 84:0b3ab51c8877 169 {
bogdanm 84:0b3ab51c8877 170 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 84:0b3ab51c8877 171 __regMainStackPointer = topOfMainStack;
bogdanm 84:0b3ab51c8877 172 }
bogdanm 84:0b3ab51c8877 173
bogdanm 84:0b3ab51c8877 174
bogdanm 84:0b3ab51c8877 175 /** \brief Get Priority Mask
bogdanm 84:0b3ab51c8877 176
bogdanm 84:0b3ab51c8877 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 84:0b3ab51c8877 178
bogdanm 84:0b3ab51c8877 179 \return Priority Mask value
bogdanm 84:0b3ab51c8877 180 */
bogdanm 84:0b3ab51c8877 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 84:0b3ab51c8877 182 {
bogdanm 84:0b3ab51c8877 183 register uint32_t __regPriMask __ASM("primask");
bogdanm 84:0b3ab51c8877 184 return(__regPriMask);
bogdanm 84:0b3ab51c8877 185 }
bogdanm 84:0b3ab51c8877 186
bogdanm 84:0b3ab51c8877 187
bogdanm 84:0b3ab51c8877 188 /** \brief Set Priority Mask
bogdanm 84:0b3ab51c8877 189
bogdanm 84:0b3ab51c8877 190 This function assigns the given value to the Priority Mask Register.
bogdanm 84:0b3ab51c8877 191
bogdanm 84:0b3ab51c8877 192 \param [in] priMask Priority Mask
bogdanm 84:0b3ab51c8877 193 */
bogdanm 84:0b3ab51c8877 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 84:0b3ab51c8877 195 {
bogdanm 84:0b3ab51c8877 196 register uint32_t __regPriMask __ASM("primask");
bogdanm 84:0b3ab51c8877 197 __regPriMask = (priMask);
bogdanm 84:0b3ab51c8877 198 }
bogdanm 84:0b3ab51c8877 199
bogdanm 84:0b3ab51c8877 200
Kojto 110:165afa46840b 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
bogdanm 84:0b3ab51c8877 202
bogdanm 84:0b3ab51c8877 203 /** \brief Enable FIQ
bogdanm 84:0b3ab51c8877 204
bogdanm 84:0b3ab51c8877 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 84:0b3ab51c8877 206 Can only be executed in Privileged modes.
bogdanm 84:0b3ab51c8877 207 */
bogdanm 84:0b3ab51c8877 208 #define __enable_fault_irq __enable_fiq
bogdanm 84:0b3ab51c8877 209
bogdanm 84:0b3ab51c8877 210
bogdanm 84:0b3ab51c8877 211 /** \brief Disable FIQ
bogdanm 84:0b3ab51c8877 212
bogdanm 84:0b3ab51c8877 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 84:0b3ab51c8877 214 Can only be executed in Privileged modes.
bogdanm 84:0b3ab51c8877 215 */
bogdanm 84:0b3ab51c8877 216 #define __disable_fault_irq __disable_fiq
bogdanm 84:0b3ab51c8877 217
bogdanm 84:0b3ab51c8877 218
bogdanm 84:0b3ab51c8877 219 /** \brief Get Base Priority
bogdanm 84:0b3ab51c8877 220
bogdanm 84:0b3ab51c8877 221 This function returns the current value of the Base Priority register.
bogdanm 84:0b3ab51c8877 222
bogdanm 84:0b3ab51c8877 223 \return Base Priority register value
bogdanm 84:0b3ab51c8877 224 */
bogdanm 84:0b3ab51c8877 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 84:0b3ab51c8877 226 {
bogdanm 84:0b3ab51c8877 227 register uint32_t __regBasePri __ASM("basepri");
bogdanm 84:0b3ab51c8877 228 return(__regBasePri);
bogdanm 84:0b3ab51c8877 229 }
bogdanm 84:0b3ab51c8877 230
bogdanm 84:0b3ab51c8877 231
bogdanm 84:0b3ab51c8877 232 /** \brief Set Base Priority
bogdanm 84:0b3ab51c8877 233
bogdanm 84:0b3ab51c8877 234 This function assigns the given value to the Base Priority register.
bogdanm 84:0b3ab51c8877 235
bogdanm 84:0b3ab51c8877 236 \param [in] basePri Base Priority value to set
bogdanm 84:0b3ab51c8877 237 */
bogdanm 84:0b3ab51c8877 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
bogdanm 84:0b3ab51c8877 239 {
bogdanm 84:0b3ab51c8877 240 register uint32_t __regBasePri __ASM("basepri");
bogdanm 84:0b3ab51c8877 241 __regBasePri = (basePri & 0xff);
bogdanm 84:0b3ab51c8877 242 }
bogdanm 84:0b3ab51c8877 243
bogdanm 84:0b3ab51c8877 244
Kojto 110:165afa46840b 245 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 246
Kojto 110:165afa46840b 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 248 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 249
Kojto 110:165afa46840b 250 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 251 */
Kojto 110:165afa46840b 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 110:165afa46840b 253 {
Kojto 110:165afa46840b 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Kojto 110:165afa46840b 255 __regBasePriMax = (basePri & 0xff);
Kojto 110:165afa46840b 256 }
Kojto 110:165afa46840b 257
Kojto 110:165afa46840b 258
bogdanm 84:0b3ab51c8877 259 /** \brief Get Fault Mask
bogdanm 84:0b3ab51c8877 260
bogdanm 84:0b3ab51c8877 261 This function returns the current value of the Fault Mask register.
bogdanm 84:0b3ab51c8877 262
bogdanm 84:0b3ab51c8877 263 \return Fault Mask register value
bogdanm 84:0b3ab51c8877 264 */
bogdanm 84:0b3ab51c8877 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 84:0b3ab51c8877 266 {
bogdanm 84:0b3ab51c8877 267 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 84:0b3ab51c8877 268 return(__regFaultMask);
bogdanm 84:0b3ab51c8877 269 }
bogdanm 84:0b3ab51c8877 270
bogdanm 84:0b3ab51c8877 271
bogdanm 84:0b3ab51c8877 272 /** \brief Set Fault Mask
bogdanm 84:0b3ab51c8877 273
bogdanm 84:0b3ab51c8877 274 This function assigns the given value to the Fault Mask register.
bogdanm 84:0b3ab51c8877 275
bogdanm 84:0b3ab51c8877 276 \param [in] faultMask Fault Mask value to set
bogdanm 84:0b3ab51c8877 277 */
bogdanm 84:0b3ab51c8877 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 84:0b3ab51c8877 279 {
bogdanm 84:0b3ab51c8877 280 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 84:0b3ab51c8877 281 __regFaultMask = (faultMask & (uint32_t)1);
bogdanm 84:0b3ab51c8877 282 }
bogdanm 84:0b3ab51c8877 283
Kojto 110:165afa46840b 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
bogdanm 84:0b3ab51c8877 285
bogdanm 84:0b3ab51c8877 286
Kojto 110:165afa46840b 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 84:0b3ab51c8877 288
bogdanm 84:0b3ab51c8877 289 /** \brief Get FPSCR
bogdanm 84:0b3ab51c8877 290
bogdanm 84:0b3ab51c8877 291 This function returns the current value of the Floating Point Status/Control register.
bogdanm 84:0b3ab51c8877 292
bogdanm 84:0b3ab51c8877 293 \return Floating Point Status/Control register value
bogdanm 84:0b3ab51c8877 294 */
bogdanm 84:0b3ab51c8877 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 84:0b3ab51c8877 296 {
bogdanm 84:0b3ab51c8877 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 84:0b3ab51c8877 298 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 84:0b3ab51c8877 299 return(__regfpscr);
bogdanm 84:0b3ab51c8877 300 #else
bogdanm 84:0b3ab51c8877 301 return(0);
bogdanm 84:0b3ab51c8877 302 #endif
bogdanm 84:0b3ab51c8877 303 }
bogdanm 84:0b3ab51c8877 304
bogdanm 84:0b3ab51c8877 305
bogdanm 84:0b3ab51c8877 306 /** \brief Set FPSCR
bogdanm 84:0b3ab51c8877 307
bogdanm 84:0b3ab51c8877 308 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 84:0b3ab51c8877 309
bogdanm 84:0b3ab51c8877 310 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 84:0b3ab51c8877 311 */
bogdanm 84:0b3ab51c8877 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 84:0b3ab51c8877 313 {
bogdanm 84:0b3ab51c8877 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 84:0b3ab51c8877 315 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 84:0b3ab51c8877 316 __regfpscr = (fpscr);
bogdanm 84:0b3ab51c8877 317 #endif
bogdanm 84:0b3ab51c8877 318 }
bogdanm 84:0b3ab51c8877 319
Kojto 110:165afa46840b 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
bogdanm 84:0b3ab51c8877 321
bogdanm 84:0b3ab51c8877 322
bogdanm 84:0b3ab51c8877 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 84:0b3ab51c8877 324 /* GNU gcc specific functions */
bogdanm 84:0b3ab51c8877 325
bogdanm 84:0b3ab51c8877 326 /** \brief Enable IRQ Interrupts
bogdanm 84:0b3ab51c8877 327
bogdanm 84:0b3ab51c8877 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
bogdanm 84:0b3ab51c8877 329 Can only be executed in Privileged modes.
bogdanm 84:0b3ab51c8877 330 */
bogdanm 84:0b3ab51c8877 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
bogdanm 84:0b3ab51c8877 332 {
bogdanm 84:0b3ab51c8877 333 __ASM volatile ("cpsie i" : : : "memory");
bogdanm 84:0b3ab51c8877 334 }
bogdanm 84:0b3ab51c8877 335
bogdanm 84:0b3ab51c8877 336
bogdanm 84:0b3ab51c8877 337 /** \brief Disable IRQ Interrupts
bogdanm 84:0b3ab51c8877 338
bogdanm 84:0b3ab51c8877 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
bogdanm 84:0b3ab51c8877 340 Can only be executed in Privileged modes.
bogdanm 84:0b3ab51c8877 341 */
bogdanm 84:0b3ab51c8877 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
bogdanm 84:0b3ab51c8877 343 {
bogdanm 84:0b3ab51c8877 344 __ASM volatile ("cpsid i" : : : "memory");
bogdanm 84:0b3ab51c8877 345 }
bogdanm 84:0b3ab51c8877 346
bogdanm 84:0b3ab51c8877 347
bogdanm 84:0b3ab51c8877 348 /** \brief Get Control Register
bogdanm 84:0b3ab51c8877 349
bogdanm 84:0b3ab51c8877 350 This function returns the content of the Control Register.
bogdanm 84:0b3ab51c8877 351
bogdanm 84:0b3ab51c8877 352 \return Control Register value
bogdanm 84:0b3ab51c8877 353 */
bogdanm 84:0b3ab51c8877 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 84:0b3ab51c8877 355 {
bogdanm 84:0b3ab51c8877 356 uint32_t result;
bogdanm 84:0b3ab51c8877 357
bogdanm 84:0b3ab51c8877 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
bogdanm 84:0b3ab51c8877 359 return(result);
bogdanm 84:0b3ab51c8877 360 }
bogdanm 84:0b3ab51c8877 361
bogdanm 84:0b3ab51c8877 362
bogdanm 84:0b3ab51c8877 363 /** \brief Set Control Register
bogdanm 84:0b3ab51c8877 364
bogdanm 84:0b3ab51c8877 365 This function writes the given value to the Control Register.
bogdanm 84:0b3ab51c8877 366
bogdanm 84:0b3ab51c8877 367 \param [in] control Control Register value to set
bogdanm 84:0b3ab51c8877 368 */
bogdanm 84:0b3ab51c8877 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 84:0b3ab51c8877 370 {
bogdanm 84:0b3ab51c8877 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
bogdanm 84:0b3ab51c8877 372 }
bogdanm 84:0b3ab51c8877 373
bogdanm 84:0b3ab51c8877 374
bogdanm 84:0b3ab51c8877 375 /** \brief Get IPSR Register
bogdanm 84:0b3ab51c8877 376
bogdanm 84:0b3ab51c8877 377 This function returns the content of the IPSR Register.
bogdanm 84:0b3ab51c8877 378
bogdanm 84:0b3ab51c8877 379 \return IPSR Register value
bogdanm 84:0b3ab51c8877 380 */
bogdanm 84:0b3ab51c8877 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 84:0b3ab51c8877 382 {
bogdanm 84:0b3ab51c8877 383 uint32_t result;
bogdanm 84:0b3ab51c8877 384
bogdanm 84:0b3ab51c8877 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
bogdanm 84:0b3ab51c8877 386 return(result);
bogdanm 84:0b3ab51c8877 387 }
bogdanm 84:0b3ab51c8877 388
bogdanm 84:0b3ab51c8877 389
bogdanm 84:0b3ab51c8877 390 /** \brief Get APSR Register
bogdanm 84:0b3ab51c8877 391
bogdanm 84:0b3ab51c8877 392 This function returns the content of the APSR Register.
bogdanm 84:0b3ab51c8877 393
bogdanm 84:0b3ab51c8877 394 \return APSR Register value
bogdanm 84:0b3ab51c8877 395 */
bogdanm 84:0b3ab51c8877 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 84:0b3ab51c8877 397 {
bogdanm 84:0b3ab51c8877 398 uint32_t result;
bogdanm 84:0b3ab51c8877 399
bogdanm 84:0b3ab51c8877 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
bogdanm 84:0b3ab51c8877 401 return(result);
bogdanm 84:0b3ab51c8877 402 }
bogdanm 84:0b3ab51c8877 403
bogdanm 84:0b3ab51c8877 404
bogdanm 84:0b3ab51c8877 405 /** \brief Get xPSR Register
bogdanm 84:0b3ab51c8877 406
bogdanm 84:0b3ab51c8877 407 This function returns the content of the xPSR Register.
bogdanm 84:0b3ab51c8877 408
bogdanm 84:0b3ab51c8877 409 \return xPSR Register value
bogdanm 84:0b3ab51c8877 410 */
bogdanm 84:0b3ab51c8877 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 84:0b3ab51c8877 412 {
bogdanm 84:0b3ab51c8877 413 uint32_t result;
bogdanm 84:0b3ab51c8877 414
bogdanm 84:0b3ab51c8877 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
bogdanm 84:0b3ab51c8877 416 return(result);
bogdanm 84:0b3ab51c8877 417 }
bogdanm 84:0b3ab51c8877 418
bogdanm 84:0b3ab51c8877 419
bogdanm 84:0b3ab51c8877 420 /** \brief Get Process Stack Pointer
bogdanm 84:0b3ab51c8877 421
bogdanm 84:0b3ab51c8877 422 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 84:0b3ab51c8877 423
bogdanm 84:0b3ab51c8877 424 \return PSP Register value
bogdanm 84:0b3ab51c8877 425 */
bogdanm 84:0b3ab51c8877 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 84:0b3ab51c8877 427 {
bogdanm 84:0b3ab51c8877 428 register uint32_t result;
bogdanm 84:0b3ab51c8877 429
bogdanm 84:0b3ab51c8877 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
bogdanm 84:0b3ab51c8877 431 return(result);
bogdanm 84:0b3ab51c8877 432 }
bogdanm 84:0b3ab51c8877 433
bogdanm 84:0b3ab51c8877 434
bogdanm 84:0b3ab51c8877 435 /** \brief Set Process Stack Pointer
bogdanm 84:0b3ab51c8877 436
bogdanm 84:0b3ab51c8877 437 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 84:0b3ab51c8877 438
bogdanm 84:0b3ab51c8877 439 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 84:0b3ab51c8877 440 */
bogdanm 84:0b3ab51c8877 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 84:0b3ab51c8877 442 {
bogdanm 84:0b3ab51c8877 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
bogdanm 84:0b3ab51c8877 444 }
bogdanm 84:0b3ab51c8877 445
bogdanm 84:0b3ab51c8877 446
bogdanm 84:0b3ab51c8877 447 /** \brief Get Main Stack Pointer
bogdanm 84:0b3ab51c8877 448
bogdanm 84:0b3ab51c8877 449 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 84:0b3ab51c8877 450
bogdanm 84:0b3ab51c8877 451 \return MSP Register value
bogdanm 84:0b3ab51c8877 452 */
bogdanm 84:0b3ab51c8877 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 84:0b3ab51c8877 454 {
bogdanm 84:0b3ab51c8877 455 register uint32_t result;
bogdanm 84:0b3ab51c8877 456
bogdanm 84:0b3ab51c8877 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
bogdanm 84:0b3ab51c8877 458 return(result);
bogdanm 84:0b3ab51c8877 459 }
bogdanm 84:0b3ab51c8877 460
bogdanm 84:0b3ab51c8877 461
bogdanm 84:0b3ab51c8877 462 /** \brief Set Main Stack Pointer
bogdanm 84:0b3ab51c8877 463
bogdanm 84:0b3ab51c8877 464 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 84:0b3ab51c8877 465
bogdanm 84:0b3ab51c8877 466 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 84:0b3ab51c8877 467 */
bogdanm 84:0b3ab51c8877 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 84:0b3ab51c8877 469 {
bogdanm 84:0b3ab51c8877 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
bogdanm 84:0b3ab51c8877 471 }
bogdanm 84:0b3ab51c8877 472
bogdanm 84:0b3ab51c8877 473
bogdanm 84:0b3ab51c8877 474 /** \brief Get Priority Mask
bogdanm 84:0b3ab51c8877 475
bogdanm 84:0b3ab51c8877 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 84:0b3ab51c8877 477
bogdanm 84:0b3ab51c8877 478 \return Priority Mask value
bogdanm 84:0b3ab51c8877 479 */
bogdanm 84:0b3ab51c8877 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 84:0b3ab51c8877 481 {
bogdanm 84:0b3ab51c8877 482 uint32_t result;
bogdanm 84:0b3ab51c8877 483
bogdanm 84:0b3ab51c8877 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
bogdanm 84:0b3ab51c8877 485 return(result);
bogdanm 84:0b3ab51c8877 486 }
bogdanm 84:0b3ab51c8877 487
bogdanm 84:0b3ab51c8877 488
bogdanm 84:0b3ab51c8877 489 /** \brief Set Priority Mask
bogdanm 84:0b3ab51c8877 490
bogdanm 84:0b3ab51c8877 491 This function assigns the given value to the Priority Mask Register.
bogdanm 84:0b3ab51c8877 492
bogdanm 84:0b3ab51c8877 493 \param [in] priMask Priority Mask
bogdanm 84:0b3ab51c8877 494 */
bogdanm 84:0b3ab51c8877 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 84:0b3ab51c8877 496 {
bogdanm 84:0b3ab51c8877 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
bogdanm 84:0b3ab51c8877 498 }
bogdanm 84:0b3ab51c8877 499
bogdanm 84:0b3ab51c8877 500
bogdanm 84:0b3ab51c8877 501 #if (__CORTEX_M >= 0x03)
bogdanm 84:0b3ab51c8877 502
bogdanm 84:0b3ab51c8877 503 /** \brief Enable FIQ
bogdanm 84:0b3ab51c8877 504
bogdanm 84:0b3ab51c8877 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 84:0b3ab51c8877 506 Can only be executed in Privileged modes.
bogdanm 84:0b3ab51c8877 507 */
bogdanm 84:0b3ab51c8877 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
bogdanm 84:0b3ab51c8877 509 {
bogdanm 84:0b3ab51c8877 510 __ASM volatile ("cpsie f" : : : "memory");
bogdanm 84:0b3ab51c8877 511 }
bogdanm 84:0b3ab51c8877 512
bogdanm 84:0b3ab51c8877 513
bogdanm 84:0b3ab51c8877 514 /** \brief Disable FIQ
bogdanm 84:0b3ab51c8877 515
bogdanm 84:0b3ab51c8877 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 84:0b3ab51c8877 517 Can only be executed in Privileged modes.
bogdanm 84:0b3ab51c8877 518 */
bogdanm 84:0b3ab51c8877 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
bogdanm 84:0b3ab51c8877 520 {
bogdanm 84:0b3ab51c8877 521 __ASM volatile ("cpsid f" : : : "memory");
bogdanm 84:0b3ab51c8877 522 }
bogdanm 84:0b3ab51c8877 523
bogdanm 84:0b3ab51c8877 524
bogdanm 84:0b3ab51c8877 525 /** \brief Get Base Priority
bogdanm 84:0b3ab51c8877 526
bogdanm 84:0b3ab51c8877 527 This function returns the current value of the Base Priority register.
bogdanm 84:0b3ab51c8877 528
bogdanm 84:0b3ab51c8877 529 \return Base Priority register value
bogdanm 84:0b3ab51c8877 530 */
bogdanm 84:0b3ab51c8877 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 84:0b3ab51c8877 532 {
bogdanm 84:0b3ab51c8877 533 uint32_t result;
bogdanm 84:0b3ab51c8877 534
Kojto 110:165afa46840b 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
bogdanm 84:0b3ab51c8877 536 return(result);
bogdanm 84:0b3ab51c8877 537 }
bogdanm 84:0b3ab51c8877 538
bogdanm 84:0b3ab51c8877 539
bogdanm 84:0b3ab51c8877 540 /** \brief Set Base Priority
bogdanm 84:0b3ab51c8877 541
bogdanm 84:0b3ab51c8877 542 This function assigns the given value to the Base Priority register.
bogdanm 84:0b3ab51c8877 543
bogdanm 84:0b3ab51c8877 544 \param [in] basePri Base Priority value to set
bogdanm 84:0b3ab51c8877 545 */
bogdanm 84:0b3ab51c8877 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
bogdanm 84:0b3ab51c8877 547 {
bogdanm 84:0b3ab51c8877 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
bogdanm 84:0b3ab51c8877 549 }
bogdanm 84:0b3ab51c8877 550
bogdanm 84:0b3ab51c8877 551
Kojto 110:165afa46840b 552 /** \brief Set Base Priority with condition
Kojto 110:165afa46840b 553
Kojto 110:165afa46840b 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 110:165afa46840b 555 or the new value increases the BASEPRI priority level.
Kojto 110:165afa46840b 556
Kojto 110:165afa46840b 557 \param [in] basePri Base Priority value to set
Kojto 110:165afa46840b 558 */
Kojto 110:165afa46840b 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Kojto 110:165afa46840b 560 {
Kojto 110:165afa46840b 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Kojto 110:165afa46840b 562 }
Kojto 110:165afa46840b 563
Kojto 110:165afa46840b 564
bogdanm 84:0b3ab51c8877 565 /** \brief Get Fault Mask
bogdanm 84:0b3ab51c8877 566
bogdanm 84:0b3ab51c8877 567 This function returns the current value of the Fault Mask register.
bogdanm 84:0b3ab51c8877 568
bogdanm 84:0b3ab51c8877 569 \return Fault Mask register value
bogdanm 84:0b3ab51c8877 570 */
bogdanm 84:0b3ab51c8877 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 84:0b3ab51c8877 572 {
bogdanm 84:0b3ab51c8877 573 uint32_t result;
bogdanm 84:0b3ab51c8877 574
bogdanm 84:0b3ab51c8877 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
bogdanm 84:0b3ab51c8877 576 return(result);
bogdanm 84:0b3ab51c8877 577 }
bogdanm 84:0b3ab51c8877 578
bogdanm 84:0b3ab51c8877 579
bogdanm 84:0b3ab51c8877 580 /** \brief Set Fault Mask
bogdanm 84:0b3ab51c8877 581
bogdanm 84:0b3ab51c8877 582 This function assigns the given value to the Fault Mask register.
bogdanm 84:0b3ab51c8877 583
bogdanm 84:0b3ab51c8877 584 \param [in] faultMask Fault Mask value to set
bogdanm 84:0b3ab51c8877 585 */
bogdanm 84:0b3ab51c8877 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 84:0b3ab51c8877 587 {
bogdanm 84:0b3ab51c8877 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
bogdanm 84:0b3ab51c8877 589 }
bogdanm 84:0b3ab51c8877 590
bogdanm 84:0b3ab51c8877 591 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 84:0b3ab51c8877 592
bogdanm 84:0b3ab51c8877 593
Kojto 110:165afa46840b 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
bogdanm 84:0b3ab51c8877 595
bogdanm 84:0b3ab51c8877 596 /** \brief Get FPSCR
bogdanm 84:0b3ab51c8877 597
bogdanm 84:0b3ab51c8877 598 This function returns the current value of the Floating Point Status/Control register.
bogdanm 84:0b3ab51c8877 599
bogdanm 84:0b3ab51c8877 600 \return Floating Point Status/Control register value
bogdanm 84:0b3ab51c8877 601 */
bogdanm 84:0b3ab51c8877 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 84:0b3ab51c8877 603 {
bogdanm 84:0b3ab51c8877 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 84:0b3ab51c8877 605 uint32_t result;
bogdanm 84:0b3ab51c8877 606
bogdanm 84:0b3ab51c8877 607 /* Empty asm statement works as a scheduling barrier */
bogdanm 84:0b3ab51c8877 608 __ASM volatile ("");
bogdanm 84:0b3ab51c8877 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
bogdanm 84:0b3ab51c8877 610 __ASM volatile ("");
bogdanm 84:0b3ab51c8877 611 return(result);
bogdanm 84:0b3ab51c8877 612 #else
bogdanm 84:0b3ab51c8877 613 return(0);
bogdanm 84:0b3ab51c8877 614 #endif
bogdanm 84:0b3ab51c8877 615 }
bogdanm 84:0b3ab51c8877 616
bogdanm 84:0b3ab51c8877 617
bogdanm 84:0b3ab51c8877 618 /** \brief Set FPSCR
bogdanm 84:0b3ab51c8877 619
bogdanm 84:0b3ab51c8877 620 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 84:0b3ab51c8877 621
bogdanm 84:0b3ab51c8877 622 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 84:0b3ab51c8877 623 */
bogdanm 84:0b3ab51c8877 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 84:0b3ab51c8877 625 {
bogdanm 84:0b3ab51c8877 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 84:0b3ab51c8877 627 /* Empty asm statement works as a scheduling barrier */
bogdanm 84:0b3ab51c8877 628 __ASM volatile ("");
bogdanm 84:0b3ab51c8877 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
bogdanm 84:0b3ab51c8877 630 __ASM volatile ("");
bogdanm 84:0b3ab51c8877 631 #endif
bogdanm 84:0b3ab51c8877 632 }
bogdanm 84:0b3ab51c8877 633
Kojto 110:165afa46840b 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 110:165afa46840b 635
Kojto 110:165afa46840b 636
Kojto 110:165afa46840b 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 110:165afa46840b 638 /* IAR iccarm specific functions */
Kojto 110:165afa46840b 639 #include <cmsis_iar.h>
Kojto 110:165afa46840b 640
Kojto 110:165afa46840b 641
Kojto 110:165afa46840b 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 110:165afa46840b 643 /* TI CCS specific functions */
Kojto 110:165afa46840b 644 #include <cmsis_ccs.h>
bogdanm 84:0b3ab51c8877 645
bogdanm 84:0b3ab51c8877 646
bogdanm 84:0b3ab51c8877 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 84:0b3ab51c8877 648 /* TASKING carm specific functions */
bogdanm 84:0b3ab51c8877 649 /*
bogdanm 84:0b3ab51c8877 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 110:165afa46840b 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
bogdanm 84:0b3ab51c8877 652 * Including the CMSIS ones.
bogdanm 84:0b3ab51c8877 653 */
bogdanm 84:0b3ab51c8877 654
Kojto 110:165afa46840b 655
Kojto 110:165afa46840b 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 110:165afa46840b 657 /* Cosmic specific functions */
Kojto 110:165afa46840b 658 #include <cmsis_csm.h>
Kojto 110:165afa46840b 659
bogdanm 84:0b3ab51c8877 660 #endif
bogdanm 84:0b3ab51c8877 661
bogdanm 84:0b3ab51c8877 662 /*@} end of CMSIS_Core_RegAccFunctions */
bogdanm 84:0b3ab51c8877 663
bogdanm 84:0b3ab51c8877 664 #endif /* __CORE_CMFUNC_H */