mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F746ZG/core_cmFunc.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
115:87f2f5183dfb 
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 115:87f2f5183dfb 1 /**************************************************************************//**
Kojto 115:87f2f5183dfb 2 * @file core_cmFunc.h
Kojto 115:87f2f5183dfb 3 * @brief CMSIS Cortex-M Core Function Access Header File
Kojto 115:87f2f5183dfb 4 * @version V4.10
Kojto 115:87f2f5183dfb 5 * @date 18. March 2015
Kojto 115:87f2f5183dfb 6 *
Kojto 115:87f2f5183dfb 7 * @note
Kojto 115:87f2f5183dfb 8 *
Kojto 115:87f2f5183dfb 9 ******************************************************************************/
Kojto 115:87f2f5183dfb 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
Kojto 115:87f2f5183dfb 11
Kojto 115:87f2f5183dfb 12 All rights reserved.
Kojto 115:87f2f5183dfb 13 Redistribution and use in source and binary forms, with or without
Kojto 115:87f2f5183dfb 14 modification, are permitted provided that the following conditions are met:
Kojto 115:87f2f5183dfb 15 - Redistributions of source code must retain the above copyright
Kojto 115:87f2f5183dfb 16 notice, this list of conditions and the following disclaimer.
Kojto 115:87f2f5183dfb 17 - Redistributions in binary form must reproduce the above copyright
Kojto 115:87f2f5183dfb 18 notice, this list of conditions and the following disclaimer in the
Kojto 115:87f2f5183dfb 19 documentation and/or other materials provided with the distribution.
Kojto 115:87f2f5183dfb 20 - Neither the name of ARM nor the names of its contributors may be used
Kojto 115:87f2f5183dfb 21 to endorse or promote products derived from this software without
Kojto 115:87f2f5183dfb 22 specific prior written permission.
Kojto 115:87f2f5183dfb 23 *
Kojto 115:87f2f5183dfb 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 115:87f2f5183dfb 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 115:87f2f5183dfb 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Kojto 115:87f2f5183dfb 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Kojto 115:87f2f5183dfb 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Kojto 115:87f2f5183dfb 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Kojto 115:87f2f5183dfb 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Kojto 115:87f2f5183dfb 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Kojto 115:87f2f5183dfb 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Kojto 115:87f2f5183dfb 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Kojto 115:87f2f5183dfb 34 POSSIBILITY OF SUCH DAMAGE.
Kojto 115:87f2f5183dfb 35 ---------------------------------------------------------------------------*/
Kojto 115:87f2f5183dfb 36
Kojto 115:87f2f5183dfb 37
Kojto 115:87f2f5183dfb 38 #ifndef __CORE_CMFUNC_H
Kojto 115:87f2f5183dfb 39 #define __CORE_CMFUNC_H
Kojto 115:87f2f5183dfb 40
Kojto 115:87f2f5183dfb 41
Kojto 115:87f2f5183dfb 42 /* ########################### Core Function Access ########################### */
Kojto 115:87f2f5183dfb 43 /** \ingroup CMSIS_Core_FunctionInterface
Kojto 115:87f2f5183dfb 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
Kojto 115:87f2f5183dfb 45 @{
Kojto 115:87f2f5183dfb 46 */
Kojto 115:87f2f5183dfb 47
Kojto 115:87f2f5183dfb 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Kojto 115:87f2f5183dfb 49 /* ARM armcc specific functions */
Kojto 115:87f2f5183dfb 50
Kojto 115:87f2f5183dfb 51 #if (__ARMCC_VERSION < 400677)
Kojto 115:87f2f5183dfb 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Kojto 115:87f2f5183dfb 53 #endif
Kojto 115:87f2f5183dfb 54
Kojto 115:87f2f5183dfb 55 /* intrinsic void __enable_irq(); */
Kojto 115:87f2f5183dfb 56 /* intrinsic void __disable_irq(); */
Kojto 115:87f2f5183dfb 57
Kojto 115:87f2f5183dfb 58 /** \brief Get Control Register
Kojto 115:87f2f5183dfb 59
Kojto 115:87f2f5183dfb 60 This function returns the content of the Control Register.
Kojto 115:87f2f5183dfb 61
Kojto 115:87f2f5183dfb 62 \return Control Register value
Kojto 115:87f2f5183dfb 63 */
Kojto 115:87f2f5183dfb 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 115:87f2f5183dfb 65 {
Kojto 115:87f2f5183dfb 66 register uint32_t __regControl __ASM("control");
Kojto 115:87f2f5183dfb 67 return(__regControl);
Kojto 115:87f2f5183dfb 68 }
Kojto 115:87f2f5183dfb 69
Kojto 115:87f2f5183dfb 70
Kojto 115:87f2f5183dfb 71 /** \brief Set Control Register
Kojto 115:87f2f5183dfb 72
Kojto 115:87f2f5183dfb 73 This function writes the given value to the Control Register.
Kojto 115:87f2f5183dfb 74
Kojto 115:87f2f5183dfb 75 \param [in] control Control Register value to set
Kojto 115:87f2f5183dfb 76 */
Kojto 115:87f2f5183dfb 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 115:87f2f5183dfb 78 {
Kojto 115:87f2f5183dfb 79 register uint32_t __regControl __ASM("control");
Kojto 115:87f2f5183dfb 80 __regControl = control;
Kojto 115:87f2f5183dfb 81 }
Kojto 115:87f2f5183dfb 82
Kojto 115:87f2f5183dfb 83
Kojto 115:87f2f5183dfb 84 /** \brief Get IPSR Register
Kojto 115:87f2f5183dfb 85
Kojto 115:87f2f5183dfb 86 This function returns the content of the IPSR Register.
Kojto 115:87f2f5183dfb 87
Kojto 115:87f2f5183dfb 88 \return IPSR Register value
Kojto 115:87f2f5183dfb 89 */
Kojto 115:87f2f5183dfb 90 __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 115:87f2f5183dfb 91 {
Kojto 115:87f2f5183dfb 92 register uint32_t __regIPSR __ASM("ipsr");
Kojto 115:87f2f5183dfb 93 return(__regIPSR);
Kojto 115:87f2f5183dfb 94 }
Kojto 115:87f2f5183dfb 95
Kojto 115:87f2f5183dfb 96
Kojto 115:87f2f5183dfb 97 /** \brief Get APSR Register
Kojto 115:87f2f5183dfb 98
Kojto 115:87f2f5183dfb 99 This function returns the content of the APSR Register.
Kojto 115:87f2f5183dfb 100
Kojto 115:87f2f5183dfb 101 \return APSR Register value
Kojto 115:87f2f5183dfb 102 */
Kojto 115:87f2f5183dfb 103 __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 115:87f2f5183dfb 104 {
Kojto 115:87f2f5183dfb 105 register uint32_t __regAPSR __ASM("apsr");
Kojto 115:87f2f5183dfb 106 return(__regAPSR);
Kojto 115:87f2f5183dfb 107 }
Kojto 115:87f2f5183dfb 108
Kojto 115:87f2f5183dfb 109
Kojto 115:87f2f5183dfb 110 /** \brief Get xPSR Register
Kojto 115:87f2f5183dfb 111
Kojto 115:87f2f5183dfb 112 This function returns the content of the xPSR Register.
Kojto 115:87f2f5183dfb 113
Kojto 115:87f2f5183dfb 114 \return xPSR Register value
Kojto 115:87f2f5183dfb 115 */
Kojto 115:87f2f5183dfb 116 __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 115:87f2f5183dfb 117 {
Kojto 115:87f2f5183dfb 118 register uint32_t __regXPSR __ASM("xpsr");
Kojto 115:87f2f5183dfb 119 return(__regXPSR);
Kojto 115:87f2f5183dfb 120 }
Kojto 115:87f2f5183dfb 121
Kojto 115:87f2f5183dfb 122
Kojto 115:87f2f5183dfb 123 /** \brief Get Process Stack Pointer
Kojto 115:87f2f5183dfb 124
Kojto 115:87f2f5183dfb 125 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 115:87f2f5183dfb 126
Kojto 115:87f2f5183dfb 127 \return PSP Register value
Kojto 115:87f2f5183dfb 128 */
Kojto 115:87f2f5183dfb 129 __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 115:87f2f5183dfb 130 {
Kojto 115:87f2f5183dfb 131 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 115:87f2f5183dfb 132 return(__regProcessStackPointer);
Kojto 115:87f2f5183dfb 133 }
Kojto 115:87f2f5183dfb 134
Kojto 115:87f2f5183dfb 135
Kojto 115:87f2f5183dfb 136 /** \brief Set Process Stack Pointer
Kojto 115:87f2f5183dfb 137
Kojto 115:87f2f5183dfb 138 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 115:87f2f5183dfb 139
Kojto 115:87f2f5183dfb 140 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 115:87f2f5183dfb 141 */
Kojto 115:87f2f5183dfb 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 115:87f2f5183dfb 143 {
Kojto 115:87f2f5183dfb 144 register uint32_t __regProcessStackPointer __ASM("psp");
Kojto 115:87f2f5183dfb 145 __regProcessStackPointer = topOfProcStack;
Kojto 115:87f2f5183dfb 146 }
Kojto 115:87f2f5183dfb 147
Kojto 115:87f2f5183dfb 148
Kojto 115:87f2f5183dfb 149 /** \brief Get Main Stack Pointer
Kojto 115:87f2f5183dfb 150
Kojto 115:87f2f5183dfb 151 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 115:87f2f5183dfb 152
Kojto 115:87f2f5183dfb 153 \return MSP Register value
Kojto 115:87f2f5183dfb 154 */
Kojto 115:87f2f5183dfb 155 __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 115:87f2f5183dfb 156 {
Kojto 115:87f2f5183dfb 157 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 115:87f2f5183dfb 158 return(__regMainStackPointer);
Kojto 115:87f2f5183dfb 159 }
Kojto 115:87f2f5183dfb 160
Kojto 115:87f2f5183dfb 161
Kojto 115:87f2f5183dfb 162 /** \brief Set Main Stack Pointer
Kojto 115:87f2f5183dfb 163
Kojto 115:87f2f5183dfb 164 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 115:87f2f5183dfb 165
Kojto 115:87f2f5183dfb 166 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 115:87f2f5183dfb 167 */
Kojto 115:87f2f5183dfb 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 115:87f2f5183dfb 169 {
Kojto 115:87f2f5183dfb 170 register uint32_t __regMainStackPointer __ASM("msp");
Kojto 115:87f2f5183dfb 171 __regMainStackPointer = topOfMainStack;
Kojto 115:87f2f5183dfb 172 }
Kojto 115:87f2f5183dfb 173
Kojto 115:87f2f5183dfb 174
Kojto 115:87f2f5183dfb 175 /** \brief Get Priority Mask
Kojto 115:87f2f5183dfb 176
Kojto 115:87f2f5183dfb 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 115:87f2f5183dfb 178
Kojto 115:87f2f5183dfb 179 \return Priority Mask value
Kojto 115:87f2f5183dfb 180 */
Kojto 115:87f2f5183dfb 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 115:87f2f5183dfb 182 {
Kojto 115:87f2f5183dfb 183 register uint32_t __regPriMask __ASM("primask");
Kojto 115:87f2f5183dfb 184 return(__regPriMask);
Kojto 115:87f2f5183dfb 185 }
Kojto 115:87f2f5183dfb 186
Kojto 115:87f2f5183dfb 187
Kojto 115:87f2f5183dfb 188 /** \brief Set Priority Mask
Kojto 115:87f2f5183dfb 189
Kojto 115:87f2f5183dfb 190 This function assigns the given value to the Priority Mask Register.
Kojto 115:87f2f5183dfb 191
Kojto 115:87f2f5183dfb 192 \param [in] priMask Priority Mask
Kojto 115:87f2f5183dfb 193 */
Kojto 115:87f2f5183dfb 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 115:87f2f5183dfb 195 {
Kojto 115:87f2f5183dfb 196 register uint32_t __regPriMask __ASM("primask");
Kojto 115:87f2f5183dfb 197 __regPriMask = (priMask);
Kojto 115:87f2f5183dfb 198 }
Kojto 115:87f2f5183dfb 199
Kojto 115:87f2f5183dfb 200
Kojto 115:87f2f5183dfb 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
Kojto 115:87f2f5183dfb 202
Kojto 115:87f2f5183dfb 203 /** \brief Enable FIQ
Kojto 115:87f2f5183dfb 204
Kojto 115:87f2f5183dfb 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 115:87f2f5183dfb 206 Can only be executed in Privileged modes.
Kojto 115:87f2f5183dfb 207 */
Kojto 115:87f2f5183dfb 208 #define __enable_fault_irq __enable_fiq
Kojto 115:87f2f5183dfb 209
Kojto 115:87f2f5183dfb 210
Kojto 115:87f2f5183dfb 211 /** \brief Disable FIQ
Kojto 115:87f2f5183dfb 212
Kojto 115:87f2f5183dfb 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 115:87f2f5183dfb 214 Can only be executed in Privileged modes.
Kojto 115:87f2f5183dfb 215 */
Kojto 115:87f2f5183dfb 216 #define __disable_fault_irq __disable_fiq
Kojto 115:87f2f5183dfb 217
Kojto 115:87f2f5183dfb 218
Kojto 115:87f2f5183dfb 219 /** \brief Get Base Priority
Kojto 115:87f2f5183dfb 220
Kojto 115:87f2f5183dfb 221 This function returns the current value of the Base Priority register.
Kojto 115:87f2f5183dfb 222
Kojto 115:87f2f5183dfb 223 \return Base Priority register value
Kojto 115:87f2f5183dfb 224 */
Kojto 115:87f2f5183dfb 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 115:87f2f5183dfb 226 {
Kojto 115:87f2f5183dfb 227 register uint32_t __regBasePri __ASM("basepri");
Kojto 115:87f2f5183dfb 228 return(__regBasePri);
Kojto 115:87f2f5183dfb 229 }
Kojto 115:87f2f5183dfb 230
Kojto 115:87f2f5183dfb 231
Kojto 115:87f2f5183dfb 232 /** \brief Set Base Priority
Kojto 115:87f2f5183dfb 233
Kojto 115:87f2f5183dfb 234 This function assigns the given value to the Base Priority register.
Kojto 115:87f2f5183dfb 235
Kojto 115:87f2f5183dfb 236 \param [in] basePri Base Priority value to set
Kojto 115:87f2f5183dfb 237 */
Kojto 115:87f2f5183dfb 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
Kojto 115:87f2f5183dfb 239 {
Kojto 115:87f2f5183dfb 240 register uint32_t __regBasePri __ASM("basepri");
Kojto 115:87f2f5183dfb 241 __regBasePri = (basePri & 0xff);
Kojto 115:87f2f5183dfb 242 }
Kojto 115:87f2f5183dfb 243
Kojto 115:87f2f5183dfb 244
Kojto 115:87f2f5183dfb 245 /** \brief Set Base Priority with condition
Kojto 115:87f2f5183dfb 246
Kojto 115:87f2f5183dfb 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 115:87f2f5183dfb 248 or the new value increases the BASEPRI priority level.
Kojto 115:87f2f5183dfb 249
Kojto 115:87f2f5183dfb 250 \param [in] basePri Base Priority value to set
Kojto 115:87f2f5183dfb 251 */
Kojto 115:87f2f5183dfb 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
Kojto 115:87f2f5183dfb 253 {
Kojto 115:87f2f5183dfb 254 register uint32_t __regBasePriMax __ASM("basepri_max");
Kojto 115:87f2f5183dfb 255 __regBasePriMax = (basePri & 0xff);
Kojto 115:87f2f5183dfb 256 }
Kojto 115:87f2f5183dfb 257
Kojto 115:87f2f5183dfb 258
Kojto 115:87f2f5183dfb 259 /** \brief Get Fault Mask
Kojto 115:87f2f5183dfb 260
Kojto 115:87f2f5183dfb 261 This function returns the current value of the Fault Mask register.
Kojto 115:87f2f5183dfb 262
Kojto 115:87f2f5183dfb 263 \return Fault Mask register value
Kojto 115:87f2f5183dfb 264 */
Kojto 115:87f2f5183dfb 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 115:87f2f5183dfb 266 {
Kojto 115:87f2f5183dfb 267 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 115:87f2f5183dfb 268 return(__regFaultMask);
Kojto 115:87f2f5183dfb 269 }
Kojto 115:87f2f5183dfb 270
Kojto 115:87f2f5183dfb 271
Kojto 115:87f2f5183dfb 272 /** \brief Set Fault Mask
Kojto 115:87f2f5183dfb 273
Kojto 115:87f2f5183dfb 274 This function assigns the given value to the Fault Mask register.
Kojto 115:87f2f5183dfb 275
Kojto 115:87f2f5183dfb 276 \param [in] faultMask Fault Mask value to set
Kojto 115:87f2f5183dfb 277 */
Kojto 115:87f2f5183dfb 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 115:87f2f5183dfb 279 {
Kojto 115:87f2f5183dfb 280 register uint32_t __regFaultMask __ASM("faultmask");
Kojto 115:87f2f5183dfb 281 __regFaultMask = (faultMask & (uint32_t)1);
Kojto 115:87f2f5183dfb 282 }
Kojto 115:87f2f5183dfb 283
Kojto 115:87f2f5183dfb 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
Kojto 115:87f2f5183dfb 285
Kojto 115:87f2f5183dfb 286
Kojto 115:87f2f5183dfb 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Kojto 115:87f2f5183dfb 288
Kojto 115:87f2f5183dfb 289 /** \brief Get FPSCR
Kojto 115:87f2f5183dfb 290
Kojto 115:87f2f5183dfb 291 This function returns the current value of the Floating Point Status/Control register.
Kojto 115:87f2f5183dfb 292
Kojto 115:87f2f5183dfb 293 \return Floating Point Status/Control register value
Kojto 115:87f2f5183dfb 294 */
Kojto 115:87f2f5183dfb 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 115:87f2f5183dfb 296 {
Kojto 115:87f2f5183dfb 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 115:87f2f5183dfb 298 register uint32_t __regfpscr __ASM("fpscr");
Kojto 115:87f2f5183dfb 299 return(__regfpscr);
Kojto 115:87f2f5183dfb 300 #else
Kojto 115:87f2f5183dfb 301 return(0);
Kojto 115:87f2f5183dfb 302 #endif
Kojto 115:87f2f5183dfb 303 }
Kojto 115:87f2f5183dfb 304
Kojto 115:87f2f5183dfb 305
Kojto 115:87f2f5183dfb 306 /** \brief Set FPSCR
Kojto 115:87f2f5183dfb 307
Kojto 115:87f2f5183dfb 308 This function assigns the given value to the Floating Point Status/Control register.
Kojto 115:87f2f5183dfb 309
Kojto 115:87f2f5183dfb 310 \param [in] fpscr Floating Point Status/Control value to set
Kojto 115:87f2f5183dfb 311 */
Kojto 115:87f2f5183dfb 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 115:87f2f5183dfb 313 {
Kojto 115:87f2f5183dfb 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 115:87f2f5183dfb 315 register uint32_t __regfpscr __ASM("fpscr");
Kojto 115:87f2f5183dfb 316 __regfpscr = (fpscr);
Kojto 115:87f2f5183dfb 317 #endif
Kojto 115:87f2f5183dfb 318 }
Kojto 115:87f2f5183dfb 319
Kojto 115:87f2f5183dfb 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 115:87f2f5183dfb 321
Kojto 115:87f2f5183dfb 322
Kojto 115:87f2f5183dfb 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Kojto 115:87f2f5183dfb 324 /* GNU gcc specific functions */
Kojto 115:87f2f5183dfb 325
Kojto 115:87f2f5183dfb 326 /** \brief Enable IRQ Interrupts
Kojto 115:87f2f5183dfb 327
Kojto 115:87f2f5183dfb 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
Kojto 115:87f2f5183dfb 329 Can only be executed in Privileged modes.
Kojto 115:87f2f5183dfb 330 */
Kojto 115:87f2f5183dfb 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
Kojto 115:87f2f5183dfb 332 {
Kojto 115:87f2f5183dfb 333 __ASM volatile ("cpsie i" : : : "memory");
Kojto 115:87f2f5183dfb 334 }
Kojto 115:87f2f5183dfb 335
Kojto 115:87f2f5183dfb 336
Kojto 115:87f2f5183dfb 337 /** \brief Disable IRQ Interrupts
Kojto 115:87f2f5183dfb 338
Kojto 115:87f2f5183dfb 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
Kojto 115:87f2f5183dfb 340 Can only be executed in Privileged modes.
Kojto 115:87f2f5183dfb 341 */
Kojto 115:87f2f5183dfb 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
Kojto 115:87f2f5183dfb 343 {
Kojto 115:87f2f5183dfb 344 __ASM volatile ("cpsid i" : : : "memory");
Kojto 115:87f2f5183dfb 345 }
Kojto 115:87f2f5183dfb 346
Kojto 115:87f2f5183dfb 347
Kojto 115:87f2f5183dfb 348 /** \brief Get Control Register
Kojto 115:87f2f5183dfb 349
Kojto 115:87f2f5183dfb 350 This function returns the content of the Control Register.
Kojto 115:87f2f5183dfb 351
Kojto 115:87f2f5183dfb 352 \return Control Register value
Kojto 115:87f2f5183dfb 353 */
Kojto 115:87f2f5183dfb 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
Kojto 115:87f2f5183dfb 355 {
Kojto 115:87f2f5183dfb 356 uint32_t result;
Kojto 115:87f2f5183dfb 357
Kojto 115:87f2f5183dfb 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
Kojto 115:87f2f5183dfb 359 return(result);
Kojto 115:87f2f5183dfb 360 }
Kojto 115:87f2f5183dfb 361
Kojto 115:87f2f5183dfb 362
Kojto 115:87f2f5183dfb 363 /** \brief Set Control Register
Kojto 115:87f2f5183dfb 364
Kojto 115:87f2f5183dfb 365 This function writes the given value to the Control Register.
Kojto 115:87f2f5183dfb 366
Kojto 115:87f2f5183dfb 367 \param [in] control Control Register value to set
Kojto 115:87f2f5183dfb 368 */
Kojto 115:87f2f5183dfb 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
Kojto 115:87f2f5183dfb 370 {
Kojto 115:87f2f5183dfb 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
Kojto 115:87f2f5183dfb 372 }
Kojto 115:87f2f5183dfb 373
Kojto 115:87f2f5183dfb 374
Kojto 115:87f2f5183dfb 375 /** \brief Get IPSR Register
Kojto 115:87f2f5183dfb 376
Kojto 115:87f2f5183dfb 377 This function returns the content of the IPSR Register.
Kojto 115:87f2f5183dfb 378
Kojto 115:87f2f5183dfb 379 \return IPSR Register value
Kojto 115:87f2f5183dfb 380 */
Kojto 115:87f2f5183dfb 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
Kojto 115:87f2f5183dfb 382 {
Kojto 115:87f2f5183dfb 383 uint32_t result;
Kojto 115:87f2f5183dfb 384
Kojto 115:87f2f5183dfb 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
Kojto 115:87f2f5183dfb 386 return(result);
Kojto 115:87f2f5183dfb 387 }
Kojto 115:87f2f5183dfb 388
Kojto 115:87f2f5183dfb 389
Kojto 115:87f2f5183dfb 390 /** \brief Get APSR Register
Kojto 115:87f2f5183dfb 391
Kojto 115:87f2f5183dfb 392 This function returns the content of the APSR Register.
Kojto 115:87f2f5183dfb 393
Kojto 115:87f2f5183dfb 394 \return APSR Register value
Kojto 115:87f2f5183dfb 395 */
Kojto 115:87f2f5183dfb 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
Kojto 115:87f2f5183dfb 397 {
Kojto 115:87f2f5183dfb 398 uint32_t result;
Kojto 115:87f2f5183dfb 399
Kojto 115:87f2f5183dfb 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
Kojto 115:87f2f5183dfb 401 return(result);
Kojto 115:87f2f5183dfb 402 }
Kojto 115:87f2f5183dfb 403
Kojto 115:87f2f5183dfb 404
Kojto 115:87f2f5183dfb 405 /** \brief Get xPSR Register
Kojto 115:87f2f5183dfb 406
Kojto 115:87f2f5183dfb 407 This function returns the content of the xPSR Register.
Kojto 115:87f2f5183dfb 408
Kojto 115:87f2f5183dfb 409 \return xPSR Register value
Kojto 115:87f2f5183dfb 410 */
Kojto 115:87f2f5183dfb 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
Kojto 115:87f2f5183dfb 412 {
Kojto 115:87f2f5183dfb 413 uint32_t result;
Kojto 115:87f2f5183dfb 414
Kojto 115:87f2f5183dfb 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
Kojto 115:87f2f5183dfb 416 return(result);
Kojto 115:87f2f5183dfb 417 }
Kojto 115:87f2f5183dfb 418
Kojto 115:87f2f5183dfb 419
Kojto 115:87f2f5183dfb 420 /** \brief Get Process Stack Pointer
Kojto 115:87f2f5183dfb 421
Kojto 115:87f2f5183dfb 422 This function returns the current value of the Process Stack Pointer (PSP).
Kojto 115:87f2f5183dfb 423
Kojto 115:87f2f5183dfb 424 \return PSP Register value
Kojto 115:87f2f5183dfb 425 */
Kojto 115:87f2f5183dfb 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
Kojto 115:87f2f5183dfb 427 {
Kojto 115:87f2f5183dfb 428 register uint32_t result;
Kojto 115:87f2f5183dfb 429
Kojto 115:87f2f5183dfb 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
Kojto 115:87f2f5183dfb 431 return(result);
Kojto 115:87f2f5183dfb 432 }
Kojto 115:87f2f5183dfb 433
Kojto 115:87f2f5183dfb 434
Kojto 115:87f2f5183dfb 435 /** \brief Set Process Stack Pointer
Kojto 115:87f2f5183dfb 436
Kojto 115:87f2f5183dfb 437 This function assigns the given value to the Process Stack Pointer (PSP).
Kojto 115:87f2f5183dfb 438
Kojto 115:87f2f5183dfb 439 \param [in] topOfProcStack Process Stack Pointer value to set
Kojto 115:87f2f5183dfb 440 */
Kojto 115:87f2f5183dfb 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
Kojto 115:87f2f5183dfb 442 {
Kojto 115:87f2f5183dfb 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
Kojto 115:87f2f5183dfb 444 }
Kojto 115:87f2f5183dfb 445
Kojto 115:87f2f5183dfb 446
Kojto 115:87f2f5183dfb 447 /** \brief Get Main Stack Pointer
Kojto 115:87f2f5183dfb 448
Kojto 115:87f2f5183dfb 449 This function returns the current value of the Main Stack Pointer (MSP).
Kojto 115:87f2f5183dfb 450
Kojto 115:87f2f5183dfb 451 \return MSP Register value
Kojto 115:87f2f5183dfb 452 */
Kojto 115:87f2f5183dfb 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
Kojto 115:87f2f5183dfb 454 {
Kojto 115:87f2f5183dfb 455 register uint32_t result;
Kojto 115:87f2f5183dfb 456
Kojto 115:87f2f5183dfb 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
Kojto 115:87f2f5183dfb 458 return(result);
Kojto 115:87f2f5183dfb 459 }
Kojto 115:87f2f5183dfb 460
Kojto 115:87f2f5183dfb 461
Kojto 115:87f2f5183dfb 462 /** \brief Set Main Stack Pointer
Kojto 115:87f2f5183dfb 463
Kojto 115:87f2f5183dfb 464 This function assigns the given value to the Main Stack Pointer (MSP).
Kojto 115:87f2f5183dfb 465
Kojto 115:87f2f5183dfb 466 \param [in] topOfMainStack Main Stack Pointer value to set
Kojto 115:87f2f5183dfb 467 */
Kojto 115:87f2f5183dfb 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
Kojto 115:87f2f5183dfb 469 {
Kojto 115:87f2f5183dfb 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
Kojto 115:87f2f5183dfb 471 }
Kojto 115:87f2f5183dfb 472
Kojto 115:87f2f5183dfb 473
Kojto 115:87f2f5183dfb 474 /** \brief Get Priority Mask
Kojto 115:87f2f5183dfb 475
Kojto 115:87f2f5183dfb 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
Kojto 115:87f2f5183dfb 477
Kojto 115:87f2f5183dfb 478 \return Priority Mask value
Kojto 115:87f2f5183dfb 479 */
Kojto 115:87f2f5183dfb 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
Kojto 115:87f2f5183dfb 481 {
Kojto 115:87f2f5183dfb 482 uint32_t result;
Kojto 115:87f2f5183dfb 483
Kojto 115:87f2f5183dfb 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
Kojto 115:87f2f5183dfb 485 return(result);
Kojto 115:87f2f5183dfb 486 }
Kojto 115:87f2f5183dfb 487
Kojto 115:87f2f5183dfb 488
Kojto 115:87f2f5183dfb 489 /** \brief Set Priority Mask
Kojto 115:87f2f5183dfb 490
Kojto 115:87f2f5183dfb 491 This function assigns the given value to the Priority Mask Register.
Kojto 115:87f2f5183dfb 492
Kojto 115:87f2f5183dfb 493 \param [in] priMask Priority Mask
Kojto 115:87f2f5183dfb 494 */
Kojto 115:87f2f5183dfb 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
Kojto 115:87f2f5183dfb 496 {
Kojto 115:87f2f5183dfb 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
Kojto 115:87f2f5183dfb 498 }
Kojto 115:87f2f5183dfb 499
Kojto 115:87f2f5183dfb 500
Kojto 115:87f2f5183dfb 501 #if (__CORTEX_M >= 0x03)
Kojto 115:87f2f5183dfb 502
Kojto 115:87f2f5183dfb 503 /** \brief Enable FIQ
Kojto 115:87f2f5183dfb 504
Kojto 115:87f2f5183dfb 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
Kojto 115:87f2f5183dfb 506 Can only be executed in Privileged modes.
Kojto 115:87f2f5183dfb 507 */
Kojto 115:87f2f5183dfb 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
Kojto 115:87f2f5183dfb 509 {
Kojto 115:87f2f5183dfb 510 __ASM volatile ("cpsie f" : : : "memory");
Kojto 115:87f2f5183dfb 511 }
Kojto 115:87f2f5183dfb 512
Kojto 115:87f2f5183dfb 513
Kojto 115:87f2f5183dfb 514 /** \brief Disable FIQ
Kojto 115:87f2f5183dfb 515
Kojto 115:87f2f5183dfb 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
Kojto 115:87f2f5183dfb 517 Can only be executed in Privileged modes.
Kojto 115:87f2f5183dfb 518 */
Kojto 115:87f2f5183dfb 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
Kojto 115:87f2f5183dfb 520 {
Kojto 115:87f2f5183dfb 521 __ASM volatile ("cpsid f" : : : "memory");
Kojto 115:87f2f5183dfb 522 }
Kojto 115:87f2f5183dfb 523
Kojto 115:87f2f5183dfb 524
Kojto 115:87f2f5183dfb 525 /** \brief Get Base Priority
Kojto 115:87f2f5183dfb 526
Kojto 115:87f2f5183dfb 527 This function returns the current value of the Base Priority register.
Kojto 115:87f2f5183dfb 528
Kojto 115:87f2f5183dfb 529 \return Base Priority register value
Kojto 115:87f2f5183dfb 530 */
Kojto 115:87f2f5183dfb 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
Kojto 115:87f2f5183dfb 532 {
Kojto 115:87f2f5183dfb 533 uint32_t result;
Kojto 115:87f2f5183dfb 534
Kojto 115:87f2f5183dfb 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
Kojto 115:87f2f5183dfb 536 return(result);
Kojto 115:87f2f5183dfb 537 }
Kojto 115:87f2f5183dfb 538
Kojto 115:87f2f5183dfb 539
Kojto 115:87f2f5183dfb 540 /** \brief Set Base Priority
Kojto 115:87f2f5183dfb 541
Kojto 115:87f2f5183dfb 542 This function assigns the given value to the Base Priority register.
Kojto 115:87f2f5183dfb 543
Kojto 115:87f2f5183dfb 544 \param [in] basePri Base Priority value to set
Kojto 115:87f2f5183dfb 545 */
Kojto 115:87f2f5183dfb 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
Kojto 115:87f2f5183dfb 547 {
Kojto 115:87f2f5183dfb 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
Kojto 115:87f2f5183dfb 549 }
Kojto 115:87f2f5183dfb 550
Kojto 115:87f2f5183dfb 551
Kojto 115:87f2f5183dfb 552 /** \brief Set Base Priority with condition
Kojto 115:87f2f5183dfb 553
Kojto 115:87f2f5183dfb 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
Kojto 115:87f2f5183dfb 555 or the new value increases the BASEPRI priority level.
Kojto 115:87f2f5183dfb 556
Kojto 115:87f2f5183dfb 557 \param [in] basePri Base Priority value to set
Kojto 115:87f2f5183dfb 558 */
Kojto 115:87f2f5183dfb 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
Kojto 115:87f2f5183dfb 560 {
Kojto 115:87f2f5183dfb 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
Kojto 115:87f2f5183dfb 562 }
Kojto 115:87f2f5183dfb 563
Kojto 115:87f2f5183dfb 564
Kojto 115:87f2f5183dfb 565 /** \brief Get Fault Mask
Kojto 115:87f2f5183dfb 566
Kojto 115:87f2f5183dfb 567 This function returns the current value of the Fault Mask register.
Kojto 115:87f2f5183dfb 568
Kojto 115:87f2f5183dfb 569 \return Fault Mask register value
Kojto 115:87f2f5183dfb 570 */
Kojto 115:87f2f5183dfb 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
Kojto 115:87f2f5183dfb 572 {
Kojto 115:87f2f5183dfb 573 uint32_t result;
Kojto 115:87f2f5183dfb 574
Kojto 115:87f2f5183dfb 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
Kojto 115:87f2f5183dfb 576 return(result);
Kojto 115:87f2f5183dfb 577 }
Kojto 115:87f2f5183dfb 578
Kojto 115:87f2f5183dfb 579
Kojto 115:87f2f5183dfb 580 /** \brief Set Fault Mask
Kojto 115:87f2f5183dfb 581
Kojto 115:87f2f5183dfb 582 This function assigns the given value to the Fault Mask register.
Kojto 115:87f2f5183dfb 583
Kojto 115:87f2f5183dfb 584 \param [in] faultMask Fault Mask value to set
Kojto 115:87f2f5183dfb 585 */
Kojto 115:87f2f5183dfb 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
Kojto 115:87f2f5183dfb 587 {
Kojto 115:87f2f5183dfb 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
Kojto 115:87f2f5183dfb 589 }
Kojto 115:87f2f5183dfb 590
Kojto 115:87f2f5183dfb 591 #endif /* (__CORTEX_M >= 0x03) */
Kojto 115:87f2f5183dfb 592
Kojto 115:87f2f5183dfb 593
Kojto 115:87f2f5183dfb 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
Kojto 115:87f2f5183dfb 595
Kojto 115:87f2f5183dfb 596 /** \brief Get FPSCR
Kojto 115:87f2f5183dfb 597
Kojto 115:87f2f5183dfb 598 This function returns the current value of the Floating Point Status/Control register.
Kojto 115:87f2f5183dfb 599
Kojto 115:87f2f5183dfb 600 \return Floating Point Status/Control register value
Kojto 115:87f2f5183dfb 601 */
Kojto 115:87f2f5183dfb 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
Kojto 115:87f2f5183dfb 603 {
Kojto 115:87f2f5183dfb 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 115:87f2f5183dfb 605 uint32_t result;
Kojto 115:87f2f5183dfb 606
Kojto 115:87f2f5183dfb 607 /* Empty asm statement works as a scheduling barrier */
Kojto 115:87f2f5183dfb 608 __ASM volatile ("");
Kojto 115:87f2f5183dfb 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
Kojto 115:87f2f5183dfb 610 __ASM volatile ("");
Kojto 115:87f2f5183dfb 611 return(result);
Kojto 115:87f2f5183dfb 612 #else
Kojto 115:87f2f5183dfb 613 return(0);
Kojto 115:87f2f5183dfb 614 #endif
Kojto 115:87f2f5183dfb 615 }
Kojto 115:87f2f5183dfb 616
Kojto 115:87f2f5183dfb 617
Kojto 115:87f2f5183dfb 618 /** \brief Set FPSCR
Kojto 115:87f2f5183dfb 619
Kojto 115:87f2f5183dfb 620 This function assigns the given value to the Floating Point Status/Control register.
Kojto 115:87f2f5183dfb 621
Kojto 115:87f2f5183dfb 622 \param [in] fpscr Floating Point Status/Control value to set
Kojto 115:87f2f5183dfb 623 */
Kojto 115:87f2f5183dfb 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
Kojto 115:87f2f5183dfb 625 {
Kojto 115:87f2f5183dfb 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
Kojto 115:87f2f5183dfb 627 /* Empty asm statement works as a scheduling barrier */
Kojto 115:87f2f5183dfb 628 __ASM volatile ("");
Kojto 115:87f2f5183dfb 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
Kojto 115:87f2f5183dfb 630 __ASM volatile ("");
Kojto 115:87f2f5183dfb 631 #endif
Kojto 115:87f2f5183dfb 632 }
Kojto 115:87f2f5183dfb 633
Kojto 115:87f2f5183dfb 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
Kojto 115:87f2f5183dfb 635
Kojto 115:87f2f5183dfb 636
Kojto 115:87f2f5183dfb 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Kojto 115:87f2f5183dfb 638 /* IAR iccarm specific functions */
Kojto 115:87f2f5183dfb 639 #include <cmsis_iar.h>
Kojto 115:87f2f5183dfb 640
Kojto 115:87f2f5183dfb 641
Kojto 115:87f2f5183dfb 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Kojto 115:87f2f5183dfb 643 /* TI CCS specific functions */
Kojto 115:87f2f5183dfb 644 #include <cmsis_ccs.h>
Kojto 115:87f2f5183dfb 645
Kojto 115:87f2f5183dfb 646
Kojto 115:87f2f5183dfb 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Kojto 115:87f2f5183dfb 648 /* TASKING carm specific functions */
Kojto 115:87f2f5183dfb 649 /*
Kojto 115:87f2f5183dfb 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
Kojto 115:87f2f5183dfb 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
Kojto 115:87f2f5183dfb 652 * Including the CMSIS ones.
Kojto 115:87f2f5183dfb 653 */
Kojto 115:87f2f5183dfb 654
Kojto 115:87f2f5183dfb 655
Kojto 115:87f2f5183dfb 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
Kojto 115:87f2f5183dfb 657 /* Cosmic specific functions */
Kojto 115:87f2f5183dfb 658 #include <cmsis_csm.h>
Kojto 115:87f2f5183dfb 659
Kojto 115:87f2f5183dfb 660 #endif
Kojto 115:87f2f5183dfb 661
Kojto 115:87f2f5183dfb 662 /*@} end of CMSIS_Core_RegAccFunctions */
Kojto 115:87f2f5183dfb 663
Kojto 115:87f2f5183dfb 664 #endif /* __CORE_CMFUNC_H */