mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F303ZE/TARGET_STM/gpio_object.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
135:176b8275d35d 
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 135:176b8275d35d 1 /* mbed Microcontroller Library
<> 135:176b8275d35d 2 *******************************************************************************
<> 135:176b8275d35d 3 * Copyright (c) 2016, STMicroelectronics
<> 135:176b8275d35d 4 * All rights reserved.
<> 135:176b8275d35d 5 *
<> 135:176b8275d35d 6 * Redistribution and use in source and binary forms, with or without
<> 135:176b8275d35d 7 * modification, are permitted provided that the following conditions are met:
<> 135:176b8275d35d 8 *
<> 135:176b8275d35d 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 135:176b8275d35d 10 * this list of conditions and the following disclaimer.
<> 135:176b8275d35d 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 135:176b8275d35d 12 * this list of conditions and the following disclaimer in the documentation
<> 135:176b8275d35d 13 * and/or other materials provided with the distribution.
<> 135:176b8275d35d 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 135:176b8275d35d 15 * may be used to endorse or promote products derived from this software
<> 135:176b8275d35d 16 * without specific prior written permission.
<> 135:176b8275d35d 17 *
<> 135:176b8275d35d 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 135:176b8275d35d 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 135:176b8275d35d 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 135:176b8275d35d 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 135:176b8275d35d 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 135:176b8275d35d 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 135:176b8275d35d 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 135:176b8275d35d 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 135:176b8275d35d 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 135:176b8275d35d 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 135:176b8275d35d 28 *******************************************************************************
<> 135:176b8275d35d 29 */
<> 135:176b8275d35d 30 #ifndef MBED_GPIO_OBJECT_H
<> 135:176b8275d35d 31 #define MBED_GPIO_OBJECT_H
<> 135:176b8275d35d 32
<> 135:176b8275d35d 33 #include "mbed_assert.h"
<> 135:176b8275d35d 34 #include "cmsis.h"
<> 135:176b8275d35d 35 #include "PortNames.h"
<> 135:176b8275d35d 36 #include "PeripheralNames.h"
<> 135:176b8275d35d 37 #include "PinNames.h"
<> 135:176b8275d35d 38
<> 135:176b8275d35d 39 #ifdef __cplusplus
<> 135:176b8275d35d 40 extern "C" {
<> 135:176b8275d35d 41 #endif
<> 135:176b8275d35d 42
<> 135:176b8275d35d 43 /*
<> 135:176b8275d35d 44 * Note: reg_clr might actually be same as reg_set.
<> 135:176b8275d35d 45 * Depends on family whether BRR is available on top of BSRR
<> 138:093f2bd7b9eb 46 * if BRR does not exist, family shall define GPIO_IP_WITHOUT_BRR
<> 135:176b8275d35d 47 */
<> 135:176b8275d35d 48 typedef struct {
<> 135:176b8275d35d 49 uint32_t mask;
<> 135:176b8275d35d 50 __IO uint32_t *reg_in;
<> 135:176b8275d35d 51 __IO uint32_t *reg_set;
<> 135:176b8275d35d 52 __IO uint32_t *reg_clr;
<> 138:093f2bd7b9eb 53 PinName pin;
<> 138:093f2bd7b9eb 54 GPIO_TypeDef *gpio;
<> 138:093f2bd7b9eb 55 uint32_t ll_pin;
<> 135:176b8275d35d 56 } gpio_t;
<> 135:176b8275d35d 57
<> 135:176b8275d35d 58 static inline void gpio_write(gpio_t *obj, int value)
<> 135:176b8275d35d 59 {
<> 135:176b8275d35d 60 if (value) {
<> 135:176b8275d35d 61 *obj->reg_set = obj->mask;
<> 135:176b8275d35d 62 } else {
<> 135:176b8275d35d 63 #ifdef GPIO_IP_WITHOUT_BRR
<> 135:176b8275d35d 64 *obj->reg_clr = obj->mask << 16;
<> 135:176b8275d35d 65 #else
<> 135:176b8275d35d 66 *obj->reg_clr = obj->mask;
<> 135:176b8275d35d 67 #endif
<> 135:176b8275d35d 68 }
<> 135:176b8275d35d 69 }
<> 135:176b8275d35d 70
<> 135:176b8275d35d 71 static inline int gpio_read(gpio_t *obj)
<> 135:176b8275d35d 72 {
<> 135:176b8275d35d 73 return ((*obj->reg_in & obj->mask) ? 1 : 0);
<> 135:176b8275d35d 74 }
<> 135:176b8275d35d 75
<> 135:176b8275d35d 76 static inline int gpio_is_connected(const gpio_t *obj)
<> 135:176b8275d35d 77 {
<> 135:176b8275d35d 78 return obj->pin != (PinName)NC;
<> 135:176b8275d35d 79 }
<> 135:176b8275d35d 80
<> 138:093f2bd7b9eb 81
<> 135:176b8275d35d 82 #ifdef __cplusplus
<> 135:176b8275d35d 83 }
<> 135:176b8275d35d 84 #endif
<> 135:176b8275d35d 85
<> 135:176b8275d35d 86 #endif