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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MAX32630FTHR/core_cmSecureAccess.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
136:ef9c61f8c49f 
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 135:176b8275d35d 1 /**************************************************************************//**
<> 135:176b8275d35d 2 * @file core_cmSecureAccess.h
<> 135:176b8275d35d 3 * @brief CMSIS Cortex-M Core Secure Access Header File
<> 135:176b8275d35d 4 * @version XXX
<> 135:176b8275d35d 5 * @date 10. June 2016
<> 135:176b8275d35d 6 *
<> 135:176b8275d35d 7 * @note
<> 135:176b8275d35d 8 *
<> 135:176b8275d35d 9 ******************************************************************************/
<> 135:176b8275d35d 10 /* Copyright (c) 2016 ARM LIMITED
<> 135:176b8275d35d 11
<> 135:176b8275d35d 12 All rights reserved.
<> 135:176b8275d35d 13 Redistribution and use in source and binary forms, with or without
<> 135:176b8275d35d 14 modification, are permitted provided that the following conditions are met:
<> 135:176b8275d35d 15 - Redistributions of source code must retain the above copyright
<> 135:176b8275d35d 16 notice, this list of conditions and the following disclaimer.
<> 135:176b8275d35d 17 - Redistributions in binary form must reproduce the above copyright
<> 135:176b8275d35d 18 notice, this list of conditions and the following disclaimer in the
<> 135:176b8275d35d 19 documentation and/or other materials provided with the distribution.
<> 135:176b8275d35d 20 - Neither the name of ARM nor the names of its contributors may be used
<> 135:176b8275d35d 21 to endorse or promote products derived from this software without
<> 135:176b8275d35d 22 specific prior written permission.
<> 135:176b8275d35d 23 *
<> 135:176b8275d35d 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 135:176b8275d35d 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 135:176b8275d35d 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
<> 135:176b8275d35d 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
<> 135:176b8275d35d 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
<> 135:176b8275d35d 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
<> 135:176b8275d35d 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
<> 135:176b8275d35d 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
<> 135:176b8275d35d 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
<> 135:176b8275d35d 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
<> 135:176b8275d35d 34 POSSIBILITY OF SUCH DAMAGE.
<> 135:176b8275d35d 35 ---------------------------------------------------------------------------*/
<> 135:176b8275d35d 36
<> 135:176b8275d35d 37
<> 135:176b8275d35d 38 #ifndef __CORE_CM_SECURE_ACCESS_H
<> 135:176b8275d35d 39 #define __CORE_CM_SECURE_ACCESS_H
<> 135:176b8275d35d 40
<> 135:176b8275d35d 41
<> 135:176b8275d35d 42 /* ########################### Core Secure Access ########################### */
<> 135:176b8275d35d 43
<> 135:176b8275d35d 44 #ifdef FEATURE_UVISOR
Kojto 136:ef9c61f8c49f 45 #include "uvisor-lib/uvisor-lib.h"
<> 135:176b8275d35d 46
<> 135:176b8275d35d 47 /* Secure uVisor implementation. */
<> 135:176b8275d35d 48
<> 135:176b8275d35d 49 /** Set the value at the target address.
<> 135:176b8275d35d 50 *
<> 135:176b8275d35d 51 * Equivalent to: `*address = value`.
<> 135:176b8275d35d 52 * @param address[in] Target address
<> 135:176b8275d35d 53 * @param value[in] Value to write at the address location.
<> 135:176b8275d35d 54 */
<> 135:176b8275d35d 55 #define SECURE_WRITE(address, value) \
<> 138:093f2bd7b9eb 56 uvisor_write(public_box, UVISOR_RGW_SHARED, address, value, UVISOR_RGW_OP_WRITE, 0xFFFFFFFFUL)
<> 135:176b8275d35d 57
<> 135:176b8275d35d 58 /** Get the value at the target address.
<> 135:176b8275d35d 59 *
<> 135:176b8275d35d 60 * @param address[in] Target address
<> 135:176b8275d35d 61 * @returns The value `*address`.
<> 135:176b8275d35d 62 */
<> 135:176b8275d35d 63 #define SECURE_READ(address) \
<> 138:093f2bd7b9eb 64 uvisor_read(public_box, UVISOR_RGW_SHARED, address, UVISOR_RGW_OP_READ, 0xFFFFFFFFUL)
<> 135:176b8275d35d 65
<> 135:176b8275d35d 66 /** Get the selected bits at the target address.
<> 135:176b8275d35d 67 *
<> 135:176b8275d35d 68 * @param address[in] Target address
<> 135:176b8275d35d 69 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 70 * @returns The value `*address & mask`.
<> 135:176b8275d35d 71 */
<> 135:176b8275d35d 72 #define SECURE_BITS_GET(address, mask) \
<> 138:093f2bd7b9eb 73 UVISOR_BITS_GET(public_box, UVISOR_RGW_SHARED, address, mask)
<> 135:176b8275d35d 74
<> 135:176b8275d35d 75 /** Check the selected bits at the target address.
<> 135:176b8275d35d 76 *
<> 135:176b8275d35d 77 * @param address[in] Address at which to check the bits
<> 135:176b8275d35d 78 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 79 * @returns The value `((*address & mask) == mask)`.
<> 135:176b8275d35d 80 */
<> 135:176b8275d35d 81 #define SECURE_BITS_CHECK(address, mask) \
<> 138:093f2bd7b9eb 82 UVISOR_BITS_CHECK(public_box, UVISOR_RGW_SHARED, address, mask)
<> 135:176b8275d35d 83
<> 135:176b8275d35d 84 /** Set the selected bits to 1 at the target address.
<> 135:176b8275d35d 85 *
<> 135:176b8275d35d 86 * Equivalent to: `*address |= mask`.
<> 135:176b8275d35d 87 * @param address[in] Target address
<> 135:176b8275d35d 88 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 89 */
<> 135:176b8275d35d 90 #define SECURE_BITS_SET(address, mask) \
<> 138:093f2bd7b9eb 91 UVISOR_BITS_SET(public_box, UVISOR_RGW_SHARED, address, mask)
<> 135:176b8275d35d 92
<> 135:176b8275d35d 93 /** Clear the selected bits at the target address.
<> 135:176b8275d35d 94 *
<> 135:176b8275d35d 95 * Equivalent to: `*address &= ~mask`.
<> 135:176b8275d35d 96 * @param address[in] Target address
<> 135:176b8275d35d 97 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 98 */
<> 135:176b8275d35d 99 #define SECURE_BITS_CLEAR(address, mask) \
<> 138:093f2bd7b9eb 100 UVISOR_BITS_CLEAR(public_box, UVISOR_RGW_SHARED, address, mask)
<> 135:176b8275d35d 101
<> 135:176b8275d35d 102 /** Set the selected bits at the target address to the given value.
<> 135:176b8275d35d 103 *
<> 135:176b8275d35d 104 * Equivalent to: `*address = (*address & ~mask) | (value & mask)`.
<> 135:176b8275d35d 105 * @param address[in] Target address
<> 135:176b8275d35d 106 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 107 * @param value[in] Value to write at the address location. Note: The value
<> 135:176b8275d35d 108 * must be already shifted to the correct bit position
<> 135:176b8275d35d 109 */
<> 135:176b8275d35d 110 #define SECURE_BITS_SET_VALUE(address, mask, value) \
<> 138:093f2bd7b9eb 111 UVISOR_BITS_SET_VALUE(public_box, UVISOR_RGW_SHARED, address, mask, value)
<> 135:176b8275d35d 112
<> 135:176b8275d35d 113 /** Toggle the selected bits at the target address.
<> 135:176b8275d35d 114 *
<> 135:176b8275d35d 115 * Equivalent to: `*address ^= mask`.
<> 135:176b8275d35d 116 * @param address[in] Target address
<> 135:176b8275d35d 117 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 118 */
<> 135:176b8275d35d 119 #define SECURE_BITS_TOGGLE(address, mask) \
<> 138:093f2bd7b9eb 120 UVISOR_BITS_TOGGLE(public_box, UVISOR_RGW_SHARED, address, mask)
<> 135:176b8275d35d 121
<> 135:176b8275d35d 122 #else
<> 135:176b8275d35d 123
<> 135:176b8275d35d 124 /* Insecure fallback implementation. */
<> 135:176b8275d35d 125
<> 135:176b8275d35d 126 /** Set the value at the target address.
<> 135:176b8275d35d 127 *
<> 135:176b8275d35d 128 * Equivalent to: `*address = value`.
<> 135:176b8275d35d 129 * @param address[in] Target address
<> 135:176b8275d35d 130 * @param value[in] Value to write at the address location.
<> 135:176b8275d35d 131 */
<> 135:176b8275d35d 132 #define SECURE_WRITE(address, value) \
<> 135:176b8275d35d 133 *(address) = (value)
<> 135:176b8275d35d 134
<> 135:176b8275d35d 135 /** Get the value at the target address.
<> 135:176b8275d35d 136 *
<> 135:176b8275d35d 137 * @param address[in] Target address
<> 135:176b8275d35d 138 * @returns The value `*address`.
<> 135:176b8275d35d 139 */
<> 135:176b8275d35d 140 #define SECURE_READ(address) \
<> 135:176b8275d35d 141 (*(address))
<> 135:176b8275d35d 142
<> 135:176b8275d35d 143 /** Get the selected bits at the target address.
<> 135:176b8275d35d 144 *
<> 135:176b8275d35d 145 * @param address[in] Target address
<> 135:176b8275d35d 146 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 147 * @returns The value `*address & mask`.
<> 135:176b8275d35d 148 */
<> 135:176b8275d35d 149 #define SECURE_BITS_GET(address, mask) \
<> 135:176b8275d35d 150 (*(address) & (mask))
<> 135:176b8275d35d 151
<> 135:176b8275d35d 152 /** Check the selected bits at the target address.
<> 135:176b8275d35d 153 *
<> 135:176b8275d35d 154 * @param address[in] Address at which to check the bits
<> 135:176b8275d35d 155 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 156 * @returns The value `((*address & mask) == mask)`.
<> 135:176b8275d35d 157 */
<> 135:176b8275d35d 158 #define SECURE_BITS_CHECK(address, mask) \
<> 135:176b8275d35d 159 ((*(address) & (mask)) == (mask))
<> 135:176b8275d35d 160
<> 135:176b8275d35d 161 /** Set the selected bits to 1 at the target address.
<> 135:176b8275d35d 162 *
<> 135:176b8275d35d 163 * Equivalent to: `*address |= mask`.
<> 135:176b8275d35d 164 * @param address[in] Target address
<> 135:176b8275d35d 165 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 166 */
<> 135:176b8275d35d 167 #define SECURE_BITS_SET(address, mask) \
<> 135:176b8275d35d 168 *(address) |= (mask)
<> 135:176b8275d35d 169
<> 135:176b8275d35d 170 /** Clear the selected bits at the target address.
<> 135:176b8275d35d 171 *
<> 135:176b8275d35d 172 * Equivalent to: `*address &= ~mask`.
<> 135:176b8275d35d 173 * @param address[in] Target address
<> 135:176b8275d35d 174 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 175 */
<> 135:176b8275d35d 176 #define SECURE_BITS_CLEAR(address, mask) \
<> 135:176b8275d35d 177 *(address) &= ~(mask)
<> 135:176b8275d35d 178
<> 135:176b8275d35d 179 /** Set the selected bits at the target address to the given value.
<> 135:176b8275d35d 180 *
<> 135:176b8275d35d 181 * Equivalent to: `*address = (*address & ~mask) | (value & mask)`.
<> 135:176b8275d35d 182 * @param address[in] Target address
<> 135:176b8275d35d 183 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 184 * @param value[in] Value to write at the address location. Note: The value
<> 135:176b8275d35d 185 * must be already shifted to the correct bit position
<> 135:176b8275d35d 186 */
<> 135:176b8275d35d 187 #define SECURE_BITS_SET_VALUE(address, mask, value) \
<> 135:176b8275d35d 188 *(address) = (*(address) & ~(mask)) | ((value) & (mask))
<> 135:176b8275d35d 189
<> 135:176b8275d35d 190 /** Toggle the selected bits at the target address.
<> 135:176b8275d35d 191 *
<> 135:176b8275d35d 192 * Equivalent to: `*address ^= mask`.
<> 135:176b8275d35d 193 * @param address[in] Target address
<> 135:176b8275d35d 194 * @param mask[in] Bits to select out of the target address
<> 135:176b8275d35d 195 */
<> 135:176b8275d35d 196 #define SECURE_BITS_TOGGLE(address, mask) \
<> 135:176b8275d35d 197 *(address) ^= (mask)
<> 135:176b8275d35d 198
<> 135:176b8275d35d 199 #endif
<> 135:176b8275d35d 200
<> 135:176b8275d35d 201 #endif /* __CORE_CM_SECURE_ACCESS_H */