mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MAX32620HSP/core_cmFunc.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
125:2e9cc70d1897 
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 125:2e9cc70d1897 1 /**************************************************************************//**
AnnaBridge 125:2e9cc70d1897 2 * @file core_cmFunc.h
AnnaBridge 125:2e9cc70d1897 3 * @brief CMSIS Cortex-M Core Function Access Header File
AnnaBridge 125:2e9cc70d1897 4 * @version V4.10
AnnaBridge 125:2e9cc70d1897 5 * @date 18. March 2015
AnnaBridge 125:2e9cc70d1897 6 *
AnnaBridge 125:2e9cc70d1897 7 * @note
AnnaBridge 125:2e9cc70d1897 8 *
AnnaBridge 125:2e9cc70d1897 9 ******************************************************************************/
AnnaBridge 125:2e9cc70d1897 10 /* Copyright (c) 2009 - 2015 ARM LIMITED
AnnaBridge 125:2e9cc70d1897 11
AnnaBridge 125:2e9cc70d1897 12 All rights reserved.
AnnaBridge 125:2e9cc70d1897 13 Redistribution and use in source and binary forms, with or without
AnnaBridge 125:2e9cc70d1897 14 modification, are permitted provided that the following conditions are met:
AnnaBridge 125:2e9cc70d1897 15 - Redistributions of source code must retain the above copyright
AnnaBridge 125:2e9cc70d1897 16 notice, this list of conditions and the following disclaimer.
AnnaBridge 125:2e9cc70d1897 17 - Redistributions in binary form must reproduce the above copyright
AnnaBridge 125:2e9cc70d1897 18 notice, this list of conditions and the following disclaimer in the
AnnaBridge 125:2e9cc70d1897 19 documentation and/or other materials provided with the distribution.
AnnaBridge 125:2e9cc70d1897 20 - Neither the name of ARM nor the names of its contributors may be used
AnnaBridge 125:2e9cc70d1897 21 to endorse or promote products derived from this software without
AnnaBridge 125:2e9cc70d1897 22 specific prior written permission.
AnnaBridge 125:2e9cc70d1897 23 *
AnnaBridge 125:2e9cc70d1897 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 125:2e9cc70d1897 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 125:2e9cc70d1897 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
AnnaBridge 125:2e9cc70d1897 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
AnnaBridge 125:2e9cc70d1897 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
AnnaBridge 125:2e9cc70d1897 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
AnnaBridge 125:2e9cc70d1897 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
AnnaBridge 125:2e9cc70d1897 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
AnnaBridge 125:2e9cc70d1897 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
AnnaBridge 125:2e9cc70d1897 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
AnnaBridge 125:2e9cc70d1897 34 POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 125:2e9cc70d1897 35 ---------------------------------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 36
AnnaBridge 125:2e9cc70d1897 37
AnnaBridge 125:2e9cc70d1897 38 #ifndef __CORE_CMFUNC_H
AnnaBridge 125:2e9cc70d1897 39 #define __CORE_CMFUNC_H
AnnaBridge 125:2e9cc70d1897 40
AnnaBridge 125:2e9cc70d1897 41
AnnaBridge 125:2e9cc70d1897 42 /* ########################### Core Function Access ########################### */
AnnaBridge 125:2e9cc70d1897 43 /** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge 125:2e9cc70d1897 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge 125:2e9cc70d1897 45 @{
AnnaBridge 125:2e9cc70d1897 46 */
AnnaBridge 125:2e9cc70d1897 47
AnnaBridge 125:2e9cc70d1897 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
AnnaBridge 125:2e9cc70d1897 49 /* ARM armcc specific functions */
AnnaBridge 125:2e9cc70d1897 50
AnnaBridge 125:2e9cc70d1897 51 #if (__ARMCC_VERSION < 400677)
AnnaBridge 125:2e9cc70d1897 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
AnnaBridge 125:2e9cc70d1897 53 #endif
AnnaBridge 125:2e9cc70d1897 54
AnnaBridge 125:2e9cc70d1897 55 /* intrinsic void __enable_irq(); */
AnnaBridge 125:2e9cc70d1897 56 /* intrinsic void __disable_irq(); */
AnnaBridge 125:2e9cc70d1897 57
AnnaBridge 125:2e9cc70d1897 58 /** \brief Get Control Register
AnnaBridge 125:2e9cc70d1897 59
AnnaBridge 125:2e9cc70d1897 60 This function returns the content of the Control Register.
AnnaBridge 125:2e9cc70d1897 61
AnnaBridge 125:2e9cc70d1897 62 \return Control Register value
AnnaBridge 125:2e9cc70d1897 63 */
AnnaBridge 125:2e9cc70d1897 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 125:2e9cc70d1897 65 {
AnnaBridge 125:2e9cc70d1897 66 register uint32_t __regControl __ASM("control");
AnnaBridge 125:2e9cc70d1897 67 return(__regControl);
AnnaBridge 125:2e9cc70d1897 68 }
AnnaBridge 125:2e9cc70d1897 69
AnnaBridge 125:2e9cc70d1897 70
AnnaBridge 125:2e9cc70d1897 71 /** \brief Set Control Register
AnnaBridge 125:2e9cc70d1897 72
AnnaBridge 125:2e9cc70d1897 73 This function writes the given value to the Control Register.
AnnaBridge 125:2e9cc70d1897 74
AnnaBridge 125:2e9cc70d1897 75 \param [in] control Control Register value to set
AnnaBridge 125:2e9cc70d1897 76 */
AnnaBridge 125:2e9cc70d1897 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 125:2e9cc70d1897 78 {
AnnaBridge 125:2e9cc70d1897 79 register uint32_t __regControl __ASM("control");
AnnaBridge 125:2e9cc70d1897 80 __regControl = control;
AnnaBridge 125:2e9cc70d1897 81 }
AnnaBridge 125:2e9cc70d1897 82
AnnaBridge 125:2e9cc70d1897 83
AnnaBridge 125:2e9cc70d1897 84 /** \brief Get IPSR Register
AnnaBridge 125:2e9cc70d1897 85
AnnaBridge 125:2e9cc70d1897 86 This function returns the content of the IPSR Register.
AnnaBridge 125:2e9cc70d1897 87
AnnaBridge 125:2e9cc70d1897 88 \return IPSR Register value
AnnaBridge 125:2e9cc70d1897 89 */
AnnaBridge 125:2e9cc70d1897 90 __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 125:2e9cc70d1897 91 {
AnnaBridge 125:2e9cc70d1897 92 register uint32_t __regIPSR __ASM("ipsr");
AnnaBridge 125:2e9cc70d1897 93 return(__regIPSR);
AnnaBridge 125:2e9cc70d1897 94 }
AnnaBridge 125:2e9cc70d1897 95
AnnaBridge 125:2e9cc70d1897 96
AnnaBridge 125:2e9cc70d1897 97 /** \brief Get APSR Register
AnnaBridge 125:2e9cc70d1897 98
AnnaBridge 125:2e9cc70d1897 99 This function returns the content of the APSR Register.
AnnaBridge 125:2e9cc70d1897 100
AnnaBridge 125:2e9cc70d1897 101 \return APSR Register value
AnnaBridge 125:2e9cc70d1897 102 */
AnnaBridge 125:2e9cc70d1897 103 __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 125:2e9cc70d1897 104 {
AnnaBridge 125:2e9cc70d1897 105 register uint32_t __regAPSR __ASM("apsr");
AnnaBridge 125:2e9cc70d1897 106 return(__regAPSR);
AnnaBridge 125:2e9cc70d1897 107 }
AnnaBridge 125:2e9cc70d1897 108
AnnaBridge 125:2e9cc70d1897 109
AnnaBridge 125:2e9cc70d1897 110 /** \brief Get xPSR Register
AnnaBridge 125:2e9cc70d1897 111
AnnaBridge 125:2e9cc70d1897 112 This function returns the content of the xPSR Register.
AnnaBridge 125:2e9cc70d1897 113
AnnaBridge 125:2e9cc70d1897 114 \return xPSR Register value
AnnaBridge 125:2e9cc70d1897 115 */
AnnaBridge 125:2e9cc70d1897 116 __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 125:2e9cc70d1897 117 {
AnnaBridge 125:2e9cc70d1897 118 register uint32_t __regXPSR __ASM("xpsr");
AnnaBridge 125:2e9cc70d1897 119 return(__regXPSR);
AnnaBridge 125:2e9cc70d1897 120 }
AnnaBridge 125:2e9cc70d1897 121
AnnaBridge 125:2e9cc70d1897 122
AnnaBridge 125:2e9cc70d1897 123 /** \brief Get Process Stack Pointer
AnnaBridge 125:2e9cc70d1897 124
AnnaBridge 125:2e9cc70d1897 125 This function returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 125:2e9cc70d1897 126
AnnaBridge 125:2e9cc70d1897 127 \return PSP Register value
AnnaBridge 125:2e9cc70d1897 128 */
AnnaBridge 125:2e9cc70d1897 129 __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 125:2e9cc70d1897 130 {
AnnaBridge 125:2e9cc70d1897 131 register uint32_t __regProcessStackPointer __ASM("psp");
AnnaBridge 125:2e9cc70d1897 132 return(__regProcessStackPointer);
AnnaBridge 125:2e9cc70d1897 133 }
AnnaBridge 125:2e9cc70d1897 134
AnnaBridge 125:2e9cc70d1897 135
AnnaBridge 125:2e9cc70d1897 136 /** \brief Set Process Stack Pointer
AnnaBridge 125:2e9cc70d1897 137
AnnaBridge 125:2e9cc70d1897 138 This function assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 125:2e9cc70d1897 139
AnnaBridge 125:2e9cc70d1897 140 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 125:2e9cc70d1897 141 */
AnnaBridge 125:2e9cc70d1897 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 125:2e9cc70d1897 143 {
AnnaBridge 125:2e9cc70d1897 144 register uint32_t __regProcessStackPointer __ASM("psp");
AnnaBridge 125:2e9cc70d1897 145 __regProcessStackPointer = topOfProcStack;
AnnaBridge 125:2e9cc70d1897 146 }
AnnaBridge 125:2e9cc70d1897 147
AnnaBridge 125:2e9cc70d1897 148
AnnaBridge 125:2e9cc70d1897 149 /** \brief Get Main Stack Pointer
AnnaBridge 125:2e9cc70d1897 150
AnnaBridge 125:2e9cc70d1897 151 This function returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 125:2e9cc70d1897 152
AnnaBridge 125:2e9cc70d1897 153 \return MSP Register value
AnnaBridge 125:2e9cc70d1897 154 */
AnnaBridge 125:2e9cc70d1897 155 __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 125:2e9cc70d1897 156 {
AnnaBridge 125:2e9cc70d1897 157 register uint32_t __regMainStackPointer __ASM("msp");
AnnaBridge 125:2e9cc70d1897 158 return(__regMainStackPointer);
AnnaBridge 125:2e9cc70d1897 159 }
AnnaBridge 125:2e9cc70d1897 160
AnnaBridge 125:2e9cc70d1897 161
AnnaBridge 125:2e9cc70d1897 162 /** \brief Set Main Stack Pointer
AnnaBridge 125:2e9cc70d1897 163
AnnaBridge 125:2e9cc70d1897 164 This function assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 125:2e9cc70d1897 165
AnnaBridge 125:2e9cc70d1897 166 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 125:2e9cc70d1897 167 */
AnnaBridge 125:2e9cc70d1897 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 125:2e9cc70d1897 169 {
AnnaBridge 125:2e9cc70d1897 170 register uint32_t __regMainStackPointer __ASM("msp");
AnnaBridge 125:2e9cc70d1897 171 __regMainStackPointer = topOfMainStack;
AnnaBridge 125:2e9cc70d1897 172 }
AnnaBridge 125:2e9cc70d1897 173
AnnaBridge 125:2e9cc70d1897 174
AnnaBridge 125:2e9cc70d1897 175 /** \brief Get Priority Mask
AnnaBridge 125:2e9cc70d1897 176
AnnaBridge 125:2e9cc70d1897 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 125:2e9cc70d1897 178
AnnaBridge 125:2e9cc70d1897 179 \return Priority Mask value
AnnaBridge 125:2e9cc70d1897 180 */
AnnaBridge 125:2e9cc70d1897 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 125:2e9cc70d1897 182 {
AnnaBridge 125:2e9cc70d1897 183 register uint32_t __regPriMask __ASM("primask");
AnnaBridge 125:2e9cc70d1897 184 return(__regPriMask);
AnnaBridge 125:2e9cc70d1897 185 }
AnnaBridge 125:2e9cc70d1897 186
AnnaBridge 125:2e9cc70d1897 187
AnnaBridge 125:2e9cc70d1897 188 /** \brief Set Priority Mask
AnnaBridge 125:2e9cc70d1897 189
AnnaBridge 125:2e9cc70d1897 190 This function assigns the given value to the Priority Mask Register.
AnnaBridge 125:2e9cc70d1897 191
AnnaBridge 125:2e9cc70d1897 192 \param [in] priMask Priority Mask
AnnaBridge 125:2e9cc70d1897 193 */
AnnaBridge 125:2e9cc70d1897 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 125:2e9cc70d1897 195 {
AnnaBridge 125:2e9cc70d1897 196 register uint32_t __regPriMask __ASM("primask");
AnnaBridge 125:2e9cc70d1897 197 __regPriMask = (priMask);
AnnaBridge 125:2e9cc70d1897 198 }
AnnaBridge 125:2e9cc70d1897 199
AnnaBridge 125:2e9cc70d1897 200
AnnaBridge 125:2e9cc70d1897 201 #if (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
AnnaBridge 125:2e9cc70d1897 202
AnnaBridge 125:2e9cc70d1897 203 /** \brief Enable FIQ
AnnaBridge 125:2e9cc70d1897 204
AnnaBridge 125:2e9cc70d1897 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 125:2e9cc70d1897 206 Can only be executed in Privileged modes.
AnnaBridge 125:2e9cc70d1897 207 */
AnnaBridge 125:2e9cc70d1897 208 #define __enable_fault_irq __enable_fiq
AnnaBridge 125:2e9cc70d1897 209
AnnaBridge 125:2e9cc70d1897 210
AnnaBridge 125:2e9cc70d1897 211 /** \brief Disable FIQ
AnnaBridge 125:2e9cc70d1897 212
AnnaBridge 125:2e9cc70d1897 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 125:2e9cc70d1897 214 Can only be executed in Privileged modes.
AnnaBridge 125:2e9cc70d1897 215 */
AnnaBridge 125:2e9cc70d1897 216 #define __disable_fault_irq __disable_fiq
AnnaBridge 125:2e9cc70d1897 217
AnnaBridge 125:2e9cc70d1897 218
AnnaBridge 125:2e9cc70d1897 219 /** \brief Get Base Priority
AnnaBridge 125:2e9cc70d1897 220
AnnaBridge 125:2e9cc70d1897 221 This function returns the current value of the Base Priority register.
AnnaBridge 125:2e9cc70d1897 222
AnnaBridge 125:2e9cc70d1897 223 \return Base Priority register value
AnnaBridge 125:2e9cc70d1897 224 */
AnnaBridge 125:2e9cc70d1897 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 125:2e9cc70d1897 226 {
AnnaBridge 125:2e9cc70d1897 227 register uint32_t __regBasePri __ASM("basepri");
AnnaBridge 125:2e9cc70d1897 228 return(__regBasePri);
AnnaBridge 125:2e9cc70d1897 229 }
AnnaBridge 125:2e9cc70d1897 230
AnnaBridge 125:2e9cc70d1897 231
AnnaBridge 125:2e9cc70d1897 232 /** \brief Set Base Priority
AnnaBridge 125:2e9cc70d1897 233
AnnaBridge 125:2e9cc70d1897 234 This function assigns the given value to the Base Priority register.
AnnaBridge 125:2e9cc70d1897 235
AnnaBridge 125:2e9cc70d1897 236 \param [in] basePri Base Priority value to set
AnnaBridge 125:2e9cc70d1897 237 */
AnnaBridge 125:2e9cc70d1897 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge 125:2e9cc70d1897 239 {
AnnaBridge 125:2e9cc70d1897 240 register uint32_t __regBasePri __ASM("basepri");
AnnaBridge 125:2e9cc70d1897 241 __regBasePri = (basePri & 0xff);
AnnaBridge 125:2e9cc70d1897 242 }
AnnaBridge 125:2e9cc70d1897 243
AnnaBridge 125:2e9cc70d1897 244
AnnaBridge 125:2e9cc70d1897 245 /** \brief Set Base Priority with condition
AnnaBridge 125:2e9cc70d1897 246
AnnaBridge 125:2e9cc70d1897 247 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 125:2e9cc70d1897 248 or the new value increases the BASEPRI priority level.
AnnaBridge 125:2e9cc70d1897 249
AnnaBridge 125:2e9cc70d1897 250 \param [in] basePri Base Priority value to set
AnnaBridge 125:2e9cc70d1897 251 */
AnnaBridge 125:2e9cc70d1897 252 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge 125:2e9cc70d1897 253 {
AnnaBridge 125:2e9cc70d1897 254 register uint32_t __regBasePriMax __ASM("basepri_max");
AnnaBridge 125:2e9cc70d1897 255 __regBasePriMax = (basePri & 0xff);
AnnaBridge 125:2e9cc70d1897 256 }
AnnaBridge 125:2e9cc70d1897 257
AnnaBridge 125:2e9cc70d1897 258
AnnaBridge 125:2e9cc70d1897 259 /** \brief Get Fault Mask
AnnaBridge 125:2e9cc70d1897 260
AnnaBridge 125:2e9cc70d1897 261 This function returns the current value of the Fault Mask register.
AnnaBridge 125:2e9cc70d1897 262
AnnaBridge 125:2e9cc70d1897 263 \return Fault Mask register value
AnnaBridge 125:2e9cc70d1897 264 */
AnnaBridge 125:2e9cc70d1897 265 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 125:2e9cc70d1897 266 {
AnnaBridge 125:2e9cc70d1897 267 register uint32_t __regFaultMask __ASM("faultmask");
AnnaBridge 125:2e9cc70d1897 268 return(__regFaultMask);
AnnaBridge 125:2e9cc70d1897 269 }
AnnaBridge 125:2e9cc70d1897 270
AnnaBridge 125:2e9cc70d1897 271
AnnaBridge 125:2e9cc70d1897 272 /** \brief Set Fault Mask
AnnaBridge 125:2e9cc70d1897 273
AnnaBridge 125:2e9cc70d1897 274 This function assigns the given value to the Fault Mask register.
AnnaBridge 125:2e9cc70d1897 275
AnnaBridge 125:2e9cc70d1897 276 \param [in] faultMask Fault Mask value to set
AnnaBridge 125:2e9cc70d1897 277 */
AnnaBridge 125:2e9cc70d1897 278 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 125:2e9cc70d1897 279 {
AnnaBridge 125:2e9cc70d1897 280 register uint32_t __regFaultMask __ASM("faultmask");
AnnaBridge 125:2e9cc70d1897 281 __regFaultMask = (faultMask & (uint32_t)1);
AnnaBridge 125:2e9cc70d1897 282 }
AnnaBridge 125:2e9cc70d1897 283
AnnaBridge 125:2e9cc70d1897 284 #endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
AnnaBridge 125:2e9cc70d1897 285
AnnaBridge 125:2e9cc70d1897 286
AnnaBridge 125:2e9cc70d1897 287 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
AnnaBridge 125:2e9cc70d1897 288
AnnaBridge 125:2e9cc70d1897 289 /** \brief Get FPSCR
AnnaBridge 125:2e9cc70d1897 290
AnnaBridge 125:2e9cc70d1897 291 This function returns the current value of the Floating Point Status/Control register.
AnnaBridge 125:2e9cc70d1897 292
AnnaBridge 125:2e9cc70d1897 293 \return Floating Point Status/Control register value
AnnaBridge 125:2e9cc70d1897 294 */
AnnaBridge 125:2e9cc70d1897 295 __STATIC_INLINE uint32_t __get_FPSCR(void)
AnnaBridge 125:2e9cc70d1897 296 {
AnnaBridge 125:2e9cc70d1897 297 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
AnnaBridge 125:2e9cc70d1897 298 register uint32_t __regfpscr __ASM("fpscr");
AnnaBridge 125:2e9cc70d1897 299 return(__regfpscr);
AnnaBridge 125:2e9cc70d1897 300 #else
AnnaBridge 125:2e9cc70d1897 301 return(0);
AnnaBridge 125:2e9cc70d1897 302 #endif
AnnaBridge 125:2e9cc70d1897 303 }
AnnaBridge 125:2e9cc70d1897 304
AnnaBridge 125:2e9cc70d1897 305
AnnaBridge 125:2e9cc70d1897 306 /** \brief Set FPSCR
AnnaBridge 125:2e9cc70d1897 307
AnnaBridge 125:2e9cc70d1897 308 This function assigns the given value to the Floating Point Status/Control register.
AnnaBridge 125:2e9cc70d1897 309
AnnaBridge 125:2e9cc70d1897 310 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 125:2e9cc70d1897 311 */
AnnaBridge 125:2e9cc70d1897 312 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge 125:2e9cc70d1897 313 {
AnnaBridge 125:2e9cc70d1897 314 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
AnnaBridge 125:2e9cc70d1897 315 register uint32_t __regfpscr __ASM("fpscr");
AnnaBridge 125:2e9cc70d1897 316 __regfpscr = (fpscr);
AnnaBridge 125:2e9cc70d1897 317 #endif
AnnaBridge 125:2e9cc70d1897 318 }
AnnaBridge 125:2e9cc70d1897 319
AnnaBridge 125:2e9cc70d1897 320 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
AnnaBridge 125:2e9cc70d1897 321
AnnaBridge 125:2e9cc70d1897 322
AnnaBridge 125:2e9cc70d1897 323 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
AnnaBridge 125:2e9cc70d1897 324 /* GNU gcc specific functions */
AnnaBridge 125:2e9cc70d1897 325
AnnaBridge 125:2e9cc70d1897 326 /** \brief Enable IRQ Interrupts
AnnaBridge 125:2e9cc70d1897 327
AnnaBridge 125:2e9cc70d1897 328 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge 125:2e9cc70d1897 329 Can only be executed in Privileged modes.
AnnaBridge 125:2e9cc70d1897 330 */
AnnaBridge 125:2e9cc70d1897 331 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
AnnaBridge 125:2e9cc70d1897 332 {
AnnaBridge 125:2e9cc70d1897 333 __ASM volatile ("cpsie i" : : : "memory");
AnnaBridge 125:2e9cc70d1897 334 }
AnnaBridge 125:2e9cc70d1897 335
AnnaBridge 125:2e9cc70d1897 336
AnnaBridge 125:2e9cc70d1897 337 /** \brief Disable IRQ Interrupts
AnnaBridge 125:2e9cc70d1897 338
AnnaBridge 125:2e9cc70d1897 339 This function disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge 125:2e9cc70d1897 340 Can only be executed in Privileged modes.
AnnaBridge 125:2e9cc70d1897 341 */
AnnaBridge 125:2e9cc70d1897 342 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
AnnaBridge 125:2e9cc70d1897 343 {
AnnaBridge 125:2e9cc70d1897 344 __ASM volatile ("cpsid i" : : : "memory");
AnnaBridge 125:2e9cc70d1897 345 }
AnnaBridge 125:2e9cc70d1897 346
AnnaBridge 125:2e9cc70d1897 347
AnnaBridge 125:2e9cc70d1897 348 /** \brief Get Control Register
AnnaBridge 125:2e9cc70d1897 349
AnnaBridge 125:2e9cc70d1897 350 This function returns the content of the Control Register.
AnnaBridge 125:2e9cc70d1897 351
AnnaBridge 125:2e9cc70d1897 352 \return Control Register value
AnnaBridge 125:2e9cc70d1897 353 */
AnnaBridge 125:2e9cc70d1897 354 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge 125:2e9cc70d1897 355 {
AnnaBridge 125:2e9cc70d1897 356 uint32_t result;
AnnaBridge 125:2e9cc70d1897 357
AnnaBridge 125:2e9cc70d1897 358 __ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge 125:2e9cc70d1897 359 return(result);
AnnaBridge 125:2e9cc70d1897 360 }
AnnaBridge 125:2e9cc70d1897 361
AnnaBridge 125:2e9cc70d1897 362
AnnaBridge 125:2e9cc70d1897 363 /** \brief Set Control Register
AnnaBridge 125:2e9cc70d1897 364
AnnaBridge 125:2e9cc70d1897 365 This function writes the given value to the Control Register.
AnnaBridge 125:2e9cc70d1897 366
AnnaBridge 125:2e9cc70d1897 367 \param [in] control Control Register value to set
AnnaBridge 125:2e9cc70d1897 368 */
AnnaBridge 125:2e9cc70d1897 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge 125:2e9cc70d1897 370 {
AnnaBridge 125:2e9cc70d1897 371 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge 125:2e9cc70d1897 372 }
AnnaBridge 125:2e9cc70d1897 373
AnnaBridge 125:2e9cc70d1897 374
AnnaBridge 125:2e9cc70d1897 375 /** \brief Get IPSR Register
AnnaBridge 125:2e9cc70d1897 376
AnnaBridge 125:2e9cc70d1897 377 This function returns the content of the IPSR Register.
AnnaBridge 125:2e9cc70d1897 378
AnnaBridge 125:2e9cc70d1897 379 \return IPSR Register value
AnnaBridge 125:2e9cc70d1897 380 */
AnnaBridge 125:2e9cc70d1897 381 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge 125:2e9cc70d1897 382 {
AnnaBridge 125:2e9cc70d1897 383 uint32_t result;
AnnaBridge 125:2e9cc70d1897 384
AnnaBridge 125:2e9cc70d1897 385 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge 125:2e9cc70d1897 386 return(result);
AnnaBridge 125:2e9cc70d1897 387 }
AnnaBridge 125:2e9cc70d1897 388
AnnaBridge 125:2e9cc70d1897 389
AnnaBridge 125:2e9cc70d1897 390 /** \brief Get APSR Register
AnnaBridge 125:2e9cc70d1897 391
AnnaBridge 125:2e9cc70d1897 392 This function returns the content of the APSR Register.
AnnaBridge 125:2e9cc70d1897 393
AnnaBridge 125:2e9cc70d1897 394 \return APSR Register value
AnnaBridge 125:2e9cc70d1897 395 */
AnnaBridge 125:2e9cc70d1897 396 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 125:2e9cc70d1897 397 {
AnnaBridge 125:2e9cc70d1897 398 uint32_t result;
AnnaBridge 125:2e9cc70d1897 399
AnnaBridge 125:2e9cc70d1897 400 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge 125:2e9cc70d1897 401 return(result);
AnnaBridge 125:2e9cc70d1897 402 }
AnnaBridge 125:2e9cc70d1897 403
AnnaBridge 125:2e9cc70d1897 404
AnnaBridge 125:2e9cc70d1897 405 /** \brief Get xPSR Register
AnnaBridge 125:2e9cc70d1897 406
AnnaBridge 125:2e9cc70d1897 407 This function returns the content of the xPSR Register.
AnnaBridge 125:2e9cc70d1897 408
AnnaBridge 125:2e9cc70d1897 409 \return xPSR Register value
AnnaBridge 125:2e9cc70d1897 410 */
AnnaBridge 125:2e9cc70d1897 411 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge 125:2e9cc70d1897 412 {
AnnaBridge 125:2e9cc70d1897 413 uint32_t result;
AnnaBridge 125:2e9cc70d1897 414
AnnaBridge 125:2e9cc70d1897 415 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge 125:2e9cc70d1897 416 return(result);
AnnaBridge 125:2e9cc70d1897 417 }
AnnaBridge 125:2e9cc70d1897 418
AnnaBridge 125:2e9cc70d1897 419
AnnaBridge 125:2e9cc70d1897 420 /** \brief Get Process Stack Pointer
AnnaBridge 125:2e9cc70d1897 421
AnnaBridge 125:2e9cc70d1897 422 This function returns the current value of the Process Stack Pointer (PSP).
AnnaBridge 125:2e9cc70d1897 423
AnnaBridge 125:2e9cc70d1897 424 \return PSP Register value
AnnaBridge 125:2e9cc70d1897 425 */
AnnaBridge 125:2e9cc70d1897 426 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge 125:2e9cc70d1897 427 {
AnnaBridge 125:2e9cc70d1897 428 register uint32_t result;
AnnaBridge 125:2e9cc70d1897 429
AnnaBridge 125:2e9cc70d1897 430 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
AnnaBridge 125:2e9cc70d1897 431 return(result);
AnnaBridge 125:2e9cc70d1897 432 }
AnnaBridge 125:2e9cc70d1897 433
AnnaBridge 125:2e9cc70d1897 434
AnnaBridge 125:2e9cc70d1897 435 /** \brief Set Process Stack Pointer
AnnaBridge 125:2e9cc70d1897 436
AnnaBridge 125:2e9cc70d1897 437 This function assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge 125:2e9cc70d1897 438
AnnaBridge 125:2e9cc70d1897 439 \param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge 125:2e9cc70d1897 440 */
AnnaBridge 125:2e9cc70d1897 441 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge 125:2e9cc70d1897 442 {
AnnaBridge 125:2e9cc70d1897 443 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
AnnaBridge 125:2e9cc70d1897 444 }
AnnaBridge 125:2e9cc70d1897 445
AnnaBridge 125:2e9cc70d1897 446
AnnaBridge 125:2e9cc70d1897 447 /** \brief Get Main Stack Pointer
AnnaBridge 125:2e9cc70d1897 448
AnnaBridge 125:2e9cc70d1897 449 This function returns the current value of the Main Stack Pointer (MSP).
AnnaBridge 125:2e9cc70d1897 450
AnnaBridge 125:2e9cc70d1897 451 \return MSP Register value
AnnaBridge 125:2e9cc70d1897 452 */
AnnaBridge 125:2e9cc70d1897 453 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge 125:2e9cc70d1897 454 {
AnnaBridge 125:2e9cc70d1897 455 register uint32_t result;
AnnaBridge 125:2e9cc70d1897 456
AnnaBridge 125:2e9cc70d1897 457 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
AnnaBridge 125:2e9cc70d1897 458 return(result);
AnnaBridge 125:2e9cc70d1897 459 }
AnnaBridge 125:2e9cc70d1897 460
AnnaBridge 125:2e9cc70d1897 461
AnnaBridge 125:2e9cc70d1897 462 /** \brief Set Main Stack Pointer
AnnaBridge 125:2e9cc70d1897 463
AnnaBridge 125:2e9cc70d1897 464 This function assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge 125:2e9cc70d1897 465
AnnaBridge 125:2e9cc70d1897 466 \param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge 125:2e9cc70d1897 467 */
AnnaBridge 125:2e9cc70d1897 468 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge 125:2e9cc70d1897 469 {
AnnaBridge 125:2e9cc70d1897 470 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
AnnaBridge 125:2e9cc70d1897 471 }
AnnaBridge 125:2e9cc70d1897 472
AnnaBridge 125:2e9cc70d1897 473
AnnaBridge 125:2e9cc70d1897 474 /** \brief Get Priority Mask
AnnaBridge 125:2e9cc70d1897 475
AnnaBridge 125:2e9cc70d1897 476 This function returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge 125:2e9cc70d1897 477
AnnaBridge 125:2e9cc70d1897 478 \return Priority Mask value
AnnaBridge 125:2e9cc70d1897 479 */
AnnaBridge 125:2e9cc70d1897 480 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge 125:2e9cc70d1897 481 {
AnnaBridge 125:2e9cc70d1897 482 uint32_t result;
AnnaBridge 125:2e9cc70d1897 483
AnnaBridge 125:2e9cc70d1897 484 __ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge 125:2e9cc70d1897 485 return(result);
AnnaBridge 125:2e9cc70d1897 486 }
AnnaBridge 125:2e9cc70d1897 487
AnnaBridge 125:2e9cc70d1897 488
AnnaBridge 125:2e9cc70d1897 489 /** \brief Set Priority Mask
AnnaBridge 125:2e9cc70d1897 490
AnnaBridge 125:2e9cc70d1897 491 This function assigns the given value to the Priority Mask Register.
AnnaBridge 125:2e9cc70d1897 492
AnnaBridge 125:2e9cc70d1897 493 \param [in] priMask Priority Mask
AnnaBridge 125:2e9cc70d1897 494 */
AnnaBridge 125:2e9cc70d1897 495 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge 125:2e9cc70d1897 496 {
AnnaBridge 125:2e9cc70d1897 497 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge 125:2e9cc70d1897 498 }
AnnaBridge 125:2e9cc70d1897 499
AnnaBridge 125:2e9cc70d1897 500
AnnaBridge 125:2e9cc70d1897 501 #if (__CORTEX_M >= 0x03)
AnnaBridge 125:2e9cc70d1897 502
AnnaBridge 125:2e9cc70d1897 503 /** \brief Enable FIQ
AnnaBridge 125:2e9cc70d1897 504
AnnaBridge 125:2e9cc70d1897 505 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge 125:2e9cc70d1897 506 Can only be executed in Privileged modes.
AnnaBridge 125:2e9cc70d1897 507 */
AnnaBridge 125:2e9cc70d1897 508 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
AnnaBridge 125:2e9cc70d1897 509 {
AnnaBridge 125:2e9cc70d1897 510 __ASM volatile ("cpsie f" : : : "memory");
AnnaBridge 125:2e9cc70d1897 511 }
AnnaBridge 125:2e9cc70d1897 512
AnnaBridge 125:2e9cc70d1897 513
AnnaBridge 125:2e9cc70d1897 514 /** \brief Disable FIQ
AnnaBridge 125:2e9cc70d1897 515
AnnaBridge 125:2e9cc70d1897 516 This function disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge 125:2e9cc70d1897 517 Can only be executed in Privileged modes.
AnnaBridge 125:2e9cc70d1897 518 */
AnnaBridge 125:2e9cc70d1897 519 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
AnnaBridge 125:2e9cc70d1897 520 {
AnnaBridge 125:2e9cc70d1897 521 __ASM volatile ("cpsid f" : : : "memory");
AnnaBridge 125:2e9cc70d1897 522 }
AnnaBridge 125:2e9cc70d1897 523
AnnaBridge 125:2e9cc70d1897 524
AnnaBridge 125:2e9cc70d1897 525 /** \brief Get Base Priority
AnnaBridge 125:2e9cc70d1897 526
AnnaBridge 125:2e9cc70d1897 527 This function returns the current value of the Base Priority register.
AnnaBridge 125:2e9cc70d1897 528
AnnaBridge 125:2e9cc70d1897 529 \return Base Priority register value
AnnaBridge 125:2e9cc70d1897 530 */
AnnaBridge 125:2e9cc70d1897 531 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge 125:2e9cc70d1897 532 {
AnnaBridge 125:2e9cc70d1897 533 uint32_t result;
AnnaBridge 125:2e9cc70d1897 534
AnnaBridge 125:2e9cc70d1897 535 __ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge 125:2e9cc70d1897 536 return(result);
AnnaBridge 125:2e9cc70d1897 537 }
AnnaBridge 125:2e9cc70d1897 538
AnnaBridge 125:2e9cc70d1897 539
AnnaBridge 125:2e9cc70d1897 540 /** \brief Set Base Priority
AnnaBridge 125:2e9cc70d1897 541
AnnaBridge 125:2e9cc70d1897 542 This function assigns the given value to the Base Priority register.
AnnaBridge 125:2e9cc70d1897 543
AnnaBridge 125:2e9cc70d1897 544 \param [in] basePri Base Priority value to set
AnnaBridge 125:2e9cc70d1897 545 */
AnnaBridge 125:2e9cc70d1897 546 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
AnnaBridge 125:2e9cc70d1897 547 {
AnnaBridge 125:2e9cc70d1897 548 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
AnnaBridge 125:2e9cc70d1897 549 }
AnnaBridge 125:2e9cc70d1897 550
AnnaBridge 125:2e9cc70d1897 551
AnnaBridge 125:2e9cc70d1897 552 /** \brief Set Base Priority with condition
AnnaBridge 125:2e9cc70d1897 553
AnnaBridge 125:2e9cc70d1897 554 This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge 125:2e9cc70d1897 555 or the new value increases the BASEPRI priority level.
AnnaBridge 125:2e9cc70d1897 556
AnnaBridge 125:2e9cc70d1897 557 \param [in] basePri Base Priority value to set
AnnaBridge 125:2e9cc70d1897 558 */
AnnaBridge 125:2e9cc70d1897 559 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
AnnaBridge 125:2e9cc70d1897 560 {
AnnaBridge 125:2e9cc70d1897 561 __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
AnnaBridge 125:2e9cc70d1897 562 }
AnnaBridge 125:2e9cc70d1897 563
AnnaBridge 125:2e9cc70d1897 564
AnnaBridge 125:2e9cc70d1897 565 /** \brief Get Fault Mask
AnnaBridge 125:2e9cc70d1897 566
AnnaBridge 125:2e9cc70d1897 567 This function returns the current value of the Fault Mask register.
AnnaBridge 125:2e9cc70d1897 568
AnnaBridge 125:2e9cc70d1897 569 \return Fault Mask register value
AnnaBridge 125:2e9cc70d1897 570 */
AnnaBridge 125:2e9cc70d1897 571 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge 125:2e9cc70d1897 572 {
AnnaBridge 125:2e9cc70d1897 573 uint32_t result;
AnnaBridge 125:2e9cc70d1897 574
AnnaBridge 125:2e9cc70d1897 575 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge 125:2e9cc70d1897 576 return(result);
AnnaBridge 125:2e9cc70d1897 577 }
AnnaBridge 125:2e9cc70d1897 578
AnnaBridge 125:2e9cc70d1897 579
AnnaBridge 125:2e9cc70d1897 580 /** \brief Set Fault Mask
AnnaBridge 125:2e9cc70d1897 581
AnnaBridge 125:2e9cc70d1897 582 This function assigns the given value to the Fault Mask register.
AnnaBridge 125:2e9cc70d1897 583
AnnaBridge 125:2e9cc70d1897 584 \param [in] faultMask Fault Mask value to set
AnnaBridge 125:2e9cc70d1897 585 */
AnnaBridge 125:2e9cc70d1897 586 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge 125:2e9cc70d1897 587 {
AnnaBridge 125:2e9cc70d1897 588 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge 125:2e9cc70d1897 589 }
AnnaBridge 125:2e9cc70d1897 590
AnnaBridge 125:2e9cc70d1897 591 #endif /* (__CORTEX_M >= 0x03) */
AnnaBridge 125:2e9cc70d1897 592
AnnaBridge 125:2e9cc70d1897 593
AnnaBridge 125:2e9cc70d1897 594 #if (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
AnnaBridge 125:2e9cc70d1897 595
AnnaBridge 125:2e9cc70d1897 596 /** \brief Get FPSCR
AnnaBridge 125:2e9cc70d1897 597
AnnaBridge 125:2e9cc70d1897 598 This function returns the current value of the Floating Point Status/Control register.
AnnaBridge 125:2e9cc70d1897 599
AnnaBridge 125:2e9cc70d1897 600 \return Floating Point Status/Control register value
AnnaBridge 125:2e9cc70d1897 601 */
AnnaBridge 125:2e9cc70d1897 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
AnnaBridge 125:2e9cc70d1897 603 {
AnnaBridge 125:2e9cc70d1897 604 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
AnnaBridge 125:2e9cc70d1897 605 uint32_t result;
AnnaBridge 125:2e9cc70d1897 606
AnnaBridge 125:2e9cc70d1897 607 /* Empty asm statement works as a scheduling barrier */
AnnaBridge 125:2e9cc70d1897 608 __ASM volatile ("");
AnnaBridge 125:2e9cc70d1897 609 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge 125:2e9cc70d1897 610 __ASM volatile ("");
AnnaBridge 125:2e9cc70d1897 611 return(result);
AnnaBridge 125:2e9cc70d1897 612 #else
AnnaBridge 125:2e9cc70d1897 613 return(0);
AnnaBridge 125:2e9cc70d1897 614 #endif
AnnaBridge 125:2e9cc70d1897 615 }
AnnaBridge 125:2e9cc70d1897 616
AnnaBridge 125:2e9cc70d1897 617
AnnaBridge 125:2e9cc70d1897 618 /** \brief Set FPSCR
AnnaBridge 125:2e9cc70d1897 619
AnnaBridge 125:2e9cc70d1897 620 This function assigns the given value to the Floating Point Status/Control register.
AnnaBridge 125:2e9cc70d1897 621
AnnaBridge 125:2e9cc70d1897 622 \param [in] fpscr Floating Point Status/Control value to set
AnnaBridge 125:2e9cc70d1897 623 */
AnnaBridge 125:2e9cc70d1897 624 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge 125:2e9cc70d1897 625 {
AnnaBridge 125:2e9cc70d1897 626 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
AnnaBridge 125:2e9cc70d1897 627 /* Empty asm statement works as a scheduling barrier */
AnnaBridge 125:2e9cc70d1897 628 __ASM volatile ("");
AnnaBridge 125:2e9cc70d1897 629 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
AnnaBridge 125:2e9cc70d1897 630 __ASM volatile ("");
AnnaBridge 125:2e9cc70d1897 631 #endif
AnnaBridge 125:2e9cc70d1897 632 }
AnnaBridge 125:2e9cc70d1897 633
AnnaBridge 125:2e9cc70d1897 634 #endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
AnnaBridge 125:2e9cc70d1897 635
AnnaBridge 125:2e9cc70d1897 636
AnnaBridge 125:2e9cc70d1897 637 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
AnnaBridge 125:2e9cc70d1897 638 /* IAR iccarm specific functions */
AnnaBridge 125:2e9cc70d1897 639 #include <cmsis_iar.h>
AnnaBridge 125:2e9cc70d1897 640
AnnaBridge 125:2e9cc70d1897 641
AnnaBridge 125:2e9cc70d1897 642 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
AnnaBridge 125:2e9cc70d1897 643 /* TI CCS specific functions */
AnnaBridge 125:2e9cc70d1897 644 #include <cmsis_ccs.h>
AnnaBridge 125:2e9cc70d1897 645
AnnaBridge 125:2e9cc70d1897 646
AnnaBridge 125:2e9cc70d1897 647 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
AnnaBridge 125:2e9cc70d1897 648 /* TASKING carm specific functions */
AnnaBridge 125:2e9cc70d1897 649 /*
AnnaBridge 125:2e9cc70d1897 650 * The CMSIS functions have been implemented as intrinsics in the compiler.
AnnaBridge 125:2e9cc70d1897 651 * Please use "carm -?i" to get an up to date list of all intrinsics,
AnnaBridge 125:2e9cc70d1897 652 * Including the CMSIS ones.
AnnaBridge 125:2e9cc70d1897 653 */
AnnaBridge 125:2e9cc70d1897 654
AnnaBridge 125:2e9cc70d1897 655
AnnaBridge 125:2e9cc70d1897 656 #elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
AnnaBridge 125:2e9cc70d1897 657 /* Cosmic specific functions */
AnnaBridge 125:2e9cc70d1897 658 #include <cmsis_csm.h>
AnnaBridge 125:2e9cc70d1897 659
AnnaBridge 125:2e9cc70d1897 660 #endif
AnnaBridge 125:2e9cc70d1897 661
AnnaBridge 125:2e9cc70d1897 662 /*@} end of CMSIS_Core_RegAccFunctions */
AnnaBridge 125:2e9cc70d1897 663
AnnaBridge 125:2e9cc70d1897 664 #endif /* __CORE_CMFUNC_H */