mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_MAX32620HSP/core_cm4_simd.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
125:2e9cc70d1897 
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 125:2e9cc70d1897 1 /**************************************************************************//**
AnnaBridge 125:2e9cc70d1897 2 * @file core_cm4_simd.h
AnnaBridge 125:2e9cc70d1897 3 * @brief CMSIS Cortex-M4 SIMD Header File
AnnaBridge 125:2e9cc70d1897 4 * @version V3.20
AnnaBridge 125:2e9cc70d1897 5 * @date 25. February 2013
AnnaBridge 125:2e9cc70d1897 6 *
AnnaBridge 125:2e9cc70d1897 7 * @note
AnnaBridge 125:2e9cc70d1897 8 *
AnnaBridge 125:2e9cc70d1897 9 ******************************************************************************/
AnnaBridge 125:2e9cc70d1897 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
AnnaBridge 125:2e9cc70d1897 11
AnnaBridge 125:2e9cc70d1897 12 All rights reserved.
AnnaBridge 125:2e9cc70d1897 13 Redistribution and use in source and binary forms, with or without
AnnaBridge 125:2e9cc70d1897 14 modification, are permitted provided that the following conditions are met:
AnnaBridge 125:2e9cc70d1897 15 - Redistributions of source code must retain the above copyright
AnnaBridge 125:2e9cc70d1897 16 notice, this list of conditions and the following disclaimer.
AnnaBridge 125:2e9cc70d1897 17 - Redistributions in binary form must reproduce the above copyright
AnnaBridge 125:2e9cc70d1897 18 notice, this list of conditions and the following disclaimer in the
AnnaBridge 125:2e9cc70d1897 19 documentation and/or other materials provided with the distribution.
AnnaBridge 125:2e9cc70d1897 20 - Neither the name of ARM nor the names of its contributors may be used
AnnaBridge 125:2e9cc70d1897 21 to endorse or promote products derived from this software without
AnnaBridge 125:2e9cc70d1897 22 specific prior written permission.
AnnaBridge 125:2e9cc70d1897 23 *
AnnaBridge 125:2e9cc70d1897 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 125:2e9cc70d1897 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 125:2e9cc70d1897 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
AnnaBridge 125:2e9cc70d1897 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
AnnaBridge 125:2e9cc70d1897 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
AnnaBridge 125:2e9cc70d1897 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
AnnaBridge 125:2e9cc70d1897 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
AnnaBridge 125:2e9cc70d1897 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
AnnaBridge 125:2e9cc70d1897 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
AnnaBridge 125:2e9cc70d1897 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
AnnaBridge 125:2e9cc70d1897 34 POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 125:2e9cc70d1897 35 ---------------------------------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 36
AnnaBridge 125:2e9cc70d1897 37
AnnaBridge 125:2e9cc70d1897 38 #ifdef __cplusplus
AnnaBridge 125:2e9cc70d1897 39 extern "C" {
AnnaBridge 125:2e9cc70d1897 40 #endif
AnnaBridge 125:2e9cc70d1897 41
AnnaBridge 125:2e9cc70d1897 42 #ifndef __CORE_CM4_SIMD_H
AnnaBridge 125:2e9cc70d1897 43 #define __CORE_CM4_SIMD_H
AnnaBridge 125:2e9cc70d1897 44
AnnaBridge 125:2e9cc70d1897 45
AnnaBridge 125:2e9cc70d1897 46 /*******************************************************************************
AnnaBridge 125:2e9cc70d1897 47 * Hardware Abstraction Layer
AnnaBridge 125:2e9cc70d1897 48 ******************************************************************************/
AnnaBridge 125:2e9cc70d1897 49
AnnaBridge 125:2e9cc70d1897 50
AnnaBridge 125:2e9cc70d1897 51 /* ################### Compiler specific Intrinsics ########################### */
AnnaBridge 125:2e9cc70d1897 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge 125:2e9cc70d1897 53 Access to dedicated SIMD instructions
AnnaBridge 125:2e9cc70d1897 54 @{
AnnaBridge 125:2e9cc70d1897 55 */
AnnaBridge 125:2e9cc70d1897 56
AnnaBridge 125:2e9cc70d1897 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
AnnaBridge 125:2e9cc70d1897 58 /* ARM armcc specific functions */
AnnaBridge 125:2e9cc70d1897 59
AnnaBridge 125:2e9cc70d1897 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 61 #define __SADD8 __sadd8
AnnaBridge 125:2e9cc70d1897 62 #define __QADD8 __qadd8
AnnaBridge 125:2e9cc70d1897 63 #define __SHADD8 __shadd8
AnnaBridge 125:2e9cc70d1897 64 #define __UADD8 __uadd8
AnnaBridge 125:2e9cc70d1897 65 #define __UQADD8 __uqadd8
AnnaBridge 125:2e9cc70d1897 66 #define __UHADD8 __uhadd8
AnnaBridge 125:2e9cc70d1897 67 #define __SSUB8 __ssub8
AnnaBridge 125:2e9cc70d1897 68 #define __QSUB8 __qsub8
AnnaBridge 125:2e9cc70d1897 69 #define __SHSUB8 __shsub8
AnnaBridge 125:2e9cc70d1897 70 #define __USUB8 __usub8
AnnaBridge 125:2e9cc70d1897 71 #define __UQSUB8 __uqsub8
AnnaBridge 125:2e9cc70d1897 72 #define __UHSUB8 __uhsub8
AnnaBridge 125:2e9cc70d1897 73 #define __SADD16 __sadd16
AnnaBridge 125:2e9cc70d1897 74 #define __QADD16 __qadd16
AnnaBridge 125:2e9cc70d1897 75 #define __SHADD16 __shadd16
AnnaBridge 125:2e9cc70d1897 76 #define __UADD16 __uadd16
AnnaBridge 125:2e9cc70d1897 77 #define __UQADD16 __uqadd16
AnnaBridge 125:2e9cc70d1897 78 #define __UHADD16 __uhadd16
AnnaBridge 125:2e9cc70d1897 79 #define __SSUB16 __ssub16
AnnaBridge 125:2e9cc70d1897 80 #define __QSUB16 __qsub16
AnnaBridge 125:2e9cc70d1897 81 #define __SHSUB16 __shsub16
AnnaBridge 125:2e9cc70d1897 82 #define __USUB16 __usub16
AnnaBridge 125:2e9cc70d1897 83 #define __UQSUB16 __uqsub16
AnnaBridge 125:2e9cc70d1897 84 #define __UHSUB16 __uhsub16
AnnaBridge 125:2e9cc70d1897 85 #define __SASX __sasx
AnnaBridge 125:2e9cc70d1897 86 #define __QASX __qasx
AnnaBridge 125:2e9cc70d1897 87 #define __SHASX __shasx
AnnaBridge 125:2e9cc70d1897 88 #define __UASX __uasx
AnnaBridge 125:2e9cc70d1897 89 #define __UQASX __uqasx
AnnaBridge 125:2e9cc70d1897 90 #define __UHASX __uhasx
AnnaBridge 125:2e9cc70d1897 91 #define __SSAX __ssax
AnnaBridge 125:2e9cc70d1897 92 #define __QSAX __qsax
AnnaBridge 125:2e9cc70d1897 93 #define __SHSAX __shsax
AnnaBridge 125:2e9cc70d1897 94 #define __USAX __usax
AnnaBridge 125:2e9cc70d1897 95 #define __UQSAX __uqsax
AnnaBridge 125:2e9cc70d1897 96 #define __UHSAX __uhsax
AnnaBridge 125:2e9cc70d1897 97 #define __USAD8 __usad8
AnnaBridge 125:2e9cc70d1897 98 #define __USADA8 __usada8
AnnaBridge 125:2e9cc70d1897 99 #define __SSAT16 __ssat16
AnnaBridge 125:2e9cc70d1897 100 #define __USAT16 __usat16
AnnaBridge 125:2e9cc70d1897 101 #define __UXTB16 __uxtb16
AnnaBridge 125:2e9cc70d1897 102 #define __UXTAB16 __uxtab16
AnnaBridge 125:2e9cc70d1897 103 #define __SXTB16 __sxtb16
AnnaBridge 125:2e9cc70d1897 104 #define __SXTAB16 __sxtab16
AnnaBridge 125:2e9cc70d1897 105 #define __SMUAD __smuad
AnnaBridge 125:2e9cc70d1897 106 #define __SMUADX __smuadx
AnnaBridge 125:2e9cc70d1897 107 #define __SMLAD __smlad
AnnaBridge 125:2e9cc70d1897 108 #define __SMLADX __smladx
AnnaBridge 125:2e9cc70d1897 109 #define __SMLALD __smlald
AnnaBridge 125:2e9cc70d1897 110 #define __SMLALDX __smlaldx
AnnaBridge 125:2e9cc70d1897 111 #define __SMUSD __smusd
AnnaBridge 125:2e9cc70d1897 112 #define __SMUSDX __smusdx
AnnaBridge 125:2e9cc70d1897 113 #define __SMLSD __smlsd
AnnaBridge 125:2e9cc70d1897 114 #define __SMLSDX __smlsdx
AnnaBridge 125:2e9cc70d1897 115 #define __SMLSLD __smlsld
AnnaBridge 125:2e9cc70d1897 116 #define __SMLSLDX __smlsldx
AnnaBridge 125:2e9cc70d1897 117 #define __SEL __sel
AnnaBridge 125:2e9cc70d1897 118 #define __QADD __qadd
AnnaBridge 125:2e9cc70d1897 119 #define __QSUB __qsub
AnnaBridge 125:2e9cc70d1897 120
AnnaBridge 125:2e9cc70d1897 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
AnnaBridge 125:2e9cc70d1897 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge 125:2e9cc70d1897 123
AnnaBridge 125:2e9cc70d1897 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
AnnaBridge 125:2e9cc70d1897 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge 125:2e9cc70d1897 126
AnnaBridge 125:2e9cc70d1897 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
AnnaBridge 125:2e9cc70d1897 128 ((int64_t)(ARG3) << 32) ) >> 32))
AnnaBridge 125:2e9cc70d1897 129
AnnaBridge 125:2e9cc70d1897 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 131
AnnaBridge 125:2e9cc70d1897 132
AnnaBridge 125:2e9cc70d1897 133
AnnaBridge 125:2e9cc70d1897 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
AnnaBridge 125:2e9cc70d1897 135 /* IAR iccarm specific functions */
AnnaBridge 125:2e9cc70d1897 136
AnnaBridge 125:2e9cc70d1897 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 138 #include <cmsis_iar.h>
AnnaBridge 125:2e9cc70d1897 139
AnnaBridge 125:2e9cc70d1897 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 141
AnnaBridge 125:2e9cc70d1897 142
AnnaBridge 125:2e9cc70d1897 143
AnnaBridge 125:2e9cc70d1897 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
AnnaBridge 125:2e9cc70d1897 145 /* TI CCS specific functions */
AnnaBridge 125:2e9cc70d1897 146
AnnaBridge 125:2e9cc70d1897 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 148 #include <cmsis_ccs.h>
AnnaBridge 125:2e9cc70d1897 149
AnnaBridge 125:2e9cc70d1897 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 151
AnnaBridge 125:2e9cc70d1897 152
AnnaBridge 125:2e9cc70d1897 153
AnnaBridge 125:2e9cc70d1897 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
AnnaBridge 125:2e9cc70d1897 155 /* GNU gcc specific functions */
AnnaBridge 125:2e9cc70d1897 156
AnnaBridge 125:2e9cc70d1897 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 159 {
AnnaBridge 125:2e9cc70d1897 160 uint32_t result;
AnnaBridge 125:2e9cc70d1897 161
AnnaBridge 125:2e9cc70d1897 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 163 return(result);
AnnaBridge 125:2e9cc70d1897 164 }
AnnaBridge 125:2e9cc70d1897 165
AnnaBridge 125:2e9cc70d1897 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 167 {
AnnaBridge 125:2e9cc70d1897 168 uint32_t result;
AnnaBridge 125:2e9cc70d1897 169
AnnaBridge 125:2e9cc70d1897 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 171 return(result);
AnnaBridge 125:2e9cc70d1897 172 }
AnnaBridge 125:2e9cc70d1897 173
AnnaBridge 125:2e9cc70d1897 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 175 {
AnnaBridge 125:2e9cc70d1897 176 uint32_t result;
AnnaBridge 125:2e9cc70d1897 177
AnnaBridge 125:2e9cc70d1897 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 179 return(result);
AnnaBridge 125:2e9cc70d1897 180 }
AnnaBridge 125:2e9cc70d1897 181
AnnaBridge 125:2e9cc70d1897 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 183 {
AnnaBridge 125:2e9cc70d1897 184 uint32_t result;
AnnaBridge 125:2e9cc70d1897 185
AnnaBridge 125:2e9cc70d1897 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 187 return(result);
AnnaBridge 125:2e9cc70d1897 188 }
AnnaBridge 125:2e9cc70d1897 189
AnnaBridge 125:2e9cc70d1897 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 191 {
AnnaBridge 125:2e9cc70d1897 192 uint32_t result;
AnnaBridge 125:2e9cc70d1897 193
AnnaBridge 125:2e9cc70d1897 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 195 return(result);
AnnaBridge 125:2e9cc70d1897 196 }
AnnaBridge 125:2e9cc70d1897 197
AnnaBridge 125:2e9cc70d1897 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 199 {
AnnaBridge 125:2e9cc70d1897 200 uint32_t result;
AnnaBridge 125:2e9cc70d1897 201
AnnaBridge 125:2e9cc70d1897 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 203 return(result);
AnnaBridge 125:2e9cc70d1897 204 }
AnnaBridge 125:2e9cc70d1897 205
AnnaBridge 125:2e9cc70d1897 206
AnnaBridge 125:2e9cc70d1897 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 208 {
AnnaBridge 125:2e9cc70d1897 209 uint32_t result;
AnnaBridge 125:2e9cc70d1897 210
AnnaBridge 125:2e9cc70d1897 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 212 return(result);
AnnaBridge 125:2e9cc70d1897 213 }
AnnaBridge 125:2e9cc70d1897 214
AnnaBridge 125:2e9cc70d1897 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 216 {
AnnaBridge 125:2e9cc70d1897 217 uint32_t result;
AnnaBridge 125:2e9cc70d1897 218
AnnaBridge 125:2e9cc70d1897 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 220 return(result);
AnnaBridge 125:2e9cc70d1897 221 }
AnnaBridge 125:2e9cc70d1897 222
AnnaBridge 125:2e9cc70d1897 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 224 {
AnnaBridge 125:2e9cc70d1897 225 uint32_t result;
AnnaBridge 125:2e9cc70d1897 226
AnnaBridge 125:2e9cc70d1897 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 228 return(result);
AnnaBridge 125:2e9cc70d1897 229 }
AnnaBridge 125:2e9cc70d1897 230
AnnaBridge 125:2e9cc70d1897 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 232 {
AnnaBridge 125:2e9cc70d1897 233 uint32_t result;
AnnaBridge 125:2e9cc70d1897 234
AnnaBridge 125:2e9cc70d1897 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 236 return(result);
AnnaBridge 125:2e9cc70d1897 237 }
AnnaBridge 125:2e9cc70d1897 238
AnnaBridge 125:2e9cc70d1897 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 240 {
AnnaBridge 125:2e9cc70d1897 241 uint32_t result;
AnnaBridge 125:2e9cc70d1897 242
AnnaBridge 125:2e9cc70d1897 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 244 return(result);
AnnaBridge 125:2e9cc70d1897 245 }
AnnaBridge 125:2e9cc70d1897 246
AnnaBridge 125:2e9cc70d1897 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 248 {
AnnaBridge 125:2e9cc70d1897 249 uint32_t result;
AnnaBridge 125:2e9cc70d1897 250
AnnaBridge 125:2e9cc70d1897 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 252 return(result);
AnnaBridge 125:2e9cc70d1897 253 }
AnnaBridge 125:2e9cc70d1897 254
AnnaBridge 125:2e9cc70d1897 255
AnnaBridge 125:2e9cc70d1897 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 257 {
AnnaBridge 125:2e9cc70d1897 258 uint32_t result;
AnnaBridge 125:2e9cc70d1897 259
AnnaBridge 125:2e9cc70d1897 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 261 return(result);
AnnaBridge 125:2e9cc70d1897 262 }
AnnaBridge 125:2e9cc70d1897 263
AnnaBridge 125:2e9cc70d1897 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 265 {
AnnaBridge 125:2e9cc70d1897 266 uint32_t result;
AnnaBridge 125:2e9cc70d1897 267
AnnaBridge 125:2e9cc70d1897 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 269 return(result);
AnnaBridge 125:2e9cc70d1897 270 }
AnnaBridge 125:2e9cc70d1897 271
AnnaBridge 125:2e9cc70d1897 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 273 {
AnnaBridge 125:2e9cc70d1897 274 uint32_t result;
AnnaBridge 125:2e9cc70d1897 275
AnnaBridge 125:2e9cc70d1897 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 277 return(result);
AnnaBridge 125:2e9cc70d1897 278 }
AnnaBridge 125:2e9cc70d1897 279
AnnaBridge 125:2e9cc70d1897 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 281 {
AnnaBridge 125:2e9cc70d1897 282 uint32_t result;
AnnaBridge 125:2e9cc70d1897 283
AnnaBridge 125:2e9cc70d1897 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 285 return(result);
AnnaBridge 125:2e9cc70d1897 286 }
AnnaBridge 125:2e9cc70d1897 287
AnnaBridge 125:2e9cc70d1897 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 289 {
AnnaBridge 125:2e9cc70d1897 290 uint32_t result;
AnnaBridge 125:2e9cc70d1897 291
AnnaBridge 125:2e9cc70d1897 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 293 return(result);
AnnaBridge 125:2e9cc70d1897 294 }
AnnaBridge 125:2e9cc70d1897 295
AnnaBridge 125:2e9cc70d1897 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 297 {
AnnaBridge 125:2e9cc70d1897 298 uint32_t result;
AnnaBridge 125:2e9cc70d1897 299
AnnaBridge 125:2e9cc70d1897 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 301 return(result);
AnnaBridge 125:2e9cc70d1897 302 }
AnnaBridge 125:2e9cc70d1897 303
AnnaBridge 125:2e9cc70d1897 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 305 {
AnnaBridge 125:2e9cc70d1897 306 uint32_t result;
AnnaBridge 125:2e9cc70d1897 307
AnnaBridge 125:2e9cc70d1897 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 309 return(result);
AnnaBridge 125:2e9cc70d1897 310 }
AnnaBridge 125:2e9cc70d1897 311
AnnaBridge 125:2e9cc70d1897 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 313 {
AnnaBridge 125:2e9cc70d1897 314 uint32_t result;
AnnaBridge 125:2e9cc70d1897 315
AnnaBridge 125:2e9cc70d1897 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 317 return(result);
AnnaBridge 125:2e9cc70d1897 318 }
AnnaBridge 125:2e9cc70d1897 319
AnnaBridge 125:2e9cc70d1897 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 321 {
AnnaBridge 125:2e9cc70d1897 322 uint32_t result;
AnnaBridge 125:2e9cc70d1897 323
AnnaBridge 125:2e9cc70d1897 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 325 return(result);
AnnaBridge 125:2e9cc70d1897 326 }
AnnaBridge 125:2e9cc70d1897 327
AnnaBridge 125:2e9cc70d1897 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 329 {
AnnaBridge 125:2e9cc70d1897 330 uint32_t result;
AnnaBridge 125:2e9cc70d1897 331
AnnaBridge 125:2e9cc70d1897 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 333 return(result);
AnnaBridge 125:2e9cc70d1897 334 }
AnnaBridge 125:2e9cc70d1897 335
AnnaBridge 125:2e9cc70d1897 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 337 {
AnnaBridge 125:2e9cc70d1897 338 uint32_t result;
AnnaBridge 125:2e9cc70d1897 339
AnnaBridge 125:2e9cc70d1897 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 341 return(result);
AnnaBridge 125:2e9cc70d1897 342 }
AnnaBridge 125:2e9cc70d1897 343
AnnaBridge 125:2e9cc70d1897 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 345 {
AnnaBridge 125:2e9cc70d1897 346 uint32_t result;
AnnaBridge 125:2e9cc70d1897 347
AnnaBridge 125:2e9cc70d1897 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 349 return(result);
AnnaBridge 125:2e9cc70d1897 350 }
AnnaBridge 125:2e9cc70d1897 351
AnnaBridge 125:2e9cc70d1897 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 353 {
AnnaBridge 125:2e9cc70d1897 354 uint32_t result;
AnnaBridge 125:2e9cc70d1897 355
AnnaBridge 125:2e9cc70d1897 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 357 return(result);
AnnaBridge 125:2e9cc70d1897 358 }
AnnaBridge 125:2e9cc70d1897 359
AnnaBridge 125:2e9cc70d1897 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 361 {
AnnaBridge 125:2e9cc70d1897 362 uint32_t result;
AnnaBridge 125:2e9cc70d1897 363
AnnaBridge 125:2e9cc70d1897 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 365 return(result);
AnnaBridge 125:2e9cc70d1897 366 }
AnnaBridge 125:2e9cc70d1897 367
AnnaBridge 125:2e9cc70d1897 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 369 {
AnnaBridge 125:2e9cc70d1897 370 uint32_t result;
AnnaBridge 125:2e9cc70d1897 371
AnnaBridge 125:2e9cc70d1897 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 373 return(result);
AnnaBridge 125:2e9cc70d1897 374 }
AnnaBridge 125:2e9cc70d1897 375
AnnaBridge 125:2e9cc70d1897 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 377 {
AnnaBridge 125:2e9cc70d1897 378 uint32_t result;
AnnaBridge 125:2e9cc70d1897 379
AnnaBridge 125:2e9cc70d1897 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 381 return(result);
AnnaBridge 125:2e9cc70d1897 382 }
AnnaBridge 125:2e9cc70d1897 383
AnnaBridge 125:2e9cc70d1897 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 385 {
AnnaBridge 125:2e9cc70d1897 386 uint32_t result;
AnnaBridge 125:2e9cc70d1897 387
AnnaBridge 125:2e9cc70d1897 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 389 return(result);
AnnaBridge 125:2e9cc70d1897 390 }
AnnaBridge 125:2e9cc70d1897 391
AnnaBridge 125:2e9cc70d1897 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 393 {
AnnaBridge 125:2e9cc70d1897 394 uint32_t result;
AnnaBridge 125:2e9cc70d1897 395
AnnaBridge 125:2e9cc70d1897 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 397 return(result);
AnnaBridge 125:2e9cc70d1897 398 }
AnnaBridge 125:2e9cc70d1897 399
AnnaBridge 125:2e9cc70d1897 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 401 {
AnnaBridge 125:2e9cc70d1897 402 uint32_t result;
AnnaBridge 125:2e9cc70d1897 403
AnnaBridge 125:2e9cc70d1897 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 405 return(result);
AnnaBridge 125:2e9cc70d1897 406 }
AnnaBridge 125:2e9cc70d1897 407
AnnaBridge 125:2e9cc70d1897 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 409 {
AnnaBridge 125:2e9cc70d1897 410 uint32_t result;
AnnaBridge 125:2e9cc70d1897 411
AnnaBridge 125:2e9cc70d1897 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 413 return(result);
AnnaBridge 125:2e9cc70d1897 414 }
AnnaBridge 125:2e9cc70d1897 415
AnnaBridge 125:2e9cc70d1897 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 417 {
AnnaBridge 125:2e9cc70d1897 418 uint32_t result;
AnnaBridge 125:2e9cc70d1897 419
AnnaBridge 125:2e9cc70d1897 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 421 return(result);
AnnaBridge 125:2e9cc70d1897 422 }
AnnaBridge 125:2e9cc70d1897 423
AnnaBridge 125:2e9cc70d1897 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 425 {
AnnaBridge 125:2e9cc70d1897 426 uint32_t result;
AnnaBridge 125:2e9cc70d1897 427
AnnaBridge 125:2e9cc70d1897 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 429 return(result);
AnnaBridge 125:2e9cc70d1897 430 }
AnnaBridge 125:2e9cc70d1897 431
AnnaBridge 125:2e9cc70d1897 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 433 {
AnnaBridge 125:2e9cc70d1897 434 uint32_t result;
AnnaBridge 125:2e9cc70d1897 435
AnnaBridge 125:2e9cc70d1897 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 437 return(result);
AnnaBridge 125:2e9cc70d1897 438 }
AnnaBridge 125:2e9cc70d1897 439
AnnaBridge 125:2e9cc70d1897 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 441 {
AnnaBridge 125:2e9cc70d1897 442 uint32_t result;
AnnaBridge 125:2e9cc70d1897 443
AnnaBridge 125:2e9cc70d1897 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 445 return(result);
AnnaBridge 125:2e9cc70d1897 446 }
AnnaBridge 125:2e9cc70d1897 447
AnnaBridge 125:2e9cc70d1897 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 449 {
AnnaBridge 125:2e9cc70d1897 450 uint32_t result;
AnnaBridge 125:2e9cc70d1897 451
AnnaBridge 125:2e9cc70d1897 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 453 return(result);
AnnaBridge 125:2e9cc70d1897 454 }
AnnaBridge 125:2e9cc70d1897 455
AnnaBridge 125:2e9cc70d1897 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 125:2e9cc70d1897 457 {
AnnaBridge 125:2e9cc70d1897 458 uint32_t result;
AnnaBridge 125:2e9cc70d1897 459
AnnaBridge 125:2e9cc70d1897 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 461 return(result);
AnnaBridge 125:2e9cc70d1897 462 }
AnnaBridge 125:2e9cc70d1897 463
AnnaBridge 125:2e9cc70d1897 464 #define __SSAT16(ARG1,ARG2) \
AnnaBridge 125:2e9cc70d1897 465 ({ \
AnnaBridge 125:2e9cc70d1897 466 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 125:2e9cc70d1897 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 125:2e9cc70d1897 468 __RES; \
AnnaBridge 125:2e9cc70d1897 469 })
AnnaBridge 125:2e9cc70d1897 470
AnnaBridge 125:2e9cc70d1897 471 #define __USAT16(ARG1,ARG2) \
AnnaBridge 125:2e9cc70d1897 472 ({ \
AnnaBridge 125:2e9cc70d1897 473 uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge 125:2e9cc70d1897 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge 125:2e9cc70d1897 475 __RES; \
AnnaBridge 125:2e9cc70d1897 476 })
AnnaBridge 125:2e9cc70d1897 477
AnnaBridge 125:2e9cc70d1897 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge 125:2e9cc70d1897 479 {
AnnaBridge 125:2e9cc70d1897 480 uint32_t result;
AnnaBridge 125:2e9cc70d1897 481
AnnaBridge 125:2e9cc70d1897 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 125:2e9cc70d1897 483 return(result);
AnnaBridge 125:2e9cc70d1897 484 }
AnnaBridge 125:2e9cc70d1897 485
AnnaBridge 125:2e9cc70d1897 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 487 {
AnnaBridge 125:2e9cc70d1897 488 uint32_t result;
AnnaBridge 125:2e9cc70d1897 489
AnnaBridge 125:2e9cc70d1897 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 491 return(result);
AnnaBridge 125:2e9cc70d1897 492 }
AnnaBridge 125:2e9cc70d1897 493
AnnaBridge 125:2e9cc70d1897 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge 125:2e9cc70d1897 495 {
AnnaBridge 125:2e9cc70d1897 496 uint32_t result;
AnnaBridge 125:2e9cc70d1897 497
AnnaBridge 125:2e9cc70d1897 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge 125:2e9cc70d1897 499 return(result);
AnnaBridge 125:2e9cc70d1897 500 }
AnnaBridge 125:2e9cc70d1897 501
AnnaBridge 125:2e9cc70d1897 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 503 {
AnnaBridge 125:2e9cc70d1897 504 uint32_t result;
AnnaBridge 125:2e9cc70d1897 505
AnnaBridge 125:2e9cc70d1897 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 507 return(result);
AnnaBridge 125:2e9cc70d1897 508 }
AnnaBridge 125:2e9cc70d1897 509
AnnaBridge 125:2e9cc70d1897 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 511 {
AnnaBridge 125:2e9cc70d1897 512 uint32_t result;
AnnaBridge 125:2e9cc70d1897 513
AnnaBridge 125:2e9cc70d1897 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 515 return(result);
AnnaBridge 125:2e9cc70d1897 516 }
AnnaBridge 125:2e9cc70d1897 517
AnnaBridge 125:2e9cc70d1897 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 519 {
AnnaBridge 125:2e9cc70d1897 520 uint32_t result;
AnnaBridge 125:2e9cc70d1897 521
AnnaBridge 125:2e9cc70d1897 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 523 return(result);
AnnaBridge 125:2e9cc70d1897 524 }
AnnaBridge 125:2e9cc70d1897 525
AnnaBridge 125:2e9cc70d1897 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 125:2e9cc70d1897 527 {
AnnaBridge 125:2e9cc70d1897 528 uint32_t result;
AnnaBridge 125:2e9cc70d1897 529
AnnaBridge 125:2e9cc70d1897 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 531 return(result);
AnnaBridge 125:2e9cc70d1897 532 }
AnnaBridge 125:2e9cc70d1897 533
AnnaBridge 125:2e9cc70d1897 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 125:2e9cc70d1897 535 {
AnnaBridge 125:2e9cc70d1897 536 uint32_t result;
AnnaBridge 125:2e9cc70d1897 537
AnnaBridge 125:2e9cc70d1897 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 539 return(result);
AnnaBridge 125:2e9cc70d1897 540 }
AnnaBridge 125:2e9cc70d1897 541
AnnaBridge 125:2e9cc70d1897 542 #define __SMLALD(ARG1,ARG2,ARG3) \
AnnaBridge 125:2e9cc70d1897 543 ({ \
AnnaBridge 125:2e9cc70d1897 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
AnnaBridge 125:2e9cc70d1897 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
AnnaBridge 125:2e9cc70d1897 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
AnnaBridge 125:2e9cc70d1897 547 })
AnnaBridge 125:2e9cc70d1897 548
AnnaBridge 125:2e9cc70d1897 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
AnnaBridge 125:2e9cc70d1897 550 ({ \
AnnaBridge 125:2e9cc70d1897 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
AnnaBridge 125:2e9cc70d1897 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
AnnaBridge 125:2e9cc70d1897 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
AnnaBridge 125:2e9cc70d1897 554 })
AnnaBridge 125:2e9cc70d1897 555
AnnaBridge 125:2e9cc70d1897 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 557 {
AnnaBridge 125:2e9cc70d1897 558 uint32_t result;
AnnaBridge 125:2e9cc70d1897 559
AnnaBridge 125:2e9cc70d1897 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 561 return(result);
AnnaBridge 125:2e9cc70d1897 562 }
AnnaBridge 125:2e9cc70d1897 563
AnnaBridge 125:2e9cc70d1897 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 565 {
AnnaBridge 125:2e9cc70d1897 566 uint32_t result;
AnnaBridge 125:2e9cc70d1897 567
AnnaBridge 125:2e9cc70d1897 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 569 return(result);
AnnaBridge 125:2e9cc70d1897 570 }
AnnaBridge 125:2e9cc70d1897 571
AnnaBridge 125:2e9cc70d1897 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 125:2e9cc70d1897 573 {
AnnaBridge 125:2e9cc70d1897 574 uint32_t result;
AnnaBridge 125:2e9cc70d1897 575
AnnaBridge 125:2e9cc70d1897 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 577 return(result);
AnnaBridge 125:2e9cc70d1897 578 }
AnnaBridge 125:2e9cc70d1897 579
AnnaBridge 125:2e9cc70d1897 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge 125:2e9cc70d1897 581 {
AnnaBridge 125:2e9cc70d1897 582 uint32_t result;
AnnaBridge 125:2e9cc70d1897 583
AnnaBridge 125:2e9cc70d1897 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 585 return(result);
AnnaBridge 125:2e9cc70d1897 586 }
AnnaBridge 125:2e9cc70d1897 587
AnnaBridge 125:2e9cc70d1897 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
AnnaBridge 125:2e9cc70d1897 589 ({ \
AnnaBridge 125:2e9cc70d1897 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
AnnaBridge 125:2e9cc70d1897 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
AnnaBridge 125:2e9cc70d1897 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
AnnaBridge 125:2e9cc70d1897 593 })
AnnaBridge 125:2e9cc70d1897 594
AnnaBridge 125:2e9cc70d1897 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
AnnaBridge 125:2e9cc70d1897 596 ({ \
AnnaBridge 125:2e9cc70d1897 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
AnnaBridge 125:2e9cc70d1897 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
AnnaBridge 125:2e9cc70d1897 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
AnnaBridge 125:2e9cc70d1897 600 })
AnnaBridge 125:2e9cc70d1897 601
AnnaBridge 125:2e9cc70d1897 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 603 {
AnnaBridge 125:2e9cc70d1897 604 uint32_t result;
AnnaBridge 125:2e9cc70d1897 605
AnnaBridge 125:2e9cc70d1897 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 607 return(result);
AnnaBridge 125:2e9cc70d1897 608 }
AnnaBridge 125:2e9cc70d1897 609
AnnaBridge 125:2e9cc70d1897 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 611 {
AnnaBridge 125:2e9cc70d1897 612 uint32_t result;
AnnaBridge 125:2e9cc70d1897 613
AnnaBridge 125:2e9cc70d1897 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 615 return(result);
AnnaBridge 125:2e9cc70d1897 616 }
AnnaBridge 125:2e9cc70d1897 617
AnnaBridge 125:2e9cc70d1897 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
AnnaBridge 125:2e9cc70d1897 619 {
AnnaBridge 125:2e9cc70d1897 620 uint32_t result;
AnnaBridge 125:2e9cc70d1897 621
AnnaBridge 125:2e9cc70d1897 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge 125:2e9cc70d1897 623 return(result);
AnnaBridge 125:2e9cc70d1897 624 }
AnnaBridge 125:2e9cc70d1897 625
AnnaBridge 125:2e9cc70d1897 626 #define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge 125:2e9cc70d1897 627 ({ \
AnnaBridge 125:2e9cc70d1897 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 125:2e9cc70d1897 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 125:2e9cc70d1897 630 __RES; \
AnnaBridge 125:2e9cc70d1897 631 })
AnnaBridge 125:2e9cc70d1897 632
AnnaBridge 125:2e9cc70d1897 633 #define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge 125:2e9cc70d1897 634 ({ \
AnnaBridge 125:2e9cc70d1897 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge 125:2e9cc70d1897 636 if (ARG3 == 0) \
AnnaBridge 125:2e9cc70d1897 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge 125:2e9cc70d1897 638 else \
AnnaBridge 125:2e9cc70d1897 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge 125:2e9cc70d1897 640 __RES; \
AnnaBridge 125:2e9cc70d1897 641 })
AnnaBridge 125:2e9cc70d1897 642
AnnaBridge 125:2e9cc70d1897 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge 125:2e9cc70d1897 644 {
AnnaBridge 125:2e9cc70d1897 645 int32_t result;
AnnaBridge 125:2e9cc70d1897 646
AnnaBridge 125:2e9cc70d1897 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge 125:2e9cc70d1897 648 return(result);
AnnaBridge 125:2e9cc70d1897 649 }
AnnaBridge 125:2e9cc70d1897 650
AnnaBridge 125:2e9cc70d1897 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 652
AnnaBridge 125:2e9cc70d1897 653
AnnaBridge 125:2e9cc70d1897 654
AnnaBridge 125:2e9cc70d1897 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
AnnaBridge 125:2e9cc70d1897 656 /* TASKING carm specific functions */
AnnaBridge 125:2e9cc70d1897 657
AnnaBridge 125:2e9cc70d1897 658
AnnaBridge 125:2e9cc70d1897 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 660 /* not yet supported */
AnnaBridge 125:2e9cc70d1897 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
AnnaBridge 125:2e9cc70d1897 662
AnnaBridge 125:2e9cc70d1897 663
AnnaBridge 125:2e9cc70d1897 664 #endif
AnnaBridge 125:2e9cc70d1897 665
AnnaBridge 125:2e9cc70d1897 666 /*@} end of group CMSIS_SIMD_intrinsics */
AnnaBridge 125:2e9cc70d1897 667
AnnaBridge 125:2e9cc70d1897 668
AnnaBridge 125:2e9cc70d1897 669 #endif /* __CORE_CM4_SIMD_H */
AnnaBridge 125:2e9cc70d1897 670
AnnaBridge 125:2e9cc70d1897 671 #ifdef __cplusplus
AnnaBridge 125:2e9cc70d1897 672 }
AnnaBridge 125:2e9cc70d1897 673 #endif