mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_LPC1347/core_cm4_simd.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
64:e3affc9e7238 
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 64:e3affc9e7238 1 /**************************************************************************//**
bogdanm 64:e3affc9e7238 2 * @file core_cm4_simd.h
bogdanm 64:e3affc9e7238 3 * @brief CMSIS Cortex-M4 SIMD Header File
bogdanm 64:e3affc9e7238 4 * @version V3.20
bogdanm 64:e3affc9e7238 5 * @date 25. February 2013
bogdanm 64:e3affc9e7238 6 *
bogdanm 64:e3affc9e7238 7 * @note
bogdanm 64:e3affc9e7238 8 *
bogdanm 64:e3affc9e7238 9 ******************************************************************************/
bogdanm 64:e3affc9e7238 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 64:e3affc9e7238 11
bogdanm 64:e3affc9e7238 12 All rights reserved.
bogdanm 64:e3affc9e7238 13 Redistribution and use in source and binary forms, with or without
bogdanm 64:e3affc9e7238 14 modification, are permitted provided that the following conditions are met:
bogdanm 64:e3affc9e7238 15 - Redistributions of source code must retain the above copyright
bogdanm 64:e3affc9e7238 16 notice, this list of conditions and the following disclaimer.
bogdanm 64:e3affc9e7238 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 64:e3affc9e7238 18 notice, this list of conditions and the following disclaimer in the
bogdanm 64:e3affc9e7238 19 documentation and/or other materials provided with the distribution.
bogdanm 64:e3affc9e7238 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 64:e3affc9e7238 21 to endorse or promote products derived from this software without
bogdanm 64:e3affc9e7238 22 specific prior written permission.
bogdanm 64:e3affc9e7238 23 *
bogdanm 64:e3affc9e7238 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 64:e3affc9e7238 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 64:e3affc9e7238 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 64:e3affc9e7238 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 64:e3affc9e7238 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 64:e3affc9e7238 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 64:e3affc9e7238 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 64:e3affc9e7238 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 64:e3affc9e7238 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 64:e3affc9e7238 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 64:e3affc9e7238 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 64:e3affc9e7238 35 ---------------------------------------------------------------------------*/
bogdanm 64:e3affc9e7238 36
bogdanm 64:e3affc9e7238 37
bogdanm 64:e3affc9e7238 38 #ifdef __cplusplus
bogdanm 64:e3affc9e7238 39 extern "C" {
bogdanm 64:e3affc9e7238 40 #endif
bogdanm 64:e3affc9e7238 41
bogdanm 64:e3affc9e7238 42 #ifndef __CORE_CM4_SIMD_H
bogdanm 64:e3affc9e7238 43 #define __CORE_CM4_SIMD_H
bogdanm 64:e3affc9e7238 44
bogdanm 64:e3affc9e7238 45
bogdanm 64:e3affc9e7238 46 /*******************************************************************************
bogdanm 64:e3affc9e7238 47 * Hardware Abstraction Layer
bogdanm 64:e3affc9e7238 48 ******************************************************************************/
bogdanm 64:e3affc9e7238 49
bogdanm 64:e3affc9e7238 50
bogdanm 64:e3affc9e7238 51 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 64:e3affc9e7238 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 64:e3affc9e7238 53 Access to dedicated SIMD instructions
bogdanm 64:e3affc9e7238 54 @{
bogdanm 64:e3affc9e7238 55 */
bogdanm 64:e3affc9e7238 56
bogdanm 64:e3affc9e7238 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 64:e3affc9e7238 58 /* ARM armcc specific functions */
bogdanm 64:e3affc9e7238 59
bogdanm 64:e3affc9e7238 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 64:e3affc9e7238 61 #define __SADD8 __sadd8
bogdanm 64:e3affc9e7238 62 #define __QADD8 __qadd8
bogdanm 64:e3affc9e7238 63 #define __SHADD8 __shadd8
bogdanm 64:e3affc9e7238 64 #define __UADD8 __uadd8
bogdanm 64:e3affc9e7238 65 #define __UQADD8 __uqadd8
bogdanm 64:e3affc9e7238 66 #define __UHADD8 __uhadd8
bogdanm 64:e3affc9e7238 67 #define __SSUB8 __ssub8
bogdanm 64:e3affc9e7238 68 #define __QSUB8 __qsub8
bogdanm 64:e3affc9e7238 69 #define __SHSUB8 __shsub8
bogdanm 64:e3affc9e7238 70 #define __USUB8 __usub8
bogdanm 64:e3affc9e7238 71 #define __UQSUB8 __uqsub8
bogdanm 64:e3affc9e7238 72 #define __UHSUB8 __uhsub8
bogdanm 64:e3affc9e7238 73 #define __SADD16 __sadd16
bogdanm 64:e3affc9e7238 74 #define __QADD16 __qadd16
bogdanm 64:e3affc9e7238 75 #define __SHADD16 __shadd16
bogdanm 64:e3affc9e7238 76 #define __UADD16 __uadd16
bogdanm 64:e3affc9e7238 77 #define __UQADD16 __uqadd16
bogdanm 64:e3affc9e7238 78 #define __UHADD16 __uhadd16
bogdanm 64:e3affc9e7238 79 #define __SSUB16 __ssub16
bogdanm 64:e3affc9e7238 80 #define __QSUB16 __qsub16
bogdanm 64:e3affc9e7238 81 #define __SHSUB16 __shsub16
bogdanm 64:e3affc9e7238 82 #define __USUB16 __usub16
bogdanm 64:e3affc9e7238 83 #define __UQSUB16 __uqsub16
bogdanm 64:e3affc9e7238 84 #define __UHSUB16 __uhsub16
bogdanm 64:e3affc9e7238 85 #define __SASX __sasx
bogdanm 64:e3affc9e7238 86 #define __QASX __qasx
bogdanm 64:e3affc9e7238 87 #define __SHASX __shasx
bogdanm 64:e3affc9e7238 88 #define __UASX __uasx
bogdanm 64:e3affc9e7238 89 #define __UQASX __uqasx
bogdanm 64:e3affc9e7238 90 #define __UHASX __uhasx
bogdanm 64:e3affc9e7238 91 #define __SSAX __ssax
bogdanm 64:e3affc9e7238 92 #define __QSAX __qsax
bogdanm 64:e3affc9e7238 93 #define __SHSAX __shsax
bogdanm 64:e3affc9e7238 94 #define __USAX __usax
bogdanm 64:e3affc9e7238 95 #define __UQSAX __uqsax
bogdanm 64:e3affc9e7238 96 #define __UHSAX __uhsax
bogdanm 64:e3affc9e7238 97 #define __USAD8 __usad8
bogdanm 64:e3affc9e7238 98 #define __USADA8 __usada8
bogdanm 64:e3affc9e7238 99 #define __SSAT16 __ssat16
bogdanm 64:e3affc9e7238 100 #define __USAT16 __usat16
bogdanm 64:e3affc9e7238 101 #define __UXTB16 __uxtb16
bogdanm 64:e3affc9e7238 102 #define __UXTAB16 __uxtab16
bogdanm 64:e3affc9e7238 103 #define __SXTB16 __sxtb16
bogdanm 64:e3affc9e7238 104 #define __SXTAB16 __sxtab16
bogdanm 64:e3affc9e7238 105 #define __SMUAD __smuad
bogdanm 64:e3affc9e7238 106 #define __SMUADX __smuadx
bogdanm 64:e3affc9e7238 107 #define __SMLAD __smlad
bogdanm 64:e3affc9e7238 108 #define __SMLADX __smladx
bogdanm 64:e3affc9e7238 109 #define __SMLALD __smlald
bogdanm 64:e3affc9e7238 110 #define __SMLALDX __smlaldx
bogdanm 64:e3affc9e7238 111 #define __SMUSD __smusd
bogdanm 64:e3affc9e7238 112 #define __SMUSDX __smusdx
bogdanm 64:e3affc9e7238 113 #define __SMLSD __smlsd
bogdanm 64:e3affc9e7238 114 #define __SMLSDX __smlsdx
bogdanm 64:e3affc9e7238 115 #define __SMLSLD __smlsld
bogdanm 64:e3affc9e7238 116 #define __SMLSLDX __smlsldx
bogdanm 64:e3affc9e7238 117 #define __SEL __sel
bogdanm 64:e3affc9e7238 118 #define __QADD __qadd
bogdanm 64:e3affc9e7238 119 #define __QSUB __qsub
bogdanm 64:e3affc9e7238 120
bogdanm 64:e3affc9e7238 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 64:e3affc9e7238 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 64:e3affc9e7238 123
bogdanm 64:e3affc9e7238 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 64:e3affc9e7238 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 64:e3affc9e7238 126
bogdanm 64:e3affc9e7238 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 64:e3affc9e7238 128 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 64:e3affc9e7238 129
bogdanm 64:e3affc9e7238 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 64:e3affc9e7238 131
bogdanm 64:e3affc9e7238 132
bogdanm 64:e3affc9e7238 133
bogdanm 64:e3affc9e7238 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 64:e3affc9e7238 135 /* IAR iccarm specific functions */
bogdanm 64:e3affc9e7238 136
bogdanm 64:e3affc9e7238 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 64:e3affc9e7238 138 #include <cmsis_iar.h>
bogdanm 64:e3affc9e7238 139
bogdanm 64:e3affc9e7238 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 64:e3affc9e7238 141
bogdanm 64:e3affc9e7238 142
bogdanm 64:e3affc9e7238 143
bogdanm 64:e3affc9e7238 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 64:e3affc9e7238 145 /* TI CCS specific functions */
bogdanm 64:e3affc9e7238 146
bogdanm 64:e3affc9e7238 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 64:e3affc9e7238 148 #include <cmsis_ccs.h>
bogdanm 64:e3affc9e7238 149
bogdanm 64:e3affc9e7238 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 64:e3affc9e7238 151
bogdanm 64:e3affc9e7238 152
bogdanm 64:e3affc9e7238 153
bogdanm 64:e3affc9e7238 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 64:e3affc9e7238 155 /* GNU gcc specific functions */
bogdanm 64:e3affc9e7238 156
bogdanm 64:e3affc9e7238 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 64:e3affc9e7238 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 159 {
bogdanm 64:e3affc9e7238 160 uint32_t result;
bogdanm 64:e3affc9e7238 161
bogdanm 64:e3affc9e7238 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 163 return(result);
bogdanm 64:e3affc9e7238 164 }
bogdanm 64:e3affc9e7238 165
bogdanm 64:e3affc9e7238 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 167 {
bogdanm 64:e3affc9e7238 168 uint32_t result;
bogdanm 64:e3affc9e7238 169
bogdanm 64:e3affc9e7238 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 171 return(result);
bogdanm 64:e3affc9e7238 172 }
bogdanm 64:e3affc9e7238 173
bogdanm 64:e3affc9e7238 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 175 {
bogdanm 64:e3affc9e7238 176 uint32_t result;
bogdanm 64:e3affc9e7238 177
bogdanm 64:e3affc9e7238 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 179 return(result);
bogdanm 64:e3affc9e7238 180 }
bogdanm 64:e3affc9e7238 181
bogdanm 64:e3affc9e7238 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 183 {
bogdanm 64:e3affc9e7238 184 uint32_t result;
bogdanm 64:e3affc9e7238 185
bogdanm 64:e3affc9e7238 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 187 return(result);
bogdanm 64:e3affc9e7238 188 }
bogdanm 64:e3affc9e7238 189
bogdanm 64:e3affc9e7238 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 191 {
bogdanm 64:e3affc9e7238 192 uint32_t result;
bogdanm 64:e3affc9e7238 193
bogdanm 64:e3affc9e7238 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 195 return(result);
bogdanm 64:e3affc9e7238 196 }
bogdanm 64:e3affc9e7238 197
bogdanm 64:e3affc9e7238 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 199 {
bogdanm 64:e3affc9e7238 200 uint32_t result;
bogdanm 64:e3affc9e7238 201
bogdanm 64:e3affc9e7238 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 203 return(result);
bogdanm 64:e3affc9e7238 204 }
bogdanm 64:e3affc9e7238 205
bogdanm 64:e3affc9e7238 206
bogdanm 64:e3affc9e7238 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 208 {
bogdanm 64:e3affc9e7238 209 uint32_t result;
bogdanm 64:e3affc9e7238 210
bogdanm 64:e3affc9e7238 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 212 return(result);
bogdanm 64:e3affc9e7238 213 }
bogdanm 64:e3affc9e7238 214
bogdanm 64:e3affc9e7238 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 216 {
bogdanm 64:e3affc9e7238 217 uint32_t result;
bogdanm 64:e3affc9e7238 218
bogdanm 64:e3affc9e7238 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 220 return(result);
bogdanm 64:e3affc9e7238 221 }
bogdanm 64:e3affc9e7238 222
bogdanm 64:e3affc9e7238 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 224 {
bogdanm 64:e3affc9e7238 225 uint32_t result;
bogdanm 64:e3affc9e7238 226
bogdanm 64:e3affc9e7238 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 228 return(result);
bogdanm 64:e3affc9e7238 229 }
bogdanm 64:e3affc9e7238 230
bogdanm 64:e3affc9e7238 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 232 {
bogdanm 64:e3affc9e7238 233 uint32_t result;
bogdanm 64:e3affc9e7238 234
bogdanm 64:e3affc9e7238 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 236 return(result);
bogdanm 64:e3affc9e7238 237 }
bogdanm 64:e3affc9e7238 238
bogdanm 64:e3affc9e7238 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 240 {
bogdanm 64:e3affc9e7238 241 uint32_t result;
bogdanm 64:e3affc9e7238 242
bogdanm 64:e3affc9e7238 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 244 return(result);
bogdanm 64:e3affc9e7238 245 }
bogdanm 64:e3affc9e7238 246
bogdanm 64:e3affc9e7238 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 248 {
bogdanm 64:e3affc9e7238 249 uint32_t result;
bogdanm 64:e3affc9e7238 250
bogdanm 64:e3affc9e7238 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 252 return(result);
bogdanm 64:e3affc9e7238 253 }
bogdanm 64:e3affc9e7238 254
bogdanm 64:e3affc9e7238 255
bogdanm 64:e3affc9e7238 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 257 {
bogdanm 64:e3affc9e7238 258 uint32_t result;
bogdanm 64:e3affc9e7238 259
bogdanm 64:e3affc9e7238 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 261 return(result);
bogdanm 64:e3affc9e7238 262 }
bogdanm 64:e3affc9e7238 263
bogdanm 64:e3affc9e7238 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 265 {
bogdanm 64:e3affc9e7238 266 uint32_t result;
bogdanm 64:e3affc9e7238 267
bogdanm 64:e3affc9e7238 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 269 return(result);
bogdanm 64:e3affc9e7238 270 }
bogdanm 64:e3affc9e7238 271
bogdanm 64:e3affc9e7238 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 273 {
bogdanm 64:e3affc9e7238 274 uint32_t result;
bogdanm 64:e3affc9e7238 275
bogdanm 64:e3affc9e7238 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 277 return(result);
bogdanm 64:e3affc9e7238 278 }
bogdanm 64:e3affc9e7238 279
bogdanm 64:e3affc9e7238 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 281 {
bogdanm 64:e3affc9e7238 282 uint32_t result;
bogdanm 64:e3affc9e7238 283
bogdanm 64:e3affc9e7238 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 285 return(result);
bogdanm 64:e3affc9e7238 286 }
bogdanm 64:e3affc9e7238 287
bogdanm 64:e3affc9e7238 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 289 {
bogdanm 64:e3affc9e7238 290 uint32_t result;
bogdanm 64:e3affc9e7238 291
bogdanm 64:e3affc9e7238 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 293 return(result);
bogdanm 64:e3affc9e7238 294 }
bogdanm 64:e3affc9e7238 295
bogdanm 64:e3affc9e7238 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 297 {
bogdanm 64:e3affc9e7238 298 uint32_t result;
bogdanm 64:e3affc9e7238 299
bogdanm 64:e3affc9e7238 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 301 return(result);
bogdanm 64:e3affc9e7238 302 }
bogdanm 64:e3affc9e7238 303
bogdanm 64:e3affc9e7238 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 305 {
bogdanm 64:e3affc9e7238 306 uint32_t result;
bogdanm 64:e3affc9e7238 307
bogdanm 64:e3affc9e7238 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 309 return(result);
bogdanm 64:e3affc9e7238 310 }
bogdanm 64:e3affc9e7238 311
bogdanm 64:e3affc9e7238 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 313 {
bogdanm 64:e3affc9e7238 314 uint32_t result;
bogdanm 64:e3affc9e7238 315
bogdanm 64:e3affc9e7238 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 317 return(result);
bogdanm 64:e3affc9e7238 318 }
bogdanm 64:e3affc9e7238 319
bogdanm 64:e3affc9e7238 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 321 {
bogdanm 64:e3affc9e7238 322 uint32_t result;
bogdanm 64:e3affc9e7238 323
bogdanm 64:e3affc9e7238 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 325 return(result);
bogdanm 64:e3affc9e7238 326 }
bogdanm 64:e3affc9e7238 327
bogdanm 64:e3affc9e7238 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 329 {
bogdanm 64:e3affc9e7238 330 uint32_t result;
bogdanm 64:e3affc9e7238 331
bogdanm 64:e3affc9e7238 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 333 return(result);
bogdanm 64:e3affc9e7238 334 }
bogdanm 64:e3affc9e7238 335
bogdanm 64:e3affc9e7238 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 337 {
bogdanm 64:e3affc9e7238 338 uint32_t result;
bogdanm 64:e3affc9e7238 339
bogdanm 64:e3affc9e7238 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 341 return(result);
bogdanm 64:e3affc9e7238 342 }
bogdanm 64:e3affc9e7238 343
bogdanm 64:e3affc9e7238 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 345 {
bogdanm 64:e3affc9e7238 346 uint32_t result;
bogdanm 64:e3affc9e7238 347
bogdanm 64:e3affc9e7238 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 349 return(result);
bogdanm 64:e3affc9e7238 350 }
bogdanm 64:e3affc9e7238 351
bogdanm 64:e3affc9e7238 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 353 {
bogdanm 64:e3affc9e7238 354 uint32_t result;
bogdanm 64:e3affc9e7238 355
bogdanm 64:e3affc9e7238 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 357 return(result);
bogdanm 64:e3affc9e7238 358 }
bogdanm 64:e3affc9e7238 359
bogdanm 64:e3affc9e7238 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 361 {
bogdanm 64:e3affc9e7238 362 uint32_t result;
bogdanm 64:e3affc9e7238 363
bogdanm 64:e3affc9e7238 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 365 return(result);
bogdanm 64:e3affc9e7238 366 }
bogdanm 64:e3affc9e7238 367
bogdanm 64:e3affc9e7238 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 369 {
bogdanm 64:e3affc9e7238 370 uint32_t result;
bogdanm 64:e3affc9e7238 371
bogdanm 64:e3affc9e7238 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 373 return(result);
bogdanm 64:e3affc9e7238 374 }
bogdanm 64:e3affc9e7238 375
bogdanm 64:e3affc9e7238 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 377 {
bogdanm 64:e3affc9e7238 378 uint32_t result;
bogdanm 64:e3affc9e7238 379
bogdanm 64:e3affc9e7238 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 381 return(result);
bogdanm 64:e3affc9e7238 382 }
bogdanm 64:e3affc9e7238 383
bogdanm 64:e3affc9e7238 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 385 {
bogdanm 64:e3affc9e7238 386 uint32_t result;
bogdanm 64:e3affc9e7238 387
bogdanm 64:e3affc9e7238 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 389 return(result);
bogdanm 64:e3affc9e7238 390 }
bogdanm 64:e3affc9e7238 391
bogdanm 64:e3affc9e7238 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 393 {
bogdanm 64:e3affc9e7238 394 uint32_t result;
bogdanm 64:e3affc9e7238 395
bogdanm 64:e3affc9e7238 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 397 return(result);
bogdanm 64:e3affc9e7238 398 }
bogdanm 64:e3affc9e7238 399
bogdanm 64:e3affc9e7238 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 401 {
bogdanm 64:e3affc9e7238 402 uint32_t result;
bogdanm 64:e3affc9e7238 403
bogdanm 64:e3affc9e7238 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 405 return(result);
bogdanm 64:e3affc9e7238 406 }
bogdanm 64:e3affc9e7238 407
bogdanm 64:e3affc9e7238 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 409 {
bogdanm 64:e3affc9e7238 410 uint32_t result;
bogdanm 64:e3affc9e7238 411
bogdanm 64:e3affc9e7238 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 413 return(result);
bogdanm 64:e3affc9e7238 414 }
bogdanm 64:e3affc9e7238 415
bogdanm 64:e3affc9e7238 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 417 {
bogdanm 64:e3affc9e7238 418 uint32_t result;
bogdanm 64:e3affc9e7238 419
bogdanm 64:e3affc9e7238 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 421 return(result);
bogdanm 64:e3affc9e7238 422 }
bogdanm 64:e3affc9e7238 423
bogdanm 64:e3affc9e7238 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 425 {
bogdanm 64:e3affc9e7238 426 uint32_t result;
bogdanm 64:e3affc9e7238 427
bogdanm 64:e3affc9e7238 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 429 return(result);
bogdanm 64:e3affc9e7238 430 }
bogdanm 64:e3affc9e7238 431
bogdanm 64:e3affc9e7238 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 433 {
bogdanm 64:e3affc9e7238 434 uint32_t result;
bogdanm 64:e3affc9e7238 435
bogdanm 64:e3affc9e7238 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 437 return(result);
bogdanm 64:e3affc9e7238 438 }
bogdanm 64:e3affc9e7238 439
bogdanm 64:e3affc9e7238 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 441 {
bogdanm 64:e3affc9e7238 442 uint32_t result;
bogdanm 64:e3affc9e7238 443
bogdanm 64:e3affc9e7238 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 445 return(result);
bogdanm 64:e3affc9e7238 446 }
bogdanm 64:e3affc9e7238 447
bogdanm 64:e3affc9e7238 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 449 {
bogdanm 64:e3affc9e7238 450 uint32_t result;
bogdanm 64:e3affc9e7238 451
bogdanm 64:e3affc9e7238 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 453 return(result);
bogdanm 64:e3affc9e7238 454 }
bogdanm 64:e3affc9e7238 455
bogdanm 64:e3affc9e7238 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 64:e3affc9e7238 457 {
bogdanm 64:e3affc9e7238 458 uint32_t result;
bogdanm 64:e3affc9e7238 459
bogdanm 64:e3affc9e7238 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 64:e3affc9e7238 461 return(result);
bogdanm 64:e3affc9e7238 462 }
bogdanm 64:e3affc9e7238 463
bogdanm 64:e3affc9e7238 464 #define __SSAT16(ARG1,ARG2) \
bogdanm 64:e3affc9e7238 465 ({ \
bogdanm 64:e3affc9e7238 466 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 64:e3affc9e7238 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 64:e3affc9e7238 468 __RES; \
bogdanm 64:e3affc9e7238 469 })
bogdanm 64:e3affc9e7238 470
bogdanm 64:e3affc9e7238 471 #define __USAT16(ARG1,ARG2) \
bogdanm 64:e3affc9e7238 472 ({ \
bogdanm 64:e3affc9e7238 473 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 64:e3affc9e7238 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 64:e3affc9e7238 475 __RES; \
bogdanm 64:e3affc9e7238 476 })
bogdanm 64:e3affc9e7238 477
bogdanm 64:e3affc9e7238 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 64:e3affc9e7238 479 {
bogdanm 64:e3affc9e7238 480 uint32_t result;
bogdanm 64:e3affc9e7238 481
bogdanm 64:e3affc9e7238 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 64:e3affc9e7238 483 return(result);
bogdanm 64:e3affc9e7238 484 }
bogdanm 64:e3affc9e7238 485
bogdanm 64:e3affc9e7238 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 487 {
bogdanm 64:e3affc9e7238 488 uint32_t result;
bogdanm 64:e3affc9e7238 489
bogdanm 64:e3affc9e7238 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 491 return(result);
bogdanm 64:e3affc9e7238 492 }
bogdanm 64:e3affc9e7238 493
bogdanm 64:e3affc9e7238 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 64:e3affc9e7238 495 {
bogdanm 64:e3affc9e7238 496 uint32_t result;
bogdanm 64:e3affc9e7238 497
bogdanm 64:e3affc9e7238 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 64:e3affc9e7238 499 return(result);
bogdanm 64:e3affc9e7238 500 }
bogdanm 64:e3affc9e7238 501
bogdanm 64:e3affc9e7238 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 503 {
bogdanm 64:e3affc9e7238 504 uint32_t result;
bogdanm 64:e3affc9e7238 505
bogdanm 64:e3affc9e7238 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 507 return(result);
bogdanm 64:e3affc9e7238 508 }
bogdanm 64:e3affc9e7238 509
bogdanm 64:e3affc9e7238 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 511 {
bogdanm 64:e3affc9e7238 512 uint32_t result;
bogdanm 64:e3affc9e7238 513
bogdanm 64:e3affc9e7238 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 515 return(result);
bogdanm 64:e3affc9e7238 516 }
bogdanm 64:e3affc9e7238 517
bogdanm 64:e3affc9e7238 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 519 {
bogdanm 64:e3affc9e7238 520 uint32_t result;
bogdanm 64:e3affc9e7238 521
bogdanm 64:e3affc9e7238 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 523 return(result);
bogdanm 64:e3affc9e7238 524 }
bogdanm 64:e3affc9e7238 525
bogdanm 64:e3affc9e7238 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 64:e3affc9e7238 527 {
bogdanm 64:e3affc9e7238 528 uint32_t result;
bogdanm 64:e3affc9e7238 529
bogdanm 64:e3affc9e7238 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 64:e3affc9e7238 531 return(result);
bogdanm 64:e3affc9e7238 532 }
bogdanm 64:e3affc9e7238 533
bogdanm 64:e3affc9e7238 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 64:e3affc9e7238 535 {
bogdanm 64:e3affc9e7238 536 uint32_t result;
bogdanm 64:e3affc9e7238 537
bogdanm 64:e3affc9e7238 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 64:e3affc9e7238 539 return(result);
bogdanm 64:e3affc9e7238 540 }
bogdanm 64:e3affc9e7238 541
bogdanm 64:e3affc9e7238 542 #define __SMLALD(ARG1,ARG2,ARG3) \
bogdanm 64:e3affc9e7238 543 ({ \
bogdanm 64:e3affc9e7238 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 64:e3affc9e7238 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 64:e3affc9e7238 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 64:e3affc9e7238 547 })
bogdanm 64:e3affc9e7238 548
bogdanm 64:e3affc9e7238 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
bogdanm 64:e3affc9e7238 550 ({ \
bogdanm 64:e3affc9e7238 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 64:e3affc9e7238 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 64:e3affc9e7238 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 64:e3affc9e7238 554 })
bogdanm 64:e3affc9e7238 555
bogdanm 64:e3affc9e7238 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 557 {
bogdanm 64:e3affc9e7238 558 uint32_t result;
bogdanm 64:e3affc9e7238 559
bogdanm 64:e3affc9e7238 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 561 return(result);
bogdanm 64:e3affc9e7238 562 }
bogdanm 64:e3affc9e7238 563
bogdanm 64:e3affc9e7238 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 565 {
bogdanm 64:e3affc9e7238 566 uint32_t result;
bogdanm 64:e3affc9e7238 567
bogdanm 64:e3affc9e7238 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 569 return(result);
bogdanm 64:e3affc9e7238 570 }
bogdanm 64:e3affc9e7238 571
bogdanm 64:e3affc9e7238 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 64:e3affc9e7238 573 {
bogdanm 64:e3affc9e7238 574 uint32_t result;
bogdanm 64:e3affc9e7238 575
bogdanm 64:e3affc9e7238 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 64:e3affc9e7238 577 return(result);
bogdanm 64:e3affc9e7238 578 }
bogdanm 64:e3affc9e7238 579
bogdanm 64:e3affc9e7238 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 64:e3affc9e7238 581 {
bogdanm 64:e3affc9e7238 582 uint32_t result;
bogdanm 64:e3affc9e7238 583
bogdanm 64:e3affc9e7238 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 64:e3affc9e7238 585 return(result);
bogdanm 64:e3affc9e7238 586 }
bogdanm 64:e3affc9e7238 587
bogdanm 64:e3affc9e7238 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
bogdanm 64:e3affc9e7238 589 ({ \
bogdanm 64:e3affc9e7238 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 64:e3affc9e7238 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 64:e3affc9e7238 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 64:e3affc9e7238 593 })
bogdanm 64:e3affc9e7238 594
bogdanm 64:e3affc9e7238 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
bogdanm 64:e3affc9e7238 596 ({ \
bogdanm 64:e3affc9e7238 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 64:e3affc9e7238 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 64:e3affc9e7238 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 64:e3affc9e7238 600 })
bogdanm 64:e3affc9e7238 601
bogdanm 64:e3affc9e7238 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 603 {
bogdanm 64:e3affc9e7238 604 uint32_t result;
bogdanm 64:e3affc9e7238 605
bogdanm 64:e3affc9e7238 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 607 return(result);
bogdanm 64:e3affc9e7238 608 }
bogdanm 64:e3affc9e7238 609
bogdanm 64:e3affc9e7238 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 611 {
bogdanm 64:e3affc9e7238 612 uint32_t result;
bogdanm 64:e3affc9e7238 613
bogdanm 64:e3affc9e7238 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 615 return(result);
bogdanm 64:e3affc9e7238 616 }
bogdanm 64:e3affc9e7238 617
bogdanm 64:e3affc9e7238 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 64:e3affc9e7238 619 {
bogdanm 64:e3affc9e7238 620 uint32_t result;
bogdanm 64:e3affc9e7238 621
bogdanm 64:e3affc9e7238 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 64:e3affc9e7238 623 return(result);
bogdanm 64:e3affc9e7238 624 }
bogdanm 64:e3affc9e7238 625
bogdanm 64:e3affc9e7238 626 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 64:e3affc9e7238 627 ({ \
bogdanm 64:e3affc9e7238 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 64:e3affc9e7238 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 64:e3affc9e7238 630 __RES; \
bogdanm 64:e3affc9e7238 631 })
bogdanm 64:e3affc9e7238 632
bogdanm 64:e3affc9e7238 633 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 64:e3affc9e7238 634 ({ \
bogdanm 64:e3affc9e7238 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 64:e3affc9e7238 636 if (ARG3 == 0) \
bogdanm 64:e3affc9e7238 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 64:e3affc9e7238 638 else \
bogdanm 64:e3affc9e7238 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 64:e3affc9e7238 640 __RES; \
bogdanm 64:e3affc9e7238 641 })
bogdanm 64:e3affc9e7238 642
bogdanm 64:e3affc9e7238 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 64:e3affc9e7238 644 {
bogdanm 64:e3affc9e7238 645 int32_t result;
bogdanm 64:e3affc9e7238 646
bogdanm 64:e3affc9e7238 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 64:e3affc9e7238 648 return(result);
bogdanm 64:e3affc9e7238 649 }
bogdanm 64:e3affc9e7238 650
bogdanm 64:e3affc9e7238 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 64:e3affc9e7238 652
bogdanm 64:e3affc9e7238 653
bogdanm 64:e3affc9e7238 654
bogdanm 64:e3affc9e7238 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 64:e3affc9e7238 656 /* TASKING carm specific functions */
bogdanm 64:e3affc9e7238 657
bogdanm 64:e3affc9e7238 658
bogdanm 64:e3affc9e7238 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 64:e3affc9e7238 660 /* not yet supported */
bogdanm 64:e3affc9e7238 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 64:e3affc9e7238 662
bogdanm 64:e3affc9e7238 663
bogdanm 64:e3affc9e7238 664 #endif
bogdanm 64:e3affc9e7238 665
bogdanm 64:e3affc9e7238 666 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 64:e3affc9e7238 667
bogdanm 64:e3affc9e7238 668
bogdanm 64:e3affc9e7238 669 #endif /* __CORE_CM4_SIMD_H */
bogdanm 64:e3affc9e7238 670
bogdanm 64:e3affc9e7238 671 #ifdef __cplusplus
bogdanm 64:e3affc9e7238 672 }
bogdanm 64:e3affc9e7238 673 #endif