mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_ARCH_PRO/core_cm4_simd.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
85:024bf7f99721 
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 85:024bf7f99721 1 /**************************************************************************//**
bogdanm 85:024bf7f99721 2 * @file core_cm4_simd.h
bogdanm 85:024bf7f99721 3 * @brief CMSIS Cortex-M4 SIMD Header File
bogdanm 85:024bf7f99721 4 * @version V3.20
bogdanm 85:024bf7f99721 5 * @date 25. February 2013
bogdanm 85:024bf7f99721 6 *
bogdanm 85:024bf7f99721 7 * @note
bogdanm 85:024bf7f99721 8 *
bogdanm 85:024bf7f99721 9 ******************************************************************************/
bogdanm 85:024bf7f99721 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 85:024bf7f99721 11
bogdanm 85:024bf7f99721 12 All rights reserved.
bogdanm 85:024bf7f99721 13 Redistribution and use in source and binary forms, with or without
bogdanm 85:024bf7f99721 14 modification, are permitted provided that the following conditions are met:
bogdanm 85:024bf7f99721 15 - Redistributions of source code must retain the above copyright
bogdanm 85:024bf7f99721 16 notice, this list of conditions and the following disclaimer.
bogdanm 85:024bf7f99721 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 85:024bf7f99721 18 notice, this list of conditions and the following disclaimer in the
bogdanm 85:024bf7f99721 19 documentation and/or other materials provided with the distribution.
bogdanm 85:024bf7f99721 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 85:024bf7f99721 21 to endorse or promote products derived from this software without
bogdanm 85:024bf7f99721 22 specific prior written permission.
bogdanm 85:024bf7f99721 23 *
bogdanm 85:024bf7f99721 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 85:024bf7f99721 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 85:024bf7f99721 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 85:024bf7f99721 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 85:024bf7f99721 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 85:024bf7f99721 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 85:024bf7f99721 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 85:024bf7f99721 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 85:024bf7f99721 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 85:024bf7f99721 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 85:024bf7f99721 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 85:024bf7f99721 35 ---------------------------------------------------------------------------*/
bogdanm 85:024bf7f99721 36
bogdanm 85:024bf7f99721 37
bogdanm 85:024bf7f99721 38 #ifdef __cplusplus
bogdanm 85:024bf7f99721 39 extern "C" {
bogdanm 85:024bf7f99721 40 #endif
bogdanm 85:024bf7f99721 41
bogdanm 85:024bf7f99721 42 #ifndef __CORE_CM4_SIMD_H
bogdanm 85:024bf7f99721 43 #define __CORE_CM4_SIMD_H
bogdanm 85:024bf7f99721 44
bogdanm 85:024bf7f99721 45
bogdanm 85:024bf7f99721 46 /*******************************************************************************
bogdanm 85:024bf7f99721 47 * Hardware Abstraction Layer
bogdanm 85:024bf7f99721 48 ******************************************************************************/
bogdanm 85:024bf7f99721 49
bogdanm 85:024bf7f99721 50
bogdanm 85:024bf7f99721 51 /* ################### Compiler specific Intrinsics ########################### */
bogdanm 85:024bf7f99721 52 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
bogdanm 85:024bf7f99721 53 Access to dedicated SIMD instructions
bogdanm 85:024bf7f99721 54 @{
bogdanm 85:024bf7f99721 55 */
bogdanm 85:024bf7f99721 56
bogdanm 85:024bf7f99721 57 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 85:024bf7f99721 58 /* ARM armcc specific functions */
bogdanm 85:024bf7f99721 59
bogdanm 85:024bf7f99721 60 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 85:024bf7f99721 61 #define __SADD8 __sadd8
bogdanm 85:024bf7f99721 62 #define __QADD8 __qadd8
bogdanm 85:024bf7f99721 63 #define __SHADD8 __shadd8
bogdanm 85:024bf7f99721 64 #define __UADD8 __uadd8
bogdanm 85:024bf7f99721 65 #define __UQADD8 __uqadd8
bogdanm 85:024bf7f99721 66 #define __UHADD8 __uhadd8
bogdanm 85:024bf7f99721 67 #define __SSUB8 __ssub8
bogdanm 85:024bf7f99721 68 #define __QSUB8 __qsub8
bogdanm 85:024bf7f99721 69 #define __SHSUB8 __shsub8
bogdanm 85:024bf7f99721 70 #define __USUB8 __usub8
bogdanm 85:024bf7f99721 71 #define __UQSUB8 __uqsub8
bogdanm 85:024bf7f99721 72 #define __UHSUB8 __uhsub8
bogdanm 85:024bf7f99721 73 #define __SADD16 __sadd16
bogdanm 85:024bf7f99721 74 #define __QADD16 __qadd16
bogdanm 85:024bf7f99721 75 #define __SHADD16 __shadd16
bogdanm 85:024bf7f99721 76 #define __UADD16 __uadd16
bogdanm 85:024bf7f99721 77 #define __UQADD16 __uqadd16
bogdanm 85:024bf7f99721 78 #define __UHADD16 __uhadd16
bogdanm 85:024bf7f99721 79 #define __SSUB16 __ssub16
bogdanm 85:024bf7f99721 80 #define __QSUB16 __qsub16
bogdanm 85:024bf7f99721 81 #define __SHSUB16 __shsub16
bogdanm 85:024bf7f99721 82 #define __USUB16 __usub16
bogdanm 85:024bf7f99721 83 #define __UQSUB16 __uqsub16
bogdanm 85:024bf7f99721 84 #define __UHSUB16 __uhsub16
bogdanm 85:024bf7f99721 85 #define __SASX __sasx
bogdanm 85:024bf7f99721 86 #define __QASX __qasx
bogdanm 85:024bf7f99721 87 #define __SHASX __shasx
bogdanm 85:024bf7f99721 88 #define __UASX __uasx
bogdanm 85:024bf7f99721 89 #define __UQASX __uqasx
bogdanm 85:024bf7f99721 90 #define __UHASX __uhasx
bogdanm 85:024bf7f99721 91 #define __SSAX __ssax
bogdanm 85:024bf7f99721 92 #define __QSAX __qsax
bogdanm 85:024bf7f99721 93 #define __SHSAX __shsax
bogdanm 85:024bf7f99721 94 #define __USAX __usax
bogdanm 85:024bf7f99721 95 #define __UQSAX __uqsax
bogdanm 85:024bf7f99721 96 #define __UHSAX __uhsax
bogdanm 85:024bf7f99721 97 #define __USAD8 __usad8
bogdanm 85:024bf7f99721 98 #define __USADA8 __usada8
bogdanm 85:024bf7f99721 99 #define __SSAT16 __ssat16
bogdanm 85:024bf7f99721 100 #define __USAT16 __usat16
bogdanm 85:024bf7f99721 101 #define __UXTB16 __uxtb16
bogdanm 85:024bf7f99721 102 #define __UXTAB16 __uxtab16
bogdanm 85:024bf7f99721 103 #define __SXTB16 __sxtb16
bogdanm 85:024bf7f99721 104 #define __SXTAB16 __sxtab16
bogdanm 85:024bf7f99721 105 #define __SMUAD __smuad
bogdanm 85:024bf7f99721 106 #define __SMUADX __smuadx
bogdanm 85:024bf7f99721 107 #define __SMLAD __smlad
bogdanm 85:024bf7f99721 108 #define __SMLADX __smladx
bogdanm 85:024bf7f99721 109 #define __SMLALD __smlald
bogdanm 85:024bf7f99721 110 #define __SMLALDX __smlaldx
bogdanm 85:024bf7f99721 111 #define __SMUSD __smusd
bogdanm 85:024bf7f99721 112 #define __SMUSDX __smusdx
bogdanm 85:024bf7f99721 113 #define __SMLSD __smlsd
bogdanm 85:024bf7f99721 114 #define __SMLSDX __smlsdx
bogdanm 85:024bf7f99721 115 #define __SMLSLD __smlsld
bogdanm 85:024bf7f99721 116 #define __SMLSLDX __smlsldx
bogdanm 85:024bf7f99721 117 #define __SEL __sel
bogdanm 85:024bf7f99721 118 #define __QADD __qadd
bogdanm 85:024bf7f99721 119 #define __QSUB __qsub
bogdanm 85:024bf7f99721 120
bogdanm 85:024bf7f99721 121 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
bogdanm 85:024bf7f99721 122 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
bogdanm 85:024bf7f99721 123
bogdanm 85:024bf7f99721 124 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
bogdanm 85:024bf7f99721 125 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
bogdanm 85:024bf7f99721 126
bogdanm 85:024bf7f99721 127 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
bogdanm 85:024bf7f99721 128 ((int64_t)(ARG3) << 32) ) >> 32))
bogdanm 85:024bf7f99721 129
bogdanm 85:024bf7f99721 130 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 85:024bf7f99721 131
bogdanm 85:024bf7f99721 132
bogdanm 85:024bf7f99721 133
bogdanm 85:024bf7f99721 134 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 85:024bf7f99721 135 /* IAR iccarm specific functions */
bogdanm 85:024bf7f99721 136
bogdanm 85:024bf7f99721 137 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 85:024bf7f99721 138 #include <cmsis_iar.h>
bogdanm 85:024bf7f99721 139
bogdanm 85:024bf7f99721 140 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 85:024bf7f99721 141
bogdanm 85:024bf7f99721 142
bogdanm 85:024bf7f99721 143
bogdanm 85:024bf7f99721 144 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 85:024bf7f99721 145 /* TI CCS specific functions */
bogdanm 85:024bf7f99721 146
bogdanm 85:024bf7f99721 147 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 85:024bf7f99721 148 #include <cmsis_ccs.h>
bogdanm 85:024bf7f99721 149
bogdanm 85:024bf7f99721 150 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 85:024bf7f99721 151
bogdanm 85:024bf7f99721 152
bogdanm 85:024bf7f99721 153
bogdanm 85:024bf7f99721 154 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 85:024bf7f99721 155 /* GNU gcc specific functions */
bogdanm 85:024bf7f99721 156
bogdanm 85:024bf7f99721 157 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 85:024bf7f99721 158 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 159 {
bogdanm 85:024bf7f99721 160 uint32_t result;
bogdanm 85:024bf7f99721 161
bogdanm 85:024bf7f99721 162 __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 163 return(result);
bogdanm 85:024bf7f99721 164 }
bogdanm 85:024bf7f99721 165
bogdanm 85:024bf7f99721 166 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 167 {
bogdanm 85:024bf7f99721 168 uint32_t result;
bogdanm 85:024bf7f99721 169
bogdanm 85:024bf7f99721 170 __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 171 return(result);
bogdanm 85:024bf7f99721 172 }
bogdanm 85:024bf7f99721 173
bogdanm 85:024bf7f99721 174 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 175 {
bogdanm 85:024bf7f99721 176 uint32_t result;
bogdanm 85:024bf7f99721 177
bogdanm 85:024bf7f99721 178 __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 179 return(result);
bogdanm 85:024bf7f99721 180 }
bogdanm 85:024bf7f99721 181
bogdanm 85:024bf7f99721 182 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 183 {
bogdanm 85:024bf7f99721 184 uint32_t result;
bogdanm 85:024bf7f99721 185
bogdanm 85:024bf7f99721 186 __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 187 return(result);
bogdanm 85:024bf7f99721 188 }
bogdanm 85:024bf7f99721 189
bogdanm 85:024bf7f99721 190 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 191 {
bogdanm 85:024bf7f99721 192 uint32_t result;
bogdanm 85:024bf7f99721 193
bogdanm 85:024bf7f99721 194 __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 195 return(result);
bogdanm 85:024bf7f99721 196 }
bogdanm 85:024bf7f99721 197
bogdanm 85:024bf7f99721 198 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 199 {
bogdanm 85:024bf7f99721 200 uint32_t result;
bogdanm 85:024bf7f99721 201
bogdanm 85:024bf7f99721 202 __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 203 return(result);
bogdanm 85:024bf7f99721 204 }
bogdanm 85:024bf7f99721 205
bogdanm 85:024bf7f99721 206
bogdanm 85:024bf7f99721 207 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 208 {
bogdanm 85:024bf7f99721 209 uint32_t result;
bogdanm 85:024bf7f99721 210
bogdanm 85:024bf7f99721 211 __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 212 return(result);
bogdanm 85:024bf7f99721 213 }
bogdanm 85:024bf7f99721 214
bogdanm 85:024bf7f99721 215 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 216 {
bogdanm 85:024bf7f99721 217 uint32_t result;
bogdanm 85:024bf7f99721 218
bogdanm 85:024bf7f99721 219 __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 220 return(result);
bogdanm 85:024bf7f99721 221 }
bogdanm 85:024bf7f99721 222
bogdanm 85:024bf7f99721 223 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 224 {
bogdanm 85:024bf7f99721 225 uint32_t result;
bogdanm 85:024bf7f99721 226
bogdanm 85:024bf7f99721 227 __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 228 return(result);
bogdanm 85:024bf7f99721 229 }
bogdanm 85:024bf7f99721 230
bogdanm 85:024bf7f99721 231 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 232 {
bogdanm 85:024bf7f99721 233 uint32_t result;
bogdanm 85:024bf7f99721 234
bogdanm 85:024bf7f99721 235 __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 236 return(result);
bogdanm 85:024bf7f99721 237 }
bogdanm 85:024bf7f99721 238
bogdanm 85:024bf7f99721 239 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 240 {
bogdanm 85:024bf7f99721 241 uint32_t result;
bogdanm 85:024bf7f99721 242
bogdanm 85:024bf7f99721 243 __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 244 return(result);
bogdanm 85:024bf7f99721 245 }
bogdanm 85:024bf7f99721 246
bogdanm 85:024bf7f99721 247 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 248 {
bogdanm 85:024bf7f99721 249 uint32_t result;
bogdanm 85:024bf7f99721 250
bogdanm 85:024bf7f99721 251 __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 252 return(result);
bogdanm 85:024bf7f99721 253 }
bogdanm 85:024bf7f99721 254
bogdanm 85:024bf7f99721 255
bogdanm 85:024bf7f99721 256 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 257 {
bogdanm 85:024bf7f99721 258 uint32_t result;
bogdanm 85:024bf7f99721 259
bogdanm 85:024bf7f99721 260 __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 261 return(result);
bogdanm 85:024bf7f99721 262 }
bogdanm 85:024bf7f99721 263
bogdanm 85:024bf7f99721 264 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 265 {
bogdanm 85:024bf7f99721 266 uint32_t result;
bogdanm 85:024bf7f99721 267
bogdanm 85:024bf7f99721 268 __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 269 return(result);
bogdanm 85:024bf7f99721 270 }
bogdanm 85:024bf7f99721 271
bogdanm 85:024bf7f99721 272 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 273 {
bogdanm 85:024bf7f99721 274 uint32_t result;
bogdanm 85:024bf7f99721 275
bogdanm 85:024bf7f99721 276 __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 277 return(result);
bogdanm 85:024bf7f99721 278 }
bogdanm 85:024bf7f99721 279
bogdanm 85:024bf7f99721 280 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 281 {
bogdanm 85:024bf7f99721 282 uint32_t result;
bogdanm 85:024bf7f99721 283
bogdanm 85:024bf7f99721 284 __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 285 return(result);
bogdanm 85:024bf7f99721 286 }
bogdanm 85:024bf7f99721 287
bogdanm 85:024bf7f99721 288 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 289 {
bogdanm 85:024bf7f99721 290 uint32_t result;
bogdanm 85:024bf7f99721 291
bogdanm 85:024bf7f99721 292 __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 293 return(result);
bogdanm 85:024bf7f99721 294 }
bogdanm 85:024bf7f99721 295
bogdanm 85:024bf7f99721 296 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 297 {
bogdanm 85:024bf7f99721 298 uint32_t result;
bogdanm 85:024bf7f99721 299
bogdanm 85:024bf7f99721 300 __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 301 return(result);
bogdanm 85:024bf7f99721 302 }
bogdanm 85:024bf7f99721 303
bogdanm 85:024bf7f99721 304 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 305 {
bogdanm 85:024bf7f99721 306 uint32_t result;
bogdanm 85:024bf7f99721 307
bogdanm 85:024bf7f99721 308 __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 309 return(result);
bogdanm 85:024bf7f99721 310 }
bogdanm 85:024bf7f99721 311
bogdanm 85:024bf7f99721 312 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 313 {
bogdanm 85:024bf7f99721 314 uint32_t result;
bogdanm 85:024bf7f99721 315
bogdanm 85:024bf7f99721 316 __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 317 return(result);
bogdanm 85:024bf7f99721 318 }
bogdanm 85:024bf7f99721 319
bogdanm 85:024bf7f99721 320 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 321 {
bogdanm 85:024bf7f99721 322 uint32_t result;
bogdanm 85:024bf7f99721 323
bogdanm 85:024bf7f99721 324 __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 325 return(result);
bogdanm 85:024bf7f99721 326 }
bogdanm 85:024bf7f99721 327
bogdanm 85:024bf7f99721 328 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 329 {
bogdanm 85:024bf7f99721 330 uint32_t result;
bogdanm 85:024bf7f99721 331
bogdanm 85:024bf7f99721 332 __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 333 return(result);
bogdanm 85:024bf7f99721 334 }
bogdanm 85:024bf7f99721 335
bogdanm 85:024bf7f99721 336 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 337 {
bogdanm 85:024bf7f99721 338 uint32_t result;
bogdanm 85:024bf7f99721 339
bogdanm 85:024bf7f99721 340 __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 341 return(result);
bogdanm 85:024bf7f99721 342 }
bogdanm 85:024bf7f99721 343
bogdanm 85:024bf7f99721 344 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 345 {
bogdanm 85:024bf7f99721 346 uint32_t result;
bogdanm 85:024bf7f99721 347
bogdanm 85:024bf7f99721 348 __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 349 return(result);
bogdanm 85:024bf7f99721 350 }
bogdanm 85:024bf7f99721 351
bogdanm 85:024bf7f99721 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 353 {
bogdanm 85:024bf7f99721 354 uint32_t result;
bogdanm 85:024bf7f99721 355
bogdanm 85:024bf7f99721 356 __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 357 return(result);
bogdanm 85:024bf7f99721 358 }
bogdanm 85:024bf7f99721 359
bogdanm 85:024bf7f99721 360 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 361 {
bogdanm 85:024bf7f99721 362 uint32_t result;
bogdanm 85:024bf7f99721 363
bogdanm 85:024bf7f99721 364 __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 365 return(result);
bogdanm 85:024bf7f99721 366 }
bogdanm 85:024bf7f99721 367
bogdanm 85:024bf7f99721 368 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 369 {
bogdanm 85:024bf7f99721 370 uint32_t result;
bogdanm 85:024bf7f99721 371
bogdanm 85:024bf7f99721 372 __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 373 return(result);
bogdanm 85:024bf7f99721 374 }
bogdanm 85:024bf7f99721 375
bogdanm 85:024bf7f99721 376 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 377 {
bogdanm 85:024bf7f99721 378 uint32_t result;
bogdanm 85:024bf7f99721 379
bogdanm 85:024bf7f99721 380 __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 381 return(result);
bogdanm 85:024bf7f99721 382 }
bogdanm 85:024bf7f99721 383
bogdanm 85:024bf7f99721 384 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 385 {
bogdanm 85:024bf7f99721 386 uint32_t result;
bogdanm 85:024bf7f99721 387
bogdanm 85:024bf7f99721 388 __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 389 return(result);
bogdanm 85:024bf7f99721 390 }
bogdanm 85:024bf7f99721 391
bogdanm 85:024bf7f99721 392 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 393 {
bogdanm 85:024bf7f99721 394 uint32_t result;
bogdanm 85:024bf7f99721 395
bogdanm 85:024bf7f99721 396 __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 397 return(result);
bogdanm 85:024bf7f99721 398 }
bogdanm 85:024bf7f99721 399
bogdanm 85:024bf7f99721 400 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 401 {
bogdanm 85:024bf7f99721 402 uint32_t result;
bogdanm 85:024bf7f99721 403
bogdanm 85:024bf7f99721 404 __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 405 return(result);
bogdanm 85:024bf7f99721 406 }
bogdanm 85:024bf7f99721 407
bogdanm 85:024bf7f99721 408 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 409 {
bogdanm 85:024bf7f99721 410 uint32_t result;
bogdanm 85:024bf7f99721 411
bogdanm 85:024bf7f99721 412 __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 413 return(result);
bogdanm 85:024bf7f99721 414 }
bogdanm 85:024bf7f99721 415
bogdanm 85:024bf7f99721 416 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 417 {
bogdanm 85:024bf7f99721 418 uint32_t result;
bogdanm 85:024bf7f99721 419
bogdanm 85:024bf7f99721 420 __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 421 return(result);
bogdanm 85:024bf7f99721 422 }
bogdanm 85:024bf7f99721 423
bogdanm 85:024bf7f99721 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 425 {
bogdanm 85:024bf7f99721 426 uint32_t result;
bogdanm 85:024bf7f99721 427
bogdanm 85:024bf7f99721 428 __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 429 return(result);
bogdanm 85:024bf7f99721 430 }
bogdanm 85:024bf7f99721 431
bogdanm 85:024bf7f99721 432 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 433 {
bogdanm 85:024bf7f99721 434 uint32_t result;
bogdanm 85:024bf7f99721 435
bogdanm 85:024bf7f99721 436 __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 437 return(result);
bogdanm 85:024bf7f99721 438 }
bogdanm 85:024bf7f99721 439
bogdanm 85:024bf7f99721 440 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 441 {
bogdanm 85:024bf7f99721 442 uint32_t result;
bogdanm 85:024bf7f99721 443
bogdanm 85:024bf7f99721 444 __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 445 return(result);
bogdanm 85:024bf7f99721 446 }
bogdanm 85:024bf7f99721 447
bogdanm 85:024bf7f99721 448 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 449 {
bogdanm 85:024bf7f99721 450 uint32_t result;
bogdanm 85:024bf7f99721 451
bogdanm 85:024bf7f99721 452 __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 453 return(result);
bogdanm 85:024bf7f99721 454 }
bogdanm 85:024bf7f99721 455
bogdanm 85:024bf7f99721 456 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 85:024bf7f99721 457 {
bogdanm 85:024bf7f99721 458 uint32_t result;
bogdanm 85:024bf7f99721 459
bogdanm 85:024bf7f99721 460 __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 85:024bf7f99721 461 return(result);
bogdanm 85:024bf7f99721 462 }
bogdanm 85:024bf7f99721 463
bogdanm 85:024bf7f99721 464 #define __SSAT16(ARG1,ARG2) \
bogdanm 85:024bf7f99721 465 ({ \
bogdanm 85:024bf7f99721 466 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 85:024bf7f99721 467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 85:024bf7f99721 468 __RES; \
bogdanm 85:024bf7f99721 469 })
bogdanm 85:024bf7f99721 470
bogdanm 85:024bf7f99721 471 #define __USAT16(ARG1,ARG2) \
bogdanm 85:024bf7f99721 472 ({ \
bogdanm 85:024bf7f99721 473 uint32_t __RES, __ARG1 = (ARG1); \
bogdanm 85:024bf7f99721 474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
bogdanm 85:024bf7f99721 475 __RES; \
bogdanm 85:024bf7f99721 476 })
bogdanm 85:024bf7f99721 477
bogdanm 85:024bf7f99721 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
bogdanm 85:024bf7f99721 479 {
bogdanm 85:024bf7f99721 480 uint32_t result;
bogdanm 85:024bf7f99721 481
bogdanm 85:024bf7f99721 482 __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 85:024bf7f99721 483 return(result);
bogdanm 85:024bf7f99721 484 }
bogdanm 85:024bf7f99721 485
bogdanm 85:024bf7f99721 486 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 487 {
bogdanm 85:024bf7f99721 488 uint32_t result;
bogdanm 85:024bf7f99721 489
bogdanm 85:024bf7f99721 490 __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 491 return(result);
bogdanm 85:024bf7f99721 492 }
bogdanm 85:024bf7f99721 493
bogdanm 85:024bf7f99721 494 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
bogdanm 85:024bf7f99721 495 {
bogdanm 85:024bf7f99721 496 uint32_t result;
bogdanm 85:024bf7f99721 497
bogdanm 85:024bf7f99721 498 __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
bogdanm 85:024bf7f99721 499 return(result);
bogdanm 85:024bf7f99721 500 }
bogdanm 85:024bf7f99721 501
bogdanm 85:024bf7f99721 502 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 503 {
bogdanm 85:024bf7f99721 504 uint32_t result;
bogdanm 85:024bf7f99721 505
bogdanm 85:024bf7f99721 506 __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 507 return(result);
bogdanm 85:024bf7f99721 508 }
bogdanm 85:024bf7f99721 509
bogdanm 85:024bf7f99721 510 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 511 {
bogdanm 85:024bf7f99721 512 uint32_t result;
bogdanm 85:024bf7f99721 513
bogdanm 85:024bf7f99721 514 __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 515 return(result);
bogdanm 85:024bf7f99721 516 }
bogdanm 85:024bf7f99721 517
bogdanm 85:024bf7f99721 518 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 519 {
bogdanm 85:024bf7f99721 520 uint32_t result;
bogdanm 85:024bf7f99721 521
bogdanm 85:024bf7f99721 522 __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 523 return(result);
bogdanm 85:024bf7f99721 524 }
bogdanm 85:024bf7f99721 525
bogdanm 85:024bf7f99721 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 85:024bf7f99721 527 {
bogdanm 85:024bf7f99721 528 uint32_t result;
bogdanm 85:024bf7f99721 529
bogdanm 85:024bf7f99721 530 __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 85:024bf7f99721 531 return(result);
bogdanm 85:024bf7f99721 532 }
bogdanm 85:024bf7f99721 533
bogdanm 85:024bf7f99721 534 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 85:024bf7f99721 535 {
bogdanm 85:024bf7f99721 536 uint32_t result;
bogdanm 85:024bf7f99721 537
bogdanm 85:024bf7f99721 538 __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 85:024bf7f99721 539 return(result);
bogdanm 85:024bf7f99721 540 }
bogdanm 85:024bf7f99721 541
bogdanm 85:024bf7f99721 542 #define __SMLALD(ARG1,ARG2,ARG3) \
bogdanm 85:024bf7f99721 543 ({ \
bogdanm 85:024bf7f99721 544 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 85:024bf7f99721 545 __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 85:024bf7f99721 546 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 85:024bf7f99721 547 })
bogdanm 85:024bf7f99721 548
bogdanm 85:024bf7f99721 549 #define __SMLALDX(ARG1,ARG2,ARG3) \
bogdanm 85:024bf7f99721 550 ({ \
bogdanm 85:024bf7f99721 551 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((uint64_t)(ARG3) >> 32), __ARG3_L = (uint32_t)((uint64_t)(ARG3) & 0xFFFFFFFFUL); \
bogdanm 85:024bf7f99721 552 __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 85:024bf7f99721 553 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 85:024bf7f99721 554 })
bogdanm 85:024bf7f99721 555
bogdanm 85:024bf7f99721 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 557 {
bogdanm 85:024bf7f99721 558 uint32_t result;
bogdanm 85:024bf7f99721 559
bogdanm 85:024bf7f99721 560 __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 561 return(result);
bogdanm 85:024bf7f99721 562 }
bogdanm 85:024bf7f99721 563
bogdanm 85:024bf7f99721 564 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 565 {
bogdanm 85:024bf7f99721 566 uint32_t result;
bogdanm 85:024bf7f99721 567
bogdanm 85:024bf7f99721 568 __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 569 return(result);
bogdanm 85:024bf7f99721 570 }
bogdanm 85:024bf7f99721 571
bogdanm 85:024bf7f99721 572 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 85:024bf7f99721 573 {
bogdanm 85:024bf7f99721 574 uint32_t result;
bogdanm 85:024bf7f99721 575
bogdanm 85:024bf7f99721 576 __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 85:024bf7f99721 577 return(result);
bogdanm 85:024bf7f99721 578 }
bogdanm 85:024bf7f99721 579
bogdanm 85:024bf7f99721 580 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
bogdanm 85:024bf7f99721 581 {
bogdanm 85:024bf7f99721 582 uint32_t result;
bogdanm 85:024bf7f99721 583
bogdanm 85:024bf7f99721 584 __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
bogdanm 85:024bf7f99721 585 return(result);
bogdanm 85:024bf7f99721 586 }
bogdanm 85:024bf7f99721 587
bogdanm 85:024bf7f99721 588 #define __SMLSLD(ARG1,ARG2,ARG3) \
bogdanm 85:024bf7f99721 589 ({ \
bogdanm 85:024bf7f99721 590 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 85:024bf7f99721 591 __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 85:024bf7f99721 592 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 85:024bf7f99721 593 })
bogdanm 85:024bf7f99721 594
bogdanm 85:024bf7f99721 595 #define __SMLSLDX(ARG1,ARG2,ARG3) \
bogdanm 85:024bf7f99721 596 ({ \
bogdanm 85:024bf7f99721 597 uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32_t)((ARG3) & 0xFFFFFFFFUL); \
bogdanm 85:024bf7f99721 598 __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (__ARG3_L), "=r" (__ARG3_H) : "r" (__ARG1), "r" (__ARG2), "0" (__ARG3_L), "1" (__ARG3_H) ); \
bogdanm 85:024bf7f99721 599 (uint64_t)(((uint64_t)__ARG3_H << 32) | __ARG3_L); \
bogdanm 85:024bf7f99721 600 })
bogdanm 85:024bf7f99721 601
bogdanm 85:024bf7f99721 602 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 603 {
bogdanm 85:024bf7f99721 604 uint32_t result;
bogdanm 85:024bf7f99721 605
bogdanm 85:024bf7f99721 606 __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 607 return(result);
bogdanm 85:024bf7f99721 608 }
bogdanm 85:024bf7f99721 609
bogdanm 85:024bf7f99721 610 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 611 {
bogdanm 85:024bf7f99721 612 uint32_t result;
bogdanm 85:024bf7f99721 613
bogdanm 85:024bf7f99721 614 __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 615 return(result);
bogdanm 85:024bf7f99721 616 }
bogdanm 85:024bf7f99721 617
bogdanm 85:024bf7f99721 618 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
bogdanm 85:024bf7f99721 619 {
bogdanm 85:024bf7f99721 620 uint32_t result;
bogdanm 85:024bf7f99721 621
bogdanm 85:024bf7f99721 622 __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
bogdanm 85:024bf7f99721 623 return(result);
bogdanm 85:024bf7f99721 624 }
bogdanm 85:024bf7f99721 625
bogdanm 85:024bf7f99721 626 #define __PKHBT(ARG1,ARG2,ARG3) \
bogdanm 85:024bf7f99721 627 ({ \
bogdanm 85:024bf7f99721 628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 85:024bf7f99721 629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 85:024bf7f99721 630 __RES; \
bogdanm 85:024bf7f99721 631 })
bogdanm 85:024bf7f99721 632
bogdanm 85:024bf7f99721 633 #define __PKHTB(ARG1,ARG2,ARG3) \
bogdanm 85:024bf7f99721 634 ({ \
bogdanm 85:024bf7f99721 635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
bogdanm 85:024bf7f99721 636 if (ARG3 == 0) \
bogdanm 85:024bf7f99721 637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
bogdanm 85:024bf7f99721 638 else \
bogdanm 85:024bf7f99721 639 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
bogdanm 85:024bf7f99721 640 __RES; \
bogdanm 85:024bf7f99721 641 })
bogdanm 85:024bf7f99721 642
bogdanm 85:024bf7f99721 643 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
bogdanm 85:024bf7f99721 644 {
bogdanm 85:024bf7f99721 645 int32_t result;
bogdanm 85:024bf7f99721 646
bogdanm 85:024bf7f99721 647 __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
bogdanm 85:024bf7f99721 648 return(result);
bogdanm 85:024bf7f99721 649 }
bogdanm 85:024bf7f99721 650
bogdanm 85:024bf7f99721 651 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 85:024bf7f99721 652
bogdanm 85:024bf7f99721 653
bogdanm 85:024bf7f99721 654
bogdanm 85:024bf7f99721 655 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 85:024bf7f99721 656 /* TASKING carm specific functions */
bogdanm 85:024bf7f99721 657
bogdanm 85:024bf7f99721 658
bogdanm 85:024bf7f99721 659 /*------ CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 85:024bf7f99721 660 /* not yet supported */
bogdanm 85:024bf7f99721 661 /*-- End CM4 SIMD Intrinsics -----------------------------------------------------*/
bogdanm 85:024bf7f99721 662
bogdanm 85:024bf7f99721 663
bogdanm 85:024bf7f99721 664 #endif
bogdanm 85:024bf7f99721 665
bogdanm 85:024bf7f99721 666 /*@} end of group CMSIS_SIMD_intrinsics */
bogdanm 85:024bf7f99721 667
bogdanm 85:024bf7f99721 668
bogdanm 85:024bf7f99721 669 #endif /* __CORE_CM4_SIMD_H */
bogdanm 85:024bf7f99721 670
bogdanm 85:024bf7f99721 671 #ifdef __cplusplus
bogdanm 85:024bf7f99721 672 }
bogdanm 85:024bf7f99721 673 #endif