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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_NXP/TARGET_LPC15XX/us_ticker.c@103:9b881da47c92, 2014-02-20 (annotated)

Committer:
mbed_official
Date:
Thu Feb 20 23:00:08 2014 +0000
Revision:
103:9b881da47c92
Child:
117:e0a7df0a9a56
Synchronized with git revision 1f2da5f6047218c8c45334c11bdaaaeab3c18841



Full URL: https://github.com/mbedmicro/mbed/commit/1f2da5f6047218c8c45334c11bdaaaeab3c18841/



NXP master merge

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 103:9b881da47c92 1 /* mbed Microcontroller Library
mbed_official 103:9b881da47c92 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 103:9b881da47c92 3 *
mbed_official 103:9b881da47c92 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 103:9b881da47c92 5 * you may not use this file except in compliance with the License.
mbed_official 103:9b881da47c92 6 * You may obtain a copy of the License at
mbed_official 103:9b881da47c92 7 *
mbed_official 103:9b881da47c92 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 103:9b881da47c92 9 *
mbed_official 103:9b881da47c92 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 103:9b881da47c92 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 103:9b881da47c92 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 103:9b881da47c92 13 * See the License for the specific language governing permissions and
mbed_official 103:9b881da47c92 14 * limitations under the License.
mbed_official 103:9b881da47c92 15 */
mbed_official 103:9b881da47c92 16 #include <stddef.h>
mbed_official 103:9b881da47c92 17 #include "us_ticker_api.h"
mbed_official 103:9b881da47c92 18 #include "PeripheralNames.h"
mbed_official 103:9b881da47c92 19
mbed_official 103:9b881da47c92 20 #define US_TICKER_TIMER_IRQn SCT0_IRQn
mbed_official 103:9b881da47c92 21
mbed_official 103:9b881da47c92 22 int us_ticker_inited = 0;
mbed_official 103:9b881da47c92 23
mbed_official 103:9b881da47c92 24 void us_ticker_init(void) {
mbed_official 103:9b881da47c92 25 if (us_ticker_inited) return;
mbed_official 103:9b881da47c92 26 us_ticker_inited = 1;
mbed_official 103:9b881da47c92 27
mbed_official 103:9b881da47c92 28 // Enable the SCT0 clock
mbed_official 103:9b881da47c92 29 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << 2);
mbed_official 103:9b881da47c92 30
mbed_official 103:9b881da47c92 31 // Clear peripheral reset the SCT0:
mbed_official 103:9b881da47c92 32 LPC_SYSCON->PRESETCTRL1 |= (1 << 2);
mbed_official 103:9b881da47c92 33 LPC_SYSCON->PRESETCTRL1 &= ~(1 << 2);
mbed_official 103:9b881da47c92 34
mbed_official 103:9b881da47c92 35 // Unified counter (32 bits)
mbed_official 103:9b881da47c92 36 LPC_SCT0->CONFIG |= 1;
mbed_official 103:9b881da47c92 37
mbed_official 103:9b881da47c92 38 // halt and clear the counter
mbed_official 103:9b881da47c92 39 LPC_SCT0->CTRL |= (1 << 2) | (1 << 3);
mbed_official 103:9b881da47c92 40
mbed_official 103:9b881da47c92 41 // System Clock (12)MHz -> us_ticker (1)MHz
mbed_official 103:9b881da47c92 42 LPC_SCT0->CTRL |= ((SystemCoreClock/1000000 - 1) << 5);
mbed_official 103:9b881da47c92 43
mbed_official 103:9b881da47c92 44 // unhalt the counter:
mbed_official 103:9b881da47c92 45 // - clearing bit 2 of the CTRL register
mbed_official 103:9b881da47c92 46 LPC_SCT0->CTRL &= ~(1 << 2);
mbed_official 103:9b881da47c92 47
mbed_official 103:9b881da47c92 48 NVIC_SetVector(US_TICKER_TIMER_IRQn, (uint32_t)us_ticker_irq_handler);
mbed_official 103:9b881da47c92 49 NVIC_EnableIRQ(US_TICKER_TIMER_IRQn);
mbed_official 103:9b881da47c92 50 }
mbed_official 103:9b881da47c92 51
mbed_official 103:9b881da47c92 52 uint32_t us_ticker_read() {
mbed_official 103:9b881da47c92 53 if (!us_ticker_inited)
mbed_official 103:9b881da47c92 54 us_ticker_init();
mbed_official 103:9b881da47c92 55
mbed_official 103:9b881da47c92 56 return LPC_SCT0->COUNT;
mbed_official 103:9b881da47c92 57 }
mbed_official 103:9b881da47c92 58
mbed_official 103:9b881da47c92 59 void us_ticker_set_interrupt(unsigned int timestamp) {
mbed_official 103:9b881da47c92 60 // halt the counter:
mbed_official 103:9b881da47c92 61 // - setting bit 2 of the CTRL register
mbed_official 103:9b881da47c92 62 LPC_SCT0->CTRL |= (1 << 2);
mbed_official 103:9b881da47c92 63
mbed_official 103:9b881da47c92 64 // set timestamp in compare register
mbed_official 103:9b881da47c92 65 LPC_SCT0->MATCH0 = timestamp;
mbed_official 103:9b881da47c92 66
mbed_official 103:9b881da47c92 67 // unhalt the counter:
mbed_official 103:9b881da47c92 68 // - clearing bit 2 of the CTRL register
mbed_official 103:9b881da47c92 69 LPC_SCT0->CTRL &= ~(1 << 2);
mbed_official 103:9b881da47c92 70
mbed_official 103:9b881da47c92 71 // if events are not enabled, enable them
mbed_official 103:9b881da47c92 72 if (!(LPC_SCT0->EVEN & 0x01)) {
mbed_official 103:9b881da47c92 73
mbed_official 103:9b881da47c92 74 // comb mode = match only
mbed_official 103:9b881da47c92 75 LPC_SCT0->EV0_CTRL = (1 << 12);
mbed_official 103:9b881da47c92 76
mbed_official 103:9b881da47c92 77 // ref manual:
mbed_official 103:9b881da47c92 78 // In simple applications that do not
mbed_official 103:9b881da47c92 79 // use states, write 0x01 to this
mbed_official 103:9b881da47c92 80 // register to enable an event
mbed_official 103:9b881da47c92 81 LPC_SCT0->EV0_STATE |= 0x1;
mbed_official 103:9b881da47c92 82
mbed_official 103:9b881da47c92 83 // enable events
mbed_official 103:9b881da47c92 84 LPC_SCT0->EVEN |= 0x1;
mbed_official 103:9b881da47c92 85 }
mbed_official 103:9b881da47c92 86 }
mbed_official 103:9b881da47c92 87
mbed_official 103:9b881da47c92 88 void us_ticker_disable_interrupt(void) {
mbed_official 103:9b881da47c92 89 LPC_SCT0->EVEN &= ~1;
mbed_official 103:9b881da47c92 90 }
mbed_official 103:9b881da47c92 91
mbed_official 103:9b881da47c92 92 void us_ticker_clear_interrupt(void) {
mbed_official 103:9b881da47c92 93 LPC_SCT0->EVFLAG = 1;
mbed_official 103:9b881da47c92 94 }