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Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_NXP/TARGET_LPC23XX/analogin_api.c@463:5c73c3744533, 2015-02-03 (annotated)

Committer:
mbed_official
Date:
Tue Feb 03 17:00:07 2015 +0000
Revision:
463:5c73c3744533
Parent:
227:7bd0639b8911 
Synchronized with git revision 134a67aab259d410373367cb96b73420b390d385



Full URL: https://github.com/mbedmicro/mbed/commit/134a67aab259d410373367cb96b73420b390d385/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
mbed_official 227:7bd0639b8911 16 #include "mbed_assert.h"
emilmont 10:3bc89ef62ce7 17 #include "analogin_api.h"
emilmont 10:3bc89ef62ce7 18 #include "cmsis.h"
emilmont 10:3bc89ef62ce7 19 #include "pinmap.h"
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 #define ANALOGIN_MEDIAN_FILTER 1
emilmont 10:3bc89ef62ce7 22
emilmont 10:3bc89ef62ce7 23 #define ADC_10BIT_RANGE 0x3FF
emilmont 10:3bc89ef62ce7 24 #define ADC_12BIT_RANGE 0xFFF
emilmont 10:3bc89ef62ce7 25
emilmont 10:3bc89ef62ce7 26 static inline int div_round_up(int x, int y) {
emilmont 10:3bc89ef62ce7 27 return (x + (y - 1)) / y;
emilmont 10:3bc89ef62ce7 28 }
emilmont 10:3bc89ef62ce7 29
emilmont 10:3bc89ef62ce7 30 static const PinMap PinMap_ADC[] = {
emilmont 10:3bc89ef62ce7 31 {P0_23, ADC0_0, 1},
emilmont 10:3bc89ef62ce7 32 {P0_24, ADC0_1, 1},
emilmont 10:3bc89ef62ce7 33 {P0_25, ADC0_2, 1},
emilmont 10:3bc89ef62ce7 34 {P0_26, ADC0_3, 1},
emilmont 10:3bc89ef62ce7 35 {P1_30, ADC0_4, 3},
emilmont 10:3bc89ef62ce7 36 {P1_31, ADC0_5, 3},
emilmont 10:3bc89ef62ce7 37 {NC, NC, 0}
emilmont 10:3bc89ef62ce7 38 };
emilmont 10:3bc89ef62ce7 39
emilmont 10:3bc89ef62ce7 40 #define ADC_RANGE ADC_10BIT_RANGE
emilmont 10:3bc89ef62ce7 41
emilmont 10:3bc89ef62ce7 42
emilmont 10:3bc89ef62ce7 43 void analogin_init(analogin_t *obj, PinName pin) {
emilmont 10:3bc89ef62ce7 44 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
mbed_official 227:7bd0639b8911 45 MBED_ASSERT(obj->adc != (ADCName)NC);
emilmont 10:3bc89ef62ce7 46
emilmont 10:3bc89ef62ce7 47 // ensure power is turned on
emilmont 10:3bc89ef62ce7 48 LPC_SC->PCONP |= (1 << 12);
emilmont 10:3bc89ef62ce7 49
emilmont 10:3bc89ef62ce7 50 // set PCLK of ADC to /1
emilmont 10:3bc89ef62ce7 51 LPC_SC->PCLKSEL0 &= ~(0x3 << 24);
emilmont 10:3bc89ef62ce7 52 LPC_SC->PCLKSEL0 |= (0x1 << 24);
emilmont 10:3bc89ef62ce7 53 uint32_t PCLK = SystemCoreClock;
emilmont 10:3bc89ef62ce7 54
emilmont 10:3bc89ef62ce7 55 // calculate minimum clock divider
emilmont 10:3bc89ef62ce7 56 // clkdiv = divider - 1
emilmont 10:3bc89ef62ce7 57 uint32_t MAX_ADC_CLK = 13000000;
emilmont 10:3bc89ef62ce7 58 uint32_t clkdiv = div_round_up(PCLK, MAX_ADC_CLK) - 1;
emilmont 10:3bc89ef62ce7 59
emilmont 10:3bc89ef62ce7 60 // Set the generic software-controlled ADC settings
emilmont 10:3bc89ef62ce7 61 LPC_ADC->ADCR = (0 << 0) // SEL: 0 = no channels selected
emilmont 10:3bc89ef62ce7 62 | (clkdiv << 8) // CLKDIV: PCLK max ~= 25MHz, /25 to give safe 1MHz at fastest
emilmont 10:3bc89ef62ce7 63 | (0 << 16) // BURST: 0 = software control
emilmont 10:3bc89ef62ce7 64 | (0 << 17) // CLKS: not applicable
emilmont 10:3bc89ef62ce7 65 | (1 << 21) // PDN: 1 = operational
emilmont 10:3bc89ef62ce7 66 | (0 << 24) // START: 0 = no start
emilmont 10:3bc89ef62ce7 67 | (0 << 27); // EDGE: not applicable
emilmont 10:3bc89ef62ce7 68
emilmont 10:3bc89ef62ce7 69 pinmap_pinout(pin, PinMap_ADC);
emilmont 10:3bc89ef62ce7 70 }
emilmont 10:3bc89ef62ce7 71
emilmont 10:3bc89ef62ce7 72 static inline uint32_t adc_read(analogin_t *obj) {
emilmont 10:3bc89ef62ce7 73 // Select the appropriate channel and start conversion
emilmont 10:3bc89ef62ce7 74 LPC_ADC->ADCR &= ~0xFF;
emilmont 10:3bc89ef62ce7 75 LPC_ADC->ADCR |= 1 << (int)obj->adc;
emilmont 10:3bc89ef62ce7 76 LPC_ADC->ADCR |= 1 << 24;
emilmont 10:3bc89ef62ce7 77
emilmont 10:3bc89ef62ce7 78 // Repeatedly get the sample data until DONE bit
emilmont 10:3bc89ef62ce7 79 unsigned int data;
emilmont 10:3bc89ef62ce7 80 do {
emilmont 10:3bc89ef62ce7 81 data = LPC_ADC->ADGDR;
emilmont 10:3bc89ef62ce7 82 } while ((data & ((unsigned int)1 << 31)) == 0);
emilmont 10:3bc89ef62ce7 83
emilmont 10:3bc89ef62ce7 84 // Stop conversion
emilmont 10:3bc89ef62ce7 85 LPC_ADC->ADCR &= ~(1 << 24);
emilmont 10:3bc89ef62ce7 86
emilmont 10:3bc89ef62ce7 87 return (data >> 6) & ADC_RANGE; // 10 bit
emilmont 10:3bc89ef62ce7 88 }
emilmont 10:3bc89ef62ce7 89
emilmont 10:3bc89ef62ce7 90 static inline void order(uint32_t *a, uint32_t *b) {
emilmont 10:3bc89ef62ce7 91 if (*a > *b) {
emilmont 10:3bc89ef62ce7 92 uint32_t t = *a;
emilmont 10:3bc89ef62ce7 93 *a = *b;
emilmont 10:3bc89ef62ce7 94 *b = t;
emilmont 10:3bc89ef62ce7 95 }
emilmont 10:3bc89ef62ce7 96 }
emilmont 10:3bc89ef62ce7 97
emilmont 10:3bc89ef62ce7 98 static inline uint32_t adc_read_u32(analogin_t *obj) {
emilmont 10:3bc89ef62ce7 99 uint32_t value;
emilmont 10:3bc89ef62ce7 100 #if ANALOGIN_MEDIAN_FILTER
emilmont 10:3bc89ef62ce7 101 uint32_t v1 = adc_read(obj);
emilmont 10:3bc89ef62ce7 102 uint32_t v2 = adc_read(obj);
emilmont 10:3bc89ef62ce7 103 uint32_t v3 = adc_read(obj);
emilmont 10:3bc89ef62ce7 104 order(&v1, &v2);
emilmont 10:3bc89ef62ce7 105 order(&v2, &v3);
emilmont 10:3bc89ef62ce7 106 order(&v1, &v2);
emilmont 10:3bc89ef62ce7 107 value = v2;
emilmont 10:3bc89ef62ce7 108 #else
emilmont 10:3bc89ef62ce7 109 value = adc_read(obj);
emilmont 10:3bc89ef62ce7 110 #endif
emilmont 10:3bc89ef62ce7 111 return value;
emilmont 10:3bc89ef62ce7 112 }
emilmont 10:3bc89ef62ce7 113
emilmont 10:3bc89ef62ce7 114 uint16_t analogin_read_u16(analogin_t *obj) {
emilmont 10:3bc89ef62ce7 115 uint32_t value = adc_read_u32(obj);
emilmont 10:3bc89ef62ce7 116
emilmont 10:3bc89ef62ce7 117 return (value << 6) | ((value >> 4) & 0x003F); // 10 bit
emilmont 10:3bc89ef62ce7 118 }
emilmont 10:3bc89ef62ce7 119
emilmont 10:3bc89ef62ce7 120 float analogin_read(analogin_t *obj) {
emilmont 10:3bc89ef62ce7 121 uint32_t value = adc_read_u32(obj);
emilmont 10:3bc89ef62ce7 122 return (float)value * (1.0f / (float)ADC_RANGE);
emilmont 10:3bc89ef62ce7 123 }