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This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_NXP/TARGET_LPC11UXX/i2c_api.c@463:5c73c3744533, 2015-02-03 (annotated)

Committer:
mbed_official
Date:
Tue Feb 03 17:00:07 2015 +0000
Revision:
463:5c73c3744533
Parent:
274:6937b19af361 
Synchronized with git revision 134a67aab259d410373367cb96b73420b390d385



Full URL: https://github.com/mbedmicro/mbed/commit/134a67aab259d410373367cb96b73420b390d385/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 13:0645d8841f51 1 /* mbed Microcontroller Library
bogdanm 13:0645d8841f51 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 13:0645d8841f51 3 *
bogdanm 13:0645d8841f51 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 13:0645d8841f51 5 * you may not use this file except in compliance with the License.
bogdanm 13:0645d8841f51 6 * You may obtain a copy of the License at
bogdanm 13:0645d8841f51 7 *
bogdanm 13:0645d8841f51 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 13:0645d8841f51 9 *
bogdanm 13:0645d8841f51 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 13:0645d8841f51 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 13:0645d8841f51 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 13:0645d8841f51 13 * See the License for the specific language governing permissions and
bogdanm 13:0645d8841f51 14 * limitations under the License.
bogdanm 13:0645d8841f51 15 */
mbed_official 227:7bd0639b8911 16 #include "mbed_assert.h"
bogdanm 13:0645d8841f51 17 #include "i2c_api.h"
bogdanm 13:0645d8841f51 18 #include "cmsis.h"
bogdanm 13:0645d8841f51 19 #include "pinmap.h"
mbed_official 274:6937b19af361 20 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
bogdanm 13:0645d8841f51 21
bogdanm 13:0645d8841f51 22 #define I2C_CONSET(x) (x->i2c->CONSET)
bogdanm 13:0645d8841f51 23 #define I2C_CONCLR(x) (x->i2c->CONCLR)
bogdanm 13:0645d8841f51 24 #define I2C_STAT(x) (x->i2c->STAT)
bogdanm 13:0645d8841f51 25 #define I2C_DAT(x) (x->i2c->DAT)
bogdanm 13:0645d8841f51 26 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
bogdanm 13:0645d8841f51 27 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
bogdanm 13:0645d8841f51 28
bogdanm 13:0645d8841f51 29 static const uint32_t I2C_addr_offset[2][4] = {
bogdanm 13:0645d8841f51 30 {0x0C, 0x20, 0x24, 0x28},
bogdanm 13:0645d8841f51 31 {0x30, 0x34, 0x38, 0x3C}
bogdanm 13:0645d8841f51 32 };
bogdanm 13:0645d8841f51 33
bogdanm 13:0645d8841f51 34 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
bogdanm 13:0645d8841f51 35 I2C_CONCLR(obj) = (start << 5)
bogdanm 13:0645d8841f51 36 | (stop << 4)
bogdanm 13:0645d8841f51 37 | (interrupt << 3)
bogdanm 13:0645d8841f51 38 | (acknowledge << 2);
bogdanm 13:0645d8841f51 39 }
bogdanm 13:0645d8841f51 40
bogdanm 13:0645d8841f51 41 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
bogdanm 13:0645d8841f51 42 I2C_CONSET(obj) = (start << 5)
bogdanm 13:0645d8841f51 43 | (stop << 4)
bogdanm 13:0645d8841f51 44 | (interrupt << 3)
bogdanm 13:0645d8841f51 45 | (acknowledge << 2);
bogdanm 13:0645d8841f51 46 }
bogdanm 13:0645d8841f51 47
bogdanm 13:0645d8841f51 48 // Clear the Serial Interrupt (SI)
bogdanm 13:0645d8841f51 49 static inline void i2c_clear_SI(i2c_t *obj) {
bogdanm 13:0645d8841f51 50 i2c_conclr(obj, 0, 0, 1, 0);
bogdanm 13:0645d8841f51 51 }
bogdanm 13:0645d8841f51 52
bogdanm 13:0645d8841f51 53 static inline int i2c_status(i2c_t *obj) {
bogdanm 13:0645d8841f51 54 return I2C_STAT(obj);
bogdanm 13:0645d8841f51 55 }
bogdanm 13:0645d8841f51 56
bogdanm 13:0645d8841f51 57 // Wait until the Serial Interrupt (SI) is set
bogdanm 13:0645d8841f51 58 static int i2c_wait_SI(i2c_t *obj) {
bogdanm 13:0645d8841f51 59 int timeout = 0;
bogdanm 13:0645d8841f51 60 while (!(I2C_CONSET(obj) & (1 << 3))) {
bogdanm 13:0645d8841f51 61 timeout++;
bogdanm 13:0645d8841f51 62 if (timeout > 100000) return -1;
bogdanm 13:0645d8841f51 63 }
bogdanm 13:0645d8841f51 64 return 0;
bogdanm 13:0645d8841f51 65 }
bogdanm 13:0645d8841f51 66
bogdanm 13:0645d8841f51 67 static inline void i2c_interface_enable(i2c_t *obj) {
bogdanm 13:0645d8841f51 68 I2C_CONSET(obj) = 0x40;
bogdanm 13:0645d8841f51 69 }
bogdanm 13:0645d8841f51 70
bogdanm 13:0645d8841f51 71 static inline void i2c_power_enable(i2c_t *obj) {
bogdanm 13:0645d8841f51 72 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5);
bogdanm 13:0645d8841f51 73 LPC_SYSCON->PRESETCTRL |= 1 << 1;
bogdanm 13:0645d8841f51 74 }
bogdanm 13:0645d8841f51 75
bogdanm 13:0645d8841f51 76 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
bogdanm 13:0645d8841f51 77 // determine the SPI to use
bogdanm 13:0645d8841f51 78 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
bogdanm 13:0645d8841f51 79 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
bogdanm 13:0645d8841f51 80 obj->i2c = (LPC_I2C_Type *)pinmap_merge(i2c_sda, i2c_scl);
mbed_official 227:7bd0639b8911 81 MBED_ASSERT((int)obj->i2c != NC);
bogdanm 13:0645d8841f51 82
bogdanm 13:0645d8841f51 83 // enable power
bogdanm 13:0645d8841f51 84 i2c_power_enable(obj);
bogdanm 13:0645d8841f51 85
bogdanm 13:0645d8841f51 86 // set default frequency at 100k
bogdanm 13:0645d8841f51 87 i2c_frequency(obj, 100000);
bogdanm 13:0645d8841f51 88 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 13:0645d8841f51 89 i2c_interface_enable(obj);
bogdanm 13:0645d8841f51 90
bogdanm 13:0645d8841f51 91 pinmap_pinout(sda, PinMap_I2C_SDA);
bogdanm 13:0645d8841f51 92 pinmap_pinout(scl, PinMap_I2C_SCL);
bogdanm 13:0645d8841f51 93 }
bogdanm 13:0645d8841f51 94
bogdanm 13:0645d8841f51 95 inline int i2c_start(i2c_t *obj) {
bogdanm 13:0645d8841f51 96 int status = 0;
bogdanm 13:0645d8841f51 97 // 8.1 Before master mode can be entered, I2CON must be initialised to:
bogdanm 13:0645d8841f51 98 // - I2EN STA STO SI AA - -
bogdanm 13:0645d8841f51 99 // - 1 0 0 0 x - -
bogdanm 13:0645d8841f51 100 // if AA = 0, it can't enter slave mode
bogdanm 13:0645d8841f51 101 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 13:0645d8841f51 102
bogdanm 13:0645d8841f51 103 // The master mode may now be entered by setting the STA bit
bogdanm 13:0645d8841f51 104 // this will generate a start condition when the bus becomes free
bogdanm 13:0645d8841f51 105 i2c_conset(obj, 1, 0, 0, 1);
bogdanm 13:0645d8841f51 106
bogdanm 13:0645d8841f51 107 i2c_wait_SI(obj);
bogdanm 13:0645d8841f51 108 status = i2c_status(obj);
bogdanm 13:0645d8841f51 109
bogdanm 13:0645d8841f51 110 // Clear start bit now transmitted, and interrupt bit
bogdanm 13:0645d8841f51 111 i2c_conclr(obj, 1, 0, 0, 0);
bogdanm 13:0645d8841f51 112 return status;
bogdanm 13:0645d8841f51 113 }
bogdanm 13:0645d8841f51 114
bogdanm 13:0645d8841f51 115 inline int i2c_stop(i2c_t *obj) {
bogdanm 13:0645d8841f51 116 int timeout = 0;
bogdanm 13:0645d8841f51 117
bogdanm 13:0645d8841f51 118 // write the stop bit
bogdanm 13:0645d8841f51 119 i2c_conset(obj, 0, 1, 0, 0);
bogdanm 13:0645d8841f51 120 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 121
bogdanm 13:0645d8841f51 122 // wait for STO bit to reset
bogdanm 13:0645d8841f51 123 while(I2C_CONSET(obj) & (1 << 4)) {
bogdanm 13:0645d8841f51 124 timeout ++;
bogdanm 13:0645d8841f51 125 if (timeout > 100000) return 1;
bogdanm 13:0645d8841f51 126 }
bogdanm 13:0645d8841f51 127
bogdanm 13:0645d8841f51 128 return 0;
bogdanm 13:0645d8841f51 129 }
bogdanm 13:0645d8841f51 130
bogdanm 13:0645d8841f51 131
bogdanm 13:0645d8841f51 132 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
bogdanm 13:0645d8841f51 133 // write the data
bogdanm 13:0645d8841f51 134 I2C_DAT(obj) = value;
bogdanm 13:0645d8841f51 135
bogdanm 13:0645d8841f51 136 // clear SI to init a send
bogdanm 13:0645d8841f51 137 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 138
bogdanm 13:0645d8841f51 139 // wait and return status
bogdanm 13:0645d8841f51 140 i2c_wait_SI(obj);
bogdanm 13:0645d8841f51 141 return i2c_status(obj);
bogdanm 13:0645d8841f51 142 }
bogdanm 13:0645d8841f51 143
bogdanm 13:0645d8841f51 144 static inline int i2c_do_read(i2c_t *obj, int last) {
bogdanm 13:0645d8841f51 145 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
bogdanm 13:0645d8841f51 146 if (last) {
bogdanm 13:0645d8841f51 147 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
bogdanm 13:0645d8841f51 148 } else {
bogdanm 13:0645d8841f51 149 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
bogdanm 13:0645d8841f51 150 }
bogdanm 13:0645d8841f51 151
bogdanm 13:0645d8841f51 152 // accept byte
bogdanm 13:0645d8841f51 153 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 154
bogdanm 13:0645d8841f51 155 // wait for it to arrive
bogdanm 13:0645d8841f51 156 i2c_wait_SI(obj);
bogdanm 13:0645d8841f51 157
bogdanm 13:0645d8841f51 158 // return the data
bogdanm 13:0645d8841f51 159 return (I2C_DAT(obj) & 0xFF);
bogdanm 13:0645d8841f51 160 }
bogdanm 13:0645d8841f51 161
bogdanm 13:0645d8841f51 162 void i2c_frequency(i2c_t *obj, int hz) {
bogdanm 13:0645d8841f51 163 // No peripheral clock divider on the M0
bogdanm 13:0645d8841f51 164 uint32_t PCLK = SystemCoreClock;
bogdanm 13:0645d8841f51 165
bogdanm 13:0645d8841f51 166 uint32_t pulse = PCLK / (hz * 2);
bogdanm 13:0645d8841f51 167
bogdanm 13:0645d8841f51 168 // I2C Rate
bogdanm 13:0645d8841f51 169 I2C_SCLL(obj, pulse);
bogdanm 13:0645d8841f51 170 I2C_SCLH(obj, pulse);
bogdanm 13:0645d8841f51 171 }
bogdanm 13:0645d8841f51 172
bogdanm 13:0645d8841f51 173 // The I2C does a read or a write as a whole operation
bogdanm 13:0645d8841f51 174 // There are two types of error conditions it can encounter
bogdanm 13:0645d8841f51 175 // 1) it can not obtain the bus
bogdanm 13:0645d8841f51 176 // 2) it gets error responses at part of the transmission
bogdanm 13:0645d8841f51 177 //
bogdanm 13:0645d8841f51 178 // We tackle them as follows:
bogdanm 13:0645d8841f51 179 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
bogdanm 13:0645d8841f51 180 // which basically turns it in to a 2)
bogdanm 13:0645d8841f51 181 // 2) on error, we use the standard error mechanisms to report/debug
bogdanm 13:0645d8841f51 182 //
bogdanm 13:0645d8841f51 183 // Therefore an I2C transaction should always complete. If it doesn't it is usually
bogdanm 13:0645d8841f51 184 // because something is setup wrong (e.g. wiring), and we don't need to programatically
bogdanm 13:0645d8841f51 185 // check for that
bogdanm 13:0645d8841f51 186
bogdanm 13:0645d8841f51 187 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
bogdanm 13:0645d8841f51 188 int count, status;
bogdanm 13:0645d8841f51 189
bogdanm 13:0645d8841f51 190 status = i2c_start(obj);
bogdanm 13:0645d8841f51 191
bogdanm 13:0645d8841f51 192 if ((status != 0x10) && (status != 0x08)) {
bogdanm 13:0645d8841f51 193 i2c_stop(obj);
bogdanm 13:0645d8841f51 194 return I2C_ERROR_BUS_BUSY;
bogdanm 13:0645d8841f51 195 }
bogdanm 13:0645d8841f51 196
bogdanm 13:0645d8841f51 197 status = i2c_do_write(obj, (address | 0x01), 1);
bogdanm 13:0645d8841f51 198 if (status != 0x40) {
bogdanm 13:0645d8841f51 199 i2c_stop(obj);
bogdanm 13:0645d8841f51 200 return I2C_ERROR_NO_SLAVE;
bogdanm 13:0645d8841f51 201 }
bogdanm 13:0645d8841f51 202
bogdanm 13:0645d8841f51 203 // Read in all except last byte
bogdanm 13:0645d8841f51 204 for (count = 0; count < (length - 1); count++) {
bogdanm 13:0645d8841f51 205 int value = i2c_do_read(obj, 0);
bogdanm 13:0645d8841f51 206 status = i2c_status(obj);
bogdanm 13:0645d8841f51 207 if (status != 0x50) {
bogdanm 13:0645d8841f51 208 i2c_stop(obj);
bogdanm 13:0645d8841f51 209 return count;
bogdanm 13:0645d8841f51 210 }
bogdanm 13:0645d8841f51 211 data[count] = (char) value;
bogdanm 13:0645d8841f51 212 }
bogdanm 13:0645d8841f51 213
bogdanm 13:0645d8841f51 214 // read in last byte
bogdanm 13:0645d8841f51 215 int value = i2c_do_read(obj, 1);
bogdanm 13:0645d8841f51 216 status = i2c_status(obj);
bogdanm 13:0645d8841f51 217 if (status != 0x58) {
bogdanm 13:0645d8841f51 218 i2c_stop(obj);
bogdanm 13:0645d8841f51 219 return length - 1;
bogdanm 13:0645d8841f51 220 }
bogdanm 13:0645d8841f51 221
bogdanm 13:0645d8841f51 222 data[count] = (char) value;
bogdanm 13:0645d8841f51 223
bogdanm 13:0645d8841f51 224 // If not repeated start, send stop.
bogdanm 13:0645d8841f51 225 if (stop) {
bogdanm 13:0645d8841f51 226 i2c_stop(obj);
bogdanm 13:0645d8841f51 227 }
bogdanm 13:0645d8841f51 228
bogdanm 13:0645d8841f51 229 return length;
bogdanm 13:0645d8841f51 230 }
bogdanm 13:0645d8841f51 231
bogdanm 13:0645d8841f51 232 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
bogdanm 13:0645d8841f51 233 int i, status;
bogdanm 13:0645d8841f51 234
bogdanm 13:0645d8841f51 235 status = i2c_start(obj);
bogdanm 13:0645d8841f51 236
bogdanm 13:0645d8841f51 237 if ((status != 0x10) && (status != 0x08)) {
bogdanm 13:0645d8841f51 238 i2c_stop(obj);
bogdanm 13:0645d8841f51 239 return I2C_ERROR_BUS_BUSY;
bogdanm 13:0645d8841f51 240 }
bogdanm 13:0645d8841f51 241
bogdanm 13:0645d8841f51 242 status = i2c_do_write(obj, (address & 0xFE), 1);
bogdanm 13:0645d8841f51 243 if (status != 0x18) {
bogdanm 13:0645d8841f51 244 i2c_stop(obj);
bogdanm 13:0645d8841f51 245 return I2C_ERROR_NO_SLAVE;
bogdanm 13:0645d8841f51 246 }
bogdanm 13:0645d8841f51 247
bogdanm 13:0645d8841f51 248 for (i=0; i<length; i++) {
bogdanm 13:0645d8841f51 249 status = i2c_do_write(obj, data[i], 0);
bogdanm 13:0645d8841f51 250 if(status != 0x28) {
bogdanm 13:0645d8841f51 251 i2c_stop(obj);
bogdanm 13:0645d8841f51 252 return i;
bogdanm 13:0645d8841f51 253 }
bogdanm 13:0645d8841f51 254 }
bogdanm 13:0645d8841f51 255
bogdanm 13:0645d8841f51 256 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
bogdanm 13:0645d8841f51 257 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
bogdanm 13:0645d8841f51 258 // i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 259
bogdanm 13:0645d8841f51 260 // If not repeated start, send stop.
bogdanm 13:0645d8841f51 261 if (stop) {
bogdanm 13:0645d8841f51 262 i2c_stop(obj);
bogdanm 13:0645d8841f51 263 }
bogdanm 13:0645d8841f51 264
bogdanm 13:0645d8841f51 265 return length;
bogdanm 13:0645d8841f51 266 }
bogdanm 13:0645d8841f51 267
bogdanm 13:0645d8841f51 268 void i2c_reset(i2c_t *obj) {
bogdanm 13:0645d8841f51 269 i2c_stop(obj);
bogdanm 13:0645d8841f51 270 }
bogdanm 13:0645d8841f51 271
bogdanm 13:0645d8841f51 272 int i2c_byte_read(i2c_t *obj, int last) {
bogdanm 13:0645d8841f51 273 return (i2c_do_read(obj, last) & 0xFF);
bogdanm 13:0645d8841f51 274 }
bogdanm 13:0645d8841f51 275
bogdanm 13:0645d8841f51 276 int i2c_byte_write(i2c_t *obj, int data) {
bogdanm 13:0645d8841f51 277 int ack;
bogdanm 13:0645d8841f51 278 int status = i2c_do_write(obj, (data & 0xFF), 0);
bogdanm 13:0645d8841f51 279
bogdanm 13:0645d8841f51 280 switch(status) {
bogdanm 13:0645d8841f51 281 case 0x18: case 0x28: // Master transmit ACKs
bogdanm 13:0645d8841f51 282 ack = 1;
bogdanm 13:0645d8841f51 283 break;
bogdanm 13:0645d8841f51 284 case 0x40: // Master receive address transmitted ACK
bogdanm 13:0645d8841f51 285 ack = 1;
bogdanm 13:0645d8841f51 286 break;
bogdanm 13:0645d8841f51 287 case 0xB8: // Slave transmit ACK
bogdanm 13:0645d8841f51 288 ack = 1;
bogdanm 13:0645d8841f51 289 break;
bogdanm 13:0645d8841f51 290 default:
bogdanm 13:0645d8841f51 291 ack = 0;
bogdanm 13:0645d8841f51 292 break;
bogdanm 13:0645d8841f51 293 }
bogdanm 13:0645d8841f51 294
bogdanm 13:0645d8841f51 295 return ack;
bogdanm 13:0645d8841f51 296 }
bogdanm 13:0645d8841f51 297
bogdanm 13:0645d8841f51 298 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
bogdanm 13:0645d8841f51 299 if (enable_slave != 0) {
bogdanm 13:0645d8841f51 300 i2c_conclr(obj, 1, 1, 1, 0);
bogdanm 13:0645d8841f51 301 i2c_conset(obj, 0, 0, 0, 1);
bogdanm 13:0645d8841f51 302 } else {
bogdanm 13:0645d8841f51 303 i2c_conclr(obj, 1, 1, 1, 1);
bogdanm 13:0645d8841f51 304 }
bogdanm 13:0645d8841f51 305 }
bogdanm 13:0645d8841f51 306
bogdanm 13:0645d8841f51 307 int i2c_slave_receive(i2c_t *obj) {
bogdanm 13:0645d8841f51 308 int status;
bogdanm 13:0645d8841f51 309 int retval;
bogdanm 13:0645d8841f51 310
bogdanm 13:0645d8841f51 311 status = i2c_status(obj);
bogdanm 13:0645d8841f51 312 switch(status) {
bogdanm 13:0645d8841f51 313 case 0x60: retval = 3; break;
bogdanm 13:0645d8841f51 314 case 0x70: retval = 2; break;
bogdanm 13:0645d8841f51 315 case 0xA8: retval = 1; break;
bogdanm 13:0645d8841f51 316 default : retval = 0; break;
bogdanm 13:0645d8841f51 317 }
bogdanm 13:0645d8841f51 318
bogdanm 13:0645d8841f51 319 return(retval);
bogdanm 13:0645d8841f51 320 }
bogdanm 13:0645d8841f51 321
bogdanm 13:0645d8841f51 322 int i2c_slave_read(i2c_t *obj, char *data, int length) {
bogdanm 13:0645d8841f51 323 int count = 0;
bogdanm 13:0645d8841f51 324 int status;
bogdanm 13:0645d8841f51 325
bogdanm 13:0645d8841f51 326 do {
bogdanm 13:0645d8841f51 327 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 328 i2c_wait_SI(obj);
bogdanm 13:0645d8841f51 329 status = i2c_status(obj);
bogdanm 13:0645d8841f51 330 if((status == 0x80) || (status == 0x90)) {
bogdanm 13:0645d8841f51 331 data[count] = I2C_DAT(obj) & 0xFF;
bogdanm 13:0645d8841f51 332 }
bogdanm 13:0645d8841f51 333 count++;
bogdanm 13:0645d8841f51 334 } while (((status == 0x80) || (status == 0x90) ||
bogdanm 13:0645d8841f51 335 (status == 0x060) || (status == 0x70)) && (count < length));
bogdanm 13:0645d8841f51 336
bogdanm 13:0645d8841f51 337 if(status != 0xA0) {
bogdanm 13:0645d8841f51 338 i2c_stop(obj);
bogdanm 13:0645d8841f51 339 }
bogdanm 13:0645d8841f51 340
bogdanm 13:0645d8841f51 341 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 342
bogdanm 13:0645d8841f51 343 return count;
bogdanm 13:0645d8841f51 344 }
bogdanm 13:0645d8841f51 345
bogdanm 13:0645d8841f51 346 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
bogdanm 13:0645d8841f51 347 int count = 0;
bogdanm 13:0645d8841f51 348 int status;
bogdanm 13:0645d8841f51 349
bogdanm 13:0645d8841f51 350 if(length <= 0) {
bogdanm 13:0645d8841f51 351 return(0);
bogdanm 13:0645d8841f51 352 }
bogdanm 13:0645d8841f51 353
bogdanm 13:0645d8841f51 354 do {
bogdanm 13:0645d8841f51 355 status = i2c_do_write(obj, data[count], 0);
bogdanm 13:0645d8841f51 356 count++;
bogdanm 13:0645d8841f51 357 } while ((count < length) && (status == 0xB8));
bogdanm 13:0645d8841f51 358
bogdanm 13:0645d8841f51 359 if((status != 0xC0) && (status != 0xC8)) {
bogdanm 13:0645d8841f51 360 i2c_stop(obj);
bogdanm 13:0645d8841f51 361 }
bogdanm 13:0645d8841f51 362
bogdanm 13:0645d8841f51 363 i2c_clear_SI(obj);
bogdanm 13:0645d8841f51 364
bogdanm 13:0645d8841f51 365 return(count);
bogdanm 13:0645d8841f51 366 }
bogdanm 13:0645d8841f51 367
bogdanm 13:0645d8841f51 368 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
bogdanm 13:0645d8841f51 369 uint32_t addr;
bogdanm 13:0645d8841f51 370
bogdanm 13:0645d8841f51 371 if ((idx >= 0) && (idx <= 3)) {
bogdanm 13:0645d8841f51 372 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
bogdanm 13:0645d8841f51 373 *((uint32_t *) addr) = address & 0xFF;
bogdanm 13:0645d8841f51 374 }
bogdanm 13:0645d8841f51 375 }