mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_common.c@169:e3b6fe271b81, 2017-07-19 (annotated)
- Committer:
- Kojto
- Date:
- Wed Jul 19 17:31:21 2017 +0100
- Revision:
- 169:e3b6fe271b81
- Parent:
- 154:37f96f9d4de2
This updates the lib to the mbed lib v 147
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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<> | 154:37f96f9d4de2 | 1 | /* |
<> | 154:37f96f9d4de2 | 2 | * Copyright (c) 2015-2016, Freescale Semiconductor, Inc. |
<> | 154:37f96f9d4de2 | 3 | * All rights reserved. |
<> | 154:37f96f9d4de2 | 4 | * |
<> | 154:37f96f9d4de2 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 154:37f96f9d4de2 | 6 | * are permitted provided that the following conditions are met: |
<> | 154:37f96f9d4de2 | 7 | * |
<> | 154:37f96f9d4de2 | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
<> | 154:37f96f9d4de2 | 9 | * of conditions and the following disclaimer. |
<> | 154:37f96f9d4de2 | 10 | * |
<> | 154:37f96f9d4de2 | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
<> | 154:37f96f9d4de2 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
<> | 154:37f96f9d4de2 | 13 | * other materials provided with the distribution. |
<> | 154:37f96f9d4de2 | 14 | * |
<> | 154:37f96f9d4de2 | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
<> | 154:37f96f9d4de2 | 16 | * contributors may be used to endorse or promote products derived from this |
<> | 154:37f96f9d4de2 | 17 | * software without specific prior written permission. |
<> | 154:37f96f9d4de2 | 18 | * |
<> | 154:37f96f9d4de2 | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
<> | 154:37f96f9d4de2 | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
<> | 154:37f96f9d4de2 | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 154:37f96f9d4de2 | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
<> | 154:37f96f9d4de2 | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
<> | 154:37f96f9d4de2 | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
<> | 154:37f96f9d4de2 | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
<> | 154:37f96f9d4de2 | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
<> | 154:37f96f9d4de2 | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
<> | 154:37f96f9d4de2 | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 154:37f96f9d4de2 | 29 | */ |
<> | 154:37f96f9d4de2 | 30 | |
<> | 154:37f96f9d4de2 | 31 | #include "fsl_common.h" |
<> | 154:37f96f9d4de2 | 32 | /* This is not needed for mbed */ |
<> | 154:37f96f9d4de2 | 33 | #if 0 |
<> | 154:37f96f9d4de2 | 34 | #include "fsl_debug_console.h" |
<> | 154:37f96f9d4de2 | 35 | |
<> | 154:37f96f9d4de2 | 36 | #ifndef NDEBUG |
<> | 154:37f96f9d4de2 | 37 | #if (defined(__CC_ARM)) || (defined(__ICCARM__)) |
<> | 154:37f96f9d4de2 | 38 | void __aeabi_assert(const char *failedExpr, const char *file, int line) |
<> | 154:37f96f9d4de2 | 39 | { |
<> | 154:37f96f9d4de2 | 40 | PRINTF("ASSERT ERROR \" %s \": file \"%s\" Line \"%d\" \n", failedExpr, file, line); |
<> | 154:37f96f9d4de2 | 41 | for (;;) |
<> | 154:37f96f9d4de2 | 42 | { |
<> | 154:37f96f9d4de2 | 43 | __asm("bkpt #0"); |
<> | 154:37f96f9d4de2 | 44 | } |
<> | 154:37f96f9d4de2 | 45 | } |
<> | 154:37f96f9d4de2 | 46 | #elif(defined(__GNUC__)) |
<> | 154:37f96f9d4de2 | 47 | void __assert_func(const char *file, int line, const char *func, const char *failedExpr) |
<> | 154:37f96f9d4de2 | 48 | { |
<> | 154:37f96f9d4de2 | 49 | PRINTF("ASSERT ERROR \" %s \": file \"%s\" Line \"%d\" function name \"%s\" \n", failedExpr, file, line, func); |
<> | 154:37f96f9d4de2 | 50 | for (;;) |
<> | 154:37f96f9d4de2 | 51 | { |
<> | 154:37f96f9d4de2 | 52 | __asm("bkpt #0"); |
<> | 154:37f96f9d4de2 | 53 | } |
<> | 154:37f96f9d4de2 | 54 | } |
<> | 154:37f96f9d4de2 | 55 | #endif /* (defined(__CC_ARM)) || (defined (__ICCARM__)) */ |
<> | 154:37f96f9d4de2 | 56 | #endif /* NDEBUG */ |
<> | 154:37f96f9d4de2 | 57 | #endif |
<> | 154:37f96f9d4de2 | 58 | void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler) |
<> | 154:37f96f9d4de2 | 59 | { |
<> | 154:37f96f9d4de2 | 60 | /* Addresses for VECTOR_TABLE and VECTOR_RAM come from the linker file */ |
<> | 154:37f96f9d4de2 | 61 | #if defined(__CC_ARM) |
<> | 154:37f96f9d4de2 | 62 | extern uint32_t Image$$VECTOR_ROM$$Base[]; |
<> | 154:37f96f9d4de2 | 63 | extern uint32_t Image$$VECTOR_RAM$$Base[]; |
<> | 154:37f96f9d4de2 | 64 | extern uint32_t Image$$RW_m_data$$Base[]; |
<> | 154:37f96f9d4de2 | 65 | |
<> | 154:37f96f9d4de2 | 66 | #define __VECTOR_TABLE Image$$VECTOR_ROM$$Base |
<> | 154:37f96f9d4de2 | 67 | #define __VECTOR_RAM Image$$VECTOR_RAM$$Base |
<> | 154:37f96f9d4de2 | 68 | #define __RAM_VECTOR_TABLE_SIZE (((uint32_t)Image$$RW_m_data$$Base - (uint32_t)Image$$VECTOR_RAM$$Base)) |
<> | 154:37f96f9d4de2 | 69 | #elif defined(__ICCARM__) |
<> | 154:37f96f9d4de2 | 70 | extern uint32_t __RAM_VECTOR_TABLE_SIZE[]; |
<> | 154:37f96f9d4de2 | 71 | extern uint32_t __VECTOR_TABLE[]; |
<> | 154:37f96f9d4de2 | 72 | extern uint32_t __VECTOR_RAM[]; |
<> | 154:37f96f9d4de2 | 73 | #elif defined(__GNUC__) |
<> | 154:37f96f9d4de2 | 74 | extern uint32_t __VECTOR_TABLE[]; |
<> | 154:37f96f9d4de2 | 75 | extern uint32_t __VECTOR_RAM[]; |
<> | 154:37f96f9d4de2 | 76 | extern uint32_t __RAM_VECTOR_TABLE_SIZE_BYTES[]; |
<> | 154:37f96f9d4de2 | 77 | uint32_t __RAM_VECTOR_TABLE_SIZE = (uint32_t)(__RAM_VECTOR_TABLE_SIZE_BYTES); |
<> | 154:37f96f9d4de2 | 78 | #endif /* defined(__CC_ARM) */ |
<> | 154:37f96f9d4de2 | 79 | uint32_t n; |
<> | 154:37f96f9d4de2 | 80 | uint32_t interrupts_disabled; |
<> | 154:37f96f9d4de2 | 81 | |
<> | 154:37f96f9d4de2 | 82 | interrupts_disabled = __get_PRIMASK(); |
<> | 154:37f96f9d4de2 | 83 | __disable_irq(); |
<> | 154:37f96f9d4de2 | 84 | if (SCB->VTOR != (uint32_t)__VECTOR_RAM) |
<> | 154:37f96f9d4de2 | 85 | { |
<> | 154:37f96f9d4de2 | 86 | /* Copy the vector table from ROM to RAM */ |
<> | 154:37f96f9d4de2 | 87 | for (n = 0; n < ((uint32_t)__RAM_VECTOR_TABLE_SIZE) / sizeof(uint32_t); n++) |
<> | 154:37f96f9d4de2 | 88 | { |
<> | 154:37f96f9d4de2 | 89 | __VECTOR_RAM[n] = __VECTOR_TABLE[n]; |
<> | 154:37f96f9d4de2 | 90 | } |
<> | 154:37f96f9d4de2 | 91 | /* Point the VTOR to the position of vector table */ |
<> | 154:37f96f9d4de2 | 92 | SCB->VTOR = (uint32_t)__VECTOR_RAM; |
<> | 154:37f96f9d4de2 | 93 | } |
<> | 154:37f96f9d4de2 | 94 | |
<> | 154:37f96f9d4de2 | 95 | /* make sure the __VECTOR_RAM is noncachable */ |
<> | 154:37f96f9d4de2 | 96 | __VECTOR_RAM[irq + 16] = irqHandler; |
<> | 154:37f96f9d4de2 | 97 | |
<> | 154:37f96f9d4de2 | 98 | if (!interrupts_disabled) { |
<> | 154:37f96f9d4de2 | 99 | __enable_irq(); |
<> | 154:37f96f9d4de2 | 100 | } |
<> | 154:37f96f9d4de2 | 101 | } |
<> | 154:37f96f9d4de2 | 102 | #ifndef CPU_QN908X |
<> | 154:37f96f9d4de2 | 103 | #if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) |
<> | 154:37f96f9d4de2 | 104 | |
<> | 154:37f96f9d4de2 | 105 | void EnableDeepSleepIRQ(IRQn_Type interrupt) |
<> | 154:37f96f9d4de2 | 106 | { |
<> | 154:37f96f9d4de2 | 107 | uint32_t index = 0; |
<> | 154:37f96f9d4de2 | 108 | uint32_t intNumber = (uint32_t)interrupt; |
<> | 154:37f96f9d4de2 | 109 | while (intNumber >= 32u) |
<> | 154:37f96f9d4de2 | 110 | { |
<> | 154:37f96f9d4de2 | 111 | index++; |
<> | 154:37f96f9d4de2 | 112 | intNumber -= 32u; |
<> | 154:37f96f9d4de2 | 113 | } |
<> | 154:37f96f9d4de2 | 114 | |
<> | 154:37f96f9d4de2 | 115 | SYSCON->STARTERSET[index] = 1u << intNumber; |
<> | 154:37f96f9d4de2 | 116 | EnableIRQ(interrupt); /* also enable interrupt at NVIC */ |
<> | 154:37f96f9d4de2 | 117 | } |
<> | 154:37f96f9d4de2 | 118 | |
<> | 154:37f96f9d4de2 | 119 | void DisableDeepSleepIRQ(IRQn_Type interrupt) |
<> | 154:37f96f9d4de2 | 120 | { |
<> | 154:37f96f9d4de2 | 121 | uint32_t index = 0; |
<> | 154:37f96f9d4de2 | 122 | uint32_t intNumber = (uint32_t)interrupt; |
<> | 154:37f96f9d4de2 | 123 | while (intNumber >= 32u) |
<> | 154:37f96f9d4de2 | 124 | { |
<> | 154:37f96f9d4de2 | 125 | index++; |
<> | 154:37f96f9d4de2 | 126 | intNumber -= 32u; |
<> | 154:37f96f9d4de2 | 127 | } |
<> | 154:37f96f9d4de2 | 128 | |
<> | 154:37f96f9d4de2 | 129 | DisableIRQ(interrupt); /* also disable interrupt at NVIC */ |
<> | 154:37f96f9d4de2 | 130 | SYSCON->STARTERCLR[index] = 1u << intNumber; |
<> | 154:37f96f9d4de2 | 131 | } |
<> | 154:37f96f9d4de2 | 132 | #endif /* FSL_FEATURE_SOC_SYSCON_COUNT */ |
<> | 154:37f96f9d4de2 | 133 | #else |
<> | 154:37f96f9d4de2 | 134 | void EnableDeepSleepIRQ(IRQn_Type interrupt) |
<> | 154:37f96f9d4de2 | 135 | { |
<> | 154:37f96f9d4de2 | 136 | uint32_t index = 0; |
<> | 154:37f96f9d4de2 | 137 | uint32_t intNumber = (uint32_t)interrupt; |
<> | 154:37f96f9d4de2 | 138 | while (intNumber >= 32u) |
<> | 154:37f96f9d4de2 | 139 | { |
<> | 154:37f96f9d4de2 | 140 | index++; |
<> | 154:37f96f9d4de2 | 141 | intNumber -= 32u; |
<> | 154:37f96f9d4de2 | 142 | } |
<> | 154:37f96f9d4de2 | 143 | |
<> | 154:37f96f9d4de2 | 144 | /* SYSCON->STARTERSET[index] = 1u << intNumber; */ |
<> | 154:37f96f9d4de2 | 145 | EnableIRQ(interrupt); /* also enable interrupt at NVIC */ |
<> | 154:37f96f9d4de2 | 146 | } |
<> | 154:37f96f9d4de2 | 147 | |
<> | 154:37f96f9d4de2 | 148 | void DisableDeepSleepIRQ(IRQn_Type interrupt) |
<> | 154:37f96f9d4de2 | 149 | { |
<> | 154:37f96f9d4de2 | 150 | uint32_t index = 0; |
<> | 154:37f96f9d4de2 | 151 | uint32_t intNumber = (uint32_t)interrupt; |
<> | 154:37f96f9d4de2 | 152 | while (intNumber >= 32u) |
<> | 154:37f96f9d4de2 | 153 | { |
<> | 154:37f96f9d4de2 | 154 | index++; |
<> | 154:37f96f9d4de2 | 155 | intNumber -= 32u; |
<> | 154:37f96f9d4de2 | 156 | } |
<> | 154:37f96f9d4de2 | 157 | |
<> | 154:37f96f9d4de2 | 158 | DisableIRQ(interrupt); /* also disable interrupt at NVIC */ |
<> | 154:37f96f9d4de2 | 159 | /* SYSCON->STARTERCLR[index] = 1u << intNumber; */ |
<> | 154:37f96f9d4de2 | 160 | } |
Kojto | 169:e3b6fe271b81 | 161 | #endif /*CPU_QN908X */ |