mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
Diff: targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h
- Revision:
- 186:707f6e361f3e
- Parent:
- 181:57724642e740
- Child:
- 187:0387e8f68319
--- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h Thu Apr 19 17:12:19 2018 +0100 +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/PinNames.h Fri Jun 22 16:45:37 2018 +0100 @@ -1,6 +1,6 @@ /* mbed Microcontroller Library ******************************************************************************* - * Copyright (c) 2014, STMicroelectronics + * Copyright (c) 2018, STMicroelectronics * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -27,6 +27,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ******************************************************************************* */ + #ifndef MBED_PINNAMES_H #define MBED_PINNAMES_H @@ -38,14 +39,35 @@ #endif typedef enum { + ALT0 = 0x100, + ALT1 = 0x200, + ALT2 = 0x300, + ALT3 = 0x400 +} ALTx; + +typedef enum { PA_0 = 0x00, + PA_0_ALT0 = PA_0|ALT0, + PA_0_ALT1 = PA_0|ALT1, PA_1 = 0x01, + PA_1_ALT0 = PA_1|ALT0, + PA_1_ALT1 = PA_1|ALT1, PA_2 = 0x02, + PA_2_ALT0 = PA_2|ALT0, + PA_2_ALT1 = PA_2|ALT1, PA_3 = 0x03, + PA_3_ALT0 = PA_3|ALT0, + PA_3_ALT1 = PA_3|ALT1, PA_4 = 0x04, + PA_4_ALT0 = PA_4|ALT0, PA_5 = 0x05, + PA_5_ALT0 = PA_5|ALT0, PA_6 = 0x06, + PA_6_ALT0 = PA_6|ALT0, PA_7 = 0x07, + PA_7_ALT0 = PA_7|ALT0, + PA_7_ALT1 = PA_7|ALT1, + PA_7_ALT2 = PA_7|ALT2, PA_8 = 0x08, PA_9 = 0x09, PA_10 = 0x0A, @@ -54,34 +76,64 @@ PA_13 = 0x0D, PA_14 = 0x0E, PA_15 = 0x0F, + PA_15_ALT0 = PA_15|ALT0, PB_0 = 0x10, + PB_0_ALT0 = PB_0|ALT0, + PB_0_ALT1 = PB_0|ALT1, PB_1 = 0x11, + PB_1_ALT0 = PB_1|ALT0, + PB_1_ALT1 = PB_1|ALT1, PB_2 = 0x12, PB_3 = 0x13, + PB_3_ALT0 = PB_3|ALT0, PB_4 = 0x14, + PB_4_ALT0 = PB_4|ALT0, + PB_4_ALT1 = PB_4|ALT1, PB_5 = 0x15, + PB_5_ALT0 = PB_5|ALT0, + PB_5_ALT1 = PB_5|ALT1, PB_6 = 0x16, PB_7 = 0x17, PB_8 = 0x18, + PB_8_ALT0 = PB_8|ALT0, PB_9 = 0x19, + PB_9_ALT0 = PB_9|ALT0, PB_10 = 0x1A, PB_11 = 0x1B, PB_12 = 0x1C, PB_13 = 0x1D, PB_14 = 0x1E, + PB_14_ALT0 = PB_14|ALT0, + PB_14_ALT1 = PB_14|ALT1, PB_15 = 0x1F, + PB_15_ALT0 = PB_15|ALT0, + PB_15_ALT1 = PB_15|ALT1, PC_0 = 0x20, + PC_0_ALT0 = PC_0|ALT0, + PC_0_ALT1 = PC_0|ALT1, PC_1 = 0x21, + PC_1_ALT0 = PC_1|ALT0, + PC_1_ALT1 = PC_1|ALT1, PC_2 = 0x22, + PC_2_ALT0 = PC_2|ALT0, + PC_2_ALT1 = PC_2|ALT1, PC_3 = 0x23, + PC_3_ALT0 = PC_3|ALT0, + PC_3_ALT1 = PC_3|ALT1, PC_4 = 0x24, + PC_4_ALT0 = PC_4|ALT0, PC_5 = 0x25, + PC_5_ALT0 = PC_5|ALT0, PC_6 = 0x26, + PC_6_ALT0 = PC_6|ALT0, PC_7 = 0x27, + PC_7_ALT0 = PC_7|ALT0, PC_8 = 0x28, + PC_8_ALT0 = PC_8|ALT0, PC_9 = 0x29, + PC_9_ALT0 = PC_9|ALT0, PC_10 = 0x2A, PC_11 = 0x2B, PC_12 = 0x2C, @@ -271,31 +323,88 @@ SPI_CS = PH_6, PWM_OUT = PA_1, - //USB pins - USB_OTG_HS_ULPI_D0 = PA_3, +/**** USB pins ****/ + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + USB_OTG_HS_DM = PB_14, + USB_OTG_HS_DP = PB_15, + USB_OTG_HS_ID = PB_12, USB_OTG_HS_SOF = PA_4, USB_OTG_HS_ULPI_CK = PA_5, - USB_OTG_FS_SOF = PA_8, - USB_OTG_FS_VBUS = PA_9, - USB_OTG_FS_ID = PA_10, - USB_OTG_FS_DM = PA_11, - USB_OTG_FS_DP = PA_12, + USB_OTG_HS_ULPI_D0 = PA_3, USB_OTG_HS_ULPI_D1 = PB_0, USB_OTG_HS_ULPI_D2 = PB_1, - USB_OTG_HS_ULPI_D7 = PB_5, USB_OTG_HS_ULPI_D3 = PB_10, USB_OTG_HS_ULPI_D4 = PB_11, - USB_OTG_HS_ID = PB_12, USB_OTG_HS_ULPI_D5 = PB_12, USB_OTG_HS_ULPI_D6 = PB_13, - USB_OTG_HS_VBUS = PB_13, - USB_OTG_HS_DM = PB_14, - USB_OTG_HS_DP = PB_15, + USB_OTG_HS_ULPI_D7 = PB_5, + USB_OTG_HS_ULPI_DIR = PI_11, + USB_OTG_HS_ULPI_DIR_ALT0 = PC_2, + USB_OTG_HS_ULPI_NXT = PH_4, + USB_OTG_HS_ULPI_NXT_ALT0 = PC_3, USB_OTG_HS_ULPI_STP = PC_0, - USB_OTG_HS_ULPI_DIR_ALT = PC_2, - USB_OTG_HS_ULPI_NXT_ALT = PC_3, - USB_OTG_HS_ULPI_NXT = PH_4, - USB_OTG_HS_ULPI_DIR = PI_11, + USB_OTG_HS_VBUS = PB_13, + +/**** ETHERNET pins ****/ + ETH_COL = PH_3, + ETH_COL_ALT0 = PA_3, + ETH_CRS = PH_2, + ETH_CRS_ALT0 = PA_0, + ETH_CRS_DV = PA_7, + ETH_MDC = PC_1, + ETH_MDIO = PA_2, + ETH_PPS_OUT = PB_5, + ETH_PPS_OUT_ALT0 = PG_8, + ETH_REF_CLK = PA_1, + ETH_RXD0 = PC_4, + ETH_RXD1 = PC_5, + ETH_RXD2 = PH_6, + ETH_RXD2_ALT0 = PB_0, + ETH_RXD3 = PH_7, + ETH_RXD3_ALT0 = PB_1, + ETH_RX_CLK = PA_1, + ETH_RX_DV = PA_7, + ETH_RX_ER = PI_10, + ETH_RX_ER_ALT0 = PB_10, + ETH_TXD0 = PG_13, + ETH_TXD0_ALT0 = PB_12, + ETH_TXD1 = PG_14, + ETH_TXD1_ALT0 = PB_13, + ETH_TXD2 = PC_2, + ETH_TXD3 = PE_2, + ETH_TXD3_ALT0 = PB_8, + ETH_TX_CLK = PC_3, + ETH_TX_EN = PG_11, + ETH_TX_EN_ALT0 = PB_11, + +/**** OSCILLATOR pins ****/ + RCC_OSC32_IN = PC_14, + RCC_OSC32_OUT = PC_15, + RCC_OSC_IN = PH_0, + RCC_OSC_OUT = PH_1, + +/**** DEBUG pins ****/ + SYS_JTCK_SWCLK = PA_14, + SYS_JTDI = PA_15, + SYS_JTDO_SWO = PB_3, + SYS_JTMS_SWDIO = PA_13, + SYS_JTRST = PB_4, + SYS_TRACECLK = PE_2, + SYS_TRACED0 = PE_3, + SYS_TRACED0_ALT0 = PG_13, + SYS_TRACED0_ALT1 = PC_1, + SYS_TRACED1 = PE_4, + SYS_TRACED1_ALT0 = PG_14, + SYS_TRACED1_ALT1 = PC_8, + SYS_TRACED2 = PE_5, + SYS_TRACED2_ALT0 = PD_2, + SYS_TRACED3 = PC_12, + SYS_TRACED3_ALT0 = PE_6, + SYS_WKUP = PA_0, // Not connected NC = (int)0xFFFFFFFF