Diff: targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c

Revision:

56:05912f50f004

Parent:

46:cb4f85f96d35

Child:

144:ef7eb2e8f9f7

--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c	Fri Jan 29 13:30:11 2016 +0000
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c	Fri Jan 29 14:15:09 2016 +0000
@@ -426,12 +426,19 @@
   RCC_OscInitTypeDef RCC_OscInitStruct;
  
   // Select PLLCLK = 48 MHz ((HSI 8 MHz / 2) * 12)
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
-  RCC_OscInitStruct.HSIState       = RCC_HSI_ON;
-  RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource  = RCC_PLLSOURCE_HSI; // HSI div 2
-  RCC_OscInitStruct.PLL.PREDIV     = RCC_PREDIV_DIV1;
-  RCC_OscInitStruct.PLL.PLLMUL     = RCC_PLL_MUL12;
+  RCC_OscInitStruct.OscillatorType          = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSEState                = RCC_HSE_OFF;
+  RCC_OscInitStruct.LSEState                = RCC_LSE_OFF;
+  RCC_OscInitStruct.HSIState                = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue     = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.HSI14State              = RCC_HSI_OFF;
+  RCC_OscInitStruct.HSI14CalibrationValue   = RCC_HSI14CALIBRATION_DEFAULT;
+  RCC_OscInitStruct.HSI48State              = RCC_HSI_ON;
+  RCC_OscInitStruct.LSIState                = RCC_LSI_OFF;
+  RCC_OscInitStruct.PLL.PLLState            = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource           = RCC_PLLSOURCE_HSI; // HSI div 2
+  RCC_OscInitStruct.PLL.PREDIV              = RCC_PREDIV_DIV1;
+  RCC_OscInitStruct.PLL.PLLMUL              = RCC_PLL_MUL12;
   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
       return 0; // FAIL
   }