mbed official
mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32L1/device/system_stm32l1xx.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 184:08ed48f1de7f
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 170:19eb464bc2be | 1 | /** |
| Kojto | 170:19eb464bc2be | 2 | ****************************************************************************** |
| Kojto | 170:19eb464bc2be | 3 | * @file system_stm32l1xx.c |
| Kojto | 170:19eb464bc2be | 4 | * @author MCD Application Team |
| Kojto | 170:19eb464bc2be | 5 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. |
| Kojto | 170:19eb464bc2be | 6 | * |
| Kojto | 170:19eb464bc2be | 7 | * This file provides two functions and one global variable to be called from |
| Kojto | 170:19eb464bc2be | 8 | * user application: |
| Kojto | 170:19eb464bc2be | 9 | * - SystemInit(): This function is called at startup just after reset and |
| Kojto | 170:19eb464bc2be | 10 | * before branch to main program. This call is made inside |
| Kojto | 170:19eb464bc2be | 11 | * the "startup_stm32l1xx.s" file. |
| Kojto | 170:19eb464bc2be | 12 | * |
| Kojto | 170:19eb464bc2be | 13 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used |
| Kojto | 170:19eb464bc2be | 14 | * by the user application to setup the SysTick |
| Kojto | 170:19eb464bc2be | 15 | * timer or configure other parameters. |
| Kojto | 170:19eb464bc2be | 16 | * |
| Kojto | 170:19eb464bc2be | 17 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must |
| Kojto | 170:19eb464bc2be | 18 | * be called whenever the core clock is changed |
| Kojto | 170:19eb464bc2be | 19 | * during program execution. |
| Kojto | 170:19eb464bc2be | 20 | * |
| Kojto | 170:19eb464bc2be | 21 | ****************************************************************************** |
| Kojto | 170:19eb464bc2be | 22 | * @attention |
| Kojto | 170:19eb464bc2be | 23 | * |
| AnnaBridge | 184:08ed48f1de7f | 24 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| Kojto | 170:19eb464bc2be | 25 | * |
| Kojto | 170:19eb464bc2be | 26 | * Redistribution and use in source and binary forms, with or without modification, |
| Kojto | 170:19eb464bc2be | 27 | * are permitted provided that the following conditions are met: |
| Kojto | 170:19eb464bc2be | 28 | * 1. Redistributions of source code must retain the above copyright notice, |
| Kojto | 170:19eb464bc2be | 29 | * this list of conditions and the following disclaimer. |
| Kojto | 170:19eb464bc2be | 30 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Kojto | 170:19eb464bc2be | 31 | * this list of conditions and the following disclaimer in the documentation |
| Kojto | 170:19eb464bc2be | 32 | * and/or other materials provided with the distribution. |
| Kojto | 170:19eb464bc2be | 33 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Kojto | 170:19eb464bc2be | 34 | * may be used to endorse or promote products derived from this software |
| Kojto | 170:19eb464bc2be | 35 | * without specific prior written permission. |
| Kojto | 170:19eb464bc2be | 36 | * |
| Kojto | 170:19eb464bc2be | 37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Kojto | 170:19eb464bc2be | 38 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Kojto | 170:19eb464bc2be | 39 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Kojto | 170:19eb464bc2be | 40 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Kojto | 170:19eb464bc2be | 41 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Kojto | 170:19eb464bc2be | 42 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Kojto | 170:19eb464bc2be | 43 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Kojto | 170:19eb464bc2be | 44 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Kojto | 170:19eb464bc2be | 45 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Kojto | 170:19eb464bc2be | 46 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Kojto | 170:19eb464bc2be | 47 | * |
| Kojto | 170:19eb464bc2be | 48 | ****************************************************************************** |
| Kojto | 170:19eb464bc2be | 49 | */ |
| Kojto | 170:19eb464bc2be | 50 | |
| Kojto | 170:19eb464bc2be | 51 | /** @addtogroup CMSIS |
| Kojto | 170:19eb464bc2be | 52 | * @{ |
| Kojto | 170:19eb464bc2be | 53 | */ |
| Kojto | 170:19eb464bc2be | 54 | |
| Kojto | 170:19eb464bc2be | 55 | /** @addtogroup stm32l1xx_system |
| Kojto | 170:19eb464bc2be | 56 | * @{ |
| Kojto | 170:19eb464bc2be | 57 | */ |
| Kojto | 170:19eb464bc2be | 58 | |
| Kojto | 170:19eb464bc2be | 59 | /** @addtogroup STM32L1xx_System_Private_Includes |
| Kojto | 170:19eb464bc2be | 60 | * @{ |
| Kojto | 170:19eb464bc2be | 61 | */ |
| Kojto | 170:19eb464bc2be | 62 | |
| Kojto | 170:19eb464bc2be | 63 | #include "stm32l1xx.h" |
| Kojto | 170:19eb464bc2be | 64 | |
| Kojto | 170:19eb464bc2be | 65 | /** |
| Kojto | 170:19eb464bc2be | 66 | * @} |
| Kojto | 170:19eb464bc2be | 67 | */ |
| Kojto | 170:19eb464bc2be | 68 | |
| Kojto | 170:19eb464bc2be | 69 | /** @addtogroup STM32L1xx_System_Private_TypesDefinitions |
| Kojto | 170:19eb464bc2be | 70 | * @{ |
| Kojto | 170:19eb464bc2be | 71 | */ |
| Kojto | 170:19eb464bc2be | 72 | |
| Kojto | 170:19eb464bc2be | 73 | /** |
| Kojto | 170:19eb464bc2be | 74 | * @} |
| Kojto | 170:19eb464bc2be | 75 | */ |
| Kojto | 170:19eb464bc2be | 76 | |
| Kojto | 170:19eb464bc2be | 77 | /** @addtogroup STM32L1xx_System_Private_Defines |
| Kojto | 170:19eb464bc2be | 78 | * @{ |
| Kojto | 170:19eb464bc2be | 79 | */ |
| Kojto | 170:19eb464bc2be | 80 | #if !defined (HSE_VALUE) |
| AnnaBridge | 184:08ed48f1de7f | 81 | #define HSE_VALUE ((uint32_t)8000000U) /*!< Default value of the External oscillator in Hz. |
| Kojto | 170:19eb464bc2be | 82 | This value can be provided and adapted by the user application. */ |
| Kojto | 170:19eb464bc2be | 83 | #endif /* HSE_VALUE */ |
| Kojto | 170:19eb464bc2be | 84 | |
| Kojto | 170:19eb464bc2be | 85 | #if !defined (HSI_VALUE) |
| AnnaBridge | 184:08ed48f1de7f | 86 | #define HSI_VALUE ((uint32_t)8000000U) /*!< Default value of the Internal oscillator in Hz. |
| Kojto | 170:19eb464bc2be | 87 | This value can be provided and adapted by the user application. */ |
| Kojto | 170:19eb464bc2be | 88 | #endif /* HSI_VALUE */ |
| Kojto | 170:19eb464bc2be | 89 | |
| Kojto | 170:19eb464bc2be | 90 | /*!< Uncomment the following line if you need to use external SRAM mounted |
| Kojto | 170:19eb464bc2be | 91 | on STM32L152D_EVAL board as data memory */ |
| Kojto | 170:19eb464bc2be | 92 | /* #define DATA_IN_ExtSRAM */ |
| Kojto | 170:19eb464bc2be | 93 | |
| Kojto | 170:19eb464bc2be | 94 | /*!< Uncomment the following line if you need to relocate your vector Table in |
| Kojto | 170:19eb464bc2be | 95 | Internal SRAM. */ |
| Kojto | 170:19eb464bc2be | 96 | /* #define VECT_TAB_SRAM */ |
| AnnaBridge | 184:08ed48f1de7f | 97 | #define VECT_TAB_OFFSET 0x00U /*!< Vector Table base offset field. |
| Kojto | 170:19eb464bc2be | 98 | This value must be a multiple of 0x200. */ |
| Kojto | 170:19eb464bc2be | 99 | /** |
| Kojto | 170:19eb464bc2be | 100 | * @} |
| Kojto | 170:19eb464bc2be | 101 | */ |
| Kojto | 170:19eb464bc2be | 102 | |
| Kojto | 170:19eb464bc2be | 103 | /** @addtogroup STM32L1xx_System_Private_Macros |
| Kojto | 170:19eb464bc2be | 104 | * @{ |
| Kojto | 170:19eb464bc2be | 105 | */ |
| Kojto | 170:19eb464bc2be | 106 | |
| Kojto | 170:19eb464bc2be | 107 | /** |
| Kojto | 170:19eb464bc2be | 108 | * @} |
| Kojto | 170:19eb464bc2be | 109 | */ |
| Kojto | 170:19eb464bc2be | 110 | |
| Kojto | 170:19eb464bc2be | 111 | /** @addtogroup STM32L1xx_System_Private_Variables |
| Kojto | 170:19eb464bc2be | 112 | * @{ |
| Kojto | 170:19eb464bc2be | 113 | */ |
| Kojto | 170:19eb464bc2be | 114 | /* This variable is updated in three ways: |
| Kojto | 170:19eb464bc2be | 115 | 1) by calling CMSIS function SystemCoreClockUpdate() |
| Kojto | 170:19eb464bc2be | 116 | 2) by calling HAL API function HAL_RCC_GetHCLKFreq() |
| Kojto | 170:19eb464bc2be | 117 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency |
| Kojto | 170:19eb464bc2be | 118 | Note: If you use this function to configure the system clock; then there |
| Kojto | 170:19eb464bc2be | 119 | is no need to call the 2 first functions listed above, since SystemCoreClock |
| Kojto | 170:19eb464bc2be | 120 | variable is updated automatically. |
| Kojto | 170:19eb464bc2be | 121 | */ |
| AnnaBridge | 184:08ed48f1de7f | 122 | uint32_t SystemCoreClock = 2097000U; |
| AnnaBridge | 184:08ed48f1de7f | 123 | const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U}; |
| AnnaBridge | 184:08ed48f1de7f | 124 | const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; |
| AnnaBridge | 184:08ed48f1de7f | 125 | const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; |
| Kojto | 170:19eb464bc2be | 126 | |
| Kojto | 170:19eb464bc2be | 127 | /** |
| Kojto | 170:19eb464bc2be | 128 | * @} |
| Kojto | 170:19eb464bc2be | 129 | */ |
| Kojto | 170:19eb464bc2be | 130 | |
| Kojto | 170:19eb464bc2be | 131 | /** @addtogroup STM32L1xx_System_Private_FunctionPrototypes |
| Kojto | 170:19eb464bc2be | 132 | * @{ |
| Kojto | 170:19eb464bc2be | 133 | */ |
| Kojto | 170:19eb464bc2be | 134 | |
| Kojto | 170:19eb464bc2be | 135 | #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) |
| Kojto | 170:19eb464bc2be | 136 | #ifdef DATA_IN_ExtSRAM |
| Kojto | 170:19eb464bc2be | 137 | static void SystemInit_ExtMemCtl(void); |
| Kojto | 170:19eb464bc2be | 138 | #endif /* DATA_IN_ExtSRAM */ |
| Kojto | 170:19eb464bc2be | 139 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD */ |
| Kojto | 170:19eb464bc2be | 140 | |
| Kojto | 170:19eb464bc2be | 141 | /** |
| Kojto | 170:19eb464bc2be | 142 | * @} |
| Kojto | 170:19eb464bc2be | 143 | */ |
| Kojto | 170:19eb464bc2be | 144 | |
| Kojto | 170:19eb464bc2be | 145 | /** @addtogroup STM32L1xx_System_Private_Functions |
| Kojto | 170:19eb464bc2be | 146 | * @{ |
| Kojto | 170:19eb464bc2be | 147 | */ |
| Kojto | 170:19eb464bc2be | 148 | |
| Kojto | 170:19eb464bc2be | 149 | /*+ MBED */ |
| Kojto | 170:19eb464bc2be | 150 | #if 0 |
| Kojto | 170:19eb464bc2be | 151 | /*- MBED */ |
| Kojto | 170:19eb464bc2be | 152 | |
| Kojto | 170:19eb464bc2be | 153 | /** |
| Kojto | 170:19eb464bc2be | 154 | * @brief Setup the microcontroller system. |
| Kojto | 170:19eb464bc2be | 155 | * Initialize the Embedded Flash Interface, the PLL and update the |
| Kojto | 170:19eb464bc2be | 156 | * SystemCoreClock variable. |
| Kojto | 170:19eb464bc2be | 157 | * @param None |
| Kojto | 170:19eb464bc2be | 158 | * @retval None |
| Kojto | 170:19eb464bc2be | 159 | */ |
| Kojto | 170:19eb464bc2be | 160 | void SystemInit (void) |
| Kojto | 170:19eb464bc2be | 161 | { |
| Kojto | 170:19eb464bc2be | 162 | /*!< Set MSION bit */ |
| Kojto | 170:19eb464bc2be | 163 | RCC->CR |= (uint32_t)0x00000100; |
| Kojto | 170:19eb464bc2be | 164 | |
| Kojto | 170:19eb464bc2be | 165 | /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */ |
| Kojto | 170:19eb464bc2be | 166 | RCC->CFGR &= (uint32_t)0x88FFC00C; |
| Kojto | 170:19eb464bc2be | 167 | |
| Kojto | 170:19eb464bc2be | 168 | /*!< Reset HSION, HSEON, CSSON and PLLON bits */ |
| Kojto | 170:19eb464bc2be | 169 | RCC->CR &= (uint32_t)0xEEFEFFFE; |
| Kojto | 170:19eb464bc2be | 170 | |
| Kojto | 170:19eb464bc2be | 171 | /*!< Reset HSEBYP bit */ |
| Kojto | 170:19eb464bc2be | 172 | RCC->CR &= (uint32_t)0xFFFBFFFF; |
| Kojto | 170:19eb464bc2be | 173 | |
| Kojto | 170:19eb464bc2be | 174 | /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */ |
| Kojto | 170:19eb464bc2be | 175 | RCC->CFGR &= (uint32_t)0xFF02FFFF; |
| Kojto | 170:19eb464bc2be | 176 | |
| Kojto | 170:19eb464bc2be | 177 | /*!< Disable all interrupts */ |
| Kojto | 170:19eb464bc2be | 178 | RCC->CIR = 0x00000000; |
| Kojto | 170:19eb464bc2be | 179 | |
| Kojto | 170:19eb464bc2be | 180 | #ifdef DATA_IN_ExtSRAM |
| Kojto | 170:19eb464bc2be | 181 | SystemInit_ExtMemCtl(); |
| Kojto | 170:19eb464bc2be | 182 | #endif /* DATA_IN_ExtSRAM */ |
| Kojto | 170:19eb464bc2be | 183 | |
| Kojto | 170:19eb464bc2be | 184 | #ifdef VECT_TAB_SRAM |
| Kojto | 170:19eb464bc2be | 185 | SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ |
| Kojto | 170:19eb464bc2be | 186 | #else |
| Kojto | 170:19eb464bc2be | 187 | SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ |
| Kojto | 170:19eb464bc2be | 188 | #endif |
| Kojto | 170:19eb464bc2be | 189 | } |
| Kojto | 170:19eb464bc2be | 190 | |
| Kojto | 170:19eb464bc2be | 191 | /*+ MBED */ |
| Kojto | 170:19eb464bc2be | 192 | #endif |
| Kojto | 170:19eb464bc2be | 193 | /*- MBED */ |
| Kojto | 170:19eb464bc2be | 194 | |
| Kojto | 170:19eb464bc2be | 195 | /** |
| Kojto | 170:19eb464bc2be | 196 | * @brief Update SystemCoreClock according to Clock Register Values |
| Kojto | 170:19eb464bc2be | 197 | * The SystemCoreClock variable contains the core clock (HCLK), it can |
| Kojto | 170:19eb464bc2be | 198 | * be used by the user application to setup the SysTick timer or configure |
| Kojto | 170:19eb464bc2be | 199 | * other parameters. |
| Kojto | 170:19eb464bc2be | 200 | * |
| Kojto | 170:19eb464bc2be | 201 | * @note Each time the core clock (HCLK) changes, this function must be called |
| Kojto | 170:19eb464bc2be | 202 | * to update SystemCoreClock variable value. Otherwise, any configuration |
| Kojto | 170:19eb464bc2be | 203 | * based on this variable will be incorrect. |
| Kojto | 170:19eb464bc2be | 204 | * |
| Kojto | 170:19eb464bc2be | 205 | * @note - The system frequency computed by this function is not the real |
| Kojto | 170:19eb464bc2be | 206 | * frequency in the chip. It is calculated based on the predefined |
| Kojto | 170:19eb464bc2be | 207 | * constant and the selected clock source: |
| Kojto | 170:19eb464bc2be | 208 | * |
| Kojto | 170:19eb464bc2be | 209 | * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI |
| Kojto | 170:19eb464bc2be | 210 | * value as defined by the MSI range. |
| Kojto | 170:19eb464bc2be | 211 | * |
| Kojto | 170:19eb464bc2be | 212 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) |
| Kojto | 170:19eb464bc2be | 213 | * |
| Kojto | 170:19eb464bc2be | 214 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) |
| Kojto | 170:19eb464bc2be | 215 | * |
| Kojto | 170:19eb464bc2be | 216 | * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) |
| Kojto | 170:19eb464bc2be | 217 | * or HSI_VALUE(*) multiplied/divided by the PLL factors. |
| Kojto | 170:19eb464bc2be | 218 | * |
| Kojto | 170:19eb464bc2be | 219 | * (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value |
| Kojto | 170:19eb464bc2be | 220 | * 16 MHz) but the real value may vary depending on the variations |
| Kojto | 170:19eb464bc2be | 221 | * in voltage and temperature. |
| Kojto | 170:19eb464bc2be | 222 | * |
| Kojto | 170:19eb464bc2be | 223 | * (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value |
| Kojto | 170:19eb464bc2be | 224 | * 8 MHz), user has to ensure that HSE_VALUE is same as the real |
| Kojto | 170:19eb464bc2be | 225 | * frequency of the crystal used. Otherwise, this function may |
| Kojto | 170:19eb464bc2be | 226 | * have wrong result. |
| Kojto | 170:19eb464bc2be | 227 | * |
| Kojto | 170:19eb464bc2be | 228 | * - The result of this function could be not correct when using fractional |
| Kojto | 170:19eb464bc2be | 229 | * value for HSE crystal. |
| Kojto | 170:19eb464bc2be | 230 | * @param None |
| Kojto | 170:19eb464bc2be | 231 | * @retval None |
| Kojto | 170:19eb464bc2be | 232 | */ |
| Kojto | 170:19eb464bc2be | 233 | void SystemCoreClockUpdate (void) |
| Kojto | 170:19eb464bc2be | 234 | { |
| Kojto | 170:19eb464bc2be | 235 | uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0; |
| Kojto | 170:19eb464bc2be | 236 | |
| Kojto | 170:19eb464bc2be | 237 | /* Get SYSCLK source -------------------------------------------------------*/ |
| Kojto | 170:19eb464bc2be | 238 | tmp = RCC->CFGR & RCC_CFGR_SWS; |
| Kojto | 170:19eb464bc2be | 239 | |
| Kojto | 170:19eb464bc2be | 240 | switch (tmp) |
| Kojto | 170:19eb464bc2be | 241 | { |
| Kojto | 170:19eb464bc2be | 242 | case 0x00: /* MSI used as system clock */ |
| Kojto | 170:19eb464bc2be | 243 | msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13; |
| Kojto | 170:19eb464bc2be | 244 | SystemCoreClock = (32768 * (1 << (msirange + 1))); |
| Kojto | 170:19eb464bc2be | 245 | break; |
| Kojto | 170:19eb464bc2be | 246 | case 0x04: /* HSI used as system clock */ |
| Kojto | 170:19eb464bc2be | 247 | SystemCoreClock = HSI_VALUE; |
| Kojto | 170:19eb464bc2be | 248 | break; |
| Kojto | 170:19eb464bc2be | 249 | case 0x08: /* HSE used as system clock */ |
| Kojto | 170:19eb464bc2be | 250 | SystemCoreClock = HSE_VALUE; |
| Kojto | 170:19eb464bc2be | 251 | break; |
| Kojto | 170:19eb464bc2be | 252 | case 0x0C: /* PLL used as system clock */ |
| Kojto | 170:19eb464bc2be | 253 | /* Get PLL clock source and multiplication factor ----------------------*/ |
| Kojto | 170:19eb464bc2be | 254 | pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; |
| Kojto | 170:19eb464bc2be | 255 | plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; |
| Kojto | 170:19eb464bc2be | 256 | pllmul = PLLMulTable[(pllmul >> 18)]; |
| Kojto | 170:19eb464bc2be | 257 | plldiv = (plldiv >> 22) + 1; |
| Kojto | 170:19eb464bc2be | 258 | |
| Kojto | 170:19eb464bc2be | 259 | pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; |
| Kojto | 170:19eb464bc2be | 260 | |
| Kojto | 170:19eb464bc2be | 261 | if (pllsource == 0x00) |
| Kojto | 170:19eb464bc2be | 262 | { |
| Kojto | 170:19eb464bc2be | 263 | /* HSI oscillator clock selected as PLL clock entry */ |
| Kojto | 170:19eb464bc2be | 264 | SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv); |
| Kojto | 170:19eb464bc2be | 265 | } |
| Kojto | 170:19eb464bc2be | 266 | else |
| Kojto | 170:19eb464bc2be | 267 | { |
| Kojto | 170:19eb464bc2be | 268 | /* HSE selected as PLL clock entry */ |
| Kojto | 170:19eb464bc2be | 269 | SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv); |
| Kojto | 170:19eb464bc2be | 270 | } |
| Kojto | 170:19eb464bc2be | 271 | break; |
| Kojto | 170:19eb464bc2be | 272 | default: /* MSI used as system clock */ |
| Kojto | 170:19eb464bc2be | 273 | msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13; |
| Kojto | 170:19eb464bc2be | 274 | SystemCoreClock = (32768 * (1 << (msirange + 1))); |
| Kojto | 170:19eb464bc2be | 275 | break; |
| Kojto | 170:19eb464bc2be | 276 | } |
| Kojto | 170:19eb464bc2be | 277 | /* Compute HCLK clock frequency --------------------------------------------*/ |
| Kojto | 170:19eb464bc2be | 278 | /* Get HCLK prescaler */ |
| Kojto | 170:19eb464bc2be | 279 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; |
| Kojto | 170:19eb464bc2be | 280 | /* HCLK clock frequency */ |
| Kojto | 170:19eb464bc2be | 281 | SystemCoreClock >>= tmp; |
| Kojto | 170:19eb464bc2be | 282 | } |
| Kojto | 170:19eb464bc2be | 283 | |
| Kojto | 170:19eb464bc2be | 284 | #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD) |
| Kojto | 170:19eb464bc2be | 285 | #ifdef DATA_IN_ExtSRAM |
| Kojto | 170:19eb464bc2be | 286 | /** |
| Kojto | 170:19eb464bc2be | 287 | * @brief Setup the external memory controller. |
| Kojto | 170:19eb464bc2be | 288 | * Called in SystemInit() function before jump to main. |
| Kojto | 170:19eb464bc2be | 289 | * This function configures the external SRAM mounted on STM32L152D_EVAL board |
| Kojto | 170:19eb464bc2be | 290 | * This SRAM will be used as program data memory (including heap and stack). |
| Kojto | 170:19eb464bc2be | 291 | * @param None |
| Kojto | 170:19eb464bc2be | 292 | * @retval None |
| Kojto | 170:19eb464bc2be | 293 | */ |
| Kojto | 170:19eb464bc2be | 294 | void SystemInit_ExtMemCtl(void) |
| Kojto | 170:19eb464bc2be | 295 | { |
| Kojto | 170:19eb464bc2be | 296 | __IO uint32_t tmpreg = 0; |
| Kojto | 170:19eb464bc2be | 297 | |
| Kojto | 170:19eb464bc2be | 298 | /* Flash 1 wait state */ |
| Kojto | 170:19eb464bc2be | 299 | FLASH->ACR |= FLASH_ACR_LATENCY; |
| Kojto | 170:19eb464bc2be | 300 | |
| Kojto | 170:19eb464bc2be | 301 | /* Power enable */ |
| Kojto | 170:19eb464bc2be | 302 | RCC->APB1ENR |= RCC_APB1ENR_PWREN; |
| Kojto | 170:19eb464bc2be | 303 | |
| Kojto | 170:19eb464bc2be | 304 | /* Delay after an RCC peripheral clock enabling */ |
| Kojto | 170:19eb464bc2be | 305 | tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_PWREN); |
| Kojto | 170:19eb464bc2be | 306 | |
| Kojto | 170:19eb464bc2be | 307 | /* Select the Voltage Range 1 (1.8 V) */ |
| Kojto | 170:19eb464bc2be | 308 | PWR->CR = PWR_CR_VOS_0; |
| Kojto | 170:19eb464bc2be | 309 | |
| Kojto | 170:19eb464bc2be | 310 | /* Wait Until the Voltage Regulator is ready */ |
| Kojto | 170:19eb464bc2be | 311 | while((PWR->CSR & PWR_CSR_VOSF) != RESET) |
| Kojto | 170:19eb464bc2be | 312 | { |
| Kojto | 170:19eb464bc2be | 313 | } |
| Kojto | 170:19eb464bc2be | 314 | |
| Kojto | 170:19eb464bc2be | 315 | /*-- GPIOs Configuration -----------------------------------------------------*/ |
| Kojto | 170:19eb464bc2be | 316 | /* |
| Kojto | 170:19eb464bc2be | 317 | +-------------------+--------------------+------------------+------------------+ |
| Kojto | 170:19eb464bc2be | 318 | + SRAM pins assignment + |
| Kojto | 170:19eb464bc2be | 319 | +-------------------+--------------------+------------------+------------------+ |
| Kojto | 170:19eb464bc2be | 320 | | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | |
| Kojto | 170:19eb464bc2be | 321 | | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | |
| Kojto | 170:19eb464bc2be | 322 | | PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | |
| Kojto | 170:19eb464bc2be | 323 | | PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | |
| Kojto | 170:19eb464bc2be | 324 | | PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | |
| Kojto | 170:19eb464bc2be | 325 | | PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | |
| Kojto | 170:19eb464bc2be | 326 | | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 | |
| Kojto | 170:19eb464bc2be | 327 | | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+ |
| Kojto | 170:19eb464bc2be | 328 | | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 | |
| Kojto | 170:19eb464bc2be | 329 | | PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 | |
| Kojto | 170:19eb464bc2be | 330 | | PD14 <-> FSMC_D0 | PE15 <-> FSMC_D12 |------------------+ |
| Kojto | 170:19eb464bc2be | 331 | | PD15 <-> FSMC_D1 |--------------------+ |
| Kojto | 170:19eb464bc2be | 332 | +-------------------+ |
| Kojto | 170:19eb464bc2be | 333 | */ |
| Kojto | 170:19eb464bc2be | 334 | |
| Kojto | 170:19eb464bc2be | 335 | /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ |
| Kojto | 170:19eb464bc2be | 336 | RCC->AHBENR = 0x000080D8; |
| Kojto | 170:19eb464bc2be | 337 | |
| Kojto | 170:19eb464bc2be | 338 | /* Delay after an RCC peripheral clock enabling */ |
| Kojto | 170:19eb464bc2be | 339 | tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_GPIODEN); |
| Kojto | 170:19eb464bc2be | 340 | |
| Kojto | 170:19eb464bc2be | 341 | /* Connect PDx pins to FSMC Alternate function */ |
| Kojto | 170:19eb464bc2be | 342 | GPIOD->AFR[0] = 0x00CC00CC; |
| Kojto | 170:19eb464bc2be | 343 | GPIOD->AFR[1] = 0xCCCCCCCC; |
| Kojto | 170:19eb464bc2be | 344 | /* Configure PDx pins in Alternate function mode */ |
| Kojto | 170:19eb464bc2be | 345 | GPIOD->MODER = 0xAAAA0A0A; |
| Kojto | 170:19eb464bc2be | 346 | /* Configure PDx pins speed to 40 MHz */ |
| Kojto | 170:19eb464bc2be | 347 | GPIOD->OSPEEDR = 0xFFFF0F0F; |
| Kojto | 170:19eb464bc2be | 348 | /* Configure PDx pins Output type to push-pull */ |
| Kojto | 170:19eb464bc2be | 349 | GPIOD->OTYPER = 0x00000000; |
| Kojto | 170:19eb464bc2be | 350 | /* No pull-up, pull-down for PDx pins */ |
| Kojto | 170:19eb464bc2be | 351 | GPIOD->PUPDR = 0x00000000; |
| Kojto | 170:19eb464bc2be | 352 | |
| Kojto | 170:19eb464bc2be | 353 | /* Connect PEx pins to FSMC Alternate function */ |
| Kojto | 170:19eb464bc2be | 354 | GPIOE->AFR[0] = 0xC00000CC; |
| Kojto | 170:19eb464bc2be | 355 | GPIOE->AFR[1] = 0xCCCCCCCC; |
| Kojto | 170:19eb464bc2be | 356 | /* Configure PEx pins in Alternate function mode */ |
| Kojto | 170:19eb464bc2be | 357 | GPIOE->MODER = 0xAAAA800A; |
| Kojto | 170:19eb464bc2be | 358 | /* Configure PEx pins speed to 40 MHz */ |
| Kojto | 170:19eb464bc2be | 359 | GPIOE->OSPEEDR = 0xFFFFC00F; |
| Kojto | 170:19eb464bc2be | 360 | /* Configure PEx pins Output type to push-pull */ |
| Kojto | 170:19eb464bc2be | 361 | GPIOE->OTYPER = 0x00000000; |
| Kojto | 170:19eb464bc2be | 362 | /* No pull-up, pull-down for PEx pins */ |
| Kojto | 170:19eb464bc2be | 363 | GPIOE->PUPDR = 0x00000000; |
| Kojto | 170:19eb464bc2be | 364 | |
| Kojto | 170:19eb464bc2be | 365 | /* Connect PFx pins to FSMC Alternate function */ |
| Kojto | 170:19eb464bc2be | 366 | GPIOF->AFR[0] = 0x00CCCCCC; |
| Kojto | 170:19eb464bc2be | 367 | GPIOF->AFR[1] = 0xCCCC0000; |
| Kojto | 170:19eb464bc2be | 368 | /* Configure PFx pins in Alternate function mode */ |
| Kojto | 170:19eb464bc2be | 369 | GPIOF->MODER = 0xAA000AAA; |
| Kojto | 170:19eb464bc2be | 370 | /* Configure PFx pins speed to 40 MHz */ |
| Kojto | 170:19eb464bc2be | 371 | GPIOF->OSPEEDR = 0xFF000FFF; |
| Kojto | 170:19eb464bc2be | 372 | /* Configure PFx pins Output type to push-pull */ |
| Kojto | 170:19eb464bc2be | 373 | GPIOF->OTYPER = 0x00000000; |
| Kojto | 170:19eb464bc2be | 374 | /* No pull-up, pull-down for PFx pins */ |
| Kojto | 170:19eb464bc2be | 375 | GPIOF->PUPDR = 0x00000000; |
| Kojto | 170:19eb464bc2be | 376 | |
| Kojto | 170:19eb464bc2be | 377 | /* Connect PGx pins to FSMC Alternate function */ |
| Kojto | 170:19eb464bc2be | 378 | GPIOG->AFR[0] = 0x00CCCCCC; |
| Kojto | 170:19eb464bc2be | 379 | GPIOG->AFR[1] = 0x00000C00; |
| Kojto | 170:19eb464bc2be | 380 | /* Configure PGx pins in Alternate function mode */ |
| Kojto | 170:19eb464bc2be | 381 | GPIOG->MODER = 0x00200AAA; |
| Kojto | 170:19eb464bc2be | 382 | /* Configure PGx pins speed to 40 MHz */ |
| Kojto | 170:19eb464bc2be | 383 | GPIOG->OSPEEDR = 0x00300FFF; |
| Kojto | 170:19eb464bc2be | 384 | /* Configure PGx pins Output type to push-pull */ |
| Kojto | 170:19eb464bc2be | 385 | GPIOG->OTYPER = 0x00000000; |
| Kojto | 170:19eb464bc2be | 386 | /* No pull-up, pull-down for PGx pins */ |
| Kojto | 170:19eb464bc2be | 387 | GPIOG->PUPDR = 0x00000000; |
| Kojto | 170:19eb464bc2be | 388 | |
| Kojto | 170:19eb464bc2be | 389 | /*-- FSMC Configuration ------------------------------------------------------*/ |
| Kojto | 170:19eb464bc2be | 390 | /* Enable the FSMC interface clock */ |
| Kojto | 170:19eb464bc2be | 391 | RCC->AHBENR = 0x400080D8; |
| Kojto | 170:19eb464bc2be | 392 | |
| Kojto | 170:19eb464bc2be | 393 | /* Delay after an RCC peripheral clock enabling */ |
| Kojto | 170:19eb464bc2be | 394 | tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN); |
| Kojto | 170:19eb464bc2be | 395 | |
| Kojto | 170:19eb464bc2be | 396 | (void)(tmpreg); |
| Kojto | 170:19eb464bc2be | 397 | |
| Kojto | 170:19eb464bc2be | 398 | /* Configure and enable Bank1_SRAM3 */ |
| Kojto | 170:19eb464bc2be | 399 | FSMC_Bank1->BTCR[4] = 0x00001011; |
| Kojto | 170:19eb464bc2be | 400 | FSMC_Bank1->BTCR[5] = 0x00000300; |
| Kojto | 170:19eb464bc2be | 401 | FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF; |
| Kojto | 170:19eb464bc2be | 402 | /* |
| Kojto | 170:19eb464bc2be | 403 | Bank1_SRAM3 is configured as follow: |
| Kojto | 170:19eb464bc2be | 404 | |
| Kojto | 170:19eb464bc2be | 405 | p.FSMC_AddressSetupTime = 0; |
| Kojto | 170:19eb464bc2be | 406 | p.FSMC_AddressHoldTime = 0; |
| Kojto | 170:19eb464bc2be | 407 | p.FSMC_DataSetupTime = 3; |
| Kojto | 170:19eb464bc2be | 408 | p.FSMC_BusTurnAroundDuration = 0; |
| Kojto | 170:19eb464bc2be | 409 | p.FSMC_CLKDivision = 0; |
| Kojto | 170:19eb464bc2be | 410 | p.FSMC_DataLatency = 0; |
| Kojto | 170:19eb464bc2be | 411 | p.FSMC_AccessMode = FSMC_AccessMode_A; |
| Kojto | 170:19eb464bc2be | 412 | |
| Kojto | 170:19eb464bc2be | 413 | FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; |
| Kojto | 170:19eb464bc2be | 414 | FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; |
| Kojto | 170:19eb464bc2be | 415 | FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; |
| Kojto | 170:19eb464bc2be | 416 | FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; |
| Kojto | 170:19eb464bc2be | 417 | FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; |
| Kojto | 170:19eb464bc2be | 418 | FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; |
| Kojto | 170:19eb464bc2be | 419 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; |
| Kojto | 170:19eb464bc2be | 420 | FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; |
| Kojto | 170:19eb464bc2be | 421 | FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; |
| Kojto | 170:19eb464bc2be | 422 | FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; |
| Kojto | 170:19eb464bc2be | 423 | FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; |
| Kojto | 170:19eb464bc2be | 424 | FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; |
| Kojto | 170:19eb464bc2be | 425 | FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; |
| Kojto | 170:19eb464bc2be | 426 | FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; |
| Kojto | 170:19eb464bc2be | 427 | FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; |
| Kojto | 170:19eb464bc2be | 428 | |
| Kojto | 170:19eb464bc2be | 429 | FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); |
| Kojto | 170:19eb464bc2be | 430 | |
| Kojto | 170:19eb464bc2be | 431 | FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); |
| Kojto | 170:19eb464bc2be | 432 | */ |
| Kojto | 170:19eb464bc2be | 433 | |
| Kojto | 170:19eb464bc2be | 434 | } |
| Kojto | 170:19eb464bc2be | 435 | #endif /* DATA_IN_ExtSRAM */ |
| Kojto | 170:19eb464bc2be | 436 | #endif /* STM32L151xD || STM32L152xD || STM32L162xD */ |
| Kojto | 170:19eb464bc2be | 437 | |
| Kojto | 170:19eb464bc2be | 438 | /** |
| Kojto | 170:19eb464bc2be | 439 | * @} |
| Kojto | 170:19eb464bc2be | 440 | */ |
| Kojto | 170:19eb464bc2be | 441 | |
| Kojto | 170:19eb464bc2be | 442 | /** |
| Kojto | 170:19eb464bc2be | 443 | * @} |
| Kojto | 170:19eb464bc2be | 444 | */ |
| Kojto | 170:19eb464bc2be | 445 | |
| Kojto | 170:19eb464bc2be | 446 | /** |
| Kojto | 170:19eb464bc2be | 447 | * @} |
| Kojto | 170:19eb464bc2be | 448 | */ |
| Kojto | 170:19eb464bc2be | 449 | |
| Kojto | 170:19eb464bc2be | 450 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
