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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_utils.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
184:08ed48f1de7f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_ll_utils.h
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @brief Header file of UTILS LL module.
<> 149:156823d33999 6 @verbatim
<> 149:156823d33999 7 ==============================================================================
<> 149:156823d33999 8 ##### How to use this driver #####
<> 149:156823d33999 9 ==============================================================================
<> 149:156823d33999 10 [..]
<> 149:156823d33999 11 The LL UTILS driver contains a set of generic APIs that can be
<> 149:156823d33999 12 used by user:
<> 149:156823d33999 13 (+) Device electronic signature
<> 149:156823d33999 14 (+) Timing functions
<> 149:156823d33999 15 (+) PLL configuration functions
<> 149:156823d33999 16
<> 149:156823d33999 17 @endverbatim
<> 149:156823d33999 18 ******************************************************************************
<> 149:156823d33999 19 * @attention
<> 149:156823d33999 20 *
AnnaBridge 184:08ed48f1de7f 21 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 149:156823d33999 22 *
<> 149:156823d33999 23 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 24 * are permitted provided that the following conditions are met:
<> 149:156823d33999 25 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 26 * this list of conditions and the following disclaimer.
<> 149:156823d33999 27 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 28 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 29 * and/or other materials provided with the distribution.
<> 149:156823d33999 30 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 31 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 32 * without specific prior written permission.
<> 149:156823d33999 33 *
<> 149:156823d33999 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 35 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 36 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 37 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 38 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 39 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 40 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 41 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 42 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 43 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 44 *
<> 149:156823d33999 45 ******************************************************************************
<> 149:156823d33999 46 */
<> 149:156823d33999 47
<> 149:156823d33999 48 /* Define to prevent recursive inclusion -------------------------------------*/
<> 149:156823d33999 49 #ifndef __STM32L1xx_LL_UTILS_H
<> 149:156823d33999 50 #define __STM32L1xx_LL_UTILS_H
<> 149:156823d33999 51
<> 149:156823d33999 52 #ifdef __cplusplus
<> 149:156823d33999 53 extern "C" {
<> 149:156823d33999 54 #endif
<> 149:156823d33999 55
<> 149:156823d33999 56 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 57 #include "stm32l1xx.h"
<> 149:156823d33999 58
<> 149:156823d33999 59 /** @addtogroup STM32L1xx_LL_Driver
<> 149:156823d33999 60 * @{
<> 149:156823d33999 61 */
<> 149:156823d33999 62
<> 149:156823d33999 63 /** @defgroup UTILS_LL UTILS
<> 149:156823d33999 64 * @{
<> 149:156823d33999 65 */
<> 149:156823d33999 66
<> 149:156823d33999 67 /* Private types -------------------------------------------------------------*/
<> 149:156823d33999 68 /* Private variables ---------------------------------------------------------*/
<> 149:156823d33999 69
<> 149:156823d33999 70 /* Private constants ---------------------------------------------------------*/
<> 149:156823d33999 71 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
<> 149:156823d33999 72 * @{
<> 149:156823d33999 73 */
<> 149:156823d33999 74
<> 149:156823d33999 75 /* Max delay can be used in LL_mDelay */
AnnaBridge 184:08ed48f1de7f 76 #define LL_MAX_DELAY 0xFFFFFFFFU
<> 149:156823d33999 77
<> 149:156823d33999 78 /**
<> 149:156823d33999 79 * @brief Unique device ID register base address
<> 149:156823d33999 80 */
<> 149:156823d33999 81 #define UID_BASE_ADDRESS UID_BASE
<> 149:156823d33999 82
<> 149:156823d33999 83 /**
<> 149:156823d33999 84 * @brief Flash size data register base address
<> 149:156823d33999 85 */
<> 149:156823d33999 86 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
<> 149:156823d33999 87
<> 149:156823d33999 88 /**
<> 149:156823d33999 89 * @}
<> 149:156823d33999 90 */
<> 149:156823d33999 91
<> 149:156823d33999 92 /* Private macros ------------------------------------------------------------*/
<> 149:156823d33999 93 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
<> 149:156823d33999 94 * @{
<> 149:156823d33999 95 */
<> 149:156823d33999 96 /**
<> 149:156823d33999 97 * @}
<> 149:156823d33999 98 */
<> 149:156823d33999 99 /* Exported types ------------------------------------------------------------*/
<> 149:156823d33999 100 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
<> 149:156823d33999 101 * @{
<> 149:156823d33999 102 */
<> 149:156823d33999 103 /**
<> 149:156823d33999 104 * @brief UTILS PLL structure definition
<> 149:156823d33999 105 */
<> 149:156823d33999 106 typedef struct
<> 149:156823d33999 107 {
<> 149:156823d33999 108 uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock.
<> 149:156823d33999 109 This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
<> 149:156823d33999 110
<> 149:156823d33999 111 This feature can be modified afterwards using unitary function
<> 149:156823d33999 112 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
<> 149:156823d33999 113
<> 149:156823d33999 114 uint32_t PLLDiv; /*!< Division factor for PLL VCO output clock.
<> 149:156823d33999 115 This parameter can be a value of @ref RCC_LL_EC_PLL_DIV
<> 149:156823d33999 116
<> 149:156823d33999 117 This feature can be modified afterwards using unitary function
<> 149:156823d33999 118 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
<> 149:156823d33999 119 } LL_UTILS_PLLInitTypeDef;
<> 149:156823d33999 120
<> 149:156823d33999 121 /**
<> 149:156823d33999 122 * @brief UTILS System, AHB and APB buses clock configuration structure definition
<> 149:156823d33999 123 */
<> 149:156823d33999 124 typedef struct
<> 149:156823d33999 125 {
<> 149:156823d33999 126 uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
<> 149:156823d33999 127 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
<> 149:156823d33999 128
<> 149:156823d33999 129 This feature can be modified afterwards using unitary function
<> 149:156823d33999 130 @ref LL_RCC_SetAHBPrescaler(). */
<> 149:156823d33999 131
<> 149:156823d33999 132 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
<> 149:156823d33999 133 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
<> 149:156823d33999 134
<> 149:156823d33999 135 This feature can be modified afterwards using unitary function
<> 149:156823d33999 136 @ref LL_RCC_SetAPB1Prescaler(). */
<> 149:156823d33999 137
<> 149:156823d33999 138 uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
<> 149:156823d33999 139 This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
<> 149:156823d33999 140
<> 149:156823d33999 141 This feature can be modified afterwards using unitary function
<> 149:156823d33999 142 @ref LL_RCC_SetAPB2Prescaler(). */
<> 149:156823d33999 143
<> 149:156823d33999 144 } LL_UTILS_ClkInitTypeDef;
<> 149:156823d33999 145
<> 149:156823d33999 146 /**
<> 149:156823d33999 147 * @}
<> 149:156823d33999 148 */
<> 149:156823d33999 149
<> 149:156823d33999 150 /* Exported constants --------------------------------------------------------*/
<> 149:156823d33999 151 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
<> 149:156823d33999 152 * @{
<> 149:156823d33999 153 */
<> 149:156823d33999 154
<> 149:156823d33999 155 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
<> 149:156823d33999 156 * @{
<> 149:156823d33999 157 */
AnnaBridge 184:08ed48f1de7f 158 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
AnnaBridge 184:08ed48f1de7f 159 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
<> 149:156823d33999 160 /**
<> 149:156823d33999 161 * @}
<> 149:156823d33999 162 */
<> 149:156823d33999 163
<> 149:156823d33999 164 /**
<> 149:156823d33999 165 * @}
<> 149:156823d33999 166 */
<> 149:156823d33999 167
<> 149:156823d33999 168 /* Exported macro ------------------------------------------------------------*/
<> 149:156823d33999 169
<> 149:156823d33999 170 /* Exported functions --------------------------------------------------------*/
<> 149:156823d33999 171 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
<> 149:156823d33999 172 * @{
<> 149:156823d33999 173 */
<> 149:156823d33999 174
<> 149:156823d33999 175 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
<> 149:156823d33999 176 * @{
<> 149:156823d33999 177 */
<> 149:156823d33999 178
<> 149:156823d33999 179 /**
<> 149:156823d33999 180 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
<> 149:156823d33999 181 * @retval UID[31:0]
<> 149:156823d33999 182 */
<> 149:156823d33999 183 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
<> 149:156823d33999 184 {
<> 149:156823d33999 185 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
<> 149:156823d33999 186 }
<> 149:156823d33999 187
<> 149:156823d33999 188 /**
<> 149:156823d33999 189 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
<> 149:156823d33999 190 * @retval UID[63:32]
<> 149:156823d33999 191 */
<> 149:156823d33999 192 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
<> 149:156823d33999 193 {
<> 149:156823d33999 194 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
<> 149:156823d33999 195 }
<> 149:156823d33999 196
<> 149:156823d33999 197 /**
<> 149:156823d33999 198 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
<> 149:156823d33999 199 * @retval UID[95:64]
<> 149:156823d33999 200 */
<> 149:156823d33999 201 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
<> 149:156823d33999 202 {
<> 149:156823d33999 203 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
<> 149:156823d33999 204 }
<> 149:156823d33999 205
<> 149:156823d33999 206 /**
<> 149:156823d33999 207 * @brief Get Flash memory size
<> 149:156823d33999 208 * @note For DEV_ID = 0x416 or 0x427 or 0x429 or 0x437, this field value indicates the Flash memory
<> 149:156823d33999 209 * size of the device in Kbytes.\n
<> 149:156823d33999 210 * Example: 0x0080 = 128 Kbytes.\n
<> 149:156823d33999 211 * For DEV_ID = 0x436, the field value can be '0' or '1', with '0' for 384 Kbytes and '1' for 256 Kbytes.
<> 149:156823d33999 212 * @note For DEV_ID = 0x429, only LSB part of F_SIZE: F_SIZE[7:0] is valid. The MSB part
<> 149:156823d33999 213 * F_SIZE[15:8] is reserved and must be ignored.
<> 149:156823d33999 214 * @retval FLASH_SIZE[15:0]: Flash memory size
<> 149:156823d33999 215 */
<> 149:156823d33999 216 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
<> 149:156823d33999 217 {
<> 149:156823d33999 218 return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
<> 149:156823d33999 219 }
<> 149:156823d33999 220
AnnaBridge 184:08ed48f1de7f 221
<> 149:156823d33999 222 /**
<> 149:156823d33999 223 * @}
<> 149:156823d33999 224 */
<> 149:156823d33999 225
<> 149:156823d33999 226 /** @defgroup UTILS_LL_EF_DELAY DELAY
<> 149:156823d33999 227 * @{
<> 149:156823d33999 228 */
<> 149:156823d33999 229
<> 149:156823d33999 230 /**
<> 149:156823d33999 231 * @brief This function configures the Cortex-M SysTick source of the time base.
<> 149:156823d33999 232 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
<> 149:156823d33999 233 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
<> 149:156823d33999 234 * configuration by calling this function, for a delay use rather osDelay RTOS service.
<> 149:156823d33999 235 * @param Ticks Number of ticks
<> 149:156823d33999 236 * @retval None
<> 149:156823d33999 237 */
<> 149:156823d33999 238 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
<> 149:156823d33999 239 {
<> 149:156823d33999 240 /* Configure the SysTick to have interrupt in 1ms time base */
<> 149:156823d33999 241 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
<> 149:156823d33999 242 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
<> 149:156823d33999 243 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
<> 149:156823d33999 244 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
<> 149:156823d33999 245 }
<> 149:156823d33999 246
<> 149:156823d33999 247 void LL_Init1msTick(uint32_t HCLKFrequency);
<> 149:156823d33999 248 void LL_mDelay(uint32_t Delay);
<> 149:156823d33999 249
<> 149:156823d33999 250 /**
<> 149:156823d33999 251 * @}
<> 149:156823d33999 252 */
<> 149:156823d33999 253
<> 149:156823d33999 254 /** @defgroup UTILS_EF_SYSTEM SYSTEM
<> 149:156823d33999 255 * @{
<> 149:156823d33999 256 */
<> 149:156823d33999 257
<> 149:156823d33999 258 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
<> 149:156823d33999 259 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
<> 149:156823d33999 260 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
<> 149:156823d33999 261 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
<> 149:156823d33999 262 LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
<> 149:156823d33999 263
<> 149:156823d33999 264 /**
<> 149:156823d33999 265 * @}
<> 149:156823d33999 266 */
<> 149:156823d33999 267
<> 149:156823d33999 268 /**
<> 149:156823d33999 269 * @}
<> 149:156823d33999 270 */
<> 149:156823d33999 271
<> 149:156823d33999 272 /**
<> 149:156823d33999 273 * @}
<> 149:156823d33999 274 */
<> 149:156823d33999 275
<> 149:156823d33999 276 /**
<> 149:156823d33999 277 * @}
<> 149:156823d33999 278 */
<> 149:156823d33999 279
<> 149:156823d33999 280 #ifdef __cplusplus
<> 149:156823d33999 281 }
<> 149:156823d33999 282 #endif
<> 149:156823d33999 283
<> 149:156823d33999 284 #endif /* __STM32L1xx_LL_UTILS_H */
<> 149:156823d33999 285
<> 149:156823d33999 286 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/