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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_usart.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3
Parent:: 184:08ed48f1de7f

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	149:156823d33999	1	/**
<>	149:156823d33999	2	******************************************************************************
<>	149:156823d33999	3	* @file stm32l1xx_ll_usart.h
<>	149:156823d33999	4	* @author MCD Application Team
<>	149:156823d33999	5	* @brief Header file of USART LL module.
<>	149:156823d33999	6	******************************************************************************
<>	149:156823d33999	7	* @attention
<>	149:156823d33999	8	*
AnnaBridge	184:08ed48f1de7f	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<>	149:156823d33999	10	*
<>	149:156823d33999	11	* Redistribution and use in source and binary forms, with or without modification,
<>	149:156823d33999	12	* are permitted provided that the following conditions are met:
<>	149:156823d33999	13	* 1. Redistributions of source code must retain the above copyright notice,
<>	149:156823d33999	14	* this list of conditions and the following disclaimer.
<>	149:156823d33999	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	149:156823d33999	16	* this list of conditions and the following disclaimer in the documentation
<>	149:156823d33999	17	* and/or other materials provided with the distribution.
<>	149:156823d33999	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	149:156823d33999	19	* may be used to endorse or promote products derived from this software
<>	149:156823d33999	20	* without specific prior written permission.
<>	149:156823d33999	21	*
<>	149:156823d33999	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	149:156823d33999	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	149:156823d33999	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	149:156823d33999	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	149:156823d33999	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	149:156823d33999	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	149:156823d33999	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	149:156823d33999	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	149:156823d33999	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	149:156823d33999	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	149:156823d33999	32	*
<>	149:156823d33999	33	******************************************************************************
<>	149:156823d33999	34	*/
<>	149:156823d33999	35
<>	149:156823d33999	36	/* Define to prevent recursive inclusion -------------------------------------*/
<>	149:156823d33999	37	#ifndef __STM32L1xx_LL_USART_H
<>	149:156823d33999	38	#define __STM32L1xx_LL_USART_H
<>	149:156823d33999	39
<>	149:156823d33999	40	#ifdef __cplusplus
<>	149:156823d33999	41	extern "C" {
<>	149:156823d33999	42	#endif
<>	149:156823d33999	43
<>	149:156823d33999	44	/* Includes ------------------------------------------------------------------*/
<>	149:156823d33999	45	#include "stm32l1xx.h"
<>	149:156823d33999	46
<>	149:156823d33999	47	/** @addtogroup STM32L1xx_LL_Driver
<>	149:156823d33999	48	* @{
<>	149:156823d33999	49	*/
<>	149:156823d33999	50
<>	149:156823d33999	51	#if defined (USART1) \|\| defined (USART2) \|\| defined (USART3) \|\| defined (UART4) \|\| defined (UART5)
<>	149:156823d33999	52
<>	149:156823d33999	53	/** @defgroup USART_LL USART
<>	149:156823d33999	54	* @{
<>	149:156823d33999	55	*/
<>	149:156823d33999	56
<>	149:156823d33999	57	/* Private types -------------------------------------------------------------*/
<>	149:156823d33999	58	/* Private variables ---------------------------------------------------------*/
<>	149:156823d33999	59	/* Private constants ---------------------------------------------------------*/
<>	149:156823d33999	60
<>	149:156823d33999	61	/* Private macros ------------------------------------------------------------*/
<>	149:156823d33999	62	#if defined(USE_FULL_LL_DRIVER)
<>	149:156823d33999	63	/** @defgroup USART_LL_Private_Macros USART Private Macros
<>	149:156823d33999	64	* @{
<>	149:156823d33999	65	*/
<>	149:156823d33999	66	/**
<>	149:156823d33999	67	* @}
<>	149:156823d33999	68	*/
<>	149:156823d33999	69	#endif /USE_FULL_LL_DRIVER/
<>	149:156823d33999	70
<>	149:156823d33999	71	/* Exported types ------------------------------------------------------------*/
<>	149:156823d33999	72	#if defined(USE_FULL_LL_DRIVER)
<>	149:156823d33999	73	/** @defgroup USART_LL_ES_INIT USART Exported Init structures
<>	149:156823d33999	74	* @{
<>	149:156823d33999	75	*/
<>	149:156823d33999	76
<>	149:156823d33999	77	/**
<>	149:156823d33999	78	* @brief LL USART Init Structure definition
<>	149:156823d33999	79	*/
<>	149:156823d33999	80	typedef struct
<>	149:156823d33999	81	{
<>	149:156823d33999	82	uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
<>	149:156823d33999	83
<>	149:156823d33999	84	This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
<>	149:156823d33999	85
<>	149:156823d33999	86	uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
<>	149:156823d33999	87	This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
<>	149:156823d33999	88
<>	149:156823d33999	89	This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
<>	149:156823d33999	90
<>	149:156823d33999	91	uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<>	149:156823d33999	92	This parameter can be a value of @ref USART_LL_EC_STOPBITS.
<>	149:156823d33999	93
<>	149:156823d33999	94	This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
<>	149:156823d33999	95
<>	149:156823d33999	96	uint32_t Parity; /*!< Specifies the parity mode.
<>	149:156823d33999	97	This parameter can be a value of @ref USART_LL_EC_PARITY.
<>	149:156823d33999	98
<>	149:156823d33999	99	This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
<>	149:156823d33999	100
<>	149:156823d33999	101	uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
<>	149:156823d33999	102	This parameter can be a value of @ref USART_LL_EC_DIRECTION.
<>	149:156823d33999	103
<>	149:156823d33999	104	This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
<>	149:156823d33999	105
<>	149:156823d33999	106	uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
<>	149:156823d33999	107	This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
<>	149:156823d33999	108
<>	149:156823d33999	109	This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
<>	149:156823d33999	110
<>	149:156823d33999	111	uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
<>	149:156823d33999	112	This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
<>	149:156823d33999	113
<>	149:156823d33999	114	This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
<>	149:156823d33999	115
<>	149:156823d33999	116	} LL_USART_InitTypeDef;
<>	149:156823d33999	117
<>	149:156823d33999	118	/**
<>	149:156823d33999	119	* @brief LL USART Clock Init Structure definition
<>	149:156823d33999	120	*/
<>	149:156823d33999	121	typedef struct
<>	149:156823d33999	122	{
<>	149:156823d33999	123	uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled.
<>	149:156823d33999	124	This parameter can be a value of @ref USART_LL_EC_CLOCK.
<>	149:156823d33999	125
<>	149:156823d33999	126	USART HW configuration can be modified afterwards using unitary functions
<>	149:156823d33999	127	@ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
<>	149:156823d33999	128	For more details, refer to description of this function. */
<>	149:156823d33999	129
<>	149:156823d33999	130	uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock.
<>	149:156823d33999	131	This parameter can be a value of @ref USART_LL_EC_POLARITY.
<>	149:156823d33999	132
<>	149:156823d33999	133	USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
<>	149:156823d33999	134	For more details, refer to description of this function. */
<>	149:156823d33999	135
<>	149:156823d33999	136	uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made.
<>	149:156823d33999	137	This parameter can be a value of @ref USART_LL_EC_PHASE.
<>	149:156823d33999	138
<>	149:156823d33999	139	USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
<>	149:156823d33999	140	For more details, refer to description of this function. */
<>	149:156823d33999	141
<>	149:156823d33999	142	uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted
<>	149:156823d33999	143	data bit (MSB) has to be output on the SCLK pin in synchronous mode.
<>	149:156823d33999	144	This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
<>	149:156823d33999	145
<>	149:156823d33999	146	USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
<>	149:156823d33999	147	For more details, refer to description of this function. */
<>	149:156823d33999	148
<>	149:156823d33999	149	} LL_USART_ClockInitTypeDef;
<>	149:156823d33999	150
<>	149:156823d33999	151	/**
<>	149:156823d33999	152	* @}
<>	149:156823d33999	153	*/
<>	149:156823d33999	154	#endif /* USE_FULL_LL_DRIVER */
<>	149:156823d33999	155
<>	149:156823d33999	156	/* Exported constants --------------------------------------------------------*/
<>	149:156823d33999	157	/** @defgroup USART_LL_Exported_Constants USART Exported Constants
<>	149:156823d33999	158	* @{
<>	149:156823d33999	159	*/
<>	149:156823d33999	160
<>	149:156823d33999	161	/** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
<>	149:156823d33999	162	* @brief Flags defines which can be used with LL_USART_ReadReg function
<>	149:156823d33999	163	* @{
<>	149:156823d33999	164	*/
<>	149:156823d33999	165	#define LL_USART_SR_PE USART_SR_PE /!< Parity error flag /
<>	149:156823d33999	166	#define LL_USART_SR_FE USART_SR_FE /!< Framing error flag /
<>	149:156823d33999	167	#define LL_USART_SR_NE USART_SR_NE /!< Noise detected flag /
<>	149:156823d33999	168	#define LL_USART_SR_ORE USART_SR_ORE /!< Overrun error flag /
<>	149:156823d33999	169	#define LL_USART_SR_IDLE USART_SR_IDLE /!< Idle line detected flag /
<>	149:156823d33999	170	#define LL_USART_SR_RXNE USART_SR_RXNE /!< Read data register not empty flag /
<>	149:156823d33999	171	#define LL_USART_SR_TC USART_SR_TC /!< Transmission complete flag /
<>	149:156823d33999	172	#define LL_USART_SR_TXE USART_SR_TXE /!< Transmit data register empty flag /
<>	149:156823d33999	173	#define LL_USART_SR_LBD USART_SR_LBD /!< LIN break detection flag /
<>	149:156823d33999	174	#define LL_USART_SR_CTS USART_SR_CTS /!< CTS flag /
<>	149:156823d33999	175	/**
<>	149:156823d33999	176	* @}
<>	149:156823d33999	177	*/
<>	149:156823d33999	178
<>	149:156823d33999	179	/** @defgroup USART_LL_EC_IT IT Defines
<>	149:156823d33999	180	* @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions
<>	149:156823d33999	181	* @{
<>	149:156823d33999	182	*/
<>	149:156823d33999	183	#define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /!< IDLE interrupt enable /
<>	149:156823d33999	184	#define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /!< Read data register not empty interrupt enable /
<>	149:156823d33999	185	#define LL_USART_CR1_TCIE USART_CR1_TCIE /!< Transmission complete interrupt enable /
<>	149:156823d33999	186	#define LL_USART_CR1_TXEIE USART_CR1_TXEIE /!< Transmit data register empty interrupt enable /
<>	149:156823d33999	187	#define LL_USART_CR1_PEIE USART_CR1_PEIE /!< Parity error /
<>	149:156823d33999	188	#define LL_USART_CR2_LBDIE USART_CR2_LBDIE /!< LIN break detection interrupt enable /
<>	149:156823d33999	189	#define LL_USART_CR3_EIE USART_CR3_EIE /!< Error interrupt enable /
<>	149:156823d33999	190	#define LL_USART_CR3_CTSIE USART_CR3_CTSIE /!< CTS interrupt enable /
<>	149:156823d33999	191	/**
<>	149:156823d33999	192	* @}
<>	149:156823d33999	193	*/
<>	149:156823d33999	194
<>	149:156823d33999	195	/** @defgroup USART_LL_EC_DIRECTION Communication Direction
<>	149:156823d33999	196	* @{
<>	149:156823d33999	197	*/
AnnaBridge	184:08ed48f1de7f	198	#define LL_USART_DIRECTION_NONE 0x00000000U /!< Transmitter and Receiver are disabled /
<>	149:156823d33999	199	#define LL_USART_DIRECTION_RX USART_CR1_RE /!< Transmitter is disabled and Receiver is enabled /
<>	149:156823d33999	200	#define LL_USART_DIRECTION_TX USART_CR1_TE /!< Transmitter is enabled and Receiver is disabled /
<>	149:156823d33999	201	#define LL_USART_DIRECTION_TX_RX (USART_CR1_TE \|USART_CR1_RE) /!< Transmitter and Receiver are enabled /
<>	149:156823d33999	202	/**
<>	149:156823d33999	203	* @}
<>	149:156823d33999	204	*/
<>	149:156823d33999	205
<>	149:156823d33999	206	/** @defgroup USART_LL_EC_PARITY Parity Control
<>	149:156823d33999	207	* @{
<>	149:156823d33999	208	*/
AnnaBridge	184:08ed48f1de7f	209	#define LL_USART_PARITY_NONE 0x00000000U /!< Parity control disabled /
<>	149:156823d33999	210	#define LL_USART_PARITY_EVEN USART_CR1_PCE /!< Parity control enabled and Even Parity is selected /
<>	149:156823d33999	211	#define LL_USART_PARITY_ODD (USART_CR1_PCE \| USART_CR1_PS) /!< Parity control enabled and Odd Parity is selected /
<>	149:156823d33999	212	/**
<>	149:156823d33999	213	* @}
<>	149:156823d33999	214	*/
<>	149:156823d33999	215
<>	149:156823d33999	216	/** @defgroup USART_LL_EC_WAKEUP Wakeup
<>	149:156823d33999	217	* @{
<>	149:156823d33999	218	*/
AnnaBridge	184:08ed48f1de7f	219	#define LL_USART_WAKEUP_IDLELINE 0x00000000U /!< USART wake up from Mute mode on Idle Line /
<>	149:156823d33999	220	#define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /!< USART wake up from Mute mode on Address Mark /
<>	149:156823d33999	221	/**
<>	149:156823d33999	222	* @}
<>	149:156823d33999	223	*/
<>	149:156823d33999	224
<>	149:156823d33999	225	/** @defgroup USART_LL_EC_DATAWIDTH Datawidth
<>	149:156823d33999	226	* @{
<>	149:156823d33999	227	*/
AnnaBridge	184:08ed48f1de7f	228	#define LL_USART_DATAWIDTH_8B 0x00000000U /!< 8 bits word length : Start bit, 8 data bits, n stop bits /
<>	149:156823d33999	229	#define LL_USART_DATAWIDTH_9B USART_CR1_M /!< 9 bits word length : Start bit, 9 data bits, n stop bits /
<>	149:156823d33999	230	/**
<>	149:156823d33999	231	* @}
<>	149:156823d33999	232	*/
<>	149:156823d33999	233
<>	149:156823d33999	234	/** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
<>	149:156823d33999	235	* @{
<>	149:156823d33999	236	*/
AnnaBridge	184:08ed48f1de7f	237	#define LL_USART_OVERSAMPLING_16 0x00000000U /!< Oversampling by 16 /
<>	149:156823d33999	238	#define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /!< Oversampling by 8 /
<>	149:156823d33999	239	/**
<>	149:156823d33999	240	* @}
<>	149:156823d33999	241	*/
<>	149:156823d33999	242
<>	149:156823d33999	243	#if defined(USE_FULL_LL_DRIVER)
<>	149:156823d33999	244	/** @defgroup USART_LL_EC_CLOCK Clock Signal
<>	149:156823d33999	245	* @{
<>	149:156823d33999	246	*/
<>	149:156823d33999	247
AnnaBridge	184:08ed48f1de7f	248	#define LL_USART_CLOCK_DISABLE 0x00000000U /!< Clock signal not provided /
<>	149:156823d33999	249	#define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /!< Clock signal provided /
<>	149:156823d33999	250	/**
<>	149:156823d33999	251	* @}
<>	149:156823d33999	252	*/
<>	149:156823d33999	253	#endif /USE_FULL_LL_DRIVER/
<>	149:156823d33999	254
<>	149:156823d33999	255	/** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
<>	149:156823d33999	256	* @{
<>	149:156823d33999	257	*/
AnnaBridge	184:08ed48f1de7f	258	#define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /!< The clock pulse of the last data bit is not output to the SCLK pin /
<>	149:156823d33999	259	#define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /!< The clock pulse of the last data bit is output to the SCLK pin /
<>	149:156823d33999	260	/**
<>	149:156823d33999	261	* @}
<>	149:156823d33999	262	*/
<>	149:156823d33999	263
<>	149:156823d33999	264	/** @defgroup USART_LL_EC_PHASE Clock Phase
<>	149:156823d33999	265	* @{
<>	149:156823d33999	266	*/
AnnaBridge	184:08ed48f1de7f	267	#define LL_USART_PHASE_1EDGE 0x00000000U /!< The first clock transition is the first data capture edge /
<>	149:156823d33999	268	#define LL_USART_PHASE_2EDGE USART_CR2_CPHA /!< The second clock transition is the first data capture edge /
<>	149:156823d33999	269	/**
<>	149:156823d33999	270	* @}
<>	149:156823d33999	271	*/
<>	149:156823d33999	272
<>	149:156823d33999	273	/** @defgroup USART_LL_EC_POLARITY Clock Polarity
<>	149:156823d33999	274	* @{
<>	149:156823d33999	275	*/
AnnaBridge	184:08ed48f1de7f	276	#define LL_USART_POLARITY_LOW 0x00000000U /!< Steady low value on SCLK pin outside transmission window/
<>	149:156823d33999	277	#define LL_USART_POLARITY_HIGH USART_CR2_CPOL /!< Steady high value on SCLK pin outside transmission window /
<>	149:156823d33999	278	/**
<>	149:156823d33999	279	* @}
<>	149:156823d33999	280	*/
<>	149:156823d33999	281
<>	149:156823d33999	282	/** @defgroup USART_LL_EC_STOPBITS Stop Bits
<>	149:156823d33999	283	* @{
<>	149:156823d33999	284	*/
<>	149:156823d33999	285	#define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /!< 0.5 stop bit /
AnnaBridge	184:08ed48f1de7f	286	#define LL_USART_STOPBITS_1 0x00000000U /!< 1 stop bit /
<>	149:156823d33999	287	#define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 \| USART_CR2_STOP_1) /!< 1.5 stop bits /
<>	149:156823d33999	288	#define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /!< 2 stop bits /
<>	149:156823d33999	289	/**
<>	149:156823d33999	290	* @}
<>	149:156823d33999	291	*/
<>	149:156823d33999	292
<>	149:156823d33999	293	/** @defgroup USART_LL_EC_HWCONTROL Hardware Control
<>	149:156823d33999	294	* @{
<>	149:156823d33999	295	*/
AnnaBridge	184:08ed48f1de7f	296	#define LL_USART_HWCONTROL_NONE 0x00000000U /!< CTS and RTS hardware flow control disabled /
<>	149:156823d33999	297	#define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /!< RTS output enabled, data is only requested when there is space in the receive buffer /
<>	149:156823d33999	298	#define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) /
<>	149:156823d33999	299	#define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE \| USART_CR3_CTSE) /!< CTS and RTS hardware flow control enabled /
<>	149:156823d33999	300	/**
<>	149:156823d33999	301	* @}
<>	149:156823d33999	302	*/
<>	149:156823d33999	303
<>	149:156823d33999	304	/** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
<>	149:156823d33999	305	* @{
<>	149:156823d33999	306	*/
AnnaBridge	184:08ed48f1de7f	307	#define LL_USART_IRDA_POWER_NORMAL 0x00000000U /!< IrDA normal power mode /
<>	149:156823d33999	308	#define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /!< IrDA low power mode /
<>	149:156823d33999	309	/**
<>	149:156823d33999	310	* @}
<>	149:156823d33999	311	*/
<>	149:156823d33999	312
<>	149:156823d33999	313	/** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
<>	149:156823d33999	314	* @{
<>	149:156823d33999	315	*/
AnnaBridge	184:08ed48f1de7f	316	#define LL_USART_LINBREAK_DETECT_10B 0x00000000U /!< 10-bit break detection method selected /
<>	149:156823d33999	317	#define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /!< 11-bit break detection method selected /
<>	149:156823d33999	318	/**
<>	149:156823d33999	319	* @}
<>	149:156823d33999	320	*/
<>	149:156823d33999	321
<>	149:156823d33999	322	/**
<>	149:156823d33999	323	* @}
<>	149:156823d33999	324	*/
<>	149:156823d33999	325
<>	149:156823d33999	326	/* Exported macro ------------------------------------------------------------*/
<>	149:156823d33999	327	/** @defgroup USART_LL_Exported_Macros USART Exported Macros
<>	149:156823d33999	328	* @{
<>	149:156823d33999	329	*/
<>	149:156823d33999	330
<>	149:156823d33999	331	/** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
<>	149:156823d33999	332	* @{
<>	149:156823d33999	333	*/
<>	149:156823d33999	334
<>	149:156823d33999	335	/**
<>	149:156823d33999	336	* @brief Write a value in USART register
<>	149:156823d33999	337	* @param __INSTANCE__ USART Instance
<>	149:156823d33999	338	* @param __REG__ Register to be written
<>	149:156823d33999	339	* @param __VALUE__ Value to be written in the register
<>	149:156823d33999	340	* @retval None
<>	149:156823d33999	341	*/
<>	149:156823d33999	342	#define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
<>	149:156823d33999	343
<>	149:156823d33999	344	/**
<>	149:156823d33999	345	* @brief Read a value in USART register
<>	149:156823d33999	346	* @param __INSTANCE__ USART Instance
<>	149:156823d33999	347	* @param __REG__ Register to be read
<>	149:156823d33999	348	* @retval Register value
<>	149:156823d33999	349	*/
<>	149:156823d33999	350	#define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
<>	149:156823d33999	351	/**
<>	149:156823d33999	352	* @}
<>	149:156823d33999	353	*/
<>	149:156823d33999	354
<>	149:156823d33999	355	/** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
<>	149:156823d33999	356	* @{
<>	149:156823d33999	357	*/
<>	149:156823d33999	358
<>	149:156823d33999	359	/**
<>	149:156823d33999	360	* @brief Compute USARTDIV value according to Peripheral Clock and
<>	149:156823d33999	361	* expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
<>	149:156823d33999	362	* @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
<>	149:156823d33999	363	* @param __BAUDRATE__ Baud rate value to achieve
<>	149:156823d33999	364	* @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
<>	149:156823d33999	365	*/
<>	149:156823d33999	366	#define __LL_USART_DIV_SAMPLING8_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)25)/(2(__BAUDRATE__)))
<>	149:156823d33999	367	#define __LL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100)
<>	149:156823d33999	368	#define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8 + 50) / 100)
<>	149:156823d33999	369	/* UART BRR = mantissa + overflow + fraction
<>	149:156823d33999	370	= (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
<>	149:156823d33999	371	#define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
<>	149:156823d33999	372	((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
<>	149:156823d33999	373	(__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07))
<>	149:156823d33999	374
<>	149:156823d33999	375	/**
<>	149:156823d33999	376	* @brief Compute USARTDIV value according to Peripheral Clock and
<>	149:156823d33999	377	* expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
<>	149:156823d33999	378	* @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
<>	149:156823d33999	379	* @param __BAUDRATE__ Baud rate value to achieve
<>	149:156823d33999	380	* @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
<>	149:156823d33999	381	*/
<>	149:156823d33999	382	#define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)25)/(4(__BAUDRATE__)))
<>	149:156823d33999	383	#define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
<>	149:156823d33999	384	#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16 + 50) / 100)
<>	149:156823d33999	385	/* USART BRR = mantissa + overflow + fraction
<>	149:156823d33999	386	= (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
<>	149:156823d33999	387	#define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
<>	149:156823d33999	388	(__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
<>	149:156823d33999	389	(__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))
<>	149:156823d33999	390
<>	149:156823d33999	391	/**
<>	149:156823d33999	392	* @}
<>	149:156823d33999	393	*/
<>	149:156823d33999	394
<>	149:156823d33999	395	/**
<>	149:156823d33999	396	* @}
<>	149:156823d33999	397	*/
<>	149:156823d33999	398
<>	149:156823d33999	399	/* Exported functions --------------------------------------------------------*/
<>	149:156823d33999	400
<>	149:156823d33999	401	/** @defgroup USART_LL_Exported_Functions USART Exported Functions
<>	149:156823d33999	402	* @{
<>	149:156823d33999	403	*/
<>	149:156823d33999	404
<>	149:156823d33999	405	/** @defgroup USART_LL_EF_Configuration Configuration functions
<>	149:156823d33999	406	* @{
<>	149:156823d33999	407	*/
<>	149:156823d33999	408
<>	149:156823d33999	409	/**
<>	149:156823d33999	410	* @brief USART Enable
<>	149:156823d33999	411	* @rmtoll CR1 UE LL_USART_Enable
<>	149:156823d33999	412	* @param USARTx USART Instance
<>	149:156823d33999	413	* @retval None
<>	149:156823d33999	414	*/
<>	149:156823d33999	415	__STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
<>	149:156823d33999	416	{
<>	149:156823d33999	417	SET_BIT(USARTx->CR1, USART_CR1_UE);
<>	149:156823d33999	418	}
<>	149:156823d33999	419
<>	149:156823d33999	420	/**
<>	149:156823d33999	421	* @brief USART Disable (all USART prescalers and outputs are disabled)
<>	149:156823d33999	422	* @note When USART is disabled, USART prescalers and outputs are stopped immediately,
<>	149:156823d33999	423	* and current operations are discarded. The configuration of the USART is kept, but all the status
<>	149:156823d33999	424	* flags, in the USARTx_SR are set to their default values.
<>	149:156823d33999	425	* @rmtoll CR1 UE LL_USART_Disable
<>	149:156823d33999	426	* @param USARTx USART Instance
<>	149:156823d33999	427	* @retval None
<>	149:156823d33999	428	*/
<>	149:156823d33999	429	__STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
<>	149:156823d33999	430	{
<>	149:156823d33999	431	CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
<>	149:156823d33999	432	}
<>	149:156823d33999	433
<>	149:156823d33999	434	/**
<>	149:156823d33999	435	* @brief Indicate if USART is enabled
<>	149:156823d33999	436	* @rmtoll CR1 UE LL_USART_IsEnabled
<>	149:156823d33999	437	* @param USARTx USART Instance
<>	149:156823d33999	438	* @retval State of bit (1 or 0).
<>	149:156823d33999	439	*/
<>	149:156823d33999	440	__STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
<>	149:156823d33999	441	{
<>	149:156823d33999	442	return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
<>	149:156823d33999	443	}
<>	149:156823d33999	444
<>	149:156823d33999	445	/**
<>	149:156823d33999	446	* @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
<>	149:156823d33999	447	* @rmtoll CR1 RE LL_USART_EnableDirectionRx
<>	149:156823d33999	448	* @param USARTx USART Instance
<>	149:156823d33999	449	* @retval None
<>	149:156823d33999	450	*/
<>	149:156823d33999	451	__STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
<>	149:156823d33999	452	{
<>	149:156823d33999	453	SET_BIT(USARTx->CR1, USART_CR1_RE);
<>	149:156823d33999	454	}
<>	149:156823d33999	455
<>	149:156823d33999	456	/**
<>	149:156823d33999	457	* @brief Receiver Disable
<>	149:156823d33999	458	* @rmtoll CR1 RE LL_USART_DisableDirectionRx
<>	149:156823d33999	459	* @param USARTx USART Instance
<>	149:156823d33999	460	* @retval None
<>	149:156823d33999	461	*/
<>	149:156823d33999	462	__STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
<>	149:156823d33999	463	{
<>	149:156823d33999	464	CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
<>	149:156823d33999	465	}
<>	149:156823d33999	466
<>	149:156823d33999	467	/**
<>	149:156823d33999	468	* @brief Transmitter Enable
<>	149:156823d33999	469	* @rmtoll CR1 TE LL_USART_EnableDirectionTx
<>	149:156823d33999	470	* @param USARTx USART Instance
<>	149:156823d33999	471	* @retval None
<>	149:156823d33999	472	*/
<>	149:156823d33999	473	__STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
<>	149:156823d33999	474	{
<>	149:156823d33999	475	SET_BIT(USARTx->CR1, USART_CR1_TE);
<>	149:156823d33999	476	}
<>	149:156823d33999	477
<>	149:156823d33999	478	/**
<>	149:156823d33999	479	* @brief Transmitter Disable
<>	149:156823d33999	480	* @rmtoll CR1 TE LL_USART_DisableDirectionTx
<>	149:156823d33999	481	* @param USARTx USART Instance
<>	149:156823d33999	482	* @retval None
<>	149:156823d33999	483	*/
<>	149:156823d33999	484	__STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
<>	149:156823d33999	485	{
<>	149:156823d33999	486	CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
<>	149:156823d33999	487	}
<>	149:156823d33999	488
<>	149:156823d33999	489	/**
<>	149:156823d33999	490	* @brief Configure simultaneously enabled/disabled states
<>	149:156823d33999	491	* of Transmitter and Receiver
<>	149:156823d33999	492	* @rmtoll CR1 RE LL_USART_SetTransferDirection\n
<>	149:156823d33999	493	* CR1 TE LL_USART_SetTransferDirection
<>	149:156823d33999	494	* @param USARTx USART Instance
<>	149:156823d33999	495	* @param TransferDirection This parameter can be one of the following values:
<>	149:156823d33999	496	* @arg @ref LL_USART_DIRECTION_NONE
<>	149:156823d33999	497	* @arg @ref LL_USART_DIRECTION_RX
<>	149:156823d33999	498	* @arg @ref LL_USART_DIRECTION_TX
<>	149:156823d33999	499	* @arg @ref LL_USART_DIRECTION_TX_RX
<>	149:156823d33999	500	* @retval None
<>	149:156823d33999	501	*/
<>	149:156823d33999	502	__STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
<>	149:156823d33999	503	{
<>	149:156823d33999	504	MODIFY_REG(USARTx->CR1, USART_CR1_RE \| USART_CR1_TE, TransferDirection);
<>	149:156823d33999	505	}
<>	149:156823d33999	506
<>	149:156823d33999	507	/**
<>	149:156823d33999	508	* @brief Return enabled/disabled states of Transmitter and Receiver
<>	149:156823d33999	509	* @rmtoll CR1 RE LL_USART_GetTransferDirection\n
<>	149:156823d33999	510	* CR1 TE LL_USART_GetTransferDirection
<>	149:156823d33999	511	* @param USARTx USART Instance
<>	149:156823d33999	512	* @retval Returned value can be one of the following values:
<>	149:156823d33999	513	* @arg @ref LL_USART_DIRECTION_NONE
<>	149:156823d33999	514	* @arg @ref LL_USART_DIRECTION_RX
<>	149:156823d33999	515	* @arg @ref LL_USART_DIRECTION_TX
<>	149:156823d33999	516	* @arg @ref LL_USART_DIRECTION_TX_RX
<>	149:156823d33999	517	*/
<>	149:156823d33999	518	__STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
<>	149:156823d33999	519	{
<>	149:156823d33999	520	return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE \| USART_CR1_TE));
<>	149:156823d33999	521	}
<>	149:156823d33999	522
<>	149:156823d33999	523	/**
<>	149:156823d33999	524	* @brief Configure Parity (enabled/disabled and parity mode if enabled).
<>	149:156823d33999	525	* @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
<>	149:156823d33999	526	* When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
<>	149:156823d33999	527	* (9th or 8th bit depending on data width) and parity is checked on the received data.
<>	149:156823d33999	528	* @rmtoll CR1 PS LL_USART_SetParity\n
<>	149:156823d33999	529	* CR1 PCE LL_USART_SetParity
<>	149:156823d33999	530	* @param USARTx USART Instance
<>	149:156823d33999	531	* @param Parity This parameter can be one of the following values:
<>	149:156823d33999	532	* @arg @ref LL_USART_PARITY_NONE
<>	149:156823d33999	533	* @arg @ref LL_USART_PARITY_EVEN
<>	149:156823d33999	534	* @arg @ref LL_USART_PARITY_ODD
<>	149:156823d33999	535	* @retval None
<>	149:156823d33999	536	*/
<>	149:156823d33999	537	__STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
<>	149:156823d33999	538	{
<>	149:156823d33999	539	MODIFY_REG(USARTx->CR1, USART_CR1_PS \| USART_CR1_PCE, Parity);
<>	149:156823d33999	540	}
<>	149:156823d33999	541
<>	149:156823d33999	542	/**
<>	149:156823d33999	543	* @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
<>	149:156823d33999	544	* @rmtoll CR1 PS LL_USART_GetParity\n
<>	149:156823d33999	545	* CR1 PCE LL_USART_GetParity
<>	149:156823d33999	546	* @param USARTx USART Instance
<>	149:156823d33999	547	* @retval Returned value can be one of the following values:
<>	149:156823d33999	548	* @arg @ref LL_USART_PARITY_NONE
<>	149:156823d33999	549	* @arg @ref LL_USART_PARITY_EVEN
<>	149:156823d33999	550	* @arg @ref LL_USART_PARITY_ODD
<>	149:156823d33999	551	*/
<>	149:156823d33999	552	__STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
<>	149:156823d33999	553	{
<>	149:156823d33999	554	return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS \| USART_CR1_PCE));
<>	149:156823d33999	555	}
<>	149:156823d33999	556
<>	149:156823d33999	557	/**
<>	149:156823d33999	558	* @brief Set Receiver Wake Up method from Mute mode.
<>	149:156823d33999	559	* @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
<>	149:156823d33999	560	* @param USARTx USART Instance
<>	149:156823d33999	561	* @param Method This parameter can be one of the following values:
<>	149:156823d33999	562	* @arg @ref LL_USART_WAKEUP_IDLELINE
<>	149:156823d33999	563	* @arg @ref LL_USART_WAKEUP_ADDRESSMARK
<>	149:156823d33999	564	* @retval None
<>	149:156823d33999	565	*/
<>	149:156823d33999	566	__STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
<>	149:156823d33999	567	{
<>	149:156823d33999	568	MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
<>	149:156823d33999	569	}
<>	149:156823d33999	570
<>	149:156823d33999	571	/**
<>	149:156823d33999	572	* @brief Return Receiver Wake Up method from Mute mode
<>	149:156823d33999	573	* @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod
<>	149:156823d33999	574	* @param USARTx USART Instance
<>	149:156823d33999	575	* @retval Returned value can be one of the following values:
<>	149:156823d33999	576	* @arg @ref LL_USART_WAKEUP_IDLELINE
<>	149:156823d33999	577	* @arg @ref LL_USART_WAKEUP_ADDRESSMARK
<>	149:156823d33999	578	*/
<>	149:156823d33999	579	__STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
<>	149:156823d33999	580	{
<>	149:156823d33999	581	return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
<>	149:156823d33999	582	}
<>	149:156823d33999	583
<>	149:156823d33999	584	/**
<>	149:156823d33999	585	* @brief Set Word length (i.e. nb of data bits, excluding start and stop bits)
<>	149:156823d33999	586	* @rmtoll CR1 M LL_USART_SetDataWidth
<>	149:156823d33999	587	* @param USARTx USART Instance
<>	149:156823d33999	588	* @param DataWidth This parameter can be one of the following values:
<>	149:156823d33999	589	* @arg @ref LL_USART_DATAWIDTH_8B
<>	149:156823d33999	590	* @arg @ref LL_USART_DATAWIDTH_9B
<>	149:156823d33999	591	* @retval None
<>	149:156823d33999	592	*/
<>	149:156823d33999	593	__STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
<>	149:156823d33999	594	{
<>	149:156823d33999	595	MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
<>	149:156823d33999	596	}
<>	149:156823d33999	597
<>	149:156823d33999	598	/**
<>	149:156823d33999	599	* @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
<>	149:156823d33999	600	* @rmtoll CR1 M LL_USART_GetDataWidth
<>	149:156823d33999	601	* @param USARTx USART Instance
<>	149:156823d33999	602	* @retval Returned value can be one of the following values:
<>	149:156823d33999	603	* @arg @ref LL_USART_DATAWIDTH_8B
<>	149:156823d33999	604	* @arg @ref LL_USART_DATAWIDTH_9B
<>	149:156823d33999	605	*/
<>	149:156823d33999	606	__STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
<>	149:156823d33999	607	{
<>	149:156823d33999	608	return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
<>	149:156823d33999	609	}
<>	149:156823d33999	610
<>	149:156823d33999	611	/**
<>	149:156823d33999	612	* @brief Set Oversampling to 8-bit or 16-bit mode
<>	149:156823d33999	613	* @rmtoll CR1 OVER8 LL_USART_SetOverSampling
<>	149:156823d33999	614	* @param USARTx USART Instance
<>	149:156823d33999	615	* @param OverSampling This parameter can be one of the following values:
<>	149:156823d33999	616	* @arg @ref LL_USART_OVERSAMPLING_16
<>	149:156823d33999	617	* @arg @ref LL_USART_OVERSAMPLING_8
<>	149:156823d33999	618	* @retval None
<>	149:156823d33999	619	*/
<>	149:156823d33999	620	__STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
<>	149:156823d33999	621	{
<>	149:156823d33999	622	MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
<>	149:156823d33999	623	}
<>	149:156823d33999	624
<>	149:156823d33999	625	/**
<>	149:156823d33999	626	* @brief Return Oversampling mode
<>	149:156823d33999	627	* @rmtoll CR1 OVER8 LL_USART_GetOverSampling
<>	149:156823d33999	628	* @param USARTx USART Instance
<>	149:156823d33999	629	* @retval Returned value can be one of the following values:
<>	149:156823d33999	630	* @arg @ref LL_USART_OVERSAMPLING_16
<>	149:156823d33999	631	* @arg @ref LL_USART_OVERSAMPLING_8
<>	149:156823d33999	632	*/
<>	149:156823d33999	633	__STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
<>	149:156823d33999	634	{
<>	149:156823d33999	635	return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
<>	149:156823d33999	636	}
<>	149:156823d33999	637
<>	149:156823d33999	638	/**
<>	149:156823d33999	639	* @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
<>	149:156823d33999	640	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	641	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	642	* @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
<>	149:156823d33999	643	* @param USARTx USART Instance
<>	149:156823d33999	644	* @param LastBitClockPulse This parameter can be one of the following values:
<>	149:156823d33999	645	* @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
<>	149:156823d33999	646	* @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
<>	149:156823d33999	647	* @retval None
<>	149:156823d33999	648	*/
<>	149:156823d33999	649	__STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
<>	149:156823d33999	650	{
<>	149:156823d33999	651	MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
<>	149:156823d33999	652	}
<>	149:156823d33999	653
<>	149:156823d33999	654	/**
<>	149:156823d33999	655	* @brief Retrieve Clock pulse of the last data bit output configuration
<>	149:156823d33999	656	* (Last bit Clock pulse output to the SCLK pin or not)
<>	149:156823d33999	657	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	658	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	659	* @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
<>	149:156823d33999	660	* @param USARTx USART Instance
<>	149:156823d33999	661	* @retval Returned value can be one of the following values:
<>	149:156823d33999	662	* @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
<>	149:156823d33999	663	* @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
<>	149:156823d33999	664	*/
<>	149:156823d33999	665	__STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
<>	149:156823d33999	666	{
<>	149:156823d33999	667	return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
<>	149:156823d33999	668	}
<>	149:156823d33999	669
<>	149:156823d33999	670	/**
<>	149:156823d33999	671	* @brief Select the phase of the clock output on the SCLK pin in synchronous mode
<>	149:156823d33999	672	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	673	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	674	* @rmtoll CR2 CPHA LL_USART_SetClockPhase
<>	149:156823d33999	675	* @param USARTx USART Instance
<>	149:156823d33999	676	* @param ClockPhase This parameter can be one of the following values:
<>	149:156823d33999	677	* @arg @ref LL_USART_PHASE_1EDGE
<>	149:156823d33999	678	* @arg @ref LL_USART_PHASE_2EDGE
<>	149:156823d33999	679	* @retval None
<>	149:156823d33999	680	*/
<>	149:156823d33999	681	__STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
<>	149:156823d33999	682	{
<>	149:156823d33999	683	MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
<>	149:156823d33999	684	}
<>	149:156823d33999	685
<>	149:156823d33999	686	/**
<>	149:156823d33999	687	* @brief Return phase of the clock output on the SCLK pin in synchronous mode
<>	149:156823d33999	688	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	689	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	690	* @rmtoll CR2 CPHA LL_USART_GetClockPhase
<>	149:156823d33999	691	* @param USARTx USART Instance
<>	149:156823d33999	692	* @retval Returned value can be one of the following values:
<>	149:156823d33999	693	* @arg @ref LL_USART_PHASE_1EDGE
<>	149:156823d33999	694	* @arg @ref LL_USART_PHASE_2EDGE
<>	149:156823d33999	695	*/
<>	149:156823d33999	696	__STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
<>	149:156823d33999	697	{
<>	149:156823d33999	698	return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
<>	149:156823d33999	699	}
<>	149:156823d33999	700
<>	149:156823d33999	701	/**
<>	149:156823d33999	702	* @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
<>	149:156823d33999	703	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	704	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	705	* @rmtoll CR2 CPOL LL_USART_SetClockPolarity
<>	149:156823d33999	706	* @param USARTx USART Instance
<>	149:156823d33999	707	* @param ClockPolarity This parameter can be one of the following values:
<>	149:156823d33999	708	* @arg @ref LL_USART_POLARITY_LOW
<>	149:156823d33999	709	* @arg @ref LL_USART_POLARITY_HIGH
<>	149:156823d33999	710	* @retval None
<>	149:156823d33999	711	*/
<>	149:156823d33999	712	__STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
<>	149:156823d33999	713	{
<>	149:156823d33999	714	MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
<>	149:156823d33999	715	}
<>	149:156823d33999	716
<>	149:156823d33999	717	/**
<>	149:156823d33999	718	* @brief Return polarity of the clock output on the SCLK pin in synchronous mode
<>	149:156823d33999	719	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	720	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	721	* @rmtoll CR2 CPOL LL_USART_GetClockPolarity
<>	149:156823d33999	722	* @param USARTx USART Instance
<>	149:156823d33999	723	* @retval Returned value can be one of the following values:
<>	149:156823d33999	724	* @arg @ref LL_USART_POLARITY_LOW
<>	149:156823d33999	725	* @arg @ref LL_USART_POLARITY_HIGH
<>	149:156823d33999	726	*/
<>	149:156823d33999	727	__STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
<>	149:156823d33999	728	{
<>	149:156823d33999	729	return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
<>	149:156823d33999	730	}
<>	149:156823d33999	731
<>	149:156823d33999	732	/**
<>	149:156823d33999	733	* @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
<>	149:156823d33999	734	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	735	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	736	* @note Call of this function is equivalent to following function call sequence :
<>	149:156823d33999	737	* - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
<>	149:156823d33999	738	* - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
<>	149:156823d33999	739	* - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
<>	149:156823d33999	740	* @rmtoll CR2 CPHA LL_USART_ConfigClock\n
<>	149:156823d33999	741	* CR2 CPOL LL_USART_ConfigClock\n
<>	149:156823d33999	742	* CR2 LBCL LL_USART_ConfigClock
<>	149:156823d33999	743	* @param USARTx USART Instance
<>	149:156823d33999	744	* @param Phase This parameter can be one of the following values:
<>	149:156823d33999	745	* @arg @ref LL_USART_PHASE_1EDGE
<>	149:156823d33999	746	* @arg @ref LL_USART_PHASE_2EDGE
<>	149:156823d33999	747	* @param Polarity This parameter can be one of the following values:
<>	149:156823d33999	748	* @arg @ref LL_USART_POLARITY_LOW
<>	149:156823d33999	749	* @arg @ref LL_USART_POLARITY_HIGH
<>	149:156823d33999	750	* @param LBCPOutput This parameter can be one of the following values:
<>	149:156823d33999	751	* @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
<>	149:156823d33999	752	* @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
<>	149:156823d33999	753	* @retval None
<>	149:156823d33999	754	*/
<>	149:156823d33999	755	__STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
<>	149:156823d33999	756	{
<>	149:156823d33999	757	MODIFY_REG(USARTx->CR2, USART_CR2_CPHA \| USART_CR2_CPOL \| USART_CR2_LBCL, Phase \| Polarity \| LBCPOutput);
<>	149:156823d33999	758	}
<>	149:156823d33999	759
<>	149:156823d33999	760	/**
<>	149:156823d33999	761	* @brief Enable Clock output on SCLK pin
<>	149:156823d33999	762	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	763	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	764	* @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
<>	149:156823d33999	765	* @param USARTx USART Instance
<>	149:156823d33999	766	* @retval None
<>	149:156823d33999	767	*/
<>	149:156823d33999	768	__STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
<>	149:156823d33999	769	{
<>	149:156823d33999	770	SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
<>	149:156823d33999	771	}
<>	149:156823d33999	772
<>	149:156823d33999	773	/**
<>	149:156823d33999	774	* @brief Disable Clock output on SCLK pin
<>	149:156823d33999	775	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	776	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	777	* @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
<>	149:156823d33999	778	* @param USARTx USART Instance
<>	149:156823d33999	779	* @retval None
<>	149:156823d33999	780	*/
<>	149:156823d33999	781	__STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
<>	149:156823d33999	782	{
<>	149:156823d33999	783	CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
<>	149:156823d33999	784	}
<>	149:156823d33999	785
<>	149:156823d33999	786	/**
<>	149:156823d33999	787	* @brief Indicate if Clock output on SCLK pin is enabled
<>	149:156823d33999	788	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	789	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	790	* @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
<>	149:156823d33999	791	* @param USARTx USART Instance
<>	149:156823d33999	792	* @retval State of bit (1 or 0).
<>	149:156823d33999	793	*/
<>	149:156823d33999	794	__STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
<>	149:156823d33999	795	{
<>	149:156823d33999	796	return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
<>	149:156823d33999	797	}
<>	149:156823d33999	798
<>	149:156823d33999	799	/**
<>	149:156823d33999	800	* @brief Set the length of the stop bits
<>	149:156823d33999	801	* @rmtoll CR2 STOP LL_USART_SetStopBitsLength
<>	149:156823d33999	802	* @param USARTx USART Instance
<>	149:156823d33999	803	* @param StopBits This parameter can be one of the following values:
<>	149:156823d33999	804	* @arg @ref LL_USART_STOPBITS_0_5
<>	149:156823d33999	805	* @arg @ref LL_USART_STOPBITS_1
<>	149:156823d33999	806	* @arg @ref LL_USART_STOPBITS_1_5
<>	149:156823d33999	807	* @arg @ref LL_USART_STOPBITS_2
<>	149:156823d33999	808	* @retval None
<>	149:156823d33999	809	*/
<>	149:156823d33999	810	__STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
<>	149:156823d33999	811	{
<>	149:156823d33999	812	MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
<>	149:156823d33999	813	}
<>	149:156823d33999	814
<>	149:156823d33999	815	/**
<>	149:156823d33999	816	* @brief Retrieve the length of the stop bits
<>	149:156823d33999	817	* @rmtoll CR2 STOP LL_USART_GetStopBitsLength
<>	149:156823d33999	818	* @param USARTx USART Instance
<>	149:156823d33999	819	* @retval Returned value can be one of the following values:
<>	149:156823d33999	820	* @arg @ref LL_USART_STOPBITS_0_5
<>	149:156823d33999	821	* @arg @ref LL_USART_STOPBITS_1
<>	149:156823d33999	822	* @arg @ref LL_USART_STOPBITS_1_5
<>	149:156823d33999	823	* @arg @ref LL_USART_STOPBITS_2
<>	149:156823d33999	824	*/
<>	149:156823d33999	825	__STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
<>	149:156823d33999	826	{
<>	149:156823d33999	827	return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
<>	149:156823d33999	828	}
<>	149:156823d33999	829
<>	149:156823d33999	830	/**
<>	149:156823d33999	831	* @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
<>	149:156823d33999	832	* @note Call of this function is equivalent to following function call sequence :
<>	149:156823d33999	833	* - Data Width configuration using @ref LL_USART_SetDataWidth() function
<>	149:156823d33999	834	* - Parity Control and mode configuration using @ref LL_USART_SetParity() function
<>	149:156823d33999	835	* - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
<>	149:156823d33999	836	* @rmtoll CR1 PS LL_USART_ConfigCharacter\n
<>	149:156823d33999	837	* CR1 PCE LL_USART_ConfigCharacter\n
<>	149:156823d33999	838	* CR1 M LL_USART_ConfigCharacter\n
<>	149:156823d33999	839	* CR2 STOP LL_USART_ConfigCharacter
<>	149:156823d33999	840	* @param USARTx USART Instance
<>	149:156823d33999	841	* @param DataWidth This parameter can be one of the following values:
<>	149:156823d33999	842	* @arg @ref LL_USART_DATAWIDTH_8B
<>	149:156823d33999	843	* @arg @ref LL_USART_DATAWIDTH_9B
<>	149:156823d33999	844	* @param Parity This parameter can be one of the following values:
<>	149:156823d33999	845	* @arg @ref LL_USART_PARITY_NONE
<>	149:156823d33999	846	* @arg @ref LL_USART_PARITY_EVEN
<>	149:156823d33999	847	* @arg @ref LL_USART_PARITY_ODD
<>	149:156823d33999	848	* @param StopBits This parameter can be one of the following values:
<>	149:156823d33999	849	* @arg @ref LL_USART_STOPBITS_0_5
<>	149:156823d33999	850	* @arg @ref LL_USART_STOPBITS_1
<>	149:156823d33999	851	* @arg @ref LL_USART_STOPBITS_1_5
<>	149:156823d33999	852	* @arg @ref LL_USART_STOPBITS_2
<>	149:156823d33999	853	* @retval None
<>	149:156823d33999	854	*/
<>	149:156823d33999	855	__STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
<>	149:156823d33999	856	uint32_t StopBits)
<>	149:156823d33999	857	{
<>	149:156823d33999	858	MODIFY_REG(USARTx->CR1, USART_CR1_PS \| USART_CR1_PCE \| USART_CR1_M, Parity \| DataWidth);
<>	149:156823d33999	859	MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
<>	149:156823d33999	860	}
<>	149:156823d33999	861
<>	149:156823d33999	862	/**
<>	149:156823d33999	863	* @brief Set Address of the USART node.
<>	149:156823d33999	864	* @note This is used in multiprocessor communication during Mute mode or Stop mode,
<>	149:156823d33999	865	* for wake up with address mark detection.
<>	149:156823d33999	866	* @rmtoll CR2 ADD LL_USART_SetNodeAddress
<>	149:156823d33999	867	* @param USARTx USART Instance
<>	149:156823d33999	868	* @param NodeAddress 4 bit Address of the USART node.
<>	149:156823d33999	869	* @retval None
<>	149:156823d33999	870	*/
<>	149:156823d33999	871	__STATIC_INLINE void LL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t NodeAddress)
<>	149:156823d33999	872	{
<>	149:156823d33999	873	MODIFY_REG(USARTx->CR2, USART_CR2_ADD, (NodeAddress & USART_CR2_ADD));
<>	149:156823d33999	874	}
<>	149:156823d33999	875
<>	149:156823d33999	876	/**
<>	149:156823d33999	877	* @brief Return 4 bit Address of the USART node as set in ADD field of CR2.
<>	149:156823d33999	878	* @note only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
<>	149:156823d33999	879	* @rmtoll CR2 ADD LL_USART_GetNodeAddress
<>	149:156823d33999	880	* @param USARTx USART Instance
<>	149:156823d33999	881	* @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
<>	149:156823d33999	882	*/
<>	149:156823d33999	883	__STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
<>	149:156823d33999	884	{
<>	149:156823d33999	885	return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD));
<>	149:156823d33999	886	}
<>	149:156823d33999	887
<>	149:156823d33999	888	/**
<>	149:156823d33999	889	* @brief Enable RTS HW Flow Control
<>	149:156823d33999	890	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	891	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	892	* @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
<>	149:156823d33999	893	* @param USARTx USART Instance
<>	149:156823d33999	894	* @retval None
<>	149:156823d33999	895	*/
<>	149:156823d33999	896	__STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
<>	149:156823d33999	897	{
<>	149:156823d33999	898	SET_BIT(USARTx->CR3, USART_CR3_RTSE);
<>	149:156823d33999	899	}
<>	149:156823d33999	900
<>	149:156823d33999	901	/**
<>	149:156823d33999	902	* @brief Disable RTS HW Flow Control
<>	149:156823d33999	903	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	904	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	905	* @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
<>	149:156823d33999	906	* @param USARTx USART Instance
<>	149:156823d33999	907	* @retval None
<>	149:156823d33999	908	*/
<>	149:156823d33999	909	__STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
<>	149:156823d33999	910	{
<>	149:156823d33999	911	CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
<>	149:156823d33999	912	}
<>	149:156823d33999	913
<>	149:156823d33999	914	/**
<>	149:156823d33999	915	* @brief Enable CTS HW Flow Control
<>	149:156823d33999	916	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	917	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	918	* @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
<>	149:156823d33999	919	* @param USARTx USART Instance
<>	149:156823d33999	920	* @retval None
<>	149:156823d33999	921	*/
<>	149:156823d33999	922	__STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
<>	149:156823d33999	923	{
<>	149:156823d33999	924	SET_BIT(USARTx->CR3, USART_CR3_CTSE);
<>	149:156823d33999	925	}
<>	149:156823d33999	926
<>	149:156823d33999	927	/**
<>	149:156823d33999	928	* @brief Disable CTS HW Flow Control
<>	149:156823d33999	929	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	930	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	931	* @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
<>	149:156823d33999	932	* @param USARTx USART Instance
<>	149:156823d33999	933	* @retval None
<>	149:156823d33999	934	*/
<>	149:156823d33999	935	__STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
<>	149:156823d33999	936	{
<>	149:156823d33999	937	CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
<>	149:156823d33999	938	}
<>	149:156823d33999	939
<>	149:156823d33999	940	/**
<>	149:156823d33999	941	* @brief Configure HW Flow Control mode (both CTS and RTS)
<>	149:156823d33999	942	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	943	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	944	* @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
<>	149:156823d33999	945	* CR3 CTSE LL_USART_SetHWFlowCtrl
<>	149:156823d33999	946	* @param USARTx USART Instance
<>	149:156823d33999	947	* @param HardwareFlowControl This parameter can be one of the following values:
<>	149:156823d33999	948	* @arg @ref LL_USART_HWCONTROL_NONE
<>	149:156823d33999	949	* @arg @ref LL_USART_HWCONTROL_RTS
<>	149:156823d33999	950	* @arg @ref LL_USART_HWCONTROL_CTS
<>	149:156823d33999	951	* @arg @ref LL_USART_HWCONTROL_RTS_CTS
<>	149:156823d33999	952	* @retval None
<>	149:156823d33999	953	*/
<>	149:156823d33999	954	__STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
<>	149:156823d33999	955	{
<>	149:156823d33999	956	MODIFY_REG(USARTx->CR3, USART_CR3_RTSE \| USART_CR3_CTSE, HardwareFlowControl);
<>	149:156823d33999	957	}
<>	149:156823d33999	958
<>	149:156823d33999	959	/**
<>	149:156823d33999	960	* @brief Return HW Flow Control configuration (both CTS and RTS)
<>	149:156823d33999	961	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	962	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	963	* @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
<>	149:156823d33999	964	* CR3 CTSE LL_USART_GetHWFlowCtrl
<>	149:156823d33999	965	* @param USARTx USART Instance
<>	149:156823d33999	966	* @retval Returned value can be one of the following values:
<>	149:156823d33999	967	* @arg @ref LL_USART_HWCONTROL_NONE
<>	149:156823d33999	968	* @arg @ref LL_USART_HWCONTROL_RTS
<>	149:156823d33999	969	* @arg @ref LL_USART_HWCONTROL_CTS
<>	149:156823d33999	970	* @arg @ref LL_USART_HWCONTROL_RTS_CTS
<>	149:156823d33999	971	*/
<>	149:156823d33999	972	__STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
<>	149:156823d33999	973	{
<>	149:156823d33999	974	return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE \| USART_CR3_CTSE));
<>	149:156823d33999	975	}
<>	149:156823d33999	976
<>	149:156823d33999	977	/**
<>	149:156823d33999	978	* @brief Enable One bit sampling method
<>	149:156823d33999	979	* @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp
<>	149:156823d33999	980	* @param USARTx USART Instance
<>	149:156823d33999	981	* @retval None
<>	149:156823d33999	982	*/
<>	149:156823d33999	983	__STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
<>	149:156823d33999	984	{
<>	149:156823d33999	985	SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
<>	149:156823d33999	986	}
<>	149:156823d33999	987
<>	149:156823d33999	988	/**
<>	149:156823d33999	989	* @brief Disable One bit sampling method
<>	149:156823d33999	990	* @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp
<>	149:156823d33999	991	* @param USARTx USART Instance
<>	149:156823d33999	992	* @retval None
<>	149:156823d33999	993	*/
<>	149:156823d33999	994	__STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
<>	149:156823d33999	995	{
<>	149:156823d33999	996	CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
<>	149:156823d33999	997	}
<>	149:156823d33999	998
<>	149:156823d33999	999	/**
<>	149:156823d33999	1000	* @brief Indicate if One bit sampling method is enabled
<>	149:156823d33999	1001	* @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp
<>	149:156823d33999	1002	* @param USARTx USART Instance
<>	149:156823d33999	1003	* @retval State of bit (1 or 0).
<>	149:156823d33999	1004	*/
<>	149:156823d33999	1005	__STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
<>	149:156823d33999	1006	{
<>	149:156823d33999	1007	return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
<>	149:156823d33999	1008	}
<>	149:156823d33999	1009
<>	149:156823d33999	1010	/**
<>	149:156823d33999	1011	* @brief Configure USART BRR register for achieving expected Baud Rate value.
<>	149:156823d33999	1012	* @note Compute and set USARTDIV value in BRR Register (full BRR content)
<>	149:156823d33999	1013	* according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
<>	149:156823d33999	1014	* @note Peripheral clock and Baud rate values provided as function parameters should be valid
<>	149:156823d33999	1015	* (Baud rate value != 0)
<>	149:156823d33999	1016	* @rmtoll BRR BRR LL_USART_SetBaudRate
<>	149:156823d33999	1017	* @param USARTx USART Instance
<>	149:156823d33999	1018	* @param PeriphClk Peripheral Clock
<>	149:156823d33999	1019	* @param OverSampling This parameter can be one of the following values:
<>	149:156823d33999	1020	* @arg @ref LL_USART_OVERSAMPLING_16
<>	149:156823d33999	1021	* @arg @ref LL_USART_OVERSAMPLING_8
<>	149:156823d33999	1022	* @param BaudRate Baud Rate
<>	149:156823d33999	1023	* @retval None
<>	149:156823d33999	1024	*/
<>	149:156823d33999	1025	__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
<>	149:156823d33999	1026	uint32_t BaudRate)
<>	149:156823d33999	1027	{
<>	149:156823d33999	1028	if (OverSampling == LL_USART_OVERSAMPLING_8)
<>	149:156823d33999	1029	{
<>	149:156823d33999	1030	USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
<>	149:156823d33999	1031	}
<>	149:156823d33999	1032	else
<>	149:156823d33999	1033	{
<>	149:156823d33999	1034	USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
<>	149:156823d33999	1035	}
<>	149:156823d33999	1036	}
<>	149:156823d33999	1037
<>	149:156823d33999	1038	/**
<>	149:156823d33999	1039	* @brief Return current Baud Rate value, according to USARTDIV present in BRR register
<>	149:156823d33999	1040	* (full BRR content), and to used Peripheral Clock and Oversampling mode values
<>	149:156823d33999	1041	* @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
<>	149:156823d33999	1042	* @rmtoll BRR BRR LL_USART_GetBaudRate
<>	149:156823d33999	1043	* @param USARTx USART Instance
<>	149:156823d33999	1044	* @param PeriphClk Peripheral Clock
<>	149:156823d33999	1045	* @param OverSampling This parameter can be one of the following values:
<>	149:156823d33999	1046	* @arg @ref LL_USART_OVERSAMPLING_16
<>	149:156823d33999	1047	* @arg @ref LL_USART_OVERSAMPLING_8
<>	149:156823d33999	1048	* @retval Baud Rate
<>	149:156823d33999	1049	*/
<>	149:156823d33999	1050	__STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
<>	149:156823d33999	1051	{
<>	149:156823d33999	1052	register uint32_t usartdiv = 0x0U;
<>	149:156823d33999	1053	register uint32_t brrresult = 0x0U;
<>	149:156823d33999	1054
<>	149:156823d33999	1055	usartdiv = USARTx->BRR;
<>	149:156823d33999	1056
<>	149:156823d33999	1057	if (OverSampling == LL_USART_OVERSAMPLING_8)
<>	149:156823d33999	1058	{
<>	149:156823d33999	1059	if ((usartdiv & 0xFFF7U) != 0U)
<>	149:156823d33999	1060	{
<>	149:156823d33999	1061	usartdiv = (uint16_t)((usartdiv & 0xFFF0U) \| ((usartdiv & 0x0007U) << 1U)) ;
<>	149:156823d33999	1062	brrresult = (PeriphClk * 2U) / usartdiv;
<>	149:156823d33999	1063	}
<>	149:156823d33999	1064	}
<>	149:156823d33999	1065	else
<>	149:156823d33999	1066	{
<>	149:156823d33999	1067	if ((usartdiv & 0xFFFFU) != 0U)
<>	149:156823d33999	1068	{
<>	149:156823d33999	1069	brrresult = PeriphClk / usartdiv;
<>	149:156823d33999	1070	}
<>	149:156823d33999	1071	}
<>	149:156823d33999	1072	return (brrresult);
<>	149:156823d33999	1073	}
<>	149:156823d33999	1074
<>	149:156823d33999	1075	/**
<>	149:156823d33999	1076	* @}
<>	149:156823d33999	1077	*/
<>	149:156823d33999	1078
<>	149:156823d33999	1079	/** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
<>	149:156823d33999	1080	* @{
<>	149:156823d33999	1081	*/
<>	149:156823d33999	1082
<>	149:156823d33999	1083	/**
<>	149:156823d33999	1084	* @brief Enable IrDA mode
<>	149:156823d33999	1085	* @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1086	* IrDA feature is supported by the USARTx instance.
<>	149:156823d33999	1087	* @rmtoll CR3 IREN LL_USART_EnableIrda
<>	149:156823d33999	1088	* @param USARTx USART Instance
<>	149:156823d33999	1089	* @retval None
<>	149:156823d33999	1090	*/
<>	149:156823d33999	1091	__STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
<>	149:156823d33999	1092	{
<>	149:156823d33999	1093	SET_BIT(USARTx->CR3, USART_CR3_IREN);
<>	149:156823d33999	1094	}
<>	149:156823d33999	1095
<>	149:156823d33999	1096	/**
<>	149:156823d33999	1097	* @brief Disable IrDA mode
<>	149:156823d33999	1098	* @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1099	* IrDA feature is supported by the USARTx instance.
<>	149:156823d33999	1100	* @rmtoll CR3 IREN LL_USART_DisableIrda
<>	149:156823d33999	1101	* @param USARTx USART Instance
<>	149:156823d33999	1102	* @retval None
<>	149:156823d33999	1103	*/
<>	149:156823d33999	1104	__STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
<>	149:156823d33999	1105	{
<>	149:156823d33999	1106	CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
<>	149:156823d33999	1107	}
<>	149:156823d33999	1108
<>	149:156823d33999	1109	/**
<>	149:156823d33999	1110	* @brief Indicate if IrDA mode is enabled
<>	149:156823d33999	1111	* @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1112	* IrDA feature is supported by the USARTx instance.
<>	149:156823d33999	1113	* @rmtoll CR3 IREN LL_USART_IsEnabledIrda
<>	149:156823d33999	1114	* @param USARTx USART Instance
<>	149:156823d33999	1115	* @retval State of bit (1 or 0).
<>	149:156823d33999	1116	*/
<>	149:156823d33999	1117	__STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
<>	149:156823d33999	1118	{
<>	149:156823d33999	1119	return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
<>	149:156823d33999	1120	}
<>	149:156823d33999	1121
<>	149:156823d33999	1122	/**
<>	149:156823d33999	1123	* @brief Configure IrDA Power Mode (Normal or Low Power)
<>	149:156823d33999	1124	* @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1125	* IrDA feature is supported by the USARTx instance.
<>	149:156823d33999	1126	* @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
<>	149:156823d33999	1127	* @param USARTx USART Instance
<>	149:156823d33999	1128	* @param PowerMode This parameter can be one of the following values:
<>	149:156823d33999	1129	* @arg @ref LL_USART_IRDA_POWER_NORMAL
<>	149:156823d33999	1130	* @arg @ref LL_USART_IRDA_POWER_LOW
<>	149:156823d33999	1131	* @retval None
<>	149:156823d33999	1132	*/
<>	149:156823d33999	1133	__STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
<>	149:156823d33999	1134	{
<>	149:156823d33999	1135	MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
<>	149:156823d33999	1136	}
<>	149:156823d33999	1137
<>	149:156823d33999	1138	/**
<>	149:156823d33999	1139	* @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
<>	149:156823d33999	1140	* @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1141	* IrDA feature is supported by the USARTx instance.
<>	149:156823d33999	1142	* @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
<>	149:156823d33999	1143	* @param USARTx USART Instance
<>	149:156823d33999	1144	* @retval Returned value can be one of the following values:
<>	149:156823d33999	1145	* @arg @ref LL_USART_IRDA_POWER_NORMAL
<>	149:156823d33999	1146	* @arg @ref LL_USART_PHASE_2EDGE
<>	149:156823d33999	1147	*/
<>	149:156823d33999	1148	__STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
<>	149:156823d33999	1149	{
<>	149:156823d33999	1150	return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
<>	149:156823d33999	1151	}
<>	149:156823d33999	1152
<>	149:156823d33999	1153	/**
<>	149:156823d33999	1154	* @brief Set Irda prescaler value, used for dividing the USART clock source
<>	149:156823d33999	1155	* to achieve the Irda Low Power frequency (8 bits value)
<>	149:156823d33999	1156	* @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1157	* IrDA feature is supported by the USARTx instance.
<>	149:156823d33999	1158	* @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
<>	149:156823d33999	1159	* @param USARTx USART Instance
<>	149:156823d33999	1160	* @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF
<>	149:156823d33999	1161	* @retval None
<>	149:156823d33999	1162	*/
<>	149:156823d33999	1163	__STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
<>	149:156823d33999	1164	{
<>	149:156823d33999	1165	MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
<>	149:156823d33999	1166	}
<>	149:156823d33999	1167
<>	149:156823d33999	1168	/**
<>	149:156823d33999	1169	* @brief Return Irda prescaler value, used for dividing the USART clock source
<>	149:156823d33999	1170	* to achieve the Irda Low Power frequency (8 bits value)
<>	149:156823d33999	1171	* @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1172	* IrDA feature is supported by the USARTx instance.
<>	149:156823d33999	1173	* @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
<>	149:156823d33999	1174	* @param USARTx USART Instance
<>	149:156823d33999	1175	* @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
<>	149:156823d33999	1176	*/
<>	149:156823d33999	1177	__STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
<>	149:156823d33999	1178	{
<>	149:156823d33999	1179	return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
<>	149:156823d33999	1180	}
<>	149:156823d33999	1181
<>	149:156823d33999	1182	/**
<>	149:156823d33999	1183	* @}
<>	149:156823d33999	1184	*/
<>	149:156823d33999	1185
<>	149:156823d33999	1186	/** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature
<>	149:156823d33999	1187	* @{
<>	149:156823d33999	1188	*/
<>	149:156823d33999	1189
<>	149:156823d33999	1190	/**
<>	149:156823d33999	1191	* @brief Enable Smartcard NACK transmission
<>	149:156823d33999	1192	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1193	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1194	* @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
<>	149:156823d33999	1195	* @param USARTx USART Instance
<>	149:156823d33999	1196	* @retval None
<>	149:156823d33999	1197	*/
<>	149:156823d33999	1198	__STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
<>	149:156823d33999	1199	{
<>	149:156823d33999	1200	SET_BIT(USARTx->CR3, USART_CR3_NACK);
<>	149:156823d33999	1201	}
<>	149:156823d33999	1202
<>	149:156823d33999	1203	/**
<>	149:156823d33999	1204	* @brief Disable Smartcard NACK transmission
<>	149:156823d33999	1205	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1206	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1207	* @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
<>	149:156823d33999	1208	* @param USARTx USART Instance
<>	149:156823d33999	1209	* @retval None
<>	149:156823d33999	1210	*/
<>	149:156823d33999	1211	__STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
<>	149:156823d33999	1212	{
<>	149:156823d33999	1213	CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
<>	149:156823d33999	1214	}
<>	149:156823d33999	1215
<>	149:156823d33999	1216	/**
<>	149:156823d33999	1217	* @brief Indicate if Smartcard NACK transmission is enabled
<>	149:156823d33999	1218	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1219	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1220	* @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
<>	149:156823d33999	1221	* @param USARTx USART Instance
<>	149:156823d33999	1222	* @retval State of bit (1 or 0).
<>	149:156823d33999	1223	*/
<>	149:156823d33999	1224	__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
<>	149:156823d33999	1225	{
<>	149:156823d33999	1226	return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
<>	149:156823d33999	1227	}
<>	149:156823d33999	1228
<>	149:156823d33999	1229	/**
<>	149:156823d33999	1230	* @brief Enable Smartcard mode
<>	149:156823d33999	1231	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1232	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1233	* @rmtoll CR3 SCEN LL_USART_EnableSmartcard
<>	149:156823d33999	1234	* @param USARTx USART Instance
<>	149:156823d33999	1235	* @retval None
<>	149:156823d33999	1236	*/
<>	149:156823d33999	1237	__STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
<>	149:156823d33999	1238	{
<>	149:156823d33999	1239	SET_BIT(USARTx->CR3, USART_CR3_SCEN);
<>	149:156823d33999	1240	}
<>	149:156823d33999	1241
<>	149:156823d33999	1242	/**
<>	149:156823d33999	1243	* @brief Disable Smartcard mode
<>	149:156823d33999	1244	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1245	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1246	* @rmtoll CR3 SCEN LL_USART_DisableSmartcard
<>	149:156823d33999	1247	* @param USARTx USART Instance
<>	149:156823d33999	1248	* @retval None
<>	149:156823d33999	1249	*/
<>	149:156823d33999	1250	__STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
<>	149:156823d33999	1251	{
<>	149:156823d33999	1252	CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
<>	149:156823d33999	1253	}
<>	149:156823d33999	1254
<>	149:156823d33999	1255	/**
<>	149:156823d33999	1256	* @brief Indicate if Smartcard mode is enabled
<>	149:156823d33999	1257	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1258	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1259	* @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
<>	149:156823d33999	1260	* @param USARTx USART Instance
<>	149:156823d33999	1261	* @retval State of bit (1 or 0).
<>	149:156823d33999	1262	*/
<>	149:156823d33999	1263	__STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
<>	149:156823d33999	1264	{
<>	149:156823d33999	1265	return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
<>	149:156823d33999	1266	}
<>	149:156823d33999	1267
<>	149:156823d33999	1268	/**
<>	149:156823d33999	1269	* @brief Set Smartcard prescaler value, used for dividing the USART clock
<>	149:156823d33999	1270	* source to provide the SMARTCARD Clock (5 bits value)
<>	149:156823d33999	1271	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1272	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1273	* @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
<>	149:156823d33999	1274	* @param USARTx USART Instance
<>	149:156823d33999	1275	* @param PrescalerValue Value between Min_Data=0 and Max_Data=31
<>	149:156823d33999	1276	* @retval None
<>	149:156823d33999	1277	*/
<>	149:156823d33999	1278	__STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
<>	149:156823d33999	1279	{
<>	149:156823d33999	1280	MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
<>	149:156823d33999	1281	}
<>	149:156823d33999	1282
<>	149:156823d33999	1283	/**
<>	149:156823d33999	1284	* @brief Return Smartcard prescaler value, used for dividing the USART clock
<>	149:156823d33999	1285	* source to provide the SMARTCARD Clock (5 bits value)
<>	149:156823d33999	1286	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1287	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1288	* @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
<>	149:156823d33999	1289	* @param USARTx USART Instance
<>	149:156823d33999	1290	* @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
<>	149:156823d33999	1291	*/
<>	149:156823d33999	1292	__STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
<>	149:156823d33999	1293	{
<>	149:156823d33999	1294	return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
<>	149:156823d33999	1295	}
<>	149:156823d33999	1296
<>	149:156823d33999	1297	/**
<>	149:156823d33999	1298	* @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
<>	149:156823d33999	1299	* (GT[7:0] bits : Guard time value)
<>	149:156823d33999	1300	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1301	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1302	* @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
<>	149:156823d33999	1303	* @param USARTx USART Instance
<>	149:156823d33999	1304	* @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF
<>	149:156823d33999	1305	* @retval None
<>	149:156823d33999	1306	*/
<>	149:156823d33999	1307	__STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
<>	149:156823d33999	1308	{
AnnaBridge	184:08ed48f1de7f	1309	MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_GTPR_GT_Pos);
<>	149:156823d33999	1310	}
<>	149:156823d33999	1311
<>	149:156823d33999	1312	/**
<>	149:156823d33999	1313	* @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
<>	149:156823d33999	1314	* (GT[7:0] bits : Guard time value)
<>	149:156823d33999	1315	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1316	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1317	* @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
<>	149:156823d33999	1318	* @param USARTx USART Instance
<>	149:156823d33999	1319	* @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
<>	149:156823d33999	1320	*/
<>	149:156823d33999	1321	__STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
<>	149:156823d33999	1322	{
AnnaBridge	184:08ed48f1de7f	1323	return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos);
<>	149:156823d33999	1324	}
<>	149:156823d33999	1325
<>	149:156823d33999	1326	/**
<>	149:156823d33999	1327	* @}
<>	149:156823d33999	1328	*/
<>	149:156823d33999	1329
<>	149:156823d33999	1330	/** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
<>	149:156823d33999	1331	* @{
<>	149:156823d33999	1332	*/
<>	149:156823d33999	1333
<>	149:156823d33999	1334	/**
<>	149:156823d33999	1335	* @brief Enable Single Wire Half-Duplex mode
<>	149:156823d33999	1336	* @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1337	* Half-Duplex mode is supported by the USARTx instance.
<>	149:156823d33999	1338	* @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
<>	149:156823d33999	1339	* @param USARTx USART Instance
<>	149:156823d33999	1340	* @retval None
<>	149:156823d33999	1341	*/
<>	149:156823d33999	1342	__STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
<>	149:156823d33999	1343	{
<>	149:156823d33999	1344	SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
<>	149:156823d33999	1345	}
<>	149:156823d33999	1346
<>	149:156823d33999	1347	/**
<>	149:156823d33999	1348	* @brief Disable Single Wire Half-Duplex mode
<>	149:156823d33999	1349	* @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1350	* Half-Duplex mode is supported by the USARTx instance.
<>	149:156823d33999	1351	* @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
<>	149:156823d33999	1352	* @param USARTx USART Instance
<>	149:156823d33999	1353	* @retval None
<>	149:156823d33999	1354	*/
<>	149:156823d33999	1355	__STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
<>	149:156823d33999	1356	{
<>	149:156823d33999	1357	CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
<>	149:156823d33999	1358	}
<>	149:156823d33999	1359
<>	149:156823d33999	1360	/**
<>	149:156823d33999	1361	* @brief Indicate if Single Wire Half-Duplex mode is enabled
<>	149:156823d33999	1362	* @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1363	* Half-Duplex mode is supported by the USARTx instance.
<>	149:156823d33999	1364	* @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
<>	149:156823d33999	1365	* @param USARTx USART Instance
<>	149:156823d33999	1366	* @retval State of bit (1 or 0).
<>	149:156823d33999	1367	*/
<>	149:156823d33999	1368	__STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
<>	149:156823d33999	1369	{
<>	149:156823d33999	1370	return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
<>	149:156823d33999	1371	}
<>	149:156823d33999	1372
<>	149:156823d33999	1373	/**
<>	149:156823d33999	1374	* @}
<>	149:156823d33999	1375	*/
<>	149:156823d33999	1376
<>	149:156823d33999	1377	/** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
<>	149:156823d33999	1378	* @{
<>	149:156823d33999	1379	*/
<>	149:156823d33999	1380
<>	149:156823d33999	1381	/**
<>	149:156823d33999	1382	* @brief Set LIN Break Detection Length
<>	149:156823d33999	1383	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1384	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	1385	* @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
<>	149:156823d33999	1386	* @param USARTx USART Instance
<>	149:156823d33999	1387	* @param LINBDLength This parameter can be one of the following values:
<>	149:156823d33999	1388	* @arg @ref LL_USART_LINBREAK_DETECT_10B
<>	149:156823d33999	1389	* @arg @ref LL_USART_LINBREAK_DETECT_11B
<>	149:156823d33999	1390	* @retval None
<>	149:156823d33999	1391	*/
<>	149:156823d33999	1392	__STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
<>	149:156823d33999	1393	{
<>	149:156823d33999	1394	MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
<>	149:156823d33999	1395	}
<>	149:156823d33999	1396
<>	149:156823d33999	1397	/**
<>	149:156823d33999	1398	* @brief Return LIN Break Detection Length
<>	149:156823d33999	1399	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1400	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	1401	* @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
<>	149:156823d33999	1402	* @param USARTx USART Instance
<>	149:156823d33999	1403	* @retval Returned value can be one of the following values:
<>	149:156823d33999	1404	* @arg @ref LL_USART_LINBREAK_DETECT_10B
<>	149:156823d33999	1405	* @arg @ref LL_USART_LINBREAK_DETECT_11B
<>	149:156823d33999	1406	*/
<>	149:156823d33999	1407	__STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
<>	149:156823d33999	1408	{
<>	149:156823d33999	1409	return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
<>	149:156823d33999	1410	}
<>	149:156823d33999	1411
<>	149:156823d33999	1412	/**
<>	149:156823d33999	1413	* @brief Enable LIN mode
<>	149:156823d33999	1414	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1415	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	1416	* @rmtoll CR2 LINEN LL_USART_EnableLIN
<>	149:156823d33999	1417	* @param USARTx USART Instance
<>	149:156823d33999	1418	* @retval None
<>	149:156823d33999	1419	*/
<>	149:156823d33999	1420	__STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
<>	149:156823d33999	1421	{
<>	149:156823d33999	1422	SET_BIT(USARTx->CR2, USART_CR2_LINEN);
<>	149:156823d33999	1423	}
<>	149:156823d33999	1424
<>	149:156823d33999	1425	/**
<>	149:156823d33999	1426	* @brief Disable LIN mode
<>	149:156823d33999	1427	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1428	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	1429	* @rmtoll CR2 LINEN LL_USART_DisableLIN
<>	149:156823d33999	1430	* @param USARTx USART Instance
<>	149:156823d33999	1431	* @retval None
<>	149:156823d33999	1432	*/
<>	149:156823d33999	1433	__STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
<>	149:156823d33999	1434	{
<>	149:156823d33999	1435	CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
<>	149:156823d33999	1436	}
<>	149:156823d33999	1437
<>	149:156823d33999	1438	/**
<>	149:156823d33999	1439	* @brief Indicate if LIN mode is enabled
<>	149:156823d33999	1440	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1441	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	1442	* @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
<>	149:156823d33999	1443	* @param USARTx USART Instance
<>	149:156823d33999	1444	* @retval State of bit (1 or 0).
<>	149:156823d33999	1445	*/
<>	149:156823d33999	1446	__STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
<>	149:156823d33999	1447	{
<>	149:156823d33999	1448	return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
<>	149:156823d33999	1449	}
<>	149:156823d33999	1450
<>	149:156823d33999	1451	/**
<>	149:156823d33999	1452	* @}
<>	149:156823d33999	1453	*/
<>	149:156823d33999	1454
<>	149:156823d33999	1455	/** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services
<>	149:156823d33999	1456	* @{
<>	149:156823d33999	1457	*/
<>	149:156823d33999	1458
<>	149:156823d33999	1459	/**
<>	149:156823d33999	1460	* @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
<>	149:156823d33999	1461	* @note In UART mode, the following bits must be kept cleared:
<>	149:156823d33999	1462	* - LINEN bit in the USART_CR2 register,
<>	149:156823d33999	1463	* - CLKEN bit in the USART_CR2 register,
<>	149:156823d33999	1464	* - SCEN bit in the USART_CR3 register,
<>	149:156823d33999	1465	* - IREN bit in the USART_CR3 register,
<>	149:156823d33999	1466	* - HDSEL bit in the USART_CR3 register.
<>	149:156823d33999	1467	* @note Call of this function is equivalent to following function call sequence :
<>	149:156823d33999	1468	* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<>	149:156823d33999	1469	* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
<>	149:156823d33999	1470	* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<>	149:156823d33999	1471	* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<>	149:156823d33999	1472	* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<>	149:156823d33999	1473	* @note Other remaining configurations items related to Asynchronous Mode
<>	149:156823d33999	1474	* (as Baud Rate, Word length, Parity, ...) should be set using
<>	149:156823d33999	1475	* dedicated functions
<>	149:156823d33999	1476	* @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n
<>	149:156823d33999	1477	* CR2 CLKEN LL_USART_ConfigAsyncMode\n
<>	149:156823d33999	1478	* CR3 SCEN LL_USART_ConfigAsyncMode\n
<>	149:156823d33999	1479	* CR3 IREN LL_USART_ConfigAsyncMode\n
<>	149:156823d33999	1480	* CR3 HDSEL LL_USART_ConfigAsyncMode
<>	149:156823d33999	1481	* @param USARTx USART Instance
<>	149:156823d33999	1482	* @retval None
<>	149:156823d33999	1483	*/
<>	149:156823d33999	1484	__STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
<>	149:156823d33999	1485	{
<>	149:156823d33999	1486	/* In Asynchronous mode, the following bits must be kept cleared:
<>	149:156823d33999	1487	- LINEN, CLKEN bits in the USART_CR2 register,
<>	149:156823d33999	1488	- SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
<>	149:156823d33999	1489	CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN \| USART_CR2_CLKEN));
<>	149:156823d33999	1490	CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN \| USART_CR3_IREN \| USART_CR3_HDSEL));
<>	149:156823d33999	1491	}
<>	149:156823d33999	1492
<>	149:156823d33999	1493	/**
<>	149:156823d33999	1494	* @brief Perform basic configuration of USART for enabling use in Synchronous Mode
<>	149:156823d33999	1495	* @note In Synchronous mode, the following bits must be kept cleared:
<>	149:156823d33999	1496	* - LINEN bit in the USART_CR2 register,
<>	149:156823d33999	1497	* - SCEN bit in the USART_CR3 register,
<>	149:156823d33999	1498	* - IREN bit in the USART_CR3 register,
<>	149:156823d33999	1499	* - HDSEL bit in the USART_CR3 register.
<>	149:156823d33999	1500	* This function also sets the USART in Synchronous mode.
<>	149:156823d33999	1501	* @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1502	* Synchronous mode is supported by the USARTx instance.
<>	149:156823d33999	1503	* @note Call of this function is equivalent to following function call sequence :
<>	149:156823d33999	1504	* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<>	149:156823d33999	1505	* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<>	149:156823d33999	1506	* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<>	149:156823d33999	1507	* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<>	149:156823d33999	1508	* - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
<>	149:156823d33999	1509	* @note Other remaining configurations items related to Synchronous Mode
<>	149:156823d33999	1510	* (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
<>	149:156823d33999	1511	* dedicated functions
<>	149:156823d33999	1512	* @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n
<>	149:156823d33999	1513	* CR2 CLKEN LL_USART_ConfigSyncMode\n
<>	149:156823d33999	1514	* CR3 SCEN LL_USART_ConfigSyncMode\n
<>	149:156823d33999	1515	* CR3 IREN LL_USART_ConfigSyncMode\n
<>	149:156823d33999	1516	* CR3 HDSEL LL_USART_ConfigSyncMode
<>	149:156823d33999	1517	* @param USARTx USART Instance
<>	149:156823d33999	1518	* @retval None
<>	149:156823d33999	1519	*/
<>	149:156823d33999	1520	__STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
<>	149:156823d33999	1521	{
<>	149:156823d33999	1522	/* In Synchronous mode, the following bits must be kept cleared:
<>	149:156823d33999	1523	- LINEN bit in the USART_CR2 register,
<>	149:156823d33999	1524	- SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
<>	149:156823d33999	1525	CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
<>	149:156823d33999	1526	CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN \| USART_CR3_IREN \| USART_CR3_HDSEL));
<>	149:156823d33999	1527	/* set the UART/USART in Synchronous mode */
<>	149:156823d33999	1528	SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
<>	149:156823d33999	1529	}
<>	149:156823d33999	1530
<>	149:156823d33999	1531	/**
<>	149:156823d33999	1532	* @brief Perform basic configuration of USART for enabling use in LIN Mode
<>	149:156823d33999	1533	* @note In LIN mode, the following bits must be kept cleared:
<>	149:156823d33999	1534	* - STOP and CLKEN bits in the USART_CR2 register,
<>	149:156823d33999	1535	* - SCEN bit in the USART_CR3 register,
<>	149:156823d33999	1536	* - IREN bit in the USART_CR3 register,
<>	149:156823d33999	1537	* - HDSEL bit in the USART_CR3 register.
<>	149:156823d33999	1538	* This function also set the UART/USART in LIN mode.
<>	149:156823d33999	1539	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1540	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	1541	* @note Call of this function is equivalent to following function call sequence :
<>	149:156823d33999	1542	* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
<>	149:156823d33999	1543	* - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
<>	149:156823d33999	1544	* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<>	149:156823d33999	1545	* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<>	149:156823d33999	1546	* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<>	149:156823d33999	1547	* - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
<>	149:156823d33999	1548	* @note Other remaining configurations items related to LIN Mode
<>	149:156823d33999	1549	* (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
<>	149:156823d33999	1550	* dedicated functions
<>	149:156823d33999	1551	* @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
<>	149:156823d33999	1552	* CR2 STOP LL_USART_ConfigLINMode\n
<>	149:156823d33999	1553	* CR2 LINEN LL_USART_ConfigLINMode\n
<>	149:156823d33999	1554	* CR3 IREN LL_USART_ConfigLINMode\n
<>	149:156823d33999	1555	* CR3 SCEN LL_USART_ConfigLINMode\n
<>	149:156823d33999	1556	* CR3 HDSEL LL_USART_ConfigLINMode
<>	149:156823d33999	1557	* @param USARTx USART Instance
<>	149:156823d33999	1558	* @retval None
<>	149:156823d33999	1559	*/
<>	149:156823d33999	1560	__STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
<>	149:156823d33999	1561	{
<>	149:156823d33999	1562	/* In LIN mode, the following bits must be kept cleared:
<>	149:156823d33999	1563	- STOP and CLKEN bits in the USART_CR2 register,
<>	149:156823d33999	1564	- IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
<>	149:156823d33999	1565	CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN \| USART_CR2_STOP));
<>	149:156823d33999	1566	CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN \| USART_CR3_SCEN \| USART_CR3_HDSEL));
<>	149:156823d33999	1567	/* Set the UART/USART in LIN mode */
<>	149:156823d33999	1568	SET_BIT(USARTx->CR2, USART_CR2_LINEN);
<>	149:156823d33999	1569	}
<>	149:156823d33999	1570
<>	149:156823d33999	1571	/**
<>	149:156823d33999	1572	* @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
<>	149:156823d33999	1573	* @note In Half Duplex mode, the following bits must be kept cleared:
<>	149:156823d33999	1574	* - LINEN bit in the USART_CR2 register,
<>	149:156823d33999	1575	* - CLKEN bit in the USART_CR2 register,
<>	149:156823d33999	1576	* - SCEN bit in the USART_CR3 register,
<>	149:156823d33999	1577	* - IREN bit in the USART_CR3 register,
<>	149:156823d33999	1578	* This function also sets the UART/USART in Half Duplex mode.
<>	149:156823d33999	1579	* @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1580	* Half-Duplex mode is supported by the USARTx instance.
<>	149:156823d33999	1581	* @note Call of this function is equivalent to following function call sequence :
<>	149:156823d33999	1582	* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<>	149:156823d33999	1583	* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
<>	149:156823d33999	1584	* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<>	149:156823d33999	1585	* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<>	149:156823d33999	1586	* - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
<>	149:156823d33999	1587	* @note Other remaining configurations items related to Half Duplex Mode
<>	149:156823d33999	1588	* (as Baud Rate, Word length, Parity, ...) should be set using
<>	149:156823d33999	1589	* dedicated functions
<>	149:156823d33999	1590	* @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n
<>	149:156823d33999	1591	* CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
<>	149:156823d33999	1592	* CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n
<>	149:156823d33999	1593	* CR3 SCEN LL_USART_ConfigHalfDuplexMode\n
<>	149:156823d33999	1594	* CR3 IREN LL_USART_ConfigHalfDuplexMode
<>	149:156823d33999	1595	* @param USARTx USART Instance
<>	149:156823d33999	1596	* @retval None
<>	149:156823d33999	1597	*/
<>	149:156823d33999	1598	__STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
<>	149:156823d33999	1599	{
<>	149:156823d33999	1600	/* In Half Duplex mode, the following bits must be kept cleared:
<>	149:156823d33999	1601	- LINEN and CLKEN bits in the USART_CR2 register,
<>	149:156823d33999	1602	- SCEN and IREN bits in the USART_CR3 register.*/
<>	149:156823d33999	1603	CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN \| USART_CR2_CLKEN));
<>	149:156823d33999	1604	CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN \| USART_CR3_IREN));
<>	149:156823d33999	1605	/* set the UART/USART in Half Duplex mode */
<>	149:156823d33999	1606	SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
<>	149:156823d33999	1607	}
<>	149:156823d33999	1608
<>	149:156823d33999	1609	/**
<>	149:156823d33999	1610	* @brief Perform basic configuration of USART for enabling use in Smartcard Mode
<>	149:156823d33999	1611	* @note In Smartcard mode, the following bits must be kept cleared:
<>	149:156823d33999	1612	* - LINEN bit in the USART_CR2 register,
<>	149:156823d33999	1613	* - IREN bit in the USART_CR3 register,
<>	149:156823d33999	1614	* - HDSEL bit in the USART_CR3 register.
<>	149:156823d33999	1615	* This function also configures Stop bits to 1.5 bits and
<>	149:156823d33999	1616	* sets the USART in Smartcard mode (SCEN bit).
<>	149:156823d33999	1617	* Clock Output is also enabled (CLKEN).
<>	149:156823d33999	1618	* @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1619	* Smartcard feature is supported by the USARTx instance.
<>	149:156823d33999	1620	* @note Call of this function is equivalent to following function call sequence :
<>	149:156823d33999	1621	* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<>	149:156823d33999	1622	* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<>	149:156823d33999	1623	* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<>	149:156823d33999	1624	* - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
<>	149:156823d33999	1625	* - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
<>	149:156823d33999	1626	* - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
<>	149:156823d33999	1627	* @note Other remaining configurations items related to Smartcard Mode
<>	149:156823d33999	1628	* (as Baud Rate, Word length, Parity, ...) should be set using
<>	149:156823d33999	1629	* dedicated functions
<>	149:156823d33999	1630	* @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n
<>	149:156823d33999	1631	* CR2 STOP LL_USART_ConfigSmartcardMode\n
<>	149:156823d33999	1632	* CR2 CLKEN LL_USART_ConfigSmartcardMode\n
<>	149:156823d33999	1633	* CR3 HDSEL LL_USART_ConfigSmartcardMode\n
<>	149:156823d33999	1634	* CR3 SCEN LL_USART_ConfigSmartcardMode
<>	149:156823d33999	1635	* @param USARTx USART Instance
<>	149:156823d33999	1636	* @retval None
<>	149:156823d33999	1637	*/
<>	149:156823d33999	1638	__STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
<>	149:156823d33999	1639	{
<>	149:156823d33999	1640	/* In Smartcard mode, the following bits must be kept cleared:
<>	149:156823d33999	1641	- LINEN bit in the USART_CR2 register,
<>	149:156823d33999	1642	- IREN and HDSEL bits in the USART_CR3 register.*/
<>	149:156823d33999	1643	CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
<>	149:156823d33999	1644	CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN \| USART_CR3_HDSEL));
<>	149:156823d33999	1645	/* Configure Stop bits to 1.5 bits */
<>	149:156823d33999	1646	/* Synchronous mode is activated by default */
<>	149:156823d33999	1647	SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 \| USART_CR2_STOP_1 \| USART_CR2_CLKEN));
<>	149:156823d33999	1648	/* set the UART/USART in Smartcard mode */
<>	149:156823d33999	1649	SET_BIT(USARTx->CR3, USART_CR3_SCEN);
<>	149:156823d33999	1650	}
<>	149:156823d33999	1651
<>	149:156823d33999	1652	/**
<>	149:156823d33999	1653	* @brief Perform basic configuration of USART for enabling use in Irda Mode
<>	149:156823d33999	1654	* @note In IRDA mode, the following bits must be kept cleared:
<>	149:156823d33999	1655	* - LINEN bit in the USART_CR2 register,
<>	149:156823d33999	1656	* - STOP and CLKEN bits in the USART_CR2 register,
<>	149:156823d33999	1657	* - SCEN bit in the USART_CR3 register,
<>	149:156823d33999	1658	* - HDSEL bit in the USART_CR3 register.
<>	149:156823d33999	1659	* This function also sets the UART/USART in IRDA mode (IREN bit).
<>	149:156823d33999	1660	* @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1661	* IrDA feature is supported by the USARTx instance.
<>	149:156823d33999	1662	* @note Call of this function is equivalent to following function call sequence :
<>	149:156823d33999	1663	* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<>	149:156823d33999	1664	* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
<>	149:156823d33999	1665	* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<>	149:156823d33999	1666	* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<>	149:156823d33999	1667	* - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
<>	149:156823d33999	1668	* - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
<>	149:156823d33999	1669	* @note Other remaining configurations items related to Irda Mode
<>	149:156823d33999	1670	* (as Baud Rate, Word length, Power mode, ...) should be set using
<>	149:156823d33999	1671	* dedicated functions
<>	149:156823d33999	1672	* @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n
<>	149:156823d33999	1673	* CR2 CLKEN LL_USART_ConfigIrdaMode\n
<>	149:156823d33999	1674	* CR2 STOP LL_USART_ConfigIrdaMode\n
<>	149:156823d33999	1675	* CR3 SCEN LL_USART_ConfigIrdaMode\n
<>	149:156823d33999	1676	* CR3 HDSEL LL_USART_ConfigIrdaMode\n
<>	149:156823d33999	1677	* CR3 IREN LL_USART_ConfigIrdaMode
<>	149:156823d33999	1678	* @param USARTx USART Instance
<>	149:156823d33999	1679	* @retval None
<>	149:156823d33999	1680	*/
<>	149:156823d33999	1681	__STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
<>	149:156823d33999	1682	{
<>	149:156823d33999	1683	/* In IRDA mode, the following bits must be kept cleared:
<>	149:156823d33999	1684	- LINEN, STOP and CLKEN bits in the USART_CR2 register,
<>	149:156823d33999	1685	- SCEN and HDSEL bits in the USART_CR3 register.*/
<>	149:156823d33999	1686	CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN \| USART_CR2_CLKEN \| USART_CR2_STOP));
<>	149:156823d33999	1687	CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN \| USART_CR3_HDSEL));
<>	149:156823d33999	1688	/* set the UART/USART in IRDA mode */
<>	149:156823d33999	1689	SET_BIT(USARTx->CR3, USART_CR3_IREN);
<>	149:156823d33999	1690	}
<>	149:156823d33999	1691
<>	149:156823d33999	1692	/**
<>	149:156823d33999	1693	* @brief Perform basic configuration of USART for enabling use in Multi processor Mode
<>	149:156823d33999	1694	* (several USARTs connected in a network, one of the USARTs can be the master,
<>	149:156823d33999	1695	* its TX output connected to the RX inputs of the other slaves USARTs).
<>	149:156823d33999	1696	* @note In MultiProcessor mode, the following bits must be kept cleared:
<>	149:156823d33999	1697	* - LINEN bit in the USART_CR2 register,
<>	149:156823d33999	1698	* - CLKEN bit in the USART_CR2 register,
<>	149:156823d33999	1699	* - SCEN bit in the USART_CR3 register,
<>	149:156823d33999	1700	* - IREN bit in the USART_CR3 register,
<>	149:156823d33999	1701	* - HDSEL bit in the USART_CR3 register.
<>	149:156823d33999	1702	* @note Call of this function is equivalent to following function call sequence :
<>	149:156823d33999	1703	* - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
<>	149:156823d33999	1704	* - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
<>	149:156823d33999	1705	* - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
<>	149:156823d33999	1706	* - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
<>	149:156823d33999	1707	* - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
<>	149:156823d33999	1708	* @note Other remaining configurations items related to Multi processor Mode
<>	149:156823d33999	1709	* (as Baud Rate, Wake Up Method, Node address, ...) should be set using
<>	149:156823d33999	1710	* dedicated functions
<>	149:156823d33999	1711	* @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n
<>	149:156823d33999	1712	* CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
<>	149:156823d33999	1713	* CR3 SCEN LL_USART_ConfigMultiProcessMode\n
<>	149:156823d33999	1714	* CR3 HDSEL LL_USART_ConfigMultiProcessMode\n
<>	149:156823d33999	1715	* CR3 IREN LL_USART_ConfigMultiProcessMode
<>	149:156823d33999	1716	* @param USARTx USART Instance
<>	149:156823d33999	1717	* @retval None
<>	149:156823d33999	1718	*/
<>	149:156823d33999	1719	__STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
<>	149:156823d33999	1720	{
<>	149:156823d33999	1721	/* In Multi Processor mode, the following bits must be kept cleared:
<>	149:156823d33999	1722	- LINEN and CLKEN bits in the USART_CR2 register,
<>	149:156823d33999	1723	- IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
<>	149:156823d33999	1724	CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN \| USART_CR2_CLKEN));
<>	149:156823d33999	1725	CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN));
<>	149:156823d33999	1726	}
<>	149:156823d33999	1727
<>	149:156823d33999	1728	/**
<>	149:156823d33999	1729	* @}
<>	149:156823d33999	1730	*/
<>	149:156823d33999	1731
<>	149:156823d33999	1732	/** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
<>	149:156823d33999	1733	* @{
<>	149:156823d33999	1734	*/
<>	149:156823d33999	1735
<>	149:156823d33999	1736	/**
<>	149:156823d33999	1737	* @brief Check if the USART Parity Error Flag is set or not
<>	149:156823d33999	1738	* @rmtoll SR PE LL_USART_IsActiveFlag_PE
<>	149:156823d33999	1739	* @param USARTx USART Instance
<>	149:156823d33999	1740	* @retval State of bit (1 or 0).
<>	149:156823d33999	1741	*/
<>	149:156823d33999	1742	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
<>	149:156823d33999	1743	{
<>	149:156823d33999	1744	return (READ_BIT(USARTx->SR, USART_SR_PE) == (USART_SR_PE));
<>	149:156823d33999	1745	}
<>	149:156823d33999	1746
<>	149:156823d33999	1747	/**
<>	149:156823d33999	1748	* @brief Check if the USART Framing Error Flag is set or not
<>	149:156823d33999	1749	* @rmtoll SR FE LL_USART_IsActiveFlag_FE
<>	149:156823d33999	1750	* @param USARTx USART Instance
<>	149:156823d33999	1751	* @retval State of bit (1 or 0).
<>	149:156823d33999	1752	*/
<>	149:156823d33999	1753	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
<>	149:156823d33999	1754	{
<>	149:156823d33999	1755	return (READ_BIT(USARTx->SR, USART_SR_FE) == (USART_SR_FE));
<>	149:156823d33999	1756	}
<>	149:156823d33999	1757
<>	149:156823d33999	1758	/**
<>	149:156823d33999	1759	* @brief Check if the USART Noise error detected Flag is set or not
<>	149:156823d33999	1760	* @rmtoll SR NF LL_USART_IsActiveFlag_NE
<>	149:156823d33999	1761	* @param USARTx USART Instance
<>	149:156823d33999	1762	* @retval State of bit (1 or 0).
<>	149:156823d33999	1763	*/
<>	149:156823d33999	1764	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
<>	149:156823d33999	1765	{
<>	149:156823d33999	1766	return (READ_BIT(USARTx->SR, USART_SR_NE) == (USART_SR_NE));
<>	149:156823d33999	1767	}
<>	149:156823d33999	1768
<>	149:156823d33999	1769	/**
<>	149:156823d33999	1770	* @brief Check if the USART OverRun Error Flag is set or not
<>	149:156823d33999	1771	* @rmtoll SR ORE LL_USART_IsActiveFlag_ORE
<>	149:156823d33999	1772	* @param USARTx USART Instance
<>	149:156823d33999	1773	* @retval State of bit (1 or 0).
<>	149:156823d33999	1774	*/
<>	149:156823d33999	1775	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
<>	149:156823d33999	1776	{
<>	149:156823d33999	1777	return (READ_BIT(USARTx->SR, USART_SR_ORE) == (USART_SR_ORE));
<>	149:156823d33999	1778	}
<>	149:156823d33999	1779
<>	149:156823d33999	1780	/**
<>	149:156823d33999	1781	* @brief Check if the USART IDLE line detected Flag is set or not
<>	149:156823d33999	1782	* @rmtoll SR IDLE LL_USART_IsActiveFlag_IDLE
<>	149:156823d33999	1783	* @param USARTx USART Instance
<>	149:156823d33999	1784	* @retval State of bit (1 or 0).
<>	149:156823d33999	1785	*/
<>	149:156823d33999	1786	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
<>	149:156823d33999	1787	{
<>	149:156823d33999	1788	return (READ_BIT(USARTx->SR, USART_SR_IDLE) == (USART_SR_IDLE));
<>	149:156823d33999	1789	}
<>	149:156823d33999	1790
<>	149:156823d33999	1791	/**
<>	149:156823d33999	1792	* @brief Check if the USART Read Data Register Not Empty Flag is set or not
<>	149:156823d33999	1793	* @rmtoll SR RXNE LL_USART_IsActiveFlag_RXNE
<>	149:156823d33999	1794	* @param USARTx USART Instance
<>	149:156823d33999	1795	* @retval State of bit (1 or 0).
<>	149:156823d33999	1796	*/
<>	149:156823d33999	1797	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
<>	149:156823d33999	1798	{
<>	149:156823d33999	1799	return (READ_BIT(USARTx->SR, USART_SR_RXNE) == (USART_SR_RXNE));
<>	149:156823d33999	1800	}
<>	149:156823d33999	1801
<>	149:156823d33999	1802	/**
<>	149:156823d33999	1803	* @brief Check if the USART Transmission Complete Flag is set or not
<>	149:156823d33999	1804	* @rmtoll SR TC LL_USART_IsActiveFlag_TC
<>	149:156823d33999	1805	* @param USARTx USART Instance
<>	149:156823d33999	1806	* @retval State of bit (1 or 0).
<>	149:156823d33999	1807	*/
<>	149:156823d33999	1808	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
<>	149:156823d33999	1809	{
<>	149:156823d33999	1810	return (READ_BIT(USARTx->SR, USART_SR_TC) == (USART_SR_TC));
<>	149:156823d33999	1811	}
<>	149:156823d33999	1812
<>	149:156823d33999	1813	/**
<>	149:156823d33999	1814	* @brief Check if the USART Transmit Data Register Empty Flag is set or not
<>	149:156823d33999	1815	* @rmtoll SR TXE LL_USART_IsActiveFlag_TXE
<>	149:156823d33999	1816	* @param USARTx USART Instance
<>	149:156823d33999	1817	* @retval State of bit (1 or 0).
<>	149:156823d33999	1818	*/
<>	149:156823d33999	1819	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
<>	149:156823d33999	1820	{
<>	149:156823d33999	1821	return (READ_BIT(USARTx->SR, USART_SR_TXE) == (USART_SR_TXE));
<>	149:156823d33999	1822	}
<>	149:156823d33999	1823
<>	149:156823d33999	1824	/**
<>	149:156823d33999	1825	* @brief Check if the USART LIN Break Detection Flag is set or not
<>	149:156823d33999	1826	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1827	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	1828	* @rmtoll SR LBD LL_USART_IsActiveFlag_LBD
<>	149:156823d33999	1829	* @param USARTx USART Instance
<>	149:156823d33999	1830	* @retval State of bit (1 or 0).
<>	149:156823d33999	1831	*/
<>	149:156823d33999	1832	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
<>	149:156823d33999	1833	{
<>	149:156823d33999	1834	return (READ_BIT(USARTx->SR, USART_SR_LBD) == (USART_SR_LBD));
<>	149:156823d33999	1835	}
<>	149:156823d33999	1836
<>	149:156823d33999	1837	/**
<>	149:156823d33999	1838	* @brief Check if the USART CTS Flag is set or not
<>	149:156823d33999	1839	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1840	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	1841	* @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS
<>	149:156823d33999	1842	* @param USARTx USART Instance
<>	149:156823d33999	1843	* @retval State of bit (1 or 0).
<>	149:156823d33999	1844	*/
<>	149:156823d33999	1845	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
<>	149:156823d33999	1846	{
<>	149:156823d33999	1847	return (READ_BIT(USARTx->SR, USART_SR_CTS) == (USART_SR_CTS));
<>	149:156823d33999	1848	}
<>	149:156823d33999	1849
<>	149:156823d33999	1850	/**
<>	149:156823d33999	1851	* @brief Check if the USART Send Break Flag is set or not
<>	149:156823d33999	1852	* @rmtoll CR1 SBK LL_USART_IsActiveFlag_SBK
<>	149:156823d33999	1853	* @param USARTx USART Instance
<>	149:156823d33999	1854	* @retval State of bit (1 or 0).
<>	149:156823d33999	1855	*/
<>	149:156823d33999	1856	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
<>	149:156823d33999	1857	{
<>	149:156823d33999	1858	return (READ_BIT(USARTx->CR1, USART_CR1_SBK) == (USART_CR1_SBK));
<>	149:156823d33999	1859	}
<>	149:156823d33999	1860
<>	149:156823d33999	1861	/**
<>	149:156823d33999	1862	* @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
<>	149:156823d33999	1863	* @rmtoll CR1 RWU LL_USART_IsActiveFlag_RWU
<>	149:156823d33999	1864	* @param USARTx USART Instance
<>	149:156823d33999	1865	* @retval State of bit (1 or 0).
<>	149:156823d33999	1866	*/
<>	149:156823d33999	1867	__STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
<>	149:156823d33999	1868	{
<>	149:156823d33999	1869	return (READ_BIT(USARTx->CR1, USART_CR1_RWU) == (USART_CR1_RWU));
<>	149:156823d33999	1870	}
<>	149:156823d33999	1871
<>	149:156823d33999	1872	/**
<>	149:156823d33999	1873	* @brief Clear Parity Error Flag
<>	149:156823d33999	1874	* @note Clearing this flag is done by a read access to the USARTx_SR
<>	149:156823d33999	1875	* register followed by a read access to the USARTx_DR register.
<>	149:156823d33999	1876	* @note Please also consider that when clearing this flag, other flags as
<>	149:156823d33999	1877	* NE, FE, ORE, IDLE would also be cleared.
<>	149:156823d33999	1878	* @rmtoll SR PE LL_USART_ClearFlag_PE
<>	149:156823d33999	1879	* @param USARTx USART Instance
<>	149:156823d33999	1880	* @retval None
<>	149:156823d33999	1881	*/
<>	149:156823d33999	1882	__STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
<>	149:156823d33999	1883	{
<>	149:156823d33999	1884	__IO uint32_t tmpreg;
<>	149:156823d33999	1885	tmpreg = USARTx->SR;
<>	149:156823d33999	1886	(void) tmpreg;
<>	149:156823d33999	1887	tmpreg = USARTx->DR;
<>	149:156823d33999	1888	(void) tmpreg;
<>	149:156823d33999	1889	}
<>	149:156823d33999	1890
<>	149:156823d33999	1891	/**
<>	149:156823d33999	1892	* @brief Clear Framing Error Flag
<>	149:156823d33999	1893	* @note Clearing this flag is done by a read access to the USARTx_SR
<>	149:156823d33999	1894	* register followed by a read access to the USARTx_DR register.
<>	149:156823d33999	1895	* @note Please also consider that when clearing this flag, other flags as
<>	149:156823d33999	1896	* PE, NE, ORE, IDLE would also be cleared.
<>	149:156823d33999	1897	* @rmtoll SR FE LL_USART_ClearFlag_FE
<>	149:156823d33999	1898	* @param USARTx USART Instance
<>	149:156823d33999	1899	* @retval None
<>	149:156823d33999	1900	*/
<>	149:156823d33999	1901	__STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
<>	149:156823d33999	1902	{
<>	149:156823d33999	1903	__IO uint32_t tmpreg;
<>	149:156823d33999	1904	tmpreg = USARTx->SR;
<>	149:156823d33999	1905	(void) tmpreg;
<>	149:156823d33999	1906	tmpreg = USARTx->DR;
<>	149:156823d33999	1907	(void) tmpreg;
<>	149:156823d33999	1908	}
<>	149:156823d33999	1909
<>	149:156823d33999	1910	/**
<>	149:156823d33999	1911	* @brief Clear Noise detected Flag
<>	149:156823d33999	1912	* @note Clearing this flag is done by a read access to the USARTx_SR
<>	149:156823d33999	1913	* register followed by a read access to the USARTx_DR register.
<>	149:156823d33999	1914	* @note Please also consider that when clearing this flag, other flags as
<>	149:156823d33999	1915	* PE, FE, ORE, IDLE would also be cleared.
<>	149:156823d33999	1916	* @rmtoll SR NF LL_USART_ClearFlag_NE
<>	149:156823d33999	1917	* @param USARTx USART Instance
<>	149:156823d33999	1918	* @retval None
<>	149:156823d33999	1919	*/
<>	149:156823d33999	1920	__STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
<>	149:156823d33999	1921	{
<>	149:156823d33999	1922	__IO uint32_t tmpreg;
<>	149:156823d33999	1923	tmpreg = USARTx->SR;
<>	149:156823d33999	1924	(void) tmpreg;
<>	149:156823d33999	1925	tmpreg = USARTx->DR;
<>	149:156823d33999	1926	(void) tmpreg;
<>	149:156823d33999	1927	}
<>	149:156823d33999	1928
<>	149:156823d33999	1929	/**
<>	149:156823d33999	1930	* @brief Clear OverRun Error Flag
<>	149:156823d33999	1931	* @note Clearing this flag is done by a read access to the USARTx_SR
<>	149:156823d33999	1932	* register followed by a read access to the USARTx_DR register.
<>	149:156823d33999	1933	* @note Please also consider that when clearing this flag, other flags as
<>	149:156823d33999	1934	* PE, NE, FE, IDLE would also be cleared.
<>	149:156823d33999	1935	* @rmtoll SR ORE LL_USART_ClearFlag_ORE
<>	149:156823d33999	1936	* @param USARTx USART Instance
<>	149:156823d33999	1937	* @retval None
<>	149:156823d33999	1938	*/
<>	149:156823d33999	1939	__STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
<>	149:156823d33999	1940	{
<>	149:156823d33999	1941	__IO uint32_t tmpreg;
<>	149:156823d33999	1942	tmpreg = USARTx->SR;
<>	149:156823d33999	1943	(void) tmpreg;
<>	149:156823d33999	1944	tmpreg = USARTx->DR;
<>	149:156823d33999	1945	(void) tmpreg;
<>	149:156823d33999	1946	}
<>	149:156823d33999	1947
<>	149:156823d33999	1948	/**
<>	149:156823d33999	1949	* @brief Clear IDLE line detected Flag
<>	149:156823d33999	1950	* @note Clearing this flag is done by a read access to the USARTx_SR
<>	149:156823d33999	1951	* register followed by a read access to the USARTx_DR register.
<>	149:156823d33999	1952	* @note Please also consider that when clearing this flag, other flags as
<>	149:156823d33999	1953	* PE, NE, FE, ORE would also be cleared.
<>	149:156823d33999	1954	* @rmtoll SR IDLE LL_USART_ClearFlag_IDLE
<>	149:156823d33999	1955	* @param USARTx USART Instance
<>	149:156823d33999	1956	* @retval None
<>	149:156823d33999	1957	*/
<>	149:156823d33999	1958	__STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
<>	149:156823d33999	1959	{
<>	149:156823d33999	1960	__IO uint32_t tmpreg;
<>	149:156823d33999	1961	tmpreg = USARTx->SR;
<>	149:156823d33999	1962	(void) tmpreg;
<>	149:156823d33999	1963	tmpreg = USARTx->DR;
<>	149:156823d33999	1964	(void) tmpreg;
<>	149:156823d33999	1965	}
<>	149:156823d33999	1966
<>	149:156823d33999	1967	/**
<>	149:156823d33999	1968	* @brief Clear Transmission Complete Flag
<>	149:156823d33999	1969	* @rmtoll SR TC LL_USART_ClearFlag_TC
<>	149:156823d33999	1970	* @param USARTx USART Instance
<>	149:156823d33999	1971	* @retval None
<>	149:156823d33999	1972	*/
<>	149:156823d33999	1973	__STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
<>	149:156823d33999	1974	{
<>	149:156823d33999	1975	WRITE_REG(USARTx->SR , ~(USART_SR_TC));
<>	149:156823d33999	1976	}
<>	149:156823d33999	1977
<>	149:156823d33999	1978	/**
<>	149:156823d33999	1979	* @brief Clear RX Not Empty Flag
<>	149:156823d33999	1980	* @rmtoll SR RXNE LL_USART_ClearFlag_RXNE
<>	149:156823d33999	1981	* @param USARTx USART Instance
<>	149:156823d33999	1982	* @retval None
<>	149:156823d33999	1983	*/
<>	149:156823d33999	1984	__STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
<>	149:156823d33999	1985	{
<>	149:156823d33999	1986	WRITE_REG(USARTx->SR , ~(USART_SR_RXNE));
<>	149:156823d33999	1987	}
<>	149:156823d33999	1988
<>	149:156823d33999	1989	/**
<>	149:156823d33999	1990	* @brief Clear LIN Break Detection Flag
<>	149:156823d33999	1991	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	1992	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	1993	* @rmtoll SR LBD LL_USART_ClearFlag_LBD
<>	149:156823d33999	1994	* @param USARTx USART Instance
<>	149:156823d33999	1995	* @retval None
<>	149:156823d33999	1996	*/
<>	149:156823d33999	1997	__STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
<>	149:156823d33999	1998	{
<>	149:156823d33999	1999	WRITE_REG(USARTx->SR , ~(USART_SR_LBD));
<>	149:156823d33999	2000	}
<>	149:156823d33999	2001
<>	149:156823d33999	2002	/**
<>	149:156823d33999	2003	* @brief Clear CTS Interrupt Flag
<>	149:156823d33999	2004	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	2005	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	2006	* @rmtoll SR CTS LL_USART_ClearFlag_nCTS
<>	149:156823d33999	2007	* @param USARTx USART Instance
<>	149:156823d33999	2008	* @retval None
<>	149:156823d33999	2009	*/
<>	149:156823d33999	2010	__STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
<>	149:156823d33999	2011	{
<>	149:156823d33999	2012	WRITE_REG(USARTx->SR , ~(USART_SR_CTS));
<>	149:156823d33999	2013	}
<>	149:156823d33999	2014
<>	149:156823d33999	2015	/**
<>	149:156823d33999	2016	* @}
<>	149:156823d33999	2017	*/
<>	149:156823d33999	2018
<>	149:156823d33999	2019	/** @defgroup USART_LL_EF_IT_Management IT_Management
<>	149:156823d33999	2020	* @{
<>	149:156823d33999	2021	*/
<>	149:156823d33999	2022
<>	149:156823d33999	2023	/**
<>	149:156823d33999	2024	* @brief Enable IDLE Interrupt
<>	149:156823d33999	2025	* @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
<>	149:156823d33999	2026	* @param USARTx USART Instance
<>	149:156823d33999	2027	* @retval None
<>	149:156823d33999	2028	*/
<>	149:156823d33999	2029	__STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
<>	149:156823d33999	2030	{
<>	149:156823d33999	2031	SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
<>	149:156823d33999	2032	}
<>	149:156823d33999	2033
<>	149:156823d33999	2034	/**
<>	149:156823d33999	2035	* @brief Enable RX Not Empty Interrupt
<>	149:156823d33999	2036	* @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
<>	149:156823d33999	2037	* @param USARTx USART Instance
<>	149:156823d33999	2038	* @retval None
<>	149:156823d33999	2039	*/
<>	149:156823d33999	2040	__STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
<>	149:156823d33999	2041	{
<>	149:156823d33999	2042	SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
<>	149:156823d33999	2043	}
<>	149:156823d33999	2044
<>	149:156823d33999	2045	/**
<>	149:156823d33999	2046	* @brief Enable Transmission Complete Interrupt
<>	149:156823d33999	2047	* @rmtoll CR1 TCIE LL_USART_EnableIT_TC
<>	149:156823d33999	2048	* @param USARTx USART Instance
<>	149:156823d33999	2049	* @retval None
<>	149:156823d33999	2050	*/
<>	149:156823d33999	2051	__STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
<>	149:156823d33999	2052	{
<>	149:156823d33999	2053	SET_BIT(USARTx->CR1, USART_CR1_TCIE);
<>	149:156823d33999	2054	}
<>	149:156823d33999	2055
<>	149:156823d33999	2056	/**
<>	149:156823d33999	2057	* @brief Enable TX Empty Interrupt
<>	149:156823d33999	2058	* @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
<>	149:156823d33999	2059	* @param USARTx USART Instance
<>	149:156823d33999	2060	* @retval None
<>	149:156823d33999	2061	*/
<>	149:156823d33999	2062	__STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
<>	149:156823d33999	2063	{
<>	149:156823d33999	2064	SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
<>	149:156823d33999	2065	}
<>	149:156823d33999	2066
<>	149:156823d33999	2067	/**
<>	149:156823d33999	2068	* @brief Enable Parity Error Interrupt
<>	149:156823d33999	2069	* @rmtoll CR1 PEIE LL_USART_EnableIT_PE
<>	149:156823d33999	2070	* @param USARTx USART Instance
<>	149:156823d33999	2071	* @retval None
<>	149:156823d33999	2072	*/
<>	149:156823d33999	2073	__STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
<>	149:156823d33999	2074	{
<>	149:156823d33999	2075	SET_BIT(USARTx->CR1, USART_CR1_PEIE);
<>	149:156823d33999	2076	}
<>	149:156823d33999	2077
<>	149:156823d33999	2078	/**
<>	149:156823d33999	2079	* @brief Enable LIN Break Detection Interrupt
<>	149:156823d33999	2080	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	2081	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	2082	* @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
<>	149:156823d33999	2083	* @param USARTx USART Instance
<>	149:156823d33999	2084	* @retval None
<>	149:156823d33999	2085	*/
<>	149:156823d33999	2086	__STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
<>	149:156823d33999	2087	{
<>	149:156823d33999	2088	SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
<>	149:156823d33999	2089	}
<>	149:156823d33999	2090
<>	149:156823d33999	2091	/**
<>	149:156823d33999	2092	* @brief Enable Error Interrupt
<>	149:156823d33999	2093	* @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
<>	149:156823d33999	2094	* error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
<>	149:156823d33999	2095	* 0: Interrupt is inhibited
<>	149:156823d33999	2096	* 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
<>	149:156823d33999	2097	* @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
<>	149:156823d33999	2098	* @param USARTx USART Instance
<>	149:156823d33999	2099	* @retval None
<>	149:156823d33999	2100	*/
<>	149:156823d33999	2101	__STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
<>	149:156823d33999	2102	{
<>	149:156823d33999	2103	SET_BIT(USARTx->CR3, USART_CR3_EIE);
<>	149:156823d33999	2104	}
<>	149:156823d33999	2105
<>	149:156823d33999	2106	/**
<>	149:156823d33999	2107	* @brief Enable CTS Interrupt
<>	149:156823d33999	2108	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	2109	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	2110	* @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
<>	149:156823d33999	2111	* @param USARTx USART Instance
<>	149:156823d33999	2112	* @retval None
<>	149:156823d33999	2113	*/
<>	149:156823d33999	2114	__STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
<>	149:156823d33999	2115	{
<>	149:156823d33999	2116	SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
<>	149:156823d33999	2117	}
<>	149:156823d33999	2118
<>	149:156823d33999	2119	/**
<>	149:156823d33999	2120	* @brief Disable IDLE Interrupt
<>	149:156823d33999	2121	* @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
<>	149:156823d33999	2122	* @param USARTx USART Instance
<>	149:156823d33999	2123	* @retval None
<>	149:156823d33999	2124	*/
<>	149:156823d33999	2125	__STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
<>	149:156823d33999	2126	{
<>	149:156823d33999	2127	CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
<>	149:156823d33999	2128	}
<>	149:156823d33999	2129
<>	149:156823d33999	2130	/**
<>	149:156823d33999	2131	* @brief Disable RX Not Empty Interrupt
<>	149:156823d33999	2132	* @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
<>	149:156823d33999	2133	* @param USARTx USART Instance
<>	149:156823d33999	2134	* @retval None
<>	149:156823d33999	2135	*/
<>	149:156823d33999	2136	__STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
<>	149:156823d33999	2137	{
<>	149:156823d33999	2138	CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
<>	149:156823d33999	2139	}
<>	149:156823d33999	2140
<>	149:156823d33999	2141	/**
<>	149:156823d33999	2142	* @brief Disable Transmission Complete Interrupt
<>	149:156823d33999	2143	* @rmtoll CR1 TCIE LL_USART_DisableIT_TC
<>	149:156823d33999	2144	* @param USARTx USART Instance
<>	149:156823d33999	2145	* @retval None
<>	149:156823d33999	2146	*/
<>	149:156823d33999	2147	__STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
<>	149:156823d33999	2148	{
<>	149:156823d33999	2149	CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
<>	149:156823d33999	2150	}
<>	149:156823d33999	2151
<>	149:156823d33999	2152	/**
<>	149:156823d33999	2153	* @brief Disable TX Empty Interrupt
<>	149:156823d33999	2154	* @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
<>	149:156823d33999	2155	* @param USARTx USART Instance
<>	149:156823d33999	2156	* @retval None
<>	149:156823d33999	2157	*/
<>	149:156823d33999	2158	__STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
<>	149:156823d33999	2159	{
<>	149:156823d33999	2160	CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
<>	149:156823d33999	2161	}
<>	149:156823d33999	2162
<>	149:156823d33999	2163	/**
<>	149:156823d33999	2164	* @brief Disable Parity Error Interrupt
<>	149:156823d33999	2165	* @rmtoll CR1 PEIE LL_USART_DisableIT_PE
<>	149:156823d33999	2166	* @param USARTx USART Instance
<>	149:156823d33999	2167	* @retval None
<>	149:156823d33999	2168	*/
<>	149:156823d33999	2169	__STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
<>	149:156823d33999	2170	{
<>	149:156823d33999	2171	CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
<>	149:156823d33999	2172	}
<>	149:156823d33999	2173
<>	149:156823d33999	2174	/**
<>	149:156823d33999	2175	* @brief Disable LIN Break Detection Interrupt
<>	149:156823d33999	2176	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	2177	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	2178	* @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
<>	149:156823d33999	2179	* @param USARTx USART Instance
<>	149:156823d33999	2180	* @retval None
<>	149:156823d33999	2181	*/
<>	149:156823d33999	2182	__STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
<>	149:156823d33999	2183	{
<>	149:156823d33999	2184	CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
<>	149:156823d33999	2185	}
<>	149:156823d33999	2186
<>	149:156823d33999	2187	/**
<>	149:156823d33999	2188	* @brief Disable Error Interrupt
<>	149:156823d33999	2189	* @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
<>	149:156823d33999	2190	* error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
<>	149:156823d33999	2191	* 0: Interrupt is inhibited
<>	149:156823d33999	2192	* 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
<>	149:156823d33999	2193	* @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
<>	149:156823d33999	2194	* @param USARTx USART Instance
<>	149:156823d33999	2195	* @retval None
<>	149:156823d33999	2196	*/
<>	149:156823d33999	2197	__STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
<>	149:156823d33999	2198	{
<>	149:156823d33999	2199	CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
<>	149:156823d33999	2200	}
<>	149:156823d33999	2201
<>	149:156823d33999	2202	/**
<>	149:156823d33999	2203	* @brief Disable CTS Interrupt
<>	149:156823d33999	2204	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	2205	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	2206	* @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
<>	149:156823d33999	2207	* @param USARTx USART Instance
<>	149:156823d33999	2208	* @retval None
<>	149:156823d33999	2209	*/
<>	149:156823d33999	2210	__STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
<>	149:156823d33999	2211	{
<>	149:156823d33999	2212	CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
<>	149:156823d33999	2213	}
<>	149:156823d33999	2214
<>	149:156823d33999	2215	/**
<>	149:156823d33999	2216	* @brief Check if the USART IDLE Interrupt source is enabled or disabled.
<>	149:156823d33999	2217	* @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
<>	149:156823d33999	2218	* @param USARTx USART Instance
<>	149:156823d33999	2219	* @retval State of bit (1 or 0).
<>	149:156823d33999	2220	*/
<>	149:156823d33999	2221	__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
<>	149:156823d33999	2222	{
<>	149:156823d33999	2223	return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
<>	149:156823d33999	2224	}
<>	149:156823d33999	2225
<>	149:156823d33999	2226	/**
<>	149:156823d33999	2227	* @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
<>	149:156823d33999	2228	* @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
<>	149:156823d33999	2229	* @param USARTx USART Instance
<>	149:156823d33999	2230	* @retval State of bit (1 or 0).
<>	149:156823d33999	2231	*/
<>	149:156823d33999	2232	__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
<>	149:156823d33999	2233	{
<>	149:156823d33999	2234	return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
<>	149:156823d33999	2235	}
<>	149:156823d33999	2236
<>	149:156823d33999	2237	/**
<>	149:156823d33999	2238	* @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
<>	149:156823d33999	2239	* @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
<>	149:156823d33999	2240	* @param USARTx USART Instance
<>	149:156823d33999	2241	* @retval State of bit (1 or 0).
<>	149:156823d33999	2242	*/
<>	149:156823d33999	2243	__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
<>	149:156823d33999	2244	{
<>	149:156823d33999	2245	return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
<>	149:156823d33999	2246	}
<>	149:156823d33999	2247
<>	149:156823d33999	2248	/**
<>	149:156823d33999	2249	* @brief Check if the USART TX Empty Interrupt is enabled or disabled.
<>	149:156823d33999	2250	* @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
<>	149:156823d33999	2251	* @param USARTx USART Instance
<>	149:156823d33999	2252	* @retval State of bit (1 or 0).
<>	149:156823d33999	2253	*/
<>	149:156823d33999	2254	__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
<>	149:156823d33999	2255	{
<>	149:156823d33999	2256	return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
<>	149:156823d33999	2257	}
<>	149:156823d33999	2258
<>	149:156823d33999	2259	/**
<>	149:156823d33999	2260	* @brief Check if the USART Parity Error Interrupt is enabled or disabled.
<>	149:156823d33999	2261	* @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
<>	149:156823d33999	2262	* @param USARTx USART Instance
<>	149:156823d33999	2263	* @retval State of bit (1 or 0).
<>	149:156823d33999	2264	*/
<>	149:156823d33999	2265	__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
<>	149:156823d33999	2266	{
<>	149:156823d33999	2267	return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
<>	149:156823d33999	2268	}
<>	149:156823d33999	2269
<>	149:156823d33999	2270	/**
<>	149:156823d33999	2271	* @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
<>	149:156823d33999	2272	* @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	2273	* LIN feature is supported by the USARTx instance.
<>	149:156823d33999	2274	* @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
<>	149:156823d33999	2275	* @param USARTx USART Instance
<>	149:156823d33999	2276	* @retval State of bit (1 or 0).
<>	149:156823d33999	2277	*/
<>	149:156823d33999	2278	__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
<>	149:156823d33999	2279	{
<>	149:156823d33999	2280	return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
<>	149:156823d33999	2281	}
<>	149:156823d33999	2282
<>	149:156823d33999	2283	/**
<>	149:156823d33999	2284	* @brief Check if the USART Error Interrupt is enabled or disabled.
<>	149:156823d33999	2285	* @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
<>	149:156823d33999	2286	* @param USARTx USART Instance
<>	149:156823d33999	2287	* @retval State of bit (1 or 0).
<>	149:156823d33999	2288	*/
<>	149:156823d33999	2289	__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
<>	149:156823d33999	2290	{
<>	149:156823d33999	2291	return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
<>	149:156823d33999	2292	}
<>	149:156823d33999	2293
<>	149:156823d33999	2294	/**
<>	149:156823d33999	2295	* @brief Check if the USART CTS Interrupt is enabled or disabled.
<>	149:156823d33999	2296	* @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
<>	149:156823d33999	2297	* Hardware Flow control feature is supported by the USARTx instance.
<>	149:156823d33999	2298	* @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
<>	149:156823d33999	2299	* @param USARTx USART Instance
<>	149:156823d33999	2300	* @retval State of bit (1 or 0).
<>	149:156823d33999	2301	*/
<>	149:156823d33999	2302	__STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
<>	149:156823d33999	2303	{
<>	149:156823d33999	2304	return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
<>	149:156823d33999	2305	}
<>	149:156823d33999	2306
<>	149:156823d33999	2307	/**
<>	149:156823d33999	2308	* @}
<>	149:156823d33999	2309	*/
<>	149:156823d33999	2310
<>	149:156823d33999	2311	/** @defgroup USART_LL_EF_DMA_Management DMA_Management
<>	149:156823d33999	2312	* @{
<>	149:156823d33999	2313	*/
<>	149:156823d33999	2314
<>	149:156823d33999	2315	/**
<>	149:156823d33999	2316	* @brief Enable DMA Mode for reception
<>	149:156823d33999	2317	* @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX
<>	149:156823d33999	2318	* @param USARTx USART Instance
<>	149:156823d33999	2319	* @retval None
<>	149:156823d33999	2320	*/
<>	149:156823d33999	2321	__STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
<>	149:156823d33999	2322	{
<>	149:156823d33999	2323	SET_BIT(USARTx->CR3, USART_CR3_DMAR);
<>	149:156823d33999	2324	}
<>	149:156823d33999	2325
<>	149:156823d33999	2326	/**
<>	149:156823d33999	2327	* @brief Disable DMA Mode for reception
<>	149:156823d33999	2328	* @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
<>	149:156823d33999	2329	* @param USARTx USART Instance
<>	149:156823d33999	2330	* @retval None
<>	149:156823d33999	2331	*/
<>	149:156823d33999	2332	__STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
<>	149:156823d33999	2333	{
<>	149:156823d33999	2334	CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
<>	149:156823d33999	2335	}
<>	149:156823d33999	2336
<>	149:156823d33999	2337	/**
<>	149:156823d33999	2338	* @brief Check if DMA Mode is enabled for reception
<>	149:156823d33999	2339	* @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX
<>	149:156823d33999	2340	* @param USARTx USART Instance
<>	149:156823d33999	2341	* @retval State of bit (1 or 0).
<>	149:156823d33999	2342	*/
<>	149:156823d33999	2343	__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
<>	149:156823d33999	2344	{
<>	149:156823d33999	2345	return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
<>	149:156823d33999	2346	}
<>	149:156823d33999	2347
<>	149:156823d33999	2348	/**
<>	149:156823d33999	2349	* @brief Enable DMA Mode for transmission
<>	149:156823d33999	2350	* @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
<>	149:156823d33999	2351	* @param USARTx USART Instance
<>	149:156823d33999	2352	* @retval None
<>	149:156823d33999	2353	*/
<>	149:156823d33999	2354	__STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
<>	149:156823d33999	2355	{
<>	149:156823d33999	2356	SET_BIT(USARTx->CR3, USART_CR3_DMAT);
<>	149:156823d33999	2357	}
<>	149:156823d33999	2358
<>	149:156823d33999	2359	/**
<>	149:156823d33999	2360	* @brief Disable DMA Mode for transmission
<>	149:156823d33999	2361	* @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX
<>	149:156823d33999	2362	* @param USARTx USART Instance
<>	149:156823d33999	2363	* @retval None
<>	149:156823d33999	2364	*/
<>	149:156823d33999	2365	__STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
<>	149:156823d33999	2366	{
<>	149:156823d33999	2367	CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
<>	149:156823d33999	2368	}
<>	149:156823d33999	2369
<>	149:156823d33999	2370	/**
<>	149:156823d33999	2371	* @brief Check if DMA Mode is enabled for transmission
<>	149:156823d33999	2372	* @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX
<>	149:156823d33999	2373	* @param USARTx USART Instance
<>	149:156823d33999	2374	* @retval State of bit (1 or 0).
<>	149:156823d33999	2375	*/
<>	149:156823d33999	2376	__STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
<>	149:156823d33999	2377	{
<>	149:156823d33999	2378	return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
<>	149:156823d33999	2379	}
<>	149:156823d33999	2380
<>	149:156823d33999	2381	/**
<>	149:156823d33999	2382	* @brief Get the data register address used for DMA transfer
<>	149:156823d33999	2383	* @rmtoll DR DR LL_USART_DMA_GetRegAddr
<>	149:156823d33999	2384	* @note Address of Data Register is valid for both Transmit and Receive transfers.
<>	149:156823d33999	2385	* @param USARTx USART Instance
<>	149:156823d33999	2386	* @retval Address of data register
<>	149:156823d33999	2387	*/
<>	149:156823d33999	2388	__STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
<>	149:156823d33999	2389	{
<>	149:156823d33999	2390	/* return address of DR register */
<>	149:156823d33999	2391	return ((uint32_t) &(USARTx->DR));
<>	149:156823d33999	2392	}
<>	149:156823d33999	2393
<>	149:156823d33999	2394	/**
<>	149:156823d33999	2395	* @}
<>	149:156823d33999	2396	*/
<>	149:156823d33999	2397
<>	149:156823d33999	2398	/** @defgroup USART_LL_EF_Data_Management Data_Management
<>	149:156823d33999	2399	* @{
<>	149:156823d33999	2400	*/
<>	149:156823d33999	2401
<>	149:156823d33999	2402	/**
<>	149:156823d33999	2403	* @brief Read Receiver Data register (Receive Data value, 8 bits)
<>	149:156823d33999	2404	* @rmtoll DR DR LL_USART_ReceiveData8
<>	149:156823d33999	2405	* @param USARTx USART Instance
<>	149:156823d33999	2406	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
<>	149:156823d33999	2407	*/
<>	149:156823d33999	2408	__STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
<>	149:156823d33999	2409	{
<>	149:156823d33999	2410	return (uint8_t)(READ_BIT(USARTx->DR, USART_DR_DR));
<>	149:156823d33999	2411	}
<>	149:156823d33999	2412
<>	149:156823d33999	2413	/**
<>	149:156823d33999	2414	* @brief Read Receiver Data register (Receive Data value, 9 bits)
<>	149:156823d33999	2415	* @rmtoll DR DR LL_USART_ReceiveData9
<>	149:156823d33999	2416	* @param USARTx USART Instance
<>	149:156823d33999	2417	* @retval Value between Min_Data=0x00 and Max_Data=0x1FF
<>	149:156823d33999	2418	*/
<>	149:156823d33999	2419	__STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
<>	149:156823d33999	2420	{
<>	149:156823d33999	2421	return (uint16_t)(READ_BIT(USARTx->DR, USART_DR_DR));
<>	149:156823d33999	2422	}
<>	149:156823d33999	2423
<>	149:156823d33999	2424	/**
<>	149:156823d33999	2425	* @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
<>	149:156823d33999	2426	* @rmtoll DR DR LL_USART_TransmitData8
<>	149:156823d33999	2427	* @param USARTx USART Instance
<>	149:156823d33999	2428	* @param Value between Min_Data=0x00 and Max_Data=0xFF
<>	149:156823d33999	2429	* @retval None
<>	149:156823d33999	2430	*/
<>	149:156823d33999	2431	__STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
<>	149:156823d33999	2432	{
<>	149:156823d33999	2433	USARTx->DR = Value;
<>	149:156823d33999	2434	}
<>	149:156823d33999	2435
<>	149:156823d33999	2436	/**
<>	149:156823d33999	2437	* @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
<>	149:156823d33999	2438	* @rmtoll DR DR LL_USART_TransmitData9
<>	149:156823d33999	2439	* @param USARTx USART Instance
<>	149:156823d33999	2440	* @param Value between Min_Data=0x00 and Max_Data=0x1FF
<>	149:156823d33999	2441	* @retval None
<>	149:156823d33999	2442	*/
<>	149:156823d33999	2443	__STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
<>	149:156823d33999	2444	{
<>	149:156823d33999	2445	USARTx->DR = Value & 0x1FFU;
<>	149:156823d33999	2446	}
<>	149:156823d33999	2447
<>	149:156823d33999	2448	/**
<>	149:156823d33999	2449	* @}
<>	149:156823d33999	2450	*/
<>	149:156823d33999	2451
<>	149:156823d33999	2452	/** @defgroup USART_LL_EF_Execution Execution
<>	149:156823d33999	2453	* @{
<>	149:156823d33999	2454	*/
<>	149:156823d33999	2455
<>	149:156823d33999	2456	/**
<>	149:156823d33999	2457	* @brief Request Break sending
<>	149:156823d33999	2458	* @rmtoll CR1 SBK LL_USART_RequestBreakSending
<>	149:156823d33999	2459	* @param USARTx USART Instance
<>	149:156823d33999	2460	* @retval None
<>	149:156823d33999	2461	*/
<>	149:156823d33999	2462	__STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
<>	149:156823d33999	2463	{
<>	149:156823d33999	2464	SET_BIT(USARTx->CR1, USART_CR1_SBK);
<>	149:156823d33999	2465	}
<>	149:156823d33999	2466
<>	149:156823d33999	2467	/**
<>	149:156823d33999	2468	* @brief Put USART in Mute mode
<>	149:156823d33999	2469	* @rmtoll CR1 RWU LL_USART_RequestEnterMuteMode
<>	149:156823d33999	2470	* @param USARTx USART Instance
<>	149:156823d33999	2471	* @retval None
<>	149:156823d33999	2472	*/
<>	149:156823d33999	2473	__STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
<>	149:156823d33999	2474	{
<>	149:156823d33999	2475	SET_BIT(USARTx->CR1, USART_CR1_RWU);
<>	149:156823d33999	2476	}
<>	149:156823d33999	2477
<>	149:156823d33999	2478	/**
<>	149:156823d33999	2479	* @brief Put USART in Active mode
<>	149:156823d33999	2480	* @rmtoll CR1 RWU LL_USART_RequestExitMuteMode
<>	149:156823d33999	2481	* @param USARTx USART Instance
<>	149:156823d33999	2482	* @retval None
<>	149:156823d33999	2483	*/
<>	149:156823d33999	2484	__STATIC_INLINE void LL_USART_RequestExitMuteMode(USART_TypeDef *USARTx)
<>	149:156823d33999	2485	{
<>	149:156823d33999	2486	CLEAR_BIT(USARTx->CR1, USART_CR1_RWU);
<>	149:156823d33999	2487	}
<>	149:156823d33999	2488
<>	149:156823d33999	2489	/**
<>	149:156823d33999	2490	* @}
<>	149:156823d33999	2491	*/
<>	149:156823d33999	2492
<>	149:156823d33999	2493	#if defined(USE_FULL_LL_DRIVER)
<>	149:156823d33999	2494	/** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
<>	149:156823d33999	2495	* @{
<>	149:156823d33999	2496	*/
<>	149:156823d33999	2497	ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
<>	149:156823d33999	2498	ErrorStatus LL_USART_Init(USART_TypeDef USARTx, LL_USART_InitTypeDef USART_InitStruct);
<>	149:156823d33999	2499	void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
<>	149:156823d33999	2500	ErrorStatus LL_USART_ClockInit(USART_TypeDef USARTx, LL_USART_ClockInitTypeDef USART_ClockInitStruct);
<>	149:156823d33999	2501	void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
<>	149:156823d33999	2502	/**
<>	149:156823d33999	2503	* @}
<>	149:156823d33999	2504	*/
<>	149:156823d33999	2505	#endif /* USE_FULL_LL_DRIVER */
<>	149:156823d33999	2506
<>	149:156823d33999	2507	/**
<>	149:156823d33999	2508	* @}
<>	149:156823d33999	2509	*/
<>	149:156823d33999	2510
<>	149:156823d33999	2511	/**
<>	149:156823d33999	2512	* @}
<>	149:156823d33999	2513	*/
<>	149:156823d33999	2514
<>	149:156823d33999	2515	#endif /* USART1 \|\| USART2\|\| USART3 \|\| UART4 \|\| UART5 */
<>	149:156823d33999	2516
<>	149:156823d33999	2517	/**
<>	149:156823d33999	2518	* @}
<>	149:156823d33999	2519	*/
<>	149:156823d33999	2520
<>	149:156823d33999	2521	#ifdef __cplusplus
<>	149:156823d33999	2522	}
<>	149:156823d33999	2523	#endif
<>	149:156823d33999	2524
<>	149:156823d33999	2525	#endif /* __STM32L1xx_LL_USART_H */
<>	149:156823d33999	2526
<>	149:156823d33999	2527	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/