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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_usart.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
184:08ed48f1de7f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_hal_usart.h
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @brief This file contains all the functions prototypes for the USART
<> 149:156823d33999 6 * firmware library.
<> 149:156823d33999 7 ******************************************************************************
<> 149:156823d33999 8 * @attention
<> 149:156823d33999 9 *
AnnaBridge 184:08ed48f1de7f 10 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 149:156823d33999 11 *
<> 149:156823d33999 12 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 13 * are permitted provided that the following conditions are met:
<> 149:156823d33999 14 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 15 * this list of conditions and the following disclaimer.
<> 149:156823d33999 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 17 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 18 * and/or other materials provided with the distribution.
<> 149:156823d33999 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 20 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 21 * without specific prior written permission.
<> 149:156823d33999 22 *
<> 149:156823d33999 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 33 *
<> 149:156823d33999 34 ******************************************************************************
<> 149:156823d33999 35 */
<> 149:156823d33999 36
<> 149:156823d33999 37 /* Define to prevent recursive inclusion -------------------------------------*/
<> 149:156823d33999 38 #ifndef __STM32L1xx_HAL_USART_H
<> 149:156823d33999 39 #define __STM32L1xx_HAL_USART_H
<> 149:156823d33999 40
<> 149:156823d33999 41 #ifdef __cplusplus
<> 149:156823d33999 42 extern "C" {
<> 149:156823d33999 43 #endif
<> 149:156823d33999 44
<> 149:156823d33999 45 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 46 #include "stm32l1xx_hal_def.h"
<> 149:156823d33999 47
<> 149:156823d33999 48 /** @addtogroup STM32L1xx_HAL_Driver
<> 149:156823d33999 49 * @{
<> 149:156823d33999 50 */
<> 149:156823d33999 51
<> 149:156823d33999 52 /** @addtogroup USART
<> 149:156823d33999 53 * @{
<> 149:156823d33999 54 */
<> 149:156823d33999 55
<> 149:156823d33999 56 /* Exported types ------------------------------------------------------------*/
<> 149:156823d33999 57 /** @defgroup USART_Exported_Types USART Exported Types
<> 149:156823d33999 58 * @{
<> 149:156823d33999 59 */
<> 149:156823d33999 60
<> 149:156823d33999 61
<> 149:156823d33999 62 /**
<> 149:156823d33999 63 * @brief USART Init Structure definition
<> 149:156823d33999 64 */
<> 149:156823d33999 65 typedef struct
<> 149:156823d33999 66 {
<> 149:156823d33999 67 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
<> 149:156823d33999 68 The baud rate is computed using the following formula:
<> 149:156823d33999 69 - IntegerDivider = ((PCLKx) / (8 * (husart->Init.BaudRate)))
<> 149:156823d33999 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */
<> 149:156823d33999 71
<> 149:156823d33999 72 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 149:156823d33999 73 This parameter can be a value of @ref USART_Word_Length */
<> 149:156823d33999 74
<> 149:156823d33999 75 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 149:156823d33999 76 This parameter can be a value of @ref USART_Stop_Bits */
<> 149:156823d33999 77
<> 149:156823d33999 78 uint32_t Parity; /*!< Specifies the parity mode.
<> 149:156823d33999 79 This parameter can be a value of @ref USART_Parity
<> 149:156823d33999 80 @note When parity is enabled, the computed parity is inserted
<> 149:156823d33999 81 at the MSB position of the transmitted data (9th bit when
<> 149:156823d33999 82 the word length is set to 9 data bits; 8th bit when the
<> 149:156823d33999 83 word length is set to 8 data bits). */
<> 149:156823d33999 84
<> 149:156823d33999 85 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 149:156823d33999 86 This parameter can be a value of @ref USART_Mode */
<> 149:156823d33999 87
<> 149:156823d33999 88 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
<> 149:156823d33999 89 This parameter can be a value of @ref USART_Clock_Polarity */
<> 149:156823d33999 90
<> 149:156823d33999 91 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
<> 149:156823d33999 92 This parameter can be a value of @ref USART_Clock_Phase */
<> 149:156823d33999 93
<> 149:156823d33999 94 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
<> 149:156823d33999 95 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
<> 149:156823d33999 96 This parameter can be a value of @ref USART_Last_Bit */
<> 149:156823d33999 97 }USART_InitTypeDef;
<> 149:156823d33999 98
<> 149:156823d33999 99 /**
<> 149:156823d33999 100 * @brief HAL State structures definition
<> 149:156823d33999 101 */
<> 149:156823d33999 102 typedef enum
<> 149:156823d33999 103 {
<> 149:156823d33999 104 HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */
<> 149:156823d33999 105 HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
<> 149:156823d33999 106 HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
<> 149:156823d33999 107 HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
<> 149:156823d33999 108 HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
<> 149:156823d33999 109 HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */
<> 149:156823d33999 110 HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
<> 149:156823d33999 111 HAL_USART_STATE_ERROR = 0x04 /*!< Error */
<> 149:156823d33999 112 }HAL_USART_StateTypeDef;
<> 149:156823d33999 113
<> 149:156823d33999 114
<> 149:156823d33999 115 /**
<> 149:156823d33999 116 * @brief USART handle Structure definition
<> 149:156823d33999 117 */
<> 149:156823d33999 118 typedef struct
<> 149:156823d33999 119 {
<> 149:156823d33999 120 USART_TypeDef *Instance; /*!< USART registers base address */
<> 149:156823d33999 121
<> 149:156823d33999 122 USART_InitTypeDef Init; /*!< Usart communication parameters */
<> 149:156823d33999 123
<> 149:156823d33999 124 uint8_t *pTxBuffPtr; /*!< Pointer to Usart Tx transfer Buffer */
<> 149:156823d33999 125
<> 149:156823d33999 126 uint16_t TxXferSize; /*!< Usart Tx Transfer size */
<> 149:156823d33999 127
<> 149:156823d33999 128 __IO uint16_t TxXferCount; /*!< Usart Tx Transfer Counter */
<> 149:156823d33999 129
<> 149:156823d33999 130 uint8_t *pRxBuffPtr; /*!< Pointer to Usart Rx transfer Buffer */
<> 149:156823d33999 131
<> 149:156823d33999 132 uint16_t RxXferSize; /*!< Usart Rx Transfer size */
<> 149:156823d33999 133
<> 149:156823d33999 134 __IO uint16_t RxXferCount; /*!< Usart Rx Transfer Counter */
<> 149:156823d33999 135
<> 149:156823d33999 136 DMA_HandleTypeDef *hdmatx; /*!< Usart Tx DMA Handle parameters */
<> 149:156823d33999 137
<> 149:156823d33999 138 DMA_HandleTypeDef *hdmarx; /*!< Usart Rx DMA Handle parameters */
<> 149:156823d33999 139
<> 149:156823d33999 140 HAL_LockTypeDef Lock; /*!< Locking object */
<> 149:156823d33999 141
<> 149:156823d33999 142 __IO HAL_USART_StateTypeDef State; /*!< Usart communication state */
<> 149:156823d33999 143
<> 149:156823d33999 144 __IO uint32_t ErrorCode; /*!< USART Error code */
<> 149:156823d33999 145
<> 149:156823d33999 146 }USART_HandleTypeDef;
<> 149:156823d33999 147
<> 149:156823d33999 148 /**
<> 149:156823d33999 149 * @}
<> 149:156823d33999 150 */
<> 149:156823d33999 151
<> 149:156823d33999 152 /* Exported constants --------------------------------------------------------*/
<> 149:156823d33999 153 /** @defgroup USART_Exported_Constants USART Exported constants
<> 149:156823d33999 154 * @{
<> 149:156823d33999 155 */
<> 149:156823d33999 156
<> 149:156823d33999 157 /** @defgroup USART_Error_Codes USART Error Codes
<> 149:156823d33999 158 * @{
<> 149:156823d33999 159 */
AnnaBridge 184:08ed48f1de7f 160 #define HAL_USART_ERROR_NONE (0x00U) /*!< No error */
AnnaBridge 184:08ed48f1de7f 161 #define HAL_USART_ERROR_PE (0x01U) /*!< Parity error */
AnnaBridge 184:08ed48f1de7f 162 #define HAL_USART_ERROR_NE (0x02U) /*!< Noise error */
AnnaBridge 184:08ed48f1de7f 163 #define HAL_USART_ERROR_FE (0x04U) /*!< frame error */
AnnaBridge 184:08ed48f1de7f 164 #define HAL_USART_ERROR_ORE (0x08U) /*!< Overrun error */
AnnaBridge 184:08ed48f1de7f 165 #define HAL_USART_ERROR_DMA (0x10U) /*!< DMA transfer error */
<> 149:156823d33999 166 /**
<> 149:156823d33999 167 * @}
<> 149:156823d33999 168 */
<> 149:156823d33999 169
<> 149:156823d33999 170 /** @defgroup USART_Word_Length USART Word Length
<> 149:156823d33999 171 * @{
<> 149:156823d33999 172 */
AnnaBridge 184:08ed48f1de7f 173 #define USART_WORDLENGTH_8B (0x00000000U)
<> 149:156823d33999 174 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 149:156823d33999 175 /**
<> 149:156823d33999 176 * @}
<> 149:156823d33999 177 */
<> 149:156823d33999 178
<> 149:156823d33999 179 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
<> 149:156823d33999 180 * @{
<> 149:156823d33999 181 */
AnnaBridge 184:08ed48f1de7f 182 #define USART_STOPBITS_1 (0x00000000U)
<> 149:156823d33999 183 #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0)
<> 149:156823d33999 184 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
<> 149:156823d33999 185 #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
<> 149:156823d33999 186 /**
<> 149:156823d33999 187 * @}
<> 149:156823d33999 188 */
<> 149:156823d33999 189
<> 149:156823d33999 190 /** @defgroup USART_Parity USART Parity
<> 149:156823d33999 191 * @{
<> 149:156823d33999 192 */
AnnaBridge 184:08ed48f1de7f 193 #define USART_PARITY_NONE (0x00000000U)
<> 149:156823d33999 194 #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 149:156823d33999 195 #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 149:156823d33999 196 /**
<> 149:156823d33999 197 * @}
<> 149:156823d33999 198 */
<> 149:156823d33999 199
<> 149:156823d33999 200 /** @defgroup USART_Mode USART Mode
<> 149:156823d33999 201 * @{
<> 149:156823d33999 202 */
<> 149:156823d33999 203 #define USART_MODE_RX ((uint32_t)USART_CR1_RE)
<> 149:156823d33999 204 #define USART_MODE_TX ((uint32_t)USART_CR1_TE)
<> 149:156823d33999 205 #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 149:156823d33999 206
<> 149:156823d33999 207 /**
<> 149:156823d33999 208 * @}
<> 149:156823d33999 209 */
<> 149:156823d33999 210
<> 149:156823d33999 211 /** @defgroup USART_Clock USART Clock
<> 149:156823d33999 212 * @{
<> 149:156823d33999 213 */
AnnaBridge 184:08ed48f1de7f 214 #define USART_CLOCK_DISABLE (0x00000000U)
<> 149:156823d33999 215 #define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN)
<> 149:156823d33999 216 /**
<> 149:156823d33999 217 * @}
<> 149:156823d33999 218 */
<> 149:156823d33999 219
<> 149:156823d33999 220 /** @defgroup USART_Clock_Polarity USART Clock Polarity
<> 149:156823d33999 221 * @{
<> 149:156823d33999 222 */
AnnaBridge 184:08ed48f1de7f 223 #define USART_POLARITY_LOW (0x00000000U)
<> 149:156823d33999 224 #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL)
<> 149:156823d33999 225 /**
<> 149:156823d33999 226 * @}
<> 149:156823d33999 227 */
<> 149:156823d33999 228
<> 149:156823d33999 229 /** @defgroup USART_Clock_Phase USART Clock Phase
<> 149:156823d33999 230 * @{
<> 149:156823d33999 231 */
AnnaBridge 184:08ed48f1de7f 232 #define USART_PHASE_1EDGE (0x00000000U)
<> 149:156823d33999 233 #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA)
<> 149:156823d33999 234 /**
<> 149:156823d33999 235 * @}
<> 149:156823d33999 236 */
<> 149:156823d33999 237
<> 149:156823d33999 238 /** @defgroup USART_Last_Bit USART Last Bit
<> 149:156823d33999 239 * @{
<> 149:156823d33999 240 */
AnnaBridge 184:08ed48f1de7f 241 #define USART_LASTBIT_DISABLE (0x00000000U)
<> 149:156823d33999 242 #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL)
<> 149:156823d33999 243 /**
<> 149:156823d33999 244 * @}
<> 149:156823d33999 245 */
<> 149:156823d33999 246
<> 149:156823d33999 247 /** @defgroup USART_NACK_State USART NACK State
<> 149:156823d33999 248 * @{
<> 149:156823d33999 249 */
<> 149:156823d33999 250 #define USART_NACK_ENABLE ((uint32_t)USART_CR3_NACK)
AnnaBridge 184:08ed48f1de7f 251 #define USART_NACK_DISABLE (0x00000000U)
<> 149:156823d33999 252 /**
<> 149:156823d33999 253 * @}
<> 149:156823d33999 254 */
<> 149:156823d33999 255
<> 149:156823d33999 256 /** @defgroup USART_Flags USART Flags
<> 149:156823d33999 257 * Elements values convention: 0xXXXX
<> 149:156823d33999 258 * - 0xXXXX : Flag mask in the SR register
<> 149:156823d33999 259 * @{
<> 149:156823d33999 260 */
<> 149:156823d33999 261
<> 149:156823d33999 262 #define USART_FLAG_CTS ((uint32_t)USART_SR_CTS)
<> 149:156823d33999 263 #define USART_FLAG_LBD ((uint32_t)USART_SR_LBD)
<> 149:156823d33999 264 #define USART_FLAG_TXE ((uint32_t)USART_SR_TXE)
<> 149:156823d33999 265 #define USART_FLAG_TC ((uint32_t)USART_SR_TC)
<> 149:156823d33999 266 #define USART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<> 149:156823d33999 267 #define USART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<> 149:156823d33999 268 #define USART_FLAG_ORE ((uint32_t)USART_SR_ORE)
<> 149:156823d33999 269 #define USART_FLAG_NE ((uint32_t)USART_SR_NE)
<> 149:156823d33999 270 #define USART_FLAG_FE ((uint32_t)USART_SR_FE)
<> 149:156823d33999 271 #define USART_FLAG_PE ((uint32_t)USART_SR_PE)
<> 149:156823d33999 272 /**
<> 149:156823d33999 273 * @}
<> 149:156823d33999 274 */
<> 149:156823d33999 275
<> 149:156823d33999 276 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
<> 149:156823d33999 277 * Elements values convention: 0xY000XXXX
<> 149:156823d33999 278 * - XXXX : Interrupt mask (16 bits) in the Y register
<> 149:156823d33999 279 * - Y : Interrupt source register (4bits)
<> 149:156823d33999 280 * - 0001: CR1 register
<> 149:156823d33999 281 * - 0010: CR2 register
<> 149:156823d33999 282 * - 0011: CR3 register
<> 149:156823d33999 283 *
<> 149:156823d33999 284 * @{
<> 149:156823d33999 285 */
<> 149:156823d33999 286
<> 149:156823d33999 287 #define USART_IT_PE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_PEIE))
<> 149:156823d33999 288 #define USART_IT_TXE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_TXEIE))
<> 149:156823d33999 289 #define USART_IT_TC ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_TCIE))
<> 149:156823d33999 290 #define USART_IT_RXNE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_RXNEIE))
<> 149:156823d33999 291 #define USART_IT_IDLE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_IDLEIE))
<> 149:156823d33999 292
<> 149:156823d33999 293 #define USART_IT_LBD ((uint32_t)(USART_CR2_REG_INDEX << 28 | USART_CR2_LBDIE))
<> 149:156823d33999 294
<> 149:156823d33999 295 #define USART_IT_CTS ((uint32_t)(USART_CR3_REG_INDEX << 28 | USART_CR3_CTSIE))
<> 149:156823d33999 296 #define USART_IT_ERR ((uint32_t)(USART_CR3_REG_INDEX << 28 | USART_CR3_EIE))
<> 149:156823d33999 297
<> 149:156823d33999 298
<> 149:156823d33999 299 /**
<> 149:156823d33999 300 * @}
<> 149:156823d33999 301 */
<> 149:156823d33999 302
<> 149:156823d33999 303 /**
<> 149:156823d33999 304 * @}
<> 149:156823d33999 305 */
<> 149:156823d33999 306
<> 149:156823d33999 307
<> 149:156823d33999 308 /* Exported macro ------------------------------------------------------------*/
<> 149:156823d33999 309 /** @defgroup USART_Exported_Macros USART Exported Macros
<> 149:156823d33999 310 * @{
<> 149:156823d33999 311 */
<> 149:156823d33999 312
<> 149:156823d33999 313
<> 149:156823d33999 314 /** @brief Reset USART handle state
<> 149:156823d33999 315 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 316 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 317 * @retval None
<> 149:156823d33999 318 */
<> 149:156823d33999 319 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
<> 149:156823d33999 320
<> 149:156823d33999 321 /** @brief Check whether the specified USART flag is set or not.
<> 149:156823d33999 322 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 323 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 324 * @param __FLAG__: specifies the flag to check.
<> 149:156823d33999 325 * This parameter can be one of the following values:
<> 149:156823d33999 326 * @arg USART_FLAG_TXE: Transmit data register empty flag
<> 149:156823d33999 327 * @arg USART_FLAG_TC: Transmission Complete flag
<> 149:156823d33999 328 * @arg USART_FLAG_RXNE: Receive data register not empty flag
<> 149:156823d33999 329 * @arg USART_FLAG_IDLE: Idle Line detection flag
<> 149:156823d33999 330 * @arg USART_FLAG_ORE: OverRun Error flag
<> 149:156823d33999 331 * @arg USART_FLAG_NE: Noise Error flag
<> 149:156823d33999 332 * @arg USART_FLAG_FE: Framing Error flag
<> 149:156823d33999 333 * @arg USART_FLAG_PE: Parity Error flag
<> 149:156823d33999 334 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 149:156823d33999 335 */
<> 149:156823d33999 336
<> 149:156823d33999 337 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 149:156823d33999 338
<> 149:156823d33999 339 /** @brief Clear the specified USART pending flags.
<> 149:156823d33999 340 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 341 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 342 * @param __FLAG__: specifies the flag to check.
<> 149:156823d33999 343 * This parameter can be any combination of the following values:
<> 149:156823d33999 344 * @arg USART_FLAG_TC: Transmission Complete flag.
<> 149:156823d33999 345 * @arg USART_FLAG_RXNE: Receive data register not empty flag.
<> 149:156823d33999 346 *
<> 149:156823d33999 347 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
<> 149:156823d33999 348 * error) and IDLE (Idle line detected) flags are cleared by software
<> 149:156823d33999 349 * sequence: a read operation to USART_SR register followed by a read
<> 149:156823d33999 350 * operation to USART_DR register.
<> 149:156823d33999 351 * @note RXNE flag can be also cleared by a read to the USART_DR register.
<> 149:156823d33999 352 * @note TC flag can be also cleared by software sequence: a read operation to
<> 149:156823d33999 353 * USART_SR register followed by a write operation to USART_DR register.
<> 149:156823d33999 354 * @note TXE flag is cleared only by a write to the USART_DR register.
<> 149:156823d33999 355 *
<> 149:156823d33999 356 * @retval None
<> 149:156823d33999 357 */
<> 149:156823d33999 358 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 149:156823d33999 359
<> 149:156823d33999 360 /** @brief Clear the USART PE pending flag.
<> 149:156823d33999 361 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 362 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 363 * @retval None
<> 149:156823d33999 364 */
<> 149:156823d33999 365 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) \
<> 149:156823d33999 366 do{ \
<> 149:156823d33999 367 __IO uint32_t tmpreg; \
<> 149:156823d33999 368 tmpreg = (__HANDLE__)->Instance->SR; \
<> 149:156823d33999 369 tmpreg = (__HANDLE__)->Instance->DR; \
<> 149:156823d33999 370 UNUSED(tmpreg); \
<> 149:156823d33999 371 }while(0)
<> 149:156823d33999 372
<> 149:156823d33999 373
<> 149:156823d33999 374 /** @brief Clear the USART FE pending flag.
<> 149:156823d33999 375 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 376 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 377 * @retval None
<> 149:156823d33999 378 */
<> 149:156823d33999 379 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 149:156823d33999 380
<> 149:156823d33999 381 /** @brief Clear the USART NE pending flag.
<> 149:156823d33999 382 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 383 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 384 * @retval None
<> 149:156823d33999 385 */
<> 149:156823d33999 386 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 149:156823d33999 387
<> 149:156823d33999 388 /** @brief Clear the USART ORE pending flag.
<> 149:156823d33999 389 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 390 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 391 * @retval None
<> 149:156823d33999 392 */
<> 149:156823d33999 393 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 149:156823d33999 394
<> 149:156823d33999 395 /** @brief Clear the USART IDLE pending flag.
<> 149:156823d33999 396 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 397 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 398 * @retval None
<> 149:156823d33999 399 */
<> 149:156823d33999 400 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 149:156823d33999 401
<> 149:156823d33999 402 /** @brief Enable the specified Usart interrupts.
<> 149:156823d33999 403 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 404 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 405 * @param __INTERRUPT__: specifies the USART interrupt source to enable.
<> 149:156823d33999 406 * This parameter can be one of the following values:
<> 149:156823d33999 407 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 149:156823d33999 408 * @arg USART_IT_TC: Transmission complete interrupt
<> 149:156823d33999 409 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 149:156823d33999 410 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 149:156823d33999 411 * @arg USART_IT_PE: Parity Error interrupt
<> 149:156823d33999 412 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 149:156823d33999 413 * @retval None
<> 149:156823d33999 414 */
<> 149:156823d33999 415 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \
<> 149:156823d33999 416 (((__INTERRUPT__) >> 28) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \
<> 149:156823d33999 417 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK)))
<> 149:156823d33999 418
<> 149:156823d33999 419
<> 149:156823d33999 420 /** @brief Disable the specified Usart interrupts.
<> 149:156823d33999 421 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 422 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 423 * @param __INTERRUPT__: specifies the USART interrupt source to disable.
<> 149:156823d33999 424 * This parameter can be one of the following values:
<> 149:156823d33999 425 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 149:156823d33999 426 * @arg USART_IT_TC: Transmission complete interrupt
<> 149:156823d33999 427 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 149:156823d33999 428 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 149:156823d33999 429 * @arg USART_IT_PE: Parity Error interrupt
<> 149:156823d33999 430 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 149:156823d33999 431 * @retval None
<> 149:156823d33999 432 */
<> 149:156823d33999 433 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
<> 149:156823d33999 434 (((__INTERRUPT__) >> 28) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
<> 149:156823d33999 435 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK)))
<> 149:156823d33999 436
<> 149:156823d33999 437
<> 149:156823d33999 438
<> 149:156823d33999 439 /** @brief Check whether the specified Usart interrupt has occurred or not.
<> 149:156823d33999 440 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 441 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 442 * @param __IT__: specifies the USART interrupt source to check.
<> 149:156823d33999 443 * This parameter can be one of the following values:
<> 149:156823d33999 444 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 149:156823d33999 445 * @arg USART_IT_TC: Transmission complete interrupt
<> 149:156823d33999 446 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 149:156823d33999 447 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 149:156823d33999 448 * @arg USART_IT_ERR: Error interrupt
<> 149:156823d33999 449 * @arg USART_IT_PE: Parity Error interrupt
<> 149:156823d33999 450 * @retval The new state of __IT__ (TRUE or FALSE).
<> 149:156823d33999 451 */
<> 149:156823d33999 452 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == USART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == USART_CR2_REG_INDEX)? \
<> 149:156823d33999 453 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK))
<> 149:156823d33999 454
<> 149:156823d33999 455 /** @brief Enables the USART one bit sample method
<> 149:156823d33999 456 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 457 * @retval None
<> 149:156823d33999 458 */
<> 149:156823d33999 459 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR3, (USART_CR3_ONEBIT))
<> 149:156823d33999 460
<> 149:156823d33999 461 /** @brief Disables the UART one bit sample method
<> 149:156823d33999 462 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 463 * @retval None
<> 149:156823d33999 464 */
<> 149:156823d33999 465 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR3,(USART_CR3_ONEBIT))
<> 149:156823d33999 466
<> 149:156823d33999 467 /** @brief Enable USART
<> 149:156823d33999 468 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 469 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 470 * @retval None
<> 149:156823d33999 471 */
<> 149:156823d33999 472 #define __HAL_USART_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1,(USART_CR1_UE))
<> 149:156823d33999 473
<> 149:156823d33999 474 /** @brief Disable USART
<> 149:156823d33999 475 * @param __HANDLE__: specifies the USART Handle.
<> 149:156823d33999 476 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 149:156823d33999 477 * @retval None
<> 149:156823d33999 478 */
<> 149:156823d33999 479 #define __HAL_USART_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1,(USART_CR1_UE))
<> 149:156823d33999 480
<> 149:156823d33999 481
<> 149:156823d33999 482 /**
<> 149:156823d33999 483 * @}
<> 149:156823d33999 484 */
<> 149:156823d33999 485
<> 149:156823d33999 486
<> 149:156823d33999 487 /* Private macros --------------------------------------------------------*/
<> 149:156823d33999 488 /** @defgroup USART_Private_Macros USART Private Macros
<> 149:156823d33999 489 * @{
<> 149:156823d33999 490 */
<> 149:156823d33999 491
<> 149:156823d33999 492 #define USART_CR1_REG_INDEX 1
<> 149:156823d33999 493 #define USART_CR2_REG_INDEX 2
<> 149:156823d33999 494 #define USART_CR3_REG_INDEX 3
<> 149:156823d33999 495
<> 149:156823d33999 496 #define USART_DIV(__PCLK__, __BAUD__) (((__PCLK__)*25)/(2*(__BAUD__)))
<> 149:156823d33999 497 #define USART_DIVMANT(__PCLK__, __BAUD__) (USART_DIV((__PCLK__), (__BAUD__))/100)
<> 149:156823d33999 498 #define USART_DIVFRAQ(__PCLK__, __BAUD__) (((USART_DIV((__PCLK__), (__BAUD__)) - (USART_DIVMANT((__PCLK__), (__BAUD__)) * 100)) * 16 + 50) / 100)
<> 149:156823d33999 499 #define USART_BRR(__PCLK__, __BAUD__) ((USART_DIVMANT((__PCLK__), (__BAUD__)) << 4)|(USART_DIVFRAQ((__PCLK__), (__BAUD__)) & 0x07))
<> 149:156823d33999 500
<> 149:156823d33999 501 /** Check USART Baud rate
<> 149:156823d33999 502 * __BAUDRATE__: Baudrate specified by the user
<> 149:156823d33999 503 * The maximum Baud Rate is derived from the maximum clock on APB (i.e. 32 MHz)
<> 149:156823d33999 504 * divided by the smallest oversampling used on the USART (i.e. 8)
<> 149:156823d33999 505 * return : TRUE or FALSE
<> 149:156823d33999 506 */
<> 149:156823d33999 507 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001)
<> 149:156823d33999 508
<> 149:156823d33999 509 #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \
<> 149:156823d33999 510 ((LENGTH) == USART_WORDLENGTH_9B))
<> 149:156823d33999 511
<> 149:156823d33999 512 #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \
<> 149:156823d33999 513 ((STOPBITS) == USART_STOPBITS_0_5) || \
<> 149:156823d33999 514 ((STOPBITS) == USART_STOPBITS_1_5) || \
<> 149:156823d33999 515 ((STOPBITS) == USART_STOPBITS_2))
<> 149:156823d33999 516
<> 149:156823d33999 517 #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \
<> 149:156823d33999 518 ((PARITY) == USART_PARITY_EVEN) || \
<> 149:156823d33999 519 ((PARITY) == USART_PARITY_ODD))
<> 149:156823d33999 520
AnnaBridge 184:08ed48f1de7f 521 #define IS_USART_MODE(MODE) ((((MODE) & (~((uint32_t)USART_MODE_TX_RX))) == 0x00U) && ((MODE) != 0x00000000U))
<> 149:156823d33999 522
<> 149:156823d33999 523 #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLE) || \
<> 149:156823d33999 524 ((CLOCK) == USART_CLOCK_ENABLE))
<> 149:156823d33999 525
<> 149:156823d33999 526 #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH))
<> 149:156823d33999 527
<> 149:156823d33999 528 #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE))
<> 149:156823d33999 529
<> 149:156823d33999 530 #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \
<> 149:156823d33999 531 ((LASTBIT) == USART_LASTBIT_ENABLE))
<> 149:156823d33999 532
<> 149:156823d33999 533 #define IS_USART_NACK_STATE(NACK) (((NACK) == USART_NACK_ENABLE) || \
<> 149:156823d33999 534 ((NACK) == USART_NACK_DISABLE))
<> 149:156823d33999 535
<> 149:156823d33999 536 /** USART interruptions flag mask
<> 149:156823d33999 537 *
<> 149:156823d33999 538 */
<> 149:156823d33999 539 #define USART_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
<> 149:156823d33999 540 USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
<> 149:156823d33999 541
<> 149:156823d33999 542 /**
<> 149:156823d33999 543 * @}
<> 149:156823d33999 544 */
<> 149:156823d33999 545
<> 149:156823d33999 546
<> 149:156823d33999 547 /* Exported functions --------------------------------------------------------*/
<> 149:156823d33999 548
<> 149:156823d33999 549 /** @addtogroup USART_Exported_Functions USART Exported Functions
<> 149:156823d33999 550 * @{
<> 149:156823d33999 551 */
<> 149:156823d33999 552
<> 149:156823d33999 553 /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
<> 149:156823d33999 554 * @{
<> 149:156823d33999 555 */
<> 149:156823d33999 556
<> 149:156823d33999 557 /* Initialization and de-initialization functions ******************************/
<> 149:156823d33999 558 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
<> 149:156823d33999 559 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
<> 149:156823d33999 560 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
<> 149:156823d33999 561 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
<> 149:156823d33999 562
<> 149:156823d33999 563 /**
<> 149:156823d33999 564 * @}
<> 149:156823d33999 565 */
<> 149:156823d33999 566
<> 149:156823d33999 567 /** @addtogroup USART_Exported_Functions_Group2 IO operation functions
<> 149:156823d33999 568 * @{
<> 149:156823d33999 569 */
<> 149:156823d33999 570
<> 149:156823d33999 571 /* IO operation functions *******************************************************/
<> 149:156823d33999 572 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 573 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 574 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 575 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 149:156823d33999 576 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 149:156823d33999 577 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 149:156823d33999 578 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 149:156823d33999 579 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 149:156823d33999 580 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 149:156823d33999 581 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
<> 149:156823d33999 582 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
<> 149:156823d33999 583 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
<> 149:156823d33999 584 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
<> 149:156823d33999 585 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
<> 149:156823d33999 586 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 149:156823d33999 587 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
<> 149:156823d33999 588 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 149:156823d33999 589 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
<> 149:156823d33999 590 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
<> 149:156823d33999 591
<> 149:156823d33999 592 /**
<> 149:156823d33999 593 * @}
<> 149:156823d33999 594 */
<> 149:156823d33999 595
<> 149:156823d33999 596 /* Peripheral Control functions ***********************************************/
<> 149:156823d33999 597
<> 149:156823d33999 598 /** @addtogroup USART_Exported_Functions_Group3 Peripheral State and Errors functions
<> 149:156823d33999 599 * @{
<> 149:156823d33999 600 */
<> 149:156823d33999 601
<> 149:156823d33999 602 /* Peripheral State and Error functions ***************************************/
<> 149:156823d33999 603 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
<> 149:156823d33999 604 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
<> 149:156823d33999 605
<> 149:156823d33999 606 /**
<> 149:156823d33999 607 * @}
<> 149:156823d33999 608 */
<> 149:156823d33999 609
<> 149:156823d33999 610 /**
<> 149:156823d33999 611 * @}
<> 149:156823d33999 612 */
<> 149:156823d33999 613
<> 149:156823d33999 614 /**
<> 149:156823d33999 615 * @}
<> 149:156823d33999 616 */
<> 149:156823d33999 617
<> 149:156823d33999 618 /**
<> 149:156823d33999 619 * @}
<> 149:156823d33999 620 */
<> 149:156823d33999 621
<> 149:156823d33999 622 #ifdef __cplusplus
<> 149:156823d33999 623 }
<> 149:156823d33999 624 #endif
<> 149:156823d33999 625
<> 149:156823d33999 626 #endif /* __STM32L1xx_HAL_USART_H */
<> 149:156823d33999 627
<> 149:156823d33999 628 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/