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mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_uart.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
184:08ed48f1de7f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_hal_uart.h
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @brief This file contains all the functions prototypes for the UART
<> 149:156823d33999 6 * firmware library.
<> 149:156823d33999 7 ******************************************************************************
<> 149:156823d33999 8 * @attention
<> 149:156823d33999 9 *
AnnaBridge 184:08ed48f1de7f 10 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 149:156823d33999 11 *
<> 149:156823d33999 12 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 13 * are permitted provided that the following conditions are met:
<> 149:156823d33999 14 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 15 * this list of conditions and the following disclaimer.
<> 149:156823d33999 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 17 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 18 * and/or other materials provided with the distribution.
<> 149:156823d33999 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 20 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 21 * without specific prior written permission.
<> 149:156823d33999 22 *
<> 149:156823d33999 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 33 *
<> 149:156823d33999 34 ******************************************************************************
<> 149:156823d33999 35 */
<> 149:156823d33999 36
<> 149:156823d33999 37 /* Define to prevent recursive inclusion -------------------------------------*/
<> 149:156823d33999 38 #ifndef __STM32L1xx_HAL_UART_H
<> 149:156823d33999 39 #define __STM32L1xx_HAL_UART_H
<> 149:156823d33999 40
<> 149:156823d33999 41 #ifdef __cplusplus
<> 149:156823d33999 42 extern "C" {
<> 149:156823d33999 43 #endif
<> 149:156823d33999 44
<> 149:156823d33999 45 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 46 #include "stm32l1xx_hal_def.h"
<> 149:156823d33999 47
<> 149:156823d33999 48 /** @addtogroup STM32L1xx_HAL_Driver
<> 149:156823d33999 49 * @{
<> 149:156823d33999 50 */
<> 149:156823d33999 51
<> 149:156823d33999 52 /** @addtogroup UART
<> 149:156823d33999 53 * @{
<> 149:156823d33999 54 */
<> 149:156823d33999 55
<> 149:156823d33999 56 /* Exported types ------------------------------------------------------------*/
<> 149:156823d33999 57 /** @defgroup UART_Exported_Types UART Exported Types
<> 149:156823d33999 58 * @{
<> 149:156823d33999 59 */
<> 149:156823d33999 60
<> 149:156823d33999 61
<> 149:156823d33999 62 /**
<> 149:156823d33999 63 * @brief UART Init Structure definition
<> 149:156823d33999 64 */
<> 149:156823d33999 65 typedef struct
<> 149:156823d33999 66 {
<> 149:156823d33999 67 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
<> 149:156823d33999 68 The baud rate is computed using the following formula:
<> 149:156823d33999 69 - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
<> 149:156823d33999 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
<> 149:156823d33999 71 Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
<> 149:156823d33999 72
<> 149:156823d33999 73 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 149:156823d33999 74 This parameter can be a value of @ref UART_Word_Length */
<> 149:156823d33999 75
<> 149:156823d33999 76 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 149:156823d33999 77 This parameter can be a value of @ref UART_Stop_Bits */
<> 149:156823d33999 78
<> 149:156823d33999 79 uint32_t Parity; /*!< Specifies the parity mode.
<> 149:156823d33999 80 This parameter can be a value of @ref UART_Parity
<> 149:156823d33999 81 @note When parity is enabled, the computed parity is inserted
<> 149:156823d33999 82 at the MSB position of the transmitted data (9th bit when
<> 149:156823d33999 83 the word length is set to 9 data bits; 8th bit when the
<> 149:156823d33999 84 word length is set to 8 data bits). */
<> 149:156823d33999 85
<> 149:156823d33999 86 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
<> 149:156823d33999 87 This parameter can be a value of @ref UART_Mode */
<> 149:156823d33999 88
<> 149:156823d33999 89 uint32_t HwFlowCtl; /*!< Specifies wether the hardware flow control mode is enabled
<> 149:156823d33999 90 or disabled.
<> 149:156823d33999 91 This parameter can be a value of @ref UART_Hardware_Flow_Control */
<> 149:156823d33999 92
<> 149:156823d33999 93 uint32_t OverSampling; /*!< Specifies wether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
<> 149:156823d33999 94 This parameter can be a value of @ref UART_Over_Sampling */
<> 149:156823d33999 95 }UART_InitTypeDef;
<> 149:156823d33999 96
<> 149:156823d33999 97 /**
<> 149:156823d33999 98 * @brief HAL UART State structures definition
<> 149:156823d33999 99 */
<> 149:156823d33999 100 typedef enum
<> 149:156823d33999 101 {
<> 149:156823d33999 102 HAL_UART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */
<> 149:156823d33999 103 HAL_UART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
<> 149:156823d33999 104 HAL_UART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
<> 149:156823d33999 105 HAL_UART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
<> 149:156823d33999 106 HAL_UART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
<> 149:156823d33999 107 HAL_UART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
<> 149:156823d33999 108 HAL_UART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
<> 149:156823d33999 109 HAL_UART_STATE_ERROR = 0x04 /*!< Error */
<> 149:156823d33999 110 }HAL_UART_StateTypeDef;
<> 149:156823d33999 111
<> 149:156823d33999 112 /**
<> 149:156823d33999 113 * @brief UART handle Structure definition
<> 149:156823d33999 114 */
<> 149:156823d33999 115 typedef struct
<> 149:156823d33999 116 {
<> 149:156823d33999 117 USART_TypeDef *Instance; /*!< UART registers base address */
<> 149:156823d33999 118
<> 149:156823d33999 119 UART_InitTypeDef Init; /*!< UART communication parameters */
<> 149:156823d33999 120
<> 149:156823d33999 121 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
<> 149:156823d33999 122
<> 149:156823d33999 123 uint16_t TxXferSize; /*!< UART Tx Transfer size */
<> 149:156823d33999 124
<> 149:156823d33999 125 uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
<> 149:156823d33999 126
<> 149:156823d33999 127 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
<> 149:156823d33999 128
<> 149:156823d33999 129 uint16_t RxXferSize; /*!< UART Rx Transfer size */
<> 149:156823d33999 130
<> 149:156823d33999 131 uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
<> 149:156823d33999 132
<> 149:156823d33999 133 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
<> 149:156823d33999 134
<> 149:156823d33999 135 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
<> 149:156823d33999 136
<> 149:156823d33999 137 HAL_LockTypeDef Lock; /*!< Locking object */
<> 149:156823d33999 138
<> 149:156823d33999 139 __IO HAL_UART_StateTypeDef State; /*!< UART communication state */
<> 149:156823d33999 140
<> 149:156823d33999 141 __IO uint32_t ErrorCode; /*!< UART Error code */
<> 149:156823d33999 142
<> 149:156823d33999 143 }UART_HandleTypeDef;
<> 149:156823d33999 144
<> 149:156823d33999 145 /**
<> 149:156823d33999 146 * @}
<> 149:156823d33999 147 */
<> 149:156823d33999 148
<> 149:156823d33999 149 /* Exported constants --------------------------------------------------------*/
<> 149:156823d33999 150 /** @defgroup UART_Exported_Constants UART Exported constants
<> 149:156823d33999 151 * @{
<> 149:156823d33999 152 */
<> 149:156823d33999 153
<> 149:156823d33999 154 /** @defgroup UART_Error_Codes UART Error Codes
<> 149:156823d33999 155 * @{
<> 149:156823d33999 156 */
<> 149:156823d33999 157
AnnaBridge 184:08ed48f1de7f 158 #define HAL_UART_ERROR_NONE (0x00U) /*!< No error */
AnnaBridge 184:08ed48f1de7f 159 #define HAL_UART_ERROR_PE (0x01U) /*!< Parity error */
AnnaBridge 184:08ed48f1de7f 160 #define HAL_UART_ERROR_NE (0x02U) /*!< Noise error */
AnnaBridge 184:08ed48f1de7f 161 #define HAL_UART_ERROR_FE (0x04U) /*!< frame error */
AnnaBridge 184:08ed48f1de7f 162 #define HAL_UART_ERROR_ORE (0x08U) /*!< Overrun error */
AnnaBridge 184:08ed48f1de7f 163 #define HAL_UART_ERROR_DMA (0x10U) /*!< DMA transfer error */
<> 149:156823d33999 164
<> 149:156823d33999 165 /**
<> 149:156823d33999 166 * @}
<> 149:156823d33999 167 */
<> 149:156823d33999 168
<> 149:156823d33999 169 /** @defgroup UART_Word_Length UART Word Length
<> 149:156823d33999 170 * @{
<> 149:156823d33999 171 */
AnnaBridge 184:08ed48f1de7f 172 #define UART_WORDLENGTH_8B (0x00000000U)
<> 149:156823d33999 173 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 149:156823d33999 174 /**
<> 149:156823d33999 175 * @}
<> 149:156823d33999 176 */
<> 149:156823d33999 177
<> 149:156823d33999 178 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
<> 149:156823d33999 179 * @{
<> 149:156823d33999 180 */
AnnaBridge 184:08ed48f1de7f 181 #define UART_STOPBITS_1 (0x00000000U)
<> 149:156823d33999 182 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
<> 149:156823d33999 183 /**
<> 149:156823d33999 184 * @}
<> 149:156823d33999 185 */
<> 149:156823d33999 186
<> 149:156823d33999 187 /** @defgroup UART_Parity UART Parity
<> 149:156823d33999 188 * @{
<> 149:156823d33999 189 */
AnnaBridge 184:08ed48f1de7f 190 #define UART_PARITY_NONE (0x00000000U)
<> 149:156823d33999 191 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 149:156823d33999 192 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 149:156823d33999 193 /**
<> 149:156823d33999 194 * @}
<> 149:156823d33999 195 */
<> 149:156823d33999 196
<> 149:156823d33999 197 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
<> 149:156823d33999 198 * @{
<> 149:156823d33999 199 */
AnnaBridge 184:08ed48f1de7f 200 #define UART_HWCONTROL_NONE (0x00000000U)
<> 149:156823d33999 201 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
<> 149:156823d33999 202 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
<> 149:156823d33999 203 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
<> 149:156823d33999 204 /**
<> 149:156823d33999 205 * @}
<> 149:156823d33999 206 */
<> 149:156823d33999 207
<> 149:156823d33999 208 /** @defgroup UART_Mode UART Transfer Mode
<> 149:156823d33999 209 * @{
<> 149:156823d33999 210 */
<> 149:156823d33999 211 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
<> 149:156823d33999 212 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
<> 149:156823d33999 213 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 149:156823d33999 214
<> 149:156823d33999 215 /**
<> 149:156823d33999 216 * @}
<> 149:156823d33999 217 */
<> 149:156823d33999 218
<> 149:156823d33999 219 /** @defgroup UART_State UART State
<> 149:156823d33999 220 * @{
<> 149:156823d33999 221 */
AnnaBridge 184:08ed48f1de7f 222 #define UART_STATE_DISABLE (0x00000000U)
<> 149:156823d33999 223 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
<> 149:156823d33999 224 /**
<> 149:156823d33999 225 * @}
<> 149:156823d33999 226 */
<> 149:156823d33999 227
<> 149:156823d33999 228 /** @defgroup UART_Over_Sampling UART Over Sampling
<> 149:156823d33999 229 * @{
<> 149:156823d33999 230 */
AnnaBridge 184:08ed48f1de7f 231 #define UART_OVERSAMPLING_16 (0x00000000U)
<> 149:156823d33999 232 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
<> 149:156823d33999 233 /**
<> 149:156823d33999 234 * @}
<> 149:156823d33999 235 */
<> 149:156823d33999 236
<> 149:156823d33999 237 /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
<> 149:156823d33999 238 * @{
<> 149:156823d33999 239 */
AnnaBridge 184:08ed48f1de7f 240 #define UART_LINBREAKDETECTLENGTH_10B (0x00000000U)
<> 149:156823d33999 241 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
<> 149:156823d33999 242 /**
<> 149:156823d33999 243 * @}
<> 149:156823d33999 244 */
<> 149:156823d33999 245
<> 149:156823d33999 246 /** @defgroup UART_WakeUp_functions UART Wakeup Functions
<> 149:156823d33999 247 * @{
<> 149:156823d33999 248 */
AnnaBridge 184:08ed48f1de7f 249 #define UART_WAKEUPMETHOD_IDLELINE (0x00000000U)
<> 149:156823d33999 250 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
<> 149:156823d33999 251 /**
<> 149:156823d33999 252 * @}
<> 149:156823d33999 253 */
<> 149:156823d33999 254
<> 149:156823d33999 255 /** @defgroup UART_Flags UART FLags
<> 149:156823d33999 256 * Elements values convention: 0xXXXX
<> 149:156823d33999 257 * - 0xXXXX : Flag mask in the SR register
<> 149:156823d33999 258 * @{
<> 149:156823d33999 259 */
<> 149:156823d33999 260 #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
<> 149:156823d33999 261 #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
<> 149:156823d33999 262 #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
<> 149:156823d33999 263 #define UART_FLAG_TC ((uint32_t)USART_SR_TC)
<> 149:156823d33999 264 #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<> 149:156823d33999 265 #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<> 149:156823d33999 266 #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
<> 149:156823d33999 267 #define UART_FLAG_NE ((uint32_t)USART_SR_NE)
<> 149:156823d33999 268 #define UART_FLAG_FE ((uint32_t)USART_SR_FE)
<> 149:156823d33999 269 #define UART_FLAG_PE ((uint32_t)USART_SR_PE)
<> 149:156823d33999 270 /**
<> 149:156823d33999 271 * @}
<> 149:156823d33999 272 */
<> 149:156823d33999 273
<> 149:156823d33999 274 /** @defgroup UART_Interrupt_definition UART Interrupt Definitions
<> 149:156823d33999 275 * Elements values convention: 0xY000XXXX
<> 149:156823d33999 276 * - XXXX : Interrupt mask (16 bits) in the Y register
<> 149:156823d33999 277 * - Y : Interrupt source register (2bits)
<> 149:156823d33999 278 * - 0001: CR1 register
<> 149:156823d33999 279 * - 0010: CR2 register
<> 149:156823d33999 280 * - 0011: CR3 register
<> 149:156823d33999 281 *
<> 149:156823d33999 282 * @{
<> 149:156823d33999 283 */
<> 149:156823d33999 284
<> 149:156823d33999 285 #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_PEIE))
<> 149:156823d33999 286 #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_TXEIE))
<> 149:156823d33999 287 #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_TCIE))
<> 149:156823d33999 288 #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_RXNEIE))
<> 149:156823d33999 289 #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_IDLEIE))
<> 149:156823d33999 290
<> 149:156823d33999 291 #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28 | USART_CR2_LBDIE))
<> 149:156823d33999 292
<> 149:156823d33999 293 #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28 | USART_CR3_CTSIE))
<> 149:156823d33999 294 #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28 | USART_CR3_EIE))
<> 149:156823d33999 295
<> 149:156823d33999 296 /**
<> 149:156823d33999 297 * @}
<> 149:156823d33999 298 */
<> 149:156823d33999 299
<> 149:156823d33999 300 /**
<> 149:156823d33999 301 * @}
<> 149:156823d33999 302 */
<> 149:156823d33999 303
<> 149:156823d33999 304
<> 149:156823d33999 305 /* Exported macro ------------------------------------------------------------*/
<> 149:156823d33999 306 /** @defgroup UART_Exported_Macros UART Exported Macros
<> 149:156823d33999 307 * @{
<> 149:156823d33999 308 */
<> 149:156823d33999 309
<> 149:156823d33999 310
<> 149:156823d33999 311 /** @brief Reset UART handle state
<> 149:156823d33999 312 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 313 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 314 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 315 * @retval None
<> 149:156823d33999 316 */
<> 149:156823d33999 317 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET)
<> 149:156823d33999 318
<> 149:156823d33999 319 /** @brief Flush the UART DR register
<> 149:156823d33999 320 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 321 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 322 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 323 */
<> 149:156823d33999 324 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
<> 149:156823d33999 325
<> 149:156823d33999 326 /** @brief Check whether the specified UART flag is set or not.
<> 149:156823d33999 327 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 328 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 329 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 330 * @param __FLAG__: specifies the flag to check.
<> 149:156823d33999 331 * This parameter can be one of the following values:
<> 149:156823d33999 332 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
<> 149:156823d33999 333 * @arg UART_FLAG_LBD: LIN Break detection flag
<> 149:156823d33999 334 * @arg UART_FLAG_TXE: Transmit data register empty flag
<> 149:156823d33999 335 * @arg UART_FLAG_TC: Transmission Complete flag
<> 149:156823d33999 336 * @arg UART_FLAG_RXNE: Receive data register not empty flag
<> 149:156823d33999 337 * @arg UART_FLAG_IDLE: Idle Line detection flag
<> 149:156823d33999 338 * @arg UART_FLAG_ORE: OverRun Error flag
<> 149:156823d33999 339 * @arg UART_FLAG_NE: Noise Error flag
<> 149:156823d33999 340 * @arg UART_FLAG_FE: Framing Error flag
<> 149:156823d33999 341 * @arg UART_FLAG_PE: Parity Error flag
<> 149:156823d33999 342 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 149:156823d33999 343 */
<> 149:156823d33999 344 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 149:156823d33999 345
<> 149:156823d33999 346 /** @brief Clear the specified UART pending flag.
<> 149:156823d33999 347 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 348 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 349 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 350 * @param __FLAG__: specifies the flag to check.
<> 149:156823d33999 351 * This parameter can be any combination of the following values:
<> 149:156823d33999 352 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
<> 149:156823d33999 353 * @arg UART_FLAG_LBD: LIN Break detection flag.
<> 149:156823d33999 354 * @arg UART_FLAG_TC: Transmission Complete flag.
<> 149:156823d33999 355 * @arg UART_FLAG_RXNE: Receive data register not empty flag.
<> 149:156823d33999 356 *
<> 149:156823d33999 357 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
<> 149:156823d33999 358 * error) and IDLE (Idle line detected) flags are cleared by software
<> 149:156823d33999 359 * sequence: a read operation to USART_SR register followed by a read
<> 149:156823d33999 360 * operation to USART_DR register.
<> 149:156823d33999 361 * @note RXNE flag can be also cleared by a read to the USART_DR register.
<> 149:156823d33999 362 * @note TC flag can be also cleared by software sequence: a read operation to
<> 149:156823d33999 363 * USART_SR register followed by a write operation to USART_DR register.
<> 149:156823d33999 364 * @note TXE flag is cleared only by a write to the USART_DR register.
<> 149:156823d33999 365 *
<> 149:156823d33999 366 * @retval None
<> 149:156823d33999 367 */
<> 149:156823d33999 368 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 149:156823d33999 369
<> 149:156823d33999 370 /** @brief Clear the UART PE pending flag.
<> 149:156823d33999 371 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 372 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 373 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 374 * @retval None
<> 149:156823d33999 375 */
<> 149:156823d33999 376 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
<> 149:156823d33999 377 do{ \
<> 149:156823d33999 378 __IO uint32_t tmpreg; \
<> 149:156823d33999 379 tmpreg = (__HANDLE__)->Instance->SR; \
<> 149:156823d33999 380 tmpreg = (__HANDLE__)->Instance->DR; \
<> 149:156823d33999 381 UNUSED(tmpreg); \
<> 149:156823d33999 382 }while(0)
<> 149:156823d33999 383
<> 149:156823d33999 384
<> 149:156823d33999 385
<> 149:156823d33999 386 /** @brief Clear the UART FE pending flag.
<> 149:156823d33999 387 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 388 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 389 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 390 * @retval None
<> 149:156823d33999 391 */
<> 149:156823d33999 392 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 149:156823d33999 393
<> 149:156823d33999 394 /** @brief Clear the UART NE pending flag.
<> 149:156823d33999 395 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 396 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 397 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 398 * @retval None
<> 149:156823d33999 399 */
<> 149:156823d33999 400 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 149:156823d33999 401
<> 149:156823d33999 402 /** @brief Clear the UART ORE pending flag.
<> 149:156823d33999 403 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 404 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 405 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 406 * @retval None
<> 149:156823d33999 407 */
<> 149:156823d33999 408 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 149:156823d33999 409
<> 149:156823d33999 410 /** @brief Clear the UART IDLE pending flag.
<> 149:156823d33999 411 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 412 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 413 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 414 * @retval None
<> 149:156823d33999 415 */
<> 149:156823d33999 416 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 149:156823d33999 417
<> 149:156823d33999 418 /** @brief Enable the specified UART interrupt.
<> 149:156823d33999 419 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 420 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 421 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 422 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
<> 149:156823d33999 423 * This parameter can be one of the following values:
<> 149:156823d33999 424 * @arg UART_IT_CTS: CTS change interrupt
<> 149:156823d33999 425 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 149:156823d33999 426 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 149:156823d33999 427 * @arg UART_IT_TC: Transmission complete interrupt
<> 149:156823d33999 428 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 149:156823d33999 429 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 149:156823d33999 430 * @arg UART_IT_PE: Parity Error interrupt
<> 149:156823d33999 431 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 149:156823d33999 432 * @retval None
<> 149:156823d33999 433 */
<> 149:156823d33999 434 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
<> 149:156823d33999 435 (((__INTERRUPT__) >> 28) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
<> 149:156823d33999 436 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
<> 149:156823d33999 437
<> 149:156823d33999 438
<> 149:156823d33999 439 /** @brief Disable the specified UART interrupt.
<> 149:156823d33999 440 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 441 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 442 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 443 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
<> 149:156823d33999 444 * This parameter can be one of the following values:
<> 149:156823d33999 445 * @arg UART_IT_CTS: CTS change interrupt
<> 149:156823d33999 446 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 149:156823d33999 447 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 149:156823d33999 448 * @arg UART_IT_TC: Transmission complete interrupt
<> 149:156823d33999 449 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 149:156823d33999 450 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 149:156823d33999 451 * @arg UART_IT_PE: Parity Error interrupt
<> 149:156823d33999 452 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 149:156823d33999 453 * @retval None
<> 149:156823d33999 454 */
<> 149:156823d33999 455 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
<> 149:156823d33999 456 (((__INTERRUPT__) >> 28) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
<> 149:156823d33999 457 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
<> 149:156823d33999 458
<> 149:156823d33999 459 /** @brief Check whether the specified UART interrupt has occurred or not.
<> 149:156823d33999 460 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 461 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 462 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 463 * @param __IT__: specifies the UART interrupt source to check.
<> 149:156823d33999 464 * This parameter can be one of the following values:
<> 149:156823d33999 465 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
<> 149:156823d33999 466 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 149:156823d33999 467 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 149:156823d33999 468 * @arg UART_IT_TC: Transmission complete interrupt
<> 149:156823d33999 469 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 149:156823d33999 470 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 149:156823d33999 471 * @arg UART_IT_ERR: Error interrupt
<> 149:156823d33999 472 * @retval The new state of __IT__ (TRUE or FALSE).
<> 149:156823d33999 473 */
<> 149:156823d33999 474 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == UART_CR2_REG_INDEX)? \
<> 149:156823d33999 475 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
<> 149:156823d33999 476
<> 149:156823d33999 477 /** @brief macros to enables or disables the UART's one bit sampling method
<> 149:156823d33999 478 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 479 * This parameter can be USARTx with x: 1, 2 or 3, or UARTy with y:4 or 5 to select the USART or
<> 149:156823d33999 480 * UART peripheral (availability depending on device for UARTy).
<> 149:156823d33999 481 * @retval None
<> 149:156823d33999 482 */
<> 149:156823d33999 483 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
<> 149:156823d33999 484 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
<> 149:156823d33999 485
<> 149:156823d33999 486 /** @brief Enable CTS flow control
<> 149:156823d33999 487 * This macro allows to enable CTS hardware flow control for a given UART instance,
<> 149:156823d33999 488 * without need to call HAL_UART_Init() function.
<> 149:156823d33999 489 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 149:156823d33999 490 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
<> 149:156823d33999 491 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 149:156823d33999 492 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 149:156823d33999 493 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 149:156823d33999 494 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 149:156823d33999 495 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 496 * This parameter can be any USARTx (supporting the HW Flow control feature).
<> 149:156823d33999 497 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 149:156823d33999 498 * @retval None
<> 149:156823d33999 499 */
<> 149:156823d33999 500 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
<> 149:156823d33999 501 do{ \
<> 149:156823d33999 502 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
<> 149:156823d33999 503 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
<> 149:156823d33999 504 } while(0)
<> 149:156823d33999 505
<> 149:156823d33999 506 /** @brief Disable CTS flow control
<> 149:156823d33999 507 * This macro allows to disable CTS hardware flow control for a given UART instance,
<> 149:156823d33999 508 * without need to call HAL_UART_Init() function.
<> 149:156823d33999 509 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 149:156823d33999 510 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
<> 149:156823d33999 511 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 149:156823d33999 512 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 149:156823d33999 513 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 149:156823d33999 514 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 149:156823d33999 515 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 516 * This parameter can be any USARTx (supporting the HW Flow control feature).
<> 149:156823d33999 517 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 149:156823d33999 518 * @retval None
<> 149:156823d33999 519 */
<> 149:156823d33999 520 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
<> 149:156823d33999 521 do{ \
<> 149:156823d33999 522 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
<> 149:156823d33999 523 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
<> 149:156823d33999 524 } while(0)
<> 149:156823d33999 525
<> 149:156823d33999 526 /** @brief Enable RTS flow control
<> 149:156823d33999 527 * This macro allows to enable RTS hardware flow control for a given UART instance,
<> 149:156823d33999 528 * without need to call HAL_UART_Init() function.
<> 149:156823d33999 529 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 149:156823d33999 530 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
<> 149:156823d33999 531 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 149:156823d33999 532 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 149:156823d33999 533 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 149:156823d33999 534 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 149:156823d33999 535 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 536 * This parameter can be any USARTx (supporting the HW Flow control feature).
<> 149:156823d33999 537 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 149:156823d33999 538 * @retval None
<> 149:156823d33999 539 */
<> 149:156823d33999 540 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
<> 149:156823d33999 541 do{ \
<> 149:156823d33999 542 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
<> 149:156823d33999 543 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
<> 149:156823d33999 544 } while(0)
<> 149:156823d33999 545
<> 149:156823d33999 546 /** @brief Disable RTS flow control
<> 149:156823d33999 547 * This macro allows to disable RTS hardware flow control for a given UART instance,
<> 149:156823d33999 548 * without need to call HAL_UART_Init() function.
<> 149:156823d33999 549 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 149:156823d33999 550 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
<> 149:156823d33999 551 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 149:156823d33999 552 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 149:156823d33999 553 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 149:156823d33999 554 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 149:156823d33999 555 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 556 * This parameter can be any USARTx (supporting the HW Flow control feature).
<> 149:156823d33999 557 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 149:156823d33999 558 * @retval None
<> 149:156823d33999 559 */
<> 149:156823d33999 560 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
<> 149:156823d33999 561 do{ \
<> 149:156823d33999 562 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
<> 149:156823d33999 563 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
<> 149:156823d33999 564 } while(0)
<> 149:156823d33999 565
<> 149:156823d33999 566
<> 149:156823d33999 567 /** @brief Enable UART
<> 149:156823d33999 568 * @param __HANDLE__: specifies the UART Handle.
<> 149:156823d33999 569 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 570 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 571 * @retval None
<> 149:156823d33999 572 */
<> 149:156823d33999 573 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
<> 149:156823d33999 574
<> 149:156823d33999 575 /** @brief Disable UART
<> 149:156823d33999 576 * UART Handle selects the USARTx or UARTy peripheral
<> 149:156823d33999 577 * (USART,UART availability and x,y values depending on device).
<> 149:156823d33999 578 * @retval None
<> 149:156823d33999 579 */
<> 149:156823d33999 580 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
<> 149:156823d33999 581
<> 149:156823d33999 582 /**
<> 149:156823d33999 583 * @}
<> 149:156823d33999 584 */
<> 149:156823d33999 585
<> 149:156823d33999 586
<> 149:156823d33999 587 /* Private macros --------------------------------------------------------*/
<> 149:156823d33999 588 /** @defgroup UART_Private_Macros UART Private Macros
<> 149:156823d33999 589 * @{
<> 149:156823d33999 590 */
<> 149:156823d33999 591
<> 149:156823d33999 592 #define UART_CR1_REG_INDEX 1
<> 149:156823d33999 593 #define UART_CR2_REG_INDEX 2
<> 149:156823d33999 594 #define UART_CR3_REG_INDEX 3
<> 149:156823d33999 595
<> 149:156823d33999 596 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_)))
<> 149:156823d33999 597 #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100)
<> 149:156823d33999 598 #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
<> 149:156823d33999 599 /* UART BRR = mantissa + overflow + fraction
<> 149:156823d33999 600 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0F) */
<> 149:156823d33999 601 #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4) + \
<> 149:156823d33999 602 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0)) + \
<> 149:156823d33999 603 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0F))
<> 149:156823d33999 604 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25)/(2*(_BAUD_)))
<> 149:156823d33999 605 #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100)
<> 149:156823d33999 606 #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100)) * 8 + 50) / 100)
<> 149:156823d33999 607 /* UART BRR = mantissa + overflow + fraction
<> 149:156823d33999 608 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
<> 149:156823d33999 609 #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4) + \
<> 149:156823d33999 610 ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8) << 1)) + \
<> 149:156823d33999 611 (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07))
<> 149:156823d33999 612 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
<> 149:156823d33999 613 ((LENGTH) == UART_WORDLENGTH_9B))
<> 149:156823d33999 614 #define IS_UART_LIN_WORD_LENGTH(LENGTH) ((LENGTH) == UART_WORDLENGTH_8B)
<> 149:156823d33999 615
<> 149:156823d33999 616 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
<> 149:156823d33999 617 ((STOPBITS) == UART_STOPBITS_2))
<> 149:156823d33999 618
<> 149:156823d33999 619 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
<> 149:156823d33999 620 ((PARITY) == UART_PARITY_EVEN) || \
<> 149:156823d33999 621 ((PARITY) == UART_PARITY_ODD))
<> 149:156823d33999 622
<> 149:156823d33999 623 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
<> 149:156823d33999 624 (((CONTROL) == UART_HWCONTROL_NONE) || \
<> 149:156823d33999 625 ((CONTROL) == UART_HWCONTROL_RTS) || \
<> 149:156823d33999 626 ((CONTROL) == UART_HWCONTROL_CTS) || \
<> 149:156823d33999 627 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
<> 149:156823d33999 628
AnnaBridge 184:08ed48f1de7f 629 #define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)UART_MODE_TX_RX))) == 0x00U) && \
AnnaBridge 184:08ed48f1de7f 630 ((MODE) != 0x00000000U))
<> 149:156823d33999 631
<> 149:156823d33999 632 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
<> 149:156823d33999 633 ((STATE) == UART_STATE_ENABLE))
<> 149:156823d33999 634
<> 149:156823d33999 635 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
<> 149:156823d33999 636 ((SAMPLING) == UART_OVERSAMPLING_8))
<> 149:156823d33999 637 #define IS_UART_LIN_OVERSAMPLING(SAMPLING) ((SAMPLING) == UART_OVERSAMPLING_16)
<> 149:156823d33999 638
<> 149:156823d33999 639 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
<> 149:156823d33999 640 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
<> 149:156823d33999 641
<> 149:156823d33999 642 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
<> 149:156823d33999 643 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
<> 149:156823d33999 644
<> 149:156823d33999 645
<> 149:156823d33999 646 /** Check UART Baud rate
<> 149:156823d33999 647 * __BAUDRATE__: Baudrate specified by the user
<> 149:156823d33999 648 * The maximum Baud Rate is derived from the maximum clock on APB (i.e. 32 MHz)
<> 149:156823d33999 649 * divided by the smallest oversampling used on the USART (i.e. 8)
<> 149:156823d33999 650 * Return : TRUE or FALSE
<> 149:156823d33999 651 */
<> 149:156823d33999 652 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001)
<> 149:156823d33999 653
<> 149:156823d33999 654 /** Check UART Node Address
<> 149:156823d33999 655 * __ADDRESS__: UART Node address specified by the user
<> 149:156823d33999 656 * UART Node address is used in Multi processor communication for wakeup
<> 149:156823d33999 657 * with address mark detection.
<> 149:156823d33999 658 * This parameter must be a number between Min_Data = 0 and Max_Data = 15
<> 149:156823d33999 659 * Return : TRUE or FALSE
<> 149:156823d33999 660 */
<> 149:156823d33999 661 #define IS_UART_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)
<> 149:156823d33999 662
<> 149:156823d33999 663 /** UART interruptions flag mask
<> 149:156823d33999 664 */
<> 149:156823d33999 665 #define UART_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
<> 149:156823d33999 666 USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
<> 149:156823d33999 667
<> 149:156823d33999 668 /**
<> 149:156823d33999 669 * @}
<> 149:156823d33999 670 */
<> 149:156823d33999 671
<> 149:156823d33999 672 /* Exported functions --------------------------------------------------------*/
<> 149:156823d33999 673
<> 149:156823d33999 674 /** @addtogroup UART_Exported_Functions UART Exported Functions
<> 149:156823d33999 675 * @{
<> 149:156823d33999 676 */
<> 149:156823d33999 677
<> 149:156823d33999 678 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
<> 149:156823d33999 679 * @{
<> 149:156823d33999 680 */
<> 149:156823d33999 681
<> 149:156823d33999 682 /* Initialization and de-initialization functions ****************************/
<> 149:156823d33999 683 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
<> 149:156823d33999 684 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
<> 149:156823d33999 685 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
<> 149:156823d33999 686 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
<> 149:156823d33999 687 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
<> 149:156823d33999 688 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
<> 149:156823d33999 689 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
<> 149:156823d33999 690
<> 149:156823d33999 691 /**
<> 149:156823d33999 692 * @}
<> 149:156823d33999 693 */
<> 149:156823d33999 694
<> 149:156823d33999 695 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
<> 149:156823d33999 696 * @{
<> 149:156823d33999 697 */
<> 149:156823d33999 698
<> 149:156823d33999 699 /* IO operation functions *****************************************************/
<> 149:156823d33999 700 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 701 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 149:156823d33999 702 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 703 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 704 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 705 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 149:156823d33999 706 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
<> 149:156823d33999 707 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
<> 149:156823d33999 708 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
<> 149:156823d33999 709 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
<> 149:156823d33999 710 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
<> 149:156823d33999 711 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
<> 149:156823d33999 712 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
<> 149:156823d33999 713 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
<> 149:156823d33999 714 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
<> 149:156823d33999 715
<> 149:156823d33999 716 /**
<> 149:156823d33999 717 * @}
<> 149:156823d33999 718 */
<> 149:156823d33999 719
<> 149:156823d33999 720 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
<> 149:156823d33999 721 * @{
<> 149:156823d33999 722 */
<> 149:156823d33999 723
<> 149:156823d33999 724 /* Peripheral Control functions ************************************************/
<> 149:156823d33999 725 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
<> 149:156823d33999 726 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
<> 149:156823d33999 727 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
<> 149:156823d33999 728 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
<> 149:156823d33999 729 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
<> 149:156823d33999 730
<> 149:156823d33999 731 /**
<> 149:156823d33999 732 * @}
<> 149:156823d33999 733 */
<> 149:156823d33999 734
<> 149:156823d33999 735 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Errors functions
<> 149:156823d33999 736 * @{
<> 149:156823d33999 737 */
<> 149:156823d33999 738
<> 149:156823d33999 739 /* Peripheral State and Errors functions **************************************************/
<> 149:156823d33999 740 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
<> 149:156823d33999 741 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
<> 149:156823d33999 742
<> 149:156823d33999 743 /**
<> 149:156823d33999 744 * @}
<> 149:156823d33999 745 */
<> 149:156823d33999 746
<> 149:156823d33999 747 /**
<> 149:156823d33999 748 * @}
<> 149:156823d33999 749 */
<> 149:156823d33999 750
<> 149:156823d33999 751 /**
<> 149:156823d33999 752 * @}
<> 149:156823d33999 753 */
<> 149:156823d33999 754
<> 149:156823d33999 755 /**
<> 149:156823d33999 756 * @}
<> 149:156823d33999 757 */
<> 149:156823d33999 758
<> 149:156823d33999 759 #ifdef __cplusplus
<> 149:156823d33999 760 }
<> 149:156823d33999 761 #endif
<> 149:156823d33999 762
<> 149:156823d33999 763 #endif /* __STM32L1xx_HAL_UART_H */
<> 149:156823d33999 764
<> 149:156823d33999 765 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/