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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_iwdg.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
184:08ed48f1de7f 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_hal_iwdg.c
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @brief IWDG HAL module driver.
<> 149:156823d33999 6 * This file provides firmware functions to manage the following
<> 149:156823d33999 7 * functionalities of the Independent Watchdog (IWDG) peripheral:
<> 149:156823d33999 8 * + Initialization and Start functions
<> 149:156823d33999 9 * + IO operation functions
<> 149:156823d33999 10 *
<> 149:156823d33999 11 @verbatim
<> 149:156823d33999 12 ==============================================================================
<> 149:156823d33999 13 ##### IWDG Generic features #####
<> 149:156823d33999 14 ==============================================================================
<> 149:156823d33999 15 [..]
<> 149:156823d33999 16 (+) The IWDG can be started by either software or hardware (configurable
<> 149:156823d33999 17 through option byte).
<> 149:156823d33999 18
<> 149:156823d33999 19 (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
<> 149:156823d33999 20 if the main clock fails.
<> 149:156823d33999 21
<> 149:156823d33999 22 (+) Once the IWDG is started, the LSI is forced ON and both can not be
<> 149:156823d33999 23 disabled. The counter starts counting down from the reset value (0xFFF).
<> 149:156823d33999 24 When it reaches the end of count value (0x000) a reset signal is
<> 149:156823d33999 25 generated (IWDG reset).
<> 149:156823d33999 26
<> 149:156823d33999 27 (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
<> 149:156823d33999 28 the IWDG_RLR value is reloaded in the counter and the watchdog reset is
<> 149:156823d33999 29 prevented.
<> 149:156823d33999 30
<> 149:156823d33999 31 (+) The IWDG is implemented in the VDD voltage domain that is still functional
<> 149:156823d33999 32 in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
<> 149:156823d33999 33 IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
<> 149:156823d33999 34 reset occurs.
<> 149:156823d33999 35
<> 149:156823d33999 36 (+) Debug mode : When the microcontroller enters debug mode (core halted),
<> 149:156823d33999 37 the IWDG counter either continues to work normally or stops, depending
<> 149:156823d33999 38 on DBG_IWDG_STOP configuration bit in DBG module, accessible through
<> 149:156823d33999 39 __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
<> 149:156823d33999 40
<> 149:156823d33999 41 (+) Min-max timeout value @37KHz (LSI): ~108us / ~28.3s
<> 149:156823d33999 42 The IWDG timeout may vary due to LSI frequency dispersion. STM32L1xx
<> 149:156823d33999 43 devices provide the capability to measure the LSI frequency (LSI clock
<> 149:156823d33999 44 connected internally to TIM10 CH1 input capture). The measured value
<> 149:156823d33999 45 can be used to have an IWDG timeout with an acceptable accuracy.
<> 149:156823d33999 46 For more information, please refer to the STM32L1xx Reference manual.
<> 149:156823d33999 47
<> 149:156823d33999 48 ##### How to use this driver #####
<> 149:156823d33999 49 ==============================================================================
<> 149:156823d33999 50 [..]
<> 149:156823d33999 51 (#) Use IWDG using HAL_IWDG_Init() function to :
<> 149:156823d33999 52 (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
<> 149:156823d33999 53 clock is forced ON and IWDG counter starts downcounting.
<> 149:156823d33999 54 (++) Enable write access to configuration register: IWDG_PR, IWDG_RLR.
<> 149:156823d33999 55 (++) Configure the IWDG prescaler and counter reload value. This reload
<> 149:156823d33999 56 value will be loaded in the IWDG counter each time the watchdog is
<> 149:156823d33999 57 reloaded, then the IWDG will start counting down from this value.
<> 149:156823d33999 58 (++) wait for status flags to be reset"
<> 149:156823d33999 59
<> 149:156823d33999 60 (#) Then the application program must refresh the IWDG counter at regular
<> 149:156823d33999 61 intervals during normal operation to prevent an MCU reset, using
<> 149:156823d33999 62 HAL_IWDG_Refresh() function.
<> 149:156823d33999 63
<> 149:156823d33999 64 *** IWDG HAL driver macros list ***
<> 149:156823d33999 65 ====================================
<> 149:156823d33999 66 [..]
<> 149:156823d33999 67 Below the list of most used macros in IWDG HAL driver:
<> 149:156823d33999 68 (+) __HAL_IWDG_START: Enable the IWDG peripheral
<> 149:156823d33999 69 (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
<> 149:156823d33999 70 the reload register
<> 149:156823d33999 71
<> 149:156823d33999 72 @endverbatim
<> 149:156823d33999 73 ******************************************************************************
<> 149:156823d33999 74 * @attention
<> 149:156823d33999 75 *
AnnaBridge 184:08ed48f1de7f 76 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 149:156823d33999 77 *
<> 149:156823d33999 78 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 79 * are permitted provided that the following conditions are met:
<> 149:156823d33999 80 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 81 * this list of conditions and the following disclaimer.
<> 149:156823d33999 82 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 83 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 84 * and/or other materials provided with the distribution.
<> 149:156823d33999 85 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 86 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 87 * without specific prior written permission.
<> 149:156823d33999 88 *
<> 149:156823d33999 89 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 90 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 91 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 92 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 93 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 94 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 95 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 96 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 97 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 98 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 99 *
<> 149:156823d33999 100 ******************************************************************************
<> 149:156823d33999 101 */
<> 149:156823d33999 102
<> 149:156823d33999 103 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 104 #include "stm32l1xx_hal.h"
<> 149:156823d33999 105
<> 149:156823d33999 106 /** @addtogroup STM32L1xx_HAL_Driver
<> 149:156823d33999 107 * @{
<> 149:156823d33999 108 */
<> 149:156823d33999 109
<> 149:156823d33999 110 #ifdef HAL_IWDG_MODULE_ENABLED
<> 149:156823d33999 111 /** @addtogroup IWDG
<> 149:156823d33999 112 * @brief IWDG HAL module driver.
<> 149:156823d33999 113 * @{
<> 149:156823d33999 114 */
<> 149:156823d33999 115
<> 149:156823d33999 116 /* Private typedef -----------------------------------------------------------*/
<> 149:156823d33999 117 /* Private define ------------------------------------------------------------*/
<> 149:156823d33999 118 /** @defgroup IWDG_Private_Defines IWDG Private Defines
<> 149:156823d33999 119 * @{
<> 149:156823d33999 120 */
<> 149:156823d33999 121 /* Status register need 5 RC LSI divided by prescaler clock to be updated. With
<> 149:156823d33999 122 higher prescaler (256), and according to HSI variation, we need to wait at
<> 149:156823d33999 123 least 6 cycles so 48 ms. */
<> 149:156823d33999 124 #define HAL_IWDG_DEFAULT_TIMEOUT 48u
<> 149:156823d33999 125 /**
<> 149:156823d33999 126 * @}
<> 149:156823d33999 127 */
<> 149:156823d33999 128
<> 149:156823d33999 129 /* Private macro -------------------------------------------------------------*/
<> 149:156823d33999 130 /* Private variables ---------------------------------------------------------*/
<> 149:156823d33999 131 /* Private function prototypes -----------------------------------------------*/
<> 149:156823d33999 132 /* Exported functions --------------------------------------------------------*/
<> 149:156823d33999 133
<> 149:156823d33999 134 /** @addtogroup IWDG_Exported_Functions
<> 149:156823d33999 135 * @{
<> 149:156823d33999 136 */
<> 149:156823d33999 137
<> 149:156823d33999 138 /** @addtogroup IWDG_Exported_Functions_Group1
<> 149:156823d33999 139 * @brief Initialization and Start functions.
<> 149:156823d33999 140 *
<> 149:156823d33999 141 @verbatim
<> 149:156823d33999 142 ===============================================================================
<> 149:156823d33999 143 ##### Initialization and Start functions #####
<> 149:156823d33999 144 ===============================================================================
<> 149:156823d33999 145 [..] This section provides functions allowing to:
<> 149:156823d33999 146 (+) Initialize the IWDG according to the specified parameters in the
<> 149:156823d33999 147 IWDG_InitTypeDef of associated handle.
<> 149:156823d33999 148 (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
<> 149:156823d33999 149 is reloaded in order to exit function with correct time base.
<> 149:156823d33999 150
<> 149:156823d33999 151 @endverbatim
<> 149:156823d33999 152 * @{
<> 149:156823d33999 153 */
<> 149:156823d33999 154
<> 149:156823d33999 155 /**
<> 149:156823d33999 156 * @brief Initialize the IWDG according to the specified parameters in the
<> 149:156823d33999 157 * IWDG_InitTypeDef and start watchdog. Before exiting function,
<> 149:156823d33999 158 * watchdog is refreshed in order to have correct time base.
<> 149:156823d33999 159 * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
<> 149:156823d33999 160 * the configuration information for the specified IWDG module.
<> 149:156823d33999 161 * @retval HAL status
<> 149:156823d33999 162 */
<> 149:156823d33999 163 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
<> 149:156823d33999 164 {
<> 149:156823d33999 165 uint32_t tickstart;
<> 149:156823d33999 166
<> 149:156823d33999 167 /* Check the IWDG handle allocation */
<> 149:156823d33999 168 if(hiwdg == NULL)
<> 149:156823d33999 169 {
<> 149:156823d33999 170 return HAL_ERROR;
<> 149:156823d33999 171 }
<> 149:156823d33999 172
<> 149:156823d33999 173 /* Check the parameters */
<> 149:156823d33999 174 assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
<> 149:156823d33999 175 assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
<> 149:156823d33999 176 assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
<> 149:156823d33999 177
<> 149:156823d33999 178 /* Enable IWDG. LSI is turned on automaticaly */
<> 149:156823d33999 179 __HAL_IWDG_START(hiwdg);
<> 149:156823d33999 180
<> 149:156823d33999 181 /* Enable write access to IWDG_PR, IWDG_RLR registers by writing
<> 149:156823d33999 182 0x5555 in KR */
<> 149:156823d33999 183 IWDG_ENABLE_WRITE_ACCESS(hiwdg);
<> 149:156823d33999 184
<> 149:156823d33999 185 /* Write to IWDG registers the Prescaler & Reload values to work with */
<> 149:156823d33999 186 hiwdg->Instance->PR = hiwdg->Init.Prescaler;
<> 149:156823d33999 187 hiwdg->Instance->RLR = hiwdg->Init.Reload;
<> 149:156823d33999 188
<> 149:156823d33999 189 /* Check pending flag, if previous update not done, return timeout */
<> 149:156823d33999 190 tickstart = HAL_GetTick();
<> 149:156823d33999 191
<> 149:156823d33999 192 /* Wait for register to be updated */
<> 149:156823d33999 193 while(hiwdg->Instance->SR != RESET)
<> 149:156823d33999 194 {
<> 149:156823d33999 195 if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT)
<> 149:156823d33999 196 {
<> 149:156823d33999 197 return HAL_TIMEOUT;
<> 149:156823d33999 198 }
<> 149:156823d33999 199 }
<> 149:156823d33999 200
<> 149:156823d33999 201 /* Reload IWDG counter with value defined in the reload register */
<> 149:156823d33999 202 __HAL_IWDG_RELOAD_COUNTER(hiwdg);
<> 149:156823d33999 203
<> 149:156823d33999 204 /* Return function status */
<> 149:156823d33999 205 return HAL_OK;
<> 149:156823d33999 206 }
<> 149:156823d33999 207
<> 149:156823d33999 208 /**
<> 149:156823d33999 209 * @}
<> 149:156823d33999 210 */
<> 149:156823d33999 211
<> 149:156823d33999 212
<> 149:156823d33999 213 /** @addtogroup IWDG_Exported_Functions_Group2
<> 149:156823d33999 214 * @brief IO operation functions
<> 149:156823d33999 215 *
<> 149:156823d33999 216 @verbatim
<> 149:156823d33999 217 ===============================================================================
<> 149:156823d33999 218 ##### IO operation functions #####
<> 149:156823d33999 219 ===============================================================================
<> 149:156823d33999 220 [..] This section provides functions allowing to:
<> 149:156823d33999 221 (+) Refresh the IWDG.
<> 149:156823d33999 222
<> 149:156823d33999 223 @endverbatim
<> 149:156823d33999 224 * @{
<> 149:156823d33999 225 */
<> 149:156823d33999 226
<> 149:156823d33999 227
<> 149:156823d33999 228 /**
<> 149:156823d33999 229 * @brief Refresh the IWDG.
<> 149:156823d33999 230 * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
<> 149:156823d33999 231 * the configuration information for the specified IWDG module.
<> 149:156823d33999 232 * @retval HAL status
<> 149:156823d33999 233 */
<> 149:156823d33999 234 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
<> 149:156823d33999 235 {
<> 149:156823d33999 236 /* Reload IWDG counter with value defined in the reload register */
<> 149:156823d33999 237 __HAL_IWDG_RELOAD_COUNTER(hiwdg);
<> 149:156823d33999 238
<> 149:156823d33999 239 /* Return function status */
<> 149:156823d33999 240 return HAL_OK;
<> 149:156823d33999 241 }
<> 149:156823d33999 242
<> 149:156823d33999 243 /**
<> 149:156823d33999 244 * @}
<> 149:156823d33999 245 */
<> 149:156823d33999 246
<> 149:156823d33999 247 /**
<> 149:156823d33999 248 * @}
<> 149:156823d33999 249 */
<> 149:156823d33999 250
<> 149:156823d33999 251 #endif /* HAL_IWDG_MODULE_ENABLED */
<> 149:156823d33999 252 /**
<> 149:156823d33999 253 * @}
<> 149:156823d33999 254 */
<> 149:156823d33999 255
<> 149:156823d33999 256 /**
<> 149:156823d33999 257 * @}
<> 149:156823d33999 258 */
<> 149:156823d33999 259
<> 149:156823d33999 260 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 149:156823d33999 261