mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/TARGET_NUCLEO_F412ZG/PeripheralNames.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 188:bcfe06ba3d64
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 153:fa9ff456f731 | 1 | /* mbed Microcontroller Library |
<> | 153:fa9ff456f731 | 2 | * Copyright (c) 2016 ARM Limited |
<> | 153:fa9ff456f731 | 3 | * |
<> | 153:fa9ff456f731 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 153:fa9ff456f731 | 5 | * you may not use this file except in compliance with the License. |
<> | 153:fa9ff456f731 | 6 | * You may obtain a copy of the License at |
<> | 153:fa9ff456f731 | 7 | * |
<> | 153:fa9ff456f731 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 153:fa9ff456f731 | 9 | * |
<> | 153:fa9ff456f731 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 153:fa9ff456f731 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 153:fa9ff456f731 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 153:fa9ff456f731 | 13 | * See the License for the specific language governing permissions and |
<> | 153:fa9ff456f731 | 14 | * limitations under the License. |
<> | 153:fa9ff456f731 | 15 | */ |
<> | 153:fa9ff456f731 | 16 | #ifndef MBED_PERIPHERALNAMES_H |
<> | 153:fa9ff456f731 | 17 | #define MBED_PERIPHERALNAMES_H |
<> | 153:fa9ff456f731 | 18 | |
<> | 153:fa9ff456f731 | 19 | #include "cmsis.h" |
<> | 153:fa9ff456f731 | 20 | |
<> | 153:fa9ff456f731 | 21 | #ifdef __cplusplus |
<> | 153:fa9ff456f731 | 22 | extern "C" { |
<> | 153:fa9ff456f731 | 23 | #endif |
<> | 153:fa9ff456f731 | 24 | |
<> | 153:fa9ff456f731 | 25 | typedef enum { |
<> | 153:fa9ff456f731 | 26 | ADC_1 = (int)ADC1_BASE |
<> | 153:fa9ff456f731 | 27 | } ADCName; |
<> | 153:fa9ff456f731 | 28 | |
<> | 153:fa9ff456f731 | 29 | typedef enum { |
<> | 153:fa9ff456f731 | 30 | UART_1 = (int)USART1_BASE, |
<> | 153:fa9ff456f731 | 31 | UART_2 = (int)USART2_BASE, |
<> | 153:fa9ff456f731 | 32 | UART_3 = (int)USART3_BASE, |
<> | 153:fa9ff456f731 | 33 | UART_6 = (int)USART6_BASE |
<> | 153:fa9ff456f731 | 34 | } UARTName; |
<> | 153:fa9ff456f731 | 35 | |
<> | 153:fa9ff456f731 | 36 | typedef enum { |
<> | 153:fa9ff456f731 | 37 | SPI_1 = (int)SPI1_BASE, |
<> | 153:fa9ff456f731 | 38 | SPI_2 = (int)SPI2_BASE, |
<> | 153:fa9ff456f731 | 39 | SPI_3 = (int)SPI3_BASE, |
<> | 153:fa9ff456f731 | 40 | SPI_4 = (int)SPI4_BASE, |
<> | 153:fa9ff456f731 | 41 | SPI_5 = (int)SPI5_BASE |
<> | 153:fa9ff456f731 | 42 | } SPIName; |
<> | 153:fa9ff456f731 | 43 | |
<> | 153:fa9ff456f731 | 44 | typedef enum { |
<> | 153:fa9ff456f731 | 45 | I2C_1 = (int)I2C1_BASE, |
<> | 153:fa9ff456f731 | 46 | I2C_2 = (int)I2C2_BASE, |
<> | 153:fa9ff456f731 | 47 | I2C_3 = (int)I2C3_BASE, |
<> | 153:fa9ff456f731 | 48 | FMPI2C_1 = (int)FMPI2C1_BASE |
<> | 153:fa9ff456f731 | 49 | } I2CName; |
<> | 153:fa9ff456f731 | 50 | |
<> | 153:fa9ff456f731 | 51 | typedef enum { |
<> | 153:fa9ff456f731 | 52 | PWM_1 = (int)TIM1_BASE, |
<> | 153:fa9ff456f731 | 53 | PWM_2 = (int)TIM2_BASE, |
<> | 153:fa9ff456f731 | 54 | PWM_3 = (int)TIM3_BASE, |
<> | 153:fa9ff456f731 | 55 | PWM_4 = (int)TIM4_BASE, |
<> | 153:fa9ff456f731 | 56 | PWM_5 = (int)TIM5_BASE, |
<> | 153:fa9ff456f731 | 57 | PWM_8 = (int)TIM8_BASE, |
<> | 153:fa9ff456f731 | 58 | PWM_9 = (int)TIM9_BASE, |
<> | 153:fa9ff456f731 | 59 | PWM_10 = (int)TIM10_BASE, |
<> | 153:fa9ff456f731 | 60 | PWM_11 = (int)TIM11_BASE, |
<> | 153:fa9ff456f731 | 61 | PWM_12 = (int)TIM12_BASE, |
<> | 153:fa9ff456f731 | 62 | PWM_13 = (int)TIM13_BASE, |
<> | 153:fa9ff456f731 | 63 | PWM_14 = (int)TIM14_BASE |
<> | 153:fa9ff456f731 | 64 | } PWMName; |
<> | 153:fa9ff456f731 | 65 | |
<> | 153:fa9ff456f731 | 66 | typedef enum { |
<> | 153:fa9ff456f731 | 67 | CAN_1 = (int)CAN1_BASE, |
<> | 153:fa9ff456f731 | 68 | CAN_2 = (int)CAN2_BASE |
<> | 153:fa9ff456f731 | 69 | } CANName; |
<> | 153:fa9ff456f731 | 70 | |
AnnaBridge | 188:bcfe06ba3d64 | 71 | typedef enum { |
AnnaBridge | 188:bcfe06ba3d64 | 72 | QSPI_1 = (int)QSPI_R_BASE, |
AnnaBridge | 188:bcfe06ba3d64 | 73 | } QSPIName; |
AnnaBridge | 188:bcfe06ba3d64 | 74 | |
<> | 153:fa9ff456f731 | 75 | #ifdef __cplusplus |
<> | 153:fa9ff456f731 | 76 | } |
<> | 153:fa9ff456f731 | 77 | #endif |
<> | 153:fa9ff456f731 | 78 | |
<> | 153:fa9ff456f731 | 79 | #endif |