mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_rcc.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
167:e84263d55307 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:e84263d55307 1 /**
AnnaBridge 167:e84263d55307 2 ******************************************************************************
AnnaBridge 167:e84263d55307 3 * @file stm32f2xx_ll_rcc.c
AnnaBridge 167:e84263d55307 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.2.1
AnnaBridge 167:e84263d55307 6 * @date 14-April-2017
AnnaBridge 167:e84263d55307 7 * @brief RCC LL module driver.
AnnaBridge 167:e84263d55307 8 ******************************************************************************
AnnaBridge 167:e84263d55307 9 * @attention
AnnaBridge 167:e84263d55307 10 *
AnnaBridge 167:e84263d55307 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 167:e84263d55307 12 *
AnnaBridge 167:e84263d55307 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 167:e84263d55307 14 * are permitted provided that the following conditions are met:
AnnaBridge 167:e84263d55307 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 167:e84263d55307 16 * this list of conditions and the following disclaimer.
AnnaBridge 167:e84263d55307 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 167:e84263d55307 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 167:e84263d55307 19 * and/or other materials provided with the distribution.
AnnaBridge 167:e84263d55307 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 167:e84263d55307 21 * may be used to endorse or promote products derived from this software
AnnaBridge 167:e84263d55307 22 * without specific prior written permission.
AnnaBridge 167:e84263d55307 23 *
AnnaBridge 167:e84263d55307 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 167:e84263d55307 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 167:e84263d55307 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 167:e84263d55307 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 167:e84263d55307 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 167:e84263d55307 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 167:e84263d55307 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 167:e84263d55307 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 167:e84263d55307 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 167:e84263d55307 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 167:e84263d55307 34 *
AnnaBridge 167:e84263d55307 35 ******************************************************************************
AnnaBridge 167:e84263d55307 36 */
AnnaBridge 167:e84263d55307 37 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 167:e84263d55307 38
AnnaBridge 167:e84263d55307 39 /* Includes ------------------------------------------------------------------*/
AnnaBridge 167:e84263d55307 40 #include "stm32f2xx_ll_rcc.h"
AnnaBridge 167:e84263d55307 41 #ifdef USE_FULL_ASSERT
AnnaBridge 167:e84263d55307 42 #include "stm32_assert.h"
AnnaBridge 167:e84263d55307 43 #else
AnnaBridge 167:e84263d55307 44 #define assert_param(expr) ((void)0U)
AnnaBridge 167:e84263d55307 45 #endif
AnnaBridge 167:e84263d55307 46 /** @addtogroup STM32F2xx_LL_Driver
AnnaBridge 167:e84263d55307 47 * @{
AnnaBridge 167:e84263d55307 48 */
AnnaBridge 167:e84263d55307 49
AnnaBridge 167:e84263d55307 50 #if defined(RCC)
AnnaBridge 167:e84263d55307 51
AnnaBridge 167:e84263d55307 52 /** @addtogroup RCC_LL
AnnaBridge 167:e84263d55307 53 * @{
AnnaBridge 167:e84263d55307 54 */
AnnaBridge 167:e84263d55307 55
AnnaBridge 167:e84263d55307 56 /* Private types -------------------------------------------------------------*/
AnnaBridge 167:e84263d55307 57 /* Private variables ---------------------------------------------------------*/
AnnaBridge 167:e84263d55307 58 /* Private constants ---------------------------------------------------------*/
AnnaBridge 167:e84263d55307 59 /* Private macros ------------------------------------------------------------*/
AnnaBridge 167:e84263d55307 60 /** @addtogroup RCC_LL_Private_Macros
AnnaBridge 167:e84263d55307 61 * @{
AnnaBridge 167:e84263d55307 62 */
AnnaBridge 167:e84263d55307 63 #define IS_LL_RCC_I2S_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_I2S1_CLKSOURCE))
AnnaBridge 167:e84263d55307 64 /**
AnnaBridge 167:e84263d55307 65 * @}
AnnaBridge 167:e84263d55307 66 */
AnnaBridge 167:e84263d55307 67
AnnaBridge 167:e84263d55307 68 /* Private function prototypes -----------------------------------------------*/
AnnaBridge 167:e84263d55307 69 /** @defgroup RCC_LL_Private_Functions RCC Private functions
AnnaBridge 167:e84263d55307 70 * @{
AnnaBridge 167:e84263d55307 71 */
AnnaBridge 167:e84263d55307 72 uint32_t RCC_GetSystemClockFreq(void);
AnnaBridge 167:e84263d55307 73 uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
AnnaBridge 167:e84263d55307 74 uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
AnnaBridge 167:e84263d55307 75 uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency);
AnnaBridge 167:e84263d55307 76 uint32_t RCC_PLL_GetFreqDomain_SYS(void);
AnnaBridge 167:e84263d55307 77 uint32_t RCC_PLL_GetFreqDomain_48M(void);
AnnaBridge 167:e84263d55307 78 uint32_t RCC_PLLI2S_GetFreqDomain_I2S(void);
AnnaBridge 167:e84263d55307 79 /**
AnnaBridge 167:e84263d55307 80 * @}
AnnaBridge 167:e84263d55307 81 */
AnnaBridge 167:e84263d55307 82
AnnaBridge 167:e84263d55307 83 /* Exported functions --------------------------------------------------------*/
AnnaBridge 167:e84263d55307 84 /** @addtogroup RCC_LL_Exported_Functions
AnnaBridge 167:e84263d55307 85 * @{
AnnaBridge 167:e84263d55307 86 */
AnnaBridge 167:e84263d55307 87
AnnaBridge 167:e84263d55307 88 /** @addtogroup RCC_LL_EF_Init
AnnaBridge 167:e84263d55307 89 * @{
AnnaBridge 167:e84263d55307 90 */
AnnaBridge 167:e84263d55307 91
AnnaBridge 167:e84263d55307 92 /**
AnnaBridge 167:e84263d55307 93 * @brief Reset the RCC clock configuration to the default reset state.
AnnaBridge 167:e84263d55307 94 * @note The default reset state of the clock configuration is given below:
AnnaBridge 167:e84263d55307 95 * - HSI ON and used as system clock source
AnnaBridge 167:e84263d55307 96 * - HSE and PLL OFF
AnnaBridge 167:e84263d55307 97 * - AHB, APB1 and APB2 prescaler set to 1.
AnnaBridge 167:e84263d55307 98 * - CSS, MCO OFF
AnnaBridge 167:e84263d55307 99 * - All interrupts disabled
AnnaBridge 167:e84263d55307 100 * @note This function doesn't modify the configuration of the
AnnaBridge 167:e84263d55307 101 * - Peripheral clocks
AnnaBridge 167:e84263d55307 102 * - LSI, LSE and RTC clocks
AnnaBridge 167:e84263d55307 103 * @retval An ErrorStatus enumeration value:
AnnaBridge 167:e84263d55307 104 * - SUCCESS: RCC registers are de-initialized
AnnaBridge 167:e84263d55307 105 * - ERROR: not applicable
AnnaBridge 167:e84263d55307 106 */
AnnaBridge 167:e84263d55307 107 ErrorStatus LL_RCC_DeInit(void)
AnnaBridge 167:e84263d55307 108 {
AnnaBridge 167:e84263d55307 109 uint32_t vl_mask = 0U;
AnnaBridge 167:e84263d55307 110
AnnaBridge 167:e84263d55307 111 /* Set HSION bit */
AnnaBridge 167:e84263d55307 112 LL_RCC_HSI_Enable();
AnnaBridge 167:e84263d55307 113
AnnaBridge 167:e84263d55307 114 /* Reset CFGR register */
AnnaBridge 167:e84263d55307 115 LL_RCC_WriteReg(CFGR, 0x00000000U);
AnnaBridge 167:e84263d55307 116
AnnaBridge 167:e84263d55307 117 vl_mask = 0xFFFFFFFFU;
AnnaBridge 167:e84263d55307 118
AnnaBridge 167:e84263d55307 119 /* Reset HSEON, PLLSYSON bits */
AnnaBridge 167:e84263d55307 120 CLEAR_BIT(vl_mask, (RCC_CR_HSEON | RCC_CR_HSEBYP | RCC_CR_PLLON | RCC_CR_CSSON));
AnnaBridge 167:e84263d55307 121
AnnaBridge 167:e84263d55307 122 /* Reset PLLI2SON bit */
AnnaBridge 167:e84263d55307 123 CLEAR_BIT(vl_mask, RCC_CR_PLLI2SON);
AnnaBridge 167:e84263d55307 124
AnnaBridge 167:e84263d55307 125 /* Write new mask in CR register */
AnnaBridge 167:e84263d55307 126 LL_RCC_WriteReg(CR, vl_mask);
AnnaBridge 167:e84263d55307 127
AnnaBridge 167:e84263d55307 128 /* Set HSITRIM bits to the reset value*/
AnnaBridge 167:e84263d55307 129 LL_RCC_HSI_SetCalibTrimming(0x10U);
AnnaBridge 167:e84263d55307 130
AnnaBridge 167:e84263d55307 131 /* Reset PLLCFGR register */
AnnaBridge 167:e84263d55307 132 LL_RCC_WriteReg(PLLCFGR, 0x24003010U);
AnnaBridge 167:e84263d55307 133
AnnaBridge 167:e84263d55307 134 /* Reset PLLI2SCFGR register */
AnnaBridge 167:e84263d55307 135 LL_RCC_WriteReg(PLLI2SCFGR, 0x20003000U);
AnnaBridge 167:e84263d55307 136
AnnaBridge 167:e84263d55307 137 /* Reset HSEBYP bit */
AnnaBridge 167:e84263d55307 138 LL_RCC_HSE_DisableBypass();
AnnaBridge 167:e84263d55307 139
AnnaBridge 167:e84263d55307 140 /* Disable all interrupts */
AnnaBridge 167:e84263d55307 141 LL_RCC_WriteReg(CIR, 0x00000000U);
AnnaBridge 167:e84263d55307 142
AnnaBridge 167:e84263d55307 143 return SUCCESS;
AnnaBridge 167:e84263d55307 144 }
AnnaBridge 167:e84263d55307 145
AnnaBridge 167:e84263d55307 146 /**
AnnaBridge 167:e84263d55307 147 * @}
AnnaBridge 167:e84263d55307 148 */
AnnaBridge 167:e84263d55307 149
AnnaBridge 167:e84263d55307 150 /** @addtogroup RCC_LL_EF_Get_Freq
AnnaBridge 167:e84263d55307 151 * @brief Return the frequencies of different on chip clocks; System, AHB, APB1 and APB2 buses clocks
AnnaBridge 167:e84263d55307 152 * and different peripheral clocks available on the device.
AnnaBridge 167:e84263d55307 153 * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
AnnaBridge 167:e84263d55307 154 * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
AnnaBridge 167:e84263d55307 155 * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(***)
AnnaBridge 167:e84263d55307 156 * or HSI_VALUE(**) multiplied/divided by the PLL factors.
AnnaBridge 167:e84263d55307 157 * @note (**) HSI_VALUE is a constant defined in this file (default value
AnnaBridge 167:e84263d55307 158 * 16 MHz) but the real value may vary depending on the variations
AnnaBridge 167:e84263d55307 159 * in voltage and temperature.
AnnaBridge 167:e84263d55307 160 * @note (***) HSE_VALUE is a constant defined in this file (default value
AnnaBridge 167:e84263d55307 161 * 25 MHz), user has to ensure that HSE_VALUE is same as the real
AnnaBridge 167:e84263d55307 162 * frequency of the crystal used. Otherwise, this function may
AnnaBridge 167:e84263d55307 163 * have wrong result.
AnnaBridge 167:e84263d55307 164 * @note The result of this function could be incorrect when using fractional
AnnaBridge 167:e84263d55307 165 * value for HSE crystal.
AnnaBridge 167:e84263d55307 166 * @note This function can be used by the user application to compute the
AnnaBridge 167:e84263d55307 167 * baud-rate for the communication peripherals or configure other parameters.
AnnaBridge 167:e84263d55307 168 * @{
AnnaBridge 167:e84263d55307 169 */
AnnaBridge 167:e84263d55307 170
AnnaBridge 167:e84263d55307 171 /**
AnnaBridge 167:e84263d55307 172 * @brief Return the frequencies of different on chip clocks; System, AHB, APB1 and APB2 buses clocks
AnnaBridge 167:e84263d55307 173 * @note Each time SYSCLK, HCLK, PCLK1 and/or PCLK2 clock changes, this function
AnnaBridge 167:e84263d55307 174 * must be called to update structure fields. Otherwise, any
AnnaBridge 167:e84263d55307 175 * configuration based on this function will be incorrect.
AnnaBridge 167:e84263d55307 176 * @param RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks frequencies
AnnaBridge 167:e84263d55307 177 * @retval None
AnnaBridge 167:e84263d55307 178 */
AnnaBridge 167:e84263d55307 179 void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks)
AnnaBridge 167:e84263d55307 180 {
AnnaBridge 167:e84263d55307 181 /* Get SYSCLK frequency */
AnnaBridge 167:e84263d55307 182 RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq();
AnnaBridge 167:e84263d55307 183
AnnaBridge 167:e84263d55307 184 /* HCLK clock frequency */
AnnaBridge 167:e84263d55307 185 RCC_Clocks->HCLK_Frequency = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency);
AnnaBridge 167:e84263d55307 186
AnnaBridge 167:e84263d55307 187 /* PCLK1 clock frequency */
AnnaBridge 167:e84263d55307 188 RCC_Clocks->PCLK1_Frequency = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency);
AnnaBridge 167:e84263d55307 189
AnnaBridge 167:e84263d55307 190 /* PCLK2 clock frequency */
AnnaBridge 167:e84263d55307 191 RCC_Clocks->PCLK2_Frequency = RCC_GetPCLK2ClockFreq(RCC_Clocks->HCLK_Frequency);
AnnaBridge 167:e84263d55307 192 }
AnnaBridge 167:e84263d55307 193
AnnaBridge 167:e84263d55307 194 /**
AnnaBridge 167:e84263d55307 195 * @brief Return I2Sx clock frequency
AnnaBridge 167:e84263d55307 196 * @param I2SxSource This parameter can be one of the following values:
AnnaBridge 167:e84263d55307 197 * @arg @ref LL_RCC_I2S1_CLKSOURCE
AnnaBridge 167:e84263d55307 198 * @retval I2S clock frequency (in Hz)
AnnaBridge 167:e84263d55307 199 * - @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator is not ready
AnnaBridge 167:e84263d55307 200 */
AnnaBridge 167:e84263d55307 201 uint32_t LL_RCC_GetI2SClockFreq(uint32_t I2SxSource)
AnnaBridge 167:e84263d55307 202 {
AnnaBridge 167:e84263d55307 203 uint32_t i2s_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
AnnaBridge 167:e84263d55307 204
AnnaBridge 167:e84263d55307 205 /* Check parameter */
AnnaBridge 167:e84263d55307 206 assert_param(IS_LL_RCC_I2S_CLKSOURCE(I2SxSource));
AnnaBridge 167:e84263d55307 207
AnnaBridge 167:e84263d55307 208 if (I2SxSource == LL_RCC_I2S1_CLKSOURCE)
AnnaBridge 167:e84263d55307 209 {
AnnaBridge 167:e84263d55307 210 /* I2S1 CLK clock frequency */
AnnaBridge 167:e84263d55307 211 switch (LL_RCC_GetI2SClockSource(I2SxSource))
AnnaBridge 167:e84263d55307 212 {
AnnaBridge 167:e84263d55307 213 case LL_RCC_I2S1_CLKSOURCE_PLLI2S: /* I2S1 Clock is PLLI2S */
AnnaBridge 167:e84263d55307 214 if (LL_RCC_PLLI2S_IsReady())
AnnaBridge 167:e84263d55307 215 {
AnnaBridge 167:e84263d55307 216 i2s_frequency = RCC_PLLI2S_GetFreqDomain_I2S();
AnnaBridge 167:e84263d55307 217 }
AnnaBridge 167:e84263d55307 218 break;
AnnaBridge 167:e84263d55307 219
AnnaBridge 167:e84263d55307 220 case LL_RCC_I2S1_CLKSOURCE_PIN: /* I2S1 Clock is External clock */
AnnaBridge 167:e84263d55307 221 default:
AnnaBridge 167:e84263d55307 222 i2s_frequency = EXTERNAL_CLOCK_VALUE;
AnnaBridge 167:e84263d55307 223 break;
AnnaBridge 167:e84263d55307 224 }
AnnaBridge 167:e84263d55307 225 }
AnnaBridge 167:e84263d55307 226
AnnaBridge 167:e84263d55307 227 return i2s_frequency;
AnnaBridge 167:e84263d55307 228 }
AnnaBridge 167:e84263d55307 229
AnnaBridge 167:e84263d55307 230 /**
AnnaBridge 167:e84263d55307 231 * @}
AnnaBridge 167:e84263d55307 232 */
AnnaBridge 167:e84263d55307 233
AnnaBridge 167:e84263d55307 234 /**
AnnaBridge 167:e84263d55307 235 * @}
AnnaBridge 167:e84263d55307 236 */
AnnaBridge 167:e84263d55307 237
AnnaBridge 167:e84263d55307 238 /** @addtogroup RCC_LL_Private_Functions
AnnaBridge 167:e84263d55307 239 * @{
AnnaBridge 167:e84263d55307 240 */
AnnaBridge 167:e84263d55307 241
AnnaBridge 167:e84263d55307 242 /**
AnnaBridge 167:e84263d55307 243 * @brief Return SYSTEM clock frequency
AnnaBridge 167:e84263d55307 244 * @retval SYSTEM clock frequency (in Hz)
AnnaBridge 167:e84263d55307 245 */
AnnaBridge 167:e84263d55307 246 uint32_t RCC_GetSystemClockFreq(void)
AnnaBridge 167:e84263d55307 247 {
AnnaBridge 167:e84263d55307 248 uint32_t frequency = 0U;
AnnaBridge 167:e84263d55307 249
AnnaBridge 167:e84263d55307 250 /* Get SYSCLK source -------------------------------------------------------*/
AnnaBridge 167:e84263d55307 251 switch (LL_RCC_GetSysClkSource())
AnnaBridge 167:e84263d55307 252 {
AnnaBridge 167:e84263d55307 253 case LL_RCC_SYS_CLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
AnnaBridge 167:e84263d55307 254 frequency = HSI_VALUE;
AnnaBridge 167:e84263d55307 255 break;
AnnaBridge 167:e84263d55307 256
AnnaBridge 167:e84263d55307 257 case LL_RCC_SYS_CLKSOURCE_STATUS_HSE: /* HSE used as system clock source */
AnnaBridge 167:e84263d55307 258 frequency = HSE_VALUE;
AnnaBridge 167:e84263d55307 259 break;
AnnaBridge 167:e84263d55307 260
AnnaBridge 167:e84263d55307 261 case LL_RCC_SYS_CLKSOURCE_STATUS_PLL: /* PLL used as system clock source */
AnnaBridge 167:e84263d55307 262 frequency = RCC_PLL_GetFreqDomain_SYS();
AnnaBridge 167:e84263d55307 263 break;
AnnaBridge 167:e84263d55307 264
AnnaBridge 167:e84263d55307 265 default:
AnnaBridge 167:e84263d55307 266 frequency = HSI_VALUE;
AnnaBridge 167:e84263d55307 267 break;
AnnaBridge 167:e84263d55307 268 }
AnnaBridge 167:e84263d55307 269
AnnaBridge 167:e84263d55307 270 return frequency;
AnnaBridge 167:e84263d55307 271 }
AnnaBridge 167:e84263d55307 272
AnnaBridge 167:e84263d55307 273 /**
AnnaBridge 167:e84263d55307 274 * @brief Return HCLK clock frequency
AnnaBridge 167:e84263d55307 275 * @param SYSCLK_Frequency SYSCLK clock frequency
AnnaBridge 167:e84263d55307 276 * @retval HCLK clock frequency (in Hz)
AnnaBridge 167:e84263d55307 277 */
AnnaBridge 167:e84263d55307 278 uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
AnnaBridge 167:e84263d55307 279 {
AnnaBridge 167:e84263d55307 280 /* HCLK clock frequency */
AnnaBridge 167:e84263d55307 281 return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
AnnaBridge 167:e84263d55307 282 }
AnnaBridge 167:e84263d55307 283
AnnaBridge 167:e84263d55307 284 /**
AnnaBridge 167:e84263d55307 285 * @brief Return PCLK1 clock frequency
AnnaBridge 167:e84263d55307 286 * @param HCLK_Frequency HCLK clock frequency
AnnaBridge 167:e84263d55307 287 * @retval PCLK1 clock frequency (in Hz)
AnnaBridge 167:e84263d55307 288 */
AnnaBridge 167:e84263d55307 289 uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
AnnaBridge 167:e84263d55307 290 {
AnnaBridge 167:e84263d55307 291 /* PCLK1 clock frequency */
AnnaBridge 167:e84263d55307 292 return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
AnnaBridge 167:e84263d55307 293 }
AnnaBridge 167:e84263d55307 294
AnnaBridge 167:e84263d55307 295 /**
AnnaBridge 167:e84263d55307 296 * @brief Return PCLK2 clock frequency
AnnaBridge 167:e84263d55307 297 * @param HCLK_Frequency HCLK clock frequency
AnnaBridge 167:e84263d55307 298 * @retval PCLK2 clock frequency (in Hz)
AnnaBridge 167:e84263d55307 299 */
AnnaBridge 167:e84263d55307 300 uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency)
AnnaBridge 167:e84263d55307 301 {
AnnaBridge 167:e84263d55307 302 /* PCLK2 clock frequency */
AnnaBridge 167:e84263d55307 303 return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler());
AnnaBridge 167:e84263d55307 304 }
AnnaBridge 167:e84263d55307 305
AnnaBridge 167:e84263d55307 306 /**
AnnaBridge 167:e84263d55307 307 * @brief Return PLL clock frequency used for system domain
AnnaBridge 167:e84263d55307 308 * @retval PLL clock frequency (in Hz)
AnnaBridge 167:e84263d55307 309 */
AnnaBridge 167:e84263d55307 310 uint32_t RCC_PLL_GetFreqDomain_SYS(void)
AnnaBridge 167:e84263d55307 311 {
AnnaBridge 167:e84263d55307 312 uint32_t pllinputfreq = 0U, pllsource = 0U;
AnnaBridge 167:e84263d55307 313
AnnaBridge 167:e84263d55307 314 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
AnnaBridge 167:e84263d55307 315 */
AnnaBridge 167:e84263d55307 316 pllsource = LL_RCC_PLL_GetMainSource();
AnnaBridge 167:e84263d55307 317
AnnaBridge 167:e84263d55307 318 switch (pllsource)
AnnaBridge 167:e84263d55307 319 {
AnnaBridge 167:e84263d55307 320 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
AnnaBridge 167:e84263d55307 321 pllinputfreq = HSI_VALUE;
AnnaBridge 167:e84263d55307 322 break;
AnnaBridge 167:e84263d55307 323
AnnaBridge 167:e84263d55307 324 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
AnnaBridge 167:e84263d55307 325 pllinputfreq = HSE_VALUE;
AnnaBridge 167:e84263d55307 326 break;
AnnaBridge 167:e84263d55307 327
AnnaBridge 167:e84263d55307 328 default:
AnnaBridge 167:e84263d55307 329 pllinputfreq = HSI_VALUE;
AnnaBridge 167:e84263d55307 330 break;
AnnaBridge 167:e84263d55307 331 }
AnnaBridge 167:e84263d55307 332 return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
AnnaBridge 167:e84263d55307 333 LL_RCC_PLL_GetN(), LL_RCC_PLL_GetP());
AnnaBridge 167:e84263d55307 334 }
AnnaBridge 167:e84263d55307 335
AnnaBridge 167:e84263d55307 336 /**
AnnaBridge 167:e84263d55307 337 * @brief Return PLL clock frequency used for 48 MHz domain
AnnaBridge 167:e84263d55307 338 * @retval PLL clock frequency (in Hz)
AnnaBridge 167:e84263d55307 339 */
AnnaBridge 167:e84263d55307 340 uint32_t RCC_PLL_GetFreqDomain_48M(void)
AnnaBridge 167:e84263d55307 341 {
AnnaBridge 167:e84263d55307 342 uint32_t pllinputfreq = 0U, pllsource = 0U;
AnnaBridge 167:e84263d55307 343
AnnaBridge 167:e84263d55307 344 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM ) * PLLN
AnnaBridge 167:e84263d55307 345 48M Domain clock = PLL_VCO / PLLQ
AnnaBridge 167:e84263d55307 346 */
AnnaBridge 167:e84263d55307 347 pllsource = LL_RCC_PLL_GetMainSource();
AnnaBridge 167:e84263d55307 348
AnnaBridge 167:e84263d55307 349 switch (pllsource)
AnnaBridge 167:e84263d55307 350 {
AnnaBridge 167:e84263d55307 351 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */
AnnaBridge 167:e84263d55307 352 pllinputfreq = HSI_VALUE;
AnnaBridge 167:e84263d55307 353 break;
AnnaBridge 167:e84263d55307 354
AnnaBridge 167:e84263d55307 355 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
AnnaBridge 167:e84263d55307 356 pllinputfreq = HSE_VALUE;
AnnaBridge 167:e84263d55307 357 break;
AnnaBridge 167:e84263d55307 358
AnnaBridge 167:e84263d55307 359 default:
AnnaBridge 167:e84263d55307 360 pllinputfreq = HSI_VALUE;
AnnaBridge 167:e84263d55307 361 break;
AnnaBridge 167:e84263d55307 362 }
AnnaBridge 167:e84263d55307 363 return __LL_RCC_CALC_PLLCLK_48M_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
AnnaBridge 167:e84263d55307 364 LL_RCC_PLL_GetN(), LL_RCC_PLL_GetQ());
AnnaBridge 167:e84263d55307 365 }
AnnaBridge 167:e84263d55307 366
AnnaBridge 167:e84263d55307 367 /**
AnnaBridge 167:e84263d55307 368 * @brief Return PLLI2S clock frequency used for I2S domain
AnnaBridge 167:e84263d55307 369 * @retval PLLI2S clock frequency (in Hz)
AnnaBridge 167:e84263d55307 370 */
AnnaBridge 167:e84263d55307 371 uint32_t RCC_PLLI2S_GetFreqDomain_I2S(void)
AnnaBridge 167:e84263d55307 372 {
AnnaBridge 167:e84263d55307 373 uint32_t pllinputfreq = 0U, pllsource = 0U;
AnnaBridge 167:e84263d55307 374
AnnaBridge 167:e84263d55307 375 /* PLLI2S_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLI2SN
AnnaBridge 167:e84263d55307 376 I2S Domain clock = PLLI2S_VCO / PLLI2SR
AnnaBridge 167:e84263d55307 377 */
AnnaBridge 167:e84263d55307 378 pllsource = LL_RCC_PLL_GetMainSource();
AnnaBridge 167:e84263d55307 379
AnnaBridge 167:e84263d55307 380 switch (pllsource)
AnnaBridge 167:e84263d55307 381 {
AnnaBridge 167:e84263d55307 382 case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLLI2S clock source */
AnnaBridge 167:e84263d55307 383 pllinputfreq = HSE_VALUE;
AnnaBridge 167:e84263d55307 384 break;
AnnaBridge 167:e84263d55307 385
AnnaBridge 167:e84263d55307 386 case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLLI2S clock source */
AnnaBridge 167:e84263d55307 387 default:
AnnaBridge 167:e84263d55307 388 pllinputfreq = HSI_VALUE;
AnnaBridge 167:e84263d55307 389 break;
AnnaBridge 167:e84263d55307 390 }
AnnaBridge 167:e84263d55307 391 return __LL_RCC_CALC_PLLI2S_I2S_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
AnnaBridge 167:e84263d55307 392 LL_RCC_PLLI2S_GetN(), LL_RCC_PLLI2S_GetR());
AnnaBridge 167:e84263d55307 393 }
AnnaBridge 167:e84263d55307 394
AnnaBridge 167:e84263d55307 395 /**
AnnaBridge 167:e84263d55307 396 * @}
AnnaBridge 167:e84263d55307 397 */
AnnaBridge 167:e84263d55307 398
AnnaBridge 167:e84263d55307 399 /**
AnnaBridge 167:e84263d55307 400 * @}
AnnaBridge 167:e84263d55307 401 */
AnnaBridge 167:e84263d55307 402
AnnaBridge 167:e84263d55307 403 #endif /* defined(RCC) */
AnnaBridge 167:e84263d55307 404
AnnaBridge 167:e84263d55307 405 /**
AnnaBridge 167:e84263d55307 406 * @}
AnnaBridge 167:e84263d55307 407 */
AnnaBridge 167:e84263d55307 408
AnnaBridge 167:e84263d55307 409 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 167:e84263d55307 410
AnnaBridge 167:e84263d55307 411 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/