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targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_pwr.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
167:e84263d55307 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:e84263d55307 1 /**
AnnaBridge 167:e84263d55307 2 ******************************************************************************
AnnaBridge 167:e84263d55307 3 * @file stm32f2xx_ll_pwr.h
AnnaBridge 167:e84263d55307 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.2.1
AnnaBridge 167:e84263d55307 6 * @date 14-April-2017
AnnaBridge 167:e84263d55307 7 * @brief Header file of PWR LL module.
AnnaBridge 167:e84263d55307 8 ******************************************************************************
AnnaBridge 167:e84263d55307 9 * @attention
AnnaBridge 167:e84263d55307 10 *
AnnaBridge 167:e84263d55307 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 167:e84263d55307 12 *
AnnaBridge 167:e84263d55307 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 167:e84263d55307 14 * are permitted provided that the following conditions are met:
AnnaBridge 167:e84263d55307 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 167:e84263d55307 16 * this list of conditions and the following disclaimer.
AnnaBridge 167:e84263d55307 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 167:e84263d55307 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 167:e84263d55307 19 * and/or other materials provided with the distribution.
AnnaBridge 167:e84263d55307 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 167:e84263d55307 21 * may be used to endorse or promote products derived from this software
AnnaBridge 167:e84263d55307 22 * without specific prior written permission.
AnnaBridge 167:e84263d55307 23 *
AnnaBridge 167:e84263d55307 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 167:e84263d55307 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 167:e84263d55307 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 167:e84263d55307 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 167:e84263d55307 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 167:e84263d55307 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 167:e84263d55307 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 167:e84263d55307 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 167:e84263d55307 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 167:e84263d55307 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 167:e84263d55307 34 *
AnnaBridge 167:e84263d55307 35 ******************************************************************************
AnnaBridge 167:e84263d55307 36 */
AnnaBridge 167:e84263d55307 37
AnnaBridge 167:e84263d55307 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 167:e84263d55307 39 #ifndef __STM32F2xx_LL_PWR_H
AnnaBridge 167:e84263d55307 40 #define __STM32F2xx_LL_PWR_H
AnnaBridge 167:e84263d55307 41
AnnaBridge 167:e84263d55307 42 #ifdef __cplusplus
AnnaBridge 167:e84263d55307 43 extern "C" {
AnnaBridge 167:e84263d55307 44 #endif
AnnaBridge 167:e84263d55307 45
AnnaBridge 167:e84263d55307 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 167:e84263d55307 47 #include "stm32f2xx.h"
AnnaBridge 167:e84263d55307 48
AnnaBridge 167:e84263d55307 49 /** @addtogroup STM32F2xx_LL_Driver
AnnaBridge 167:e84263d55307 50 * @{
AnnaBridge 167:e84263d55307 51 */
AnnaBridge 167:e84263d55307 52
AnnaBridge 167:e84263d55307 53 #if defined(PWR)
AnnaBridge 167:e84263d55307 54
AnnaBridge 167:e84263d55307 55 /** @defgroup PWR_LL PWR
AnnaBridge 167:e84263d55307 56 * @{
AnnaBridge 167:e84263d55307 57 */
AnnaBridge 167:e84263d55307 58
AnnaBridge 167:e84263d55307 59 /* Private types -------------------------------------------------------------*/
AnnaBridge 167:e84263d55307 60 /* Private variables ---------------------------------------------------------*/
AnnaBridge 167:e84263d55307 61 /* Private constants ---------------------------------------------------------*/
AnnaBridge 167:e84263d55307 62 /* Private macros ------------------------------------------------------------*/
AnnaBridge 167:e84263d55307 63 /* Exported types ------------------------------------------------------------*/
AnnaBridge 167:e84263d55307 64 /* Exported constants --------------------------------------------------------*/
AnnaBridge 167:e84263d55307 65 /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
AnnaBridge 167:e84263d55307 66 * @{
AnnaBridge 167:e84263d55307 67 */
AnnaBridge 167:e84263d55307 68
AnnaBridge 167:e84263d55307 69 /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge 167:e84263d55307 70 * @brief Flags defines which can be used with LL_PWR_WriteReg function
AnnaBridge 167:e84263d55307 71 * @{
AnnaBridge 167:e84263d55307 72 */
AnnaBridge 167:e84263d55307 73 #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
AnnaBridge 167:e84263d55307 74 #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
AnnaBridge 167:e84263d55307 75 /**
AnnaBridge 167:e84263d55307 76 * @}
AnnaBridge 167:e84263d55307 77 */
AnnaBridge 167:e84263d55307 78
AnnaBridge 167:e84263d55307 79 /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 167:e84263d55307 80 * @brief Flags defines which can be used with LL_PWR_ReadReg function
AnnaBridge 167:e84263d55307 81 * @{
AnnaBridge 167:e84263d55307 82 */
AnnaBridge 167:e84263d55307 83 #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
AnnaBridge 167:e84263d55307 84 #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
AnnaBridge 167:e84263d55307 85 #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
AnnaBridge 167:e84263d55307 86 #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP /*!< Enable WKUP pin 1 */
AnnaBridge 167:e84263d55307 87 /**
AnnaBridge 167:e84263d55307 88 * @}
AnnaBridge 167:e84263d55307 89 */
AnnaBridge 167:e84263d55307 90
AnnaBridge 167:e84263d55307 91
AnnaBridge 167:e84263d55307 92 /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
AnnaBridge 167:e84263d55307 93 * @{
AnnaBridge 167:e84263d55307 94 */
AnnaBridge 167:e84263d55307 95 #define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
AnnaBridge 167:e84263d55307 96 #define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (ith low power regulator ON) when the CPU enters deepsleep */
AnnaBridge 167:e84263d55307 97 #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
AnnaBridge 167:e84263d55307 98 /**
AnnaBridge 167:e84263d55307 99 * @}
AnnaBridge 167:e84263d55307 100 */
AnnaBridge 167:e84263d55307 101
AnnaBridge 167:e84263d55307 102 /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
AnnaBridge 167:e84263d55307 103 * @{
AnnaBridge 167:e84263d55307 104 */
AnnaBridge 167:e84263d55307 105 #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage regulator in main mode during deepsleep mode */
AnnaBridge 167:e84263d55307 106 #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage regulator in low-power mode during deepsleep mode */
AnnaBridge 167:e84263d55307 107 /**
AnnaBridge 167:e84263d55307 108 * @}
AnnaBridge 167:e84263d55307 109 */
AnnaBridge 167:e84263d55307 110
AnnaBridge 167:e84263d55307 111 /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
AnnaBridge 167:e84263d55307 112 * @{
AnnaBridge 167:e84263d55307 113 */
AnnaBridge 167:e84263d55307 114 #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */
AnnaBridge 167:e84263d55307 115 #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */
AnnaBridge 167:e84263d55307 116 #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */
AnnaBridge 167:e84263d55307 117 #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
AnnaBridge 167:e84263d55307 118 #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */
AnnaBridge 167:e84263d55307 119 #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */
AnnaBridge 167:e84263d55307 120 #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */
AnnaBridge 167:e84263d55307 121 #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */
AnnaBridge 167:e84263d55307 122 /**
AnnaBridge 167:e84263d55307 123 * @}
AnnaBridge 167:e84263d55307 124 */
AnnaBridge 167:e84263d55307 125 /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
AnnaBridge 167:e84263d55307 126 * @{
AnnaBridge 167:e84263d55307 127 */
AnnaBridge 167:e84263d55307 128 #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP) /*!< WKUP pin 1 : PA0 */
AnnaBridge 167:e84263d55307 129 /**
AnnaBridge 167:e84263d55307 130 * @}
AnnaBridge 167:e84263d55307 131 */
AnnaBridge 167:e84263d55307 132
AnnaBridge 167:e84263d55307 133 /**
AnnaBridge 167:e84263d55307 134 * @}
AnnaBridge 167:e84263d55307 135 */
AnnaBridge 167:e84263d55307 136
AnnaBridge 167:e84263d55307 137
AnnaBridge 167:e84263d55307 138 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 167:e84263d55307 139 /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
AnnaBridge 167:e84263d55307 140 * @{
AnnaBridge 167:e84263d55307 141 */
AnnaBridge 167:e84263d55307 142
AnnaBridge 167:e84263d55307 143 /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
AnnaBridge 167:e84263d55307 144 * @{
AnnaBridge 167:e84263d55307 145 */
AnnaBridge 167:e84263d55307 146
AnnaBridge 167:e84263d55307 147 /**
AnnaBridge 167:e84263d55307 148 * @brief Write a value in PWR register
AnnaBridge 167:e84263d55307 149 * @param __REG__ Register to be written
AnnaBridge 167:e84263d55307 150 * @param __VALUE__ Value to be written in the register
AnnaBridge 167:e84263d55307 151 * @retval None
AnnaBridge 167:e84263d55307 152 */
AnnaBridge 167:e84263d55307 153 #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
AnnaBridge 167:e84263d55307 154
AnnaBridge 167:e84263d55307 155 /**
AnnaBridge 167:e84263d55307 156 * @brief Read a value in PWR register
AnnaBridge 167:e84263d55307 157 * @param __REG__ Register to be read
AnnaBridge 167:e84263d55307 158 * @retval Register value
AnnaBridge 167:e84263d55307 159 */
AnnaBridge 167:e84263d55307 160 #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
AnnaBridge 167:e84263d55307 161 /**
AnnaBridge 167:e84263d55307 162 * @}
AnnaBridge 167:e84263d55307 163 */
AnnaBridge 167:e84263d55307 164
AnnaBridge 167:e84263d55307 165 /**
AnnaBridge 167:e84263d55307 166 * @}
AnnaBridge 167:e84263d55307 167 */
AnnaBridge 167:e84263d55307 168
AnnaBridge 167:e84263d55307 169 /* Exported functions --------------------------------------------------------*/
AnnaBridge 167:e84263d55307 170 /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
AnnaBridge 167:e84263d55307 171 * @{
AnnaBridge 167:e84263d55307 172 */
AnnaBridge 167:e84263d55307 173
AnnaBridge 167:e84263d55307 174 /** @defgroup PWR_LL_EF_Configuration Configuration
AnnaBridge 167:e84263d55307 175 * @{
AnnaBridge 167:e84263d55307 176 */
AnnaBridge 167:e84263d55307 177 /**
AnnaBridge 167:e84263d55307 178 * @brief Enable the Flash Power Down in Stop Mode
AnnaBridge 167:e84263d55307 179 * @rmtoll CR FPDS LL_PWR_EnableFlashPowerDown
AnnaBridge 167:e84263d55307 180 * @retval None
AnnaBridge 167:e84263d55307 181 */
AnnaBridge 167:e84263d55307 182 __STATIC_INLINE void LL_PWR_EnableFlashPowerDown(void)
AnnaBridge 167:e84263d55307 183 {
AnnaBridge 167:e84263d55307 184 SET_BIT(PWR->CR, PWR_CR_FPDS);
AnnaBridge 167:e84263d55307 185 }
AnnaBridge 167:e84263d55307 186
AnnaBridge 167:e84263d55307 187 /**
AnnaBridge 167:e84263d55307 188 * @brief Disable the Flash Power Down in Stop Mode
AnnaBridge 167:e84263d55307 189 * @rmtoll CR FPDS LL_PWR_DisableFlashPowerDown
AnnaBridge 167:e84263d55307 190 * @retval None
AnnaBridge 167:e84263d55307 191 */
AnnaBridge 167:e84263d55307 192 __STATIC_INLINE void LL_PWR_DisableFlashPowerDown(void)
AnnaBridge 167:e84263d55307 193 {
AnnaBridge 167:e84263d55307 194 CLEAR_BIT(PWR->CR, PWR_CR_FPDS);
AnnaBridge 167:e84263d55307 195 }
AnnaBridge 167:e84263d55307 196
AnnaBridge 167:e84263d55307 197 /**
AnnaBridge 167:e84263d55307 198 * @brief Check if the Flash Power Down in Stop Mode is enabled
AnnaBridge 167:e84263d55307 199 * @rmtoll CR FPDS LL_PWR_IsEnabledFlashPowerDown
AnnaBridge 167:e84263d55307 200 * @retval State of bit (1 or 0).
AnnaBridge 167:e84263d55307 201 */
AnnaBridge 167:e84263d55307 202 __STATIC_INLINE uint32_t LL_PWR_IsEnabledFlashPowerDown(void)
AnnaBridge 167:e84263d55307 203 {
AnnaBridge 167:e84263d55307 204 return (READ_BIT(PWR->CR, PWR_CR_FPDS) == (PWR_CR_FPDS));
AnnaBridge 167:e84263d55307 205 }
AnnaBridge 167:e84263d55307 206
AnnaBridge 167:e84263d55307 207 /**
AnnaBridge 167:e84263d55307 208 * @brief Enable access to the backup domain
AnnaBridge 167:e84263d55307 209 * @rmtoll CR DBP LL_PWR_EnableBkUpAccess
AnnaBridge 167:e84263d55307 210 * @retval None
AnnaBridge 167:e84263d55307 211 */
AnnaBridge 167:e84263d55307 212 __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
AnnaBridge 167:e84263d55307 213 {
AnnaBridge 167:e84263d55307 214 SET_BIT(PWR->CR, PWR_CR_DBP);
AnnaBridge 167:e84263d55307 215 }
AnnaBridge 167:e84263d55307 216
AnnaBridge 167:e84263d55307 217 /**
AnnaBridge 167:e84263d55307 218 * @brief Disable access to the backup domain
AnnaBridge 167:e84263d55307 219 * @rmtoll CR DBP LL_PWR_DisableBkUpAccess
AnnaBridge 167:e84263d55307 220 * @retval None
AnnaBridge 167:e84263d55307 221 */
AnnaBridge 167:e84263d55307 222 __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
AnnaBridge 167:e84263d55307 223 {
AnnaBridge 167:e84263d55307 224 CLEAR_BIT(PWR->CR, PWR_CR_DBP);
AnnaBridge 167:e84263d55307 225 }
AnnaBridge 167:e84263d55307 226
AnnaBridge 167:e84263d55307 227 /**
AnnaBridge 167:e84263d55307 228 * @brief Check if the backup domain is enabled
AnnaBridge 167:e84263d55307 229 * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
AnnaBridge 167:e84263d55307 230 * @retval State of bit (1 or 0).
AnnaBridge 167:e84263d55307 231 */
AnnaBridge 167:e84263d55307 232 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
AnnaBridge 167:e84263d55307 233 {
AnnaBridge 167:e84263d55307 234 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
AnnaBridge 167:e84263d55307 235 }
AnnaBridge 167:e84263d55307 236 /**
AnnaBridge 167:e84263d55307 237 * @brief Enable the backup regulator
AnnaBridge 167:e84263d55307 238 * @rmtoll CSR BRE LL_PWR_EnableBkUpRegulator
AnnaBridge 167:e84263d55307 239 * @note The BRE bit of the PWR_CSR register is protected against parasitic write access.
AnnaBridge 167:e84263d55307 240 * The LL_PWR_EnableBkUpAccess() must be called before using this API.
AnnaBridge 167:e84263d55307 241 * @retval None
AnnaBridge 167:e84263d55307 242 */
AnnaBridge 167:e84263d55307 243 __STATIC_INLINE void LL_PWR_EnableBkUpRegulator(void)
AnnaBridge 167:e84263d55307 244 {
AnnaBridge 167:e84263d55307 245 SET_BIT(PWR->CSR, PWR_CSR_BRE);
AnnaBridge 167:e84263d55307 246 }
AnnaBridge 167:e84263d55307 247
AnnaBridge 167:e84263d55307 248 /**
AnnaBridge 167:e84263d55307 249 * @brief Disable the backup Regulator
AnnaBridge 167:e84263d55307 250 * @rmtoll CSR BRE LL_PWR_DisableBkUpRegulator
AnnaBridge 167:e84263d55307 251 * @note The BRE bit of the PWR_CSR register is protected against parasitic write access.
AnnaBridge 167:e84263d55307 252 * The LL_PWR_EnableBkUpAccess() must be called before using this API.
AnnaBridge 167:e84263d55307 253 * @retval None
AnnaBridge 167:e84263d55307 254 */
AnnaBridge 167:e84263d55307 255 __STATIC_INLINE void LL_PWR_DisableBkUpRegulator(void)
AnnaBridge 167:e84263d55307 256 {
AnnaBridge 167:e84263d55307 257 CLEAR_BIT(PWR->CSR, PWR_CSR_BRE);
AnnaBridge 167:e84263d55307 258 }
AnnaBridge 167:e84263d55307 259
AnnaBridge 167:e84263d55307 260 /**
AnnaBridge 167:e84263d55307 261 * @brief Check if the backup Regulator is enabled
AnnaBridge 167:e84263d55307 262 * @rmtoll CSR BRE LL_PWR_IsEnabledBkUpRegulator
AnnaBridge 167:e84263d55307 263 * @retval State of bit (1 or 0).
AnnaBridge 167:e84263d55307 264 */
AnnaBridge 167:e84263d55307 265 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpRegulator(void)
AnnaBridge 167:e84263d55307 266 {
AnnaBridge 167:e84263d55307 267 return (READ_BIT(PWR->CSR, PWR_CSR_BRE) == (PWR_CSR_BRE));
AnnaBridge 167:e84263d55307 268 }
AnnaBridge 167:e84263d55307 269
AnnaBridge 167:e84263d55307 270 /**
AnnaBridge 167:e84263d55307 271 * @brief Set voltage regulator mode during deep sleep mode
AnnaBridge 167:e84263d55307 272 * @rmtoll CR LPDS LL_PWR_SetRegulModeDS
AnnaBridge 167:e84263d55307 273 * @param RegulMode This parameter can be one of the following values:
AnnaBridge 167:e84263d55307 274 * @arg @ref LL_PWR_REGU_DSMODE_MAIN
AnnaBridge 167:e84263d55307 275 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
AnnaBridge 167:e84263d55307 276 * @retval None
AnnaBridge 167:e84263d55307 277 */
AnnaBridge 167:e84263d55307 278 __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
AnnaBridge 167:e84263d55307 279 {
AnnaBridge 167:e84263d55307 280 MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
AnnaBridge 167:e84263d55307 281 }
AnnaBridge 167:e84263d55307 282
AnnaBridge 167:e84263d55307 283 /**
AnnaBridge 167:e84263d55307 284 * @brief Get voltage regulator mode during deep sleep mode
AnnaBridge 167:e84263d55307 285 * @rmtoll CR LPDS LL_PWR_GetRegulModeDS
AnnaBridge 167:e84263d55307 286 * @retval Returned value can be one of the following values:
AnnaBridge 167:e84263d55307 287 * @arg @ref LL_PWR_REGU_DSMODE_MAIN
AnnaBridge 167:e84263d55307 288 * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
AnnaBridge 167:e84263d55307 289 */
AnnaBridge 167:e84263d55307 290 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
AnnaBridge 167:e84263d55307 291 {
AnnaBridge 167:e84263d55307 292 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
AnnaBridge 167:e84263d55307 293 }
AnnaBridge 167:e84263d55307 294
AnnaBridge 167:e84263d55307 295 /**
AnnaBridge 167:e84263d55307 296 * @brief Set power down mode when CPU enters deepsleep
AnnaBridge 167:e84263d55307 297 * @rmtoll CR PDDS LL_PWR_SetPowerMode\n
AnnaBridge 167:e84263d55307 298 * @rmtoll CR LPDS LL_PWR_SetPowerMode
AnnaBridge 167:e84263d55307 299 * @param PDMode This parameter can be one of the following values:
AnnaBridge 167:e84263d55307 300 * @arg @ref LL_PWR_MODE_STOP_MAINREGU
AnnaBridge 167:e84263d55307 301 * @arg @ref LL_PWR_MODE_STOP_LPREGU
AnnaBridge 167:e84263d55307 302 * @arg @ref LL_PWR_MODE_STANDBY
AnnaBridge 167:e84263d55307 303 * @retval None
AnnaBridge 167:e84263d55307 304 */
AnnaBridge 167:e84263d55307 305 __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
AnnaBridge 167:e84263d55307 306 {
AnnaBridge 167:e84263d55307 307 MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
AnnaBridge 167:e84263d55307 308 }
AnnaBridge 167:e84263d55307 309
AnnaBridge 167:e84263d55307 310 /**
AnnaBridge 167:e84263d55307 311 * @brief Get power down mode when CPU enters deepsleep
AnnaBridge 167:e84263d55307 312 * @rmtoll CR PDDS LL_PWR_GetPowerMode\n
AnnaBridge 167:e84263d55307 313 * @rmtoll CR LPDS LL_PWR_GetPowerMode
AnnaBridge 167:e84263d55307 314 * @retval Returned value can be one of the following values:
AnnaBridge 167:e84263d55307 315 * @arg @ref LL_PWR_MODE_STOP_MAINREGU
AnnaBridge 167:e84263d55307 316 * @arg @ref LL_PWR_MODE_STOP_LPREGU
AnnaBridge 167:e84263d55307 317 * @arg @ref LL_PWR_MODE_STANDBY
AnnaBridge 167:e84263d55307 318 */
AnnaBridge 167:e84263d55307 319 __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
AnnaBridge 167:e84263d55307 320 {
AnnaBridge 167:e84263d55307 321 return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
AnnaBridge 167:e84263d55307 322 }
AnnaBridge 167:e84263d55307 323
AnnaBridge 167:e84263d55307 324 /**
AnnaBridge 167:e84263d55307 325 * @brief Configure the voltage threshold detected by the Power Voltage Detector
AnnaBridge 167:e84263d55307 326 * @rmtoll CR PLS LL_PWR_SetPVDLevel
AnnaBridge 167:e84263d55307 327 * @param PVDLevel This parameter can be one of the following values:
AnnaBridge 167:e84263d55307 328 * @arg @ref LL_PWR_PVDLEVEL_0
AnnaBridge 167:e84263d55307 329 * @arg @ref LL_PWR_PVDLEVEL_1
AnnaBridge 167:e84263d55307 330 * @arg @ref LL_PWR_PVDLEVEL_2
AnnaBridge 167:e84263d55307 331 * @arg @ref LL_PWR_PVDLEVEL_3
AnnaBridge 167:e84263d55307 332 * @arg @ref LL_PWR_PVDLEVEL_4
AnnaBridge 167:e84263d55307 333 * @arg @ref LL_PWR_PVDLEVEL_5
AnnaBridge 167:e84263d55307 334 * @arg @ref LL_PWR_PVDLEVEL_6
AnnaBridge 167:e84263d55307 335 * @arg @ref LL_PWR_PVDLEVEL_7
AnnaBridge 167:e84263d55307 336 * @retval None
AnnaBridge 167:e84263d55307 337 */
AnnaBridge 167:e84263d55307 338 __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
AnnaBridge 167:e84263d55307 339 {
AnnaBridge 167:e84263d55307 340 MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
AnnaBridge 167:e84263d55307 341 }
AnnaBridge 167:e84263d55307 342
AnnaBridge 167:e84263d55307 343 /**
AnnaBridge 167:e84263d55307 344 * @brief Get the voltage threshold detection
AnnaBridge 167:e84263d55307 345 * @rmtoll CR PLS LL_PWR_GetPVDLevel
AnnaBridge 167:e84263d55307 346 * @retval Returned value can be one of the following values:
AnnaBridge 167:e84263d55307 347 * @arg @ref LL_PWR_PVDLEVEL_0
AnnaBridge 167:e84263d55307 348 * @arg @ref LL_PWR_PVDLEVEL_1
AnnaBridge 167:e84263d55307 349 * @arg @ref LL_PWR_PVDLEVEL_2
AnnaBridge 167:e84263d55307 350 * @arg @ref LL_PWR_PVDLEVEL_3
AnnaBridge 167:e84263d55307 351 * @arg @ref LL_PWR_PVDLEVEL_4
AnnaBridge 167:e84263d55307 352 * @arg @ref LL_PWR_PVDLEVEL_5
AnnaBridge 167:e84263d55307 353 * @arg @ref LL_PWR_PVDLEVEL_6
AnnaBridge 167:e84263d55307 354 * @arg @ref LL_PWR_PVDLEVEL_7
AnnaBridge 167:e84263d55307 355 */
AnnaBridge 167:e84263d55307 356 __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
AnnaBridge 167:e84263d55307 357 {
AnnaBridge 167:e84263d55307 358 return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
AnnaBridge 167:e84263d55307 359 }
AnnaBridge 167:e84263d55307 360
AnnaBridge 167:e84263d55307 361 /**
AnnaBridge 167:e84263d55307 362 * @brief Enable Power Voltage Detector
AnnaBridge 167:e84263d55307 363 * @rmtoll CR PVDE LL_PWR_EnablePVD
AnnaBridge 167:e84263d55307 364 * @retval None
AnnaBridge 167:e84263d55307 365 */
AnnaBridge 167:e84263d55307 366 __STATIC_INLINE void LL_PWR_EnablePVD(void)
AnnaBridge 167:e84263d55307 367 {
AnnaBridge 167:e84263d55307 368 SET_BIT(PWR->CR, PWR_CR_PVDE);
AnnaBridge 167:e84263d55307 369 }
AnnaBridge 167:e84263d55307 370
AnnaBridge 167:e84263d55307 371 /**
AnnaBridge 167:e84263d55307 372 * @brief Disable Power Voltage Detector
AnnaBridge 167:e84263d55307 373 * @rmtoll CR PVDE LL_PWR_DisablePVD
AnnaBridge 167:e84263d55307 374 * @retval None
AnnaBridge 167:e84263d55307 375 */
AnnaBridge 167:e84263d55307 376 __STATIC_INLINE void LL_PWR_DisablePVD(void)
AnnaBridge 167:e84263d55307 377 {
AnnaBridge 167:e84263d55307 378 CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
AnnaBridge 167:e84263d55307 379 }
AnnaBridge 167:e84263d55307 380
AnnaBridge 167:e84263d55307 381 /**
AnnaBridge 167:e84263d55307 382 * @brief Check if Power Voltage Detector is enabled
AnnaBridge 167:e84263d55307 383 * @rmtoll CR PVDE LL_PWR_IsEnabledPVD
AnnaBridge 167:e84263d55307 384 * @retval State of bit (1 or 0).
AnnaBridge 167:e84263d55307 385 */
AnnaBridge 167:e84263d55307 386 __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
AnnaBridge 167:e84263d55307 387 {
AnnaBridge 167:e84263d55307 388 return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
AnnaBridge 167:e84263d55307 389 }
AnnaBridge 167:e84263d55307 390
AnnaBridge 167:e84263d55307 391 /**
AnnaBridge 167:e84263d55307 392 * @brief Enable the WakeUp PINx functionality
AnnaBridge 167:e84263d55307 393 * @rmtoll CSR EWUP LL_PWR_EnableWakeUpPin
AnnaBridge 167:e84263d55307 394 * @param WakeUpPin This parameter can be one of the following values:
AnnaBridge 167:e84263d55307 395 * @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge 167:e84263d55307 396 * @retval None
AnnaBridge 167:e84263d55307 397 */
AnnaBridge 167:e84263d55307 398 __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
AnnaBridge 167:e84263d55307 399 {
AnnaBridge 167:e84263d55307 400 SET_BIT(PWR->CSR, WakeUpPin);
AnnaBridge 167:e84263d55307 401 }
AnnaBridge 167:e84263d55307 402
AnnaBridge 167:e84263d55307 403 /**
AnnaBridge 167:e84263d55307 404 * @brief Disable the WakeUp PINx functionality
AnnaBridge 167:e84263d55307 405 * @rmtoll CSR EWUP LL_PWR_DisableWakeUpPin
AnnaBridge 167:e84263d55307 406 * @param WakeUpPin This parameter can be one of the following values:
AnnaBridge 167:e84263d55307 407 * @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge 167:e84263d55307 408 * @retval None
AnnaBridge 167:e84263d55307 409 */
AnnaBridge 167:e84263d55307 410 __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
AnnaBridge 167:e84263d55307 411 {
AnnaBridge 167:e84263d55307 412 CLEAR_BIT(PWR->CSR, WakeUpPin);
AnnaBridge 167:e84263d55307 413 }
AnnaBridge 167:e84263d55307 414
AnnaBridge 167:e84263d55307 415 /**
AnnaBridge 167:e84263d55307 416 * @brief Check if the WakeUp PINx functionality is enabled
AnnaBridge 167:e84263d55307 417 * @rmtoll CSR EWUP LL_PWR_IsEnabledWakeUpPin
AnnaBridge 167:e84263d55307 418 * @param WakeUpPin This parameter can be one of the following values:
AnnaBridge 167:e84263d55307 419 * @arg @ref LL_PWR_WAKEUP_PIN1
AnnaBridge 167:e84263d55307 420 * @retval State of bit (1 or 0).
AnnaBridge 167:e84263d55307 421 */
AnnaBridge 167:e84263d55307 422 __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
AnnaBridge 167:e84263d55307 423 {
AnnaBridge 167:e84263d55307 424 return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
AnnaBridge 167:e84263d55307 425 }
AnnaBridge 167:e84263d55307 426
AnnaBridge 167:e84263d55307 427
AnnaBridge 167:e84263d55307 428 /**
AnnaBridge 167:e84263d55307 429 * @}
AnnaBridge 167:e84263d55307 430 */
AnnaBridge 167:e84263d55307 431
AnnaBridge 167:e84263d55307 432 /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
AnnaBridge 167:e84263d55307 433 * @{
AnnaBridge 167:e84263d55307 434 */
AnnaBridge 167:e84263d55307 435
AnnaBridge 167:e84263d55307 436 /**
AnnaBridge 167:e84263d55307 437 * @brief Get Wake-up Flag
AnnaBridge 167:e84263d55307 438 * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
AnnaBridge 167:e84263d55307 439 * @retval State of bit (1 or 0).
AnnaBridge 167:e84263d55307 440 */
AnnaBridge 167:e84263d55307 441 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
AnnaBridge 167:e84263d55307 442 {
AnnaBridge 167:e84263d55307 443 return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
AnnaBridge 167:e84263d55307 444 }
AnnaBridge 167:e84263d55307 445
AnnaBridge 167:e84263d55307 446 /**
AnnaBridge 167:e84263d55307 447 * @brief Get Standby Flag
AnnaBridge 167:e84263d55307 448 * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
AnnaBridge 167:e84263d55307 449 * @retval State of bit (1 or 0).
AnnaBridge 167:e84263d55307 450 */
AnnaBridge 167:e84263d55307 451 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
AnnaBridge 167:e84263d55307 452 {
AnnaBridge 167:e84263d55307 453 return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
AnnaBridge 167:e84263d55307 454 }
AnnaBridge 167:e84263d55307 455
AnnaBridge 167:e84263d55307 456 /**
AnnaBridge 167:e84263d55307 457 * @brief Get Backup regulator ready Flag
AnnaBridge 167:e84263d55307 458 * @rmtoll CSR BRR LL_PWR_IsActiveFlag_BRR
AnnaBridge 167:e84263d55307 459 * @retval State of bit (1 or 0).
AnnaBridge 167:e84263d55307 460 */
AnnaBridge 167:e84263d55307 461 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_BRR(void)
AnnaBridge 167:e84263d55307 462 {
AnnaBridge 167:e84263d55307 463 return (READ_BIT(PWR->CSR, PWR_CSR_BRR) == (PWR_CSR_BRR));
AnnaBridge 167:e84263d55307 464 }
AnnaBridge 167:e84263d55307 465 /**
AnnaBridge 167:e84263d55307 466 * @brief Indicate whether VDD voltage is below the selected PVD threshold
AnnaBridge 167:e84263d55307 467 * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
AnnaBridge 167:e84263d55307 468 * @retval State of bit (1 or 0).
AnnaBridge 167:e84263d55307 469 */
AnnaBridge 167:e84263d55307 470 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
AnnaBridge 167:e84263d55307 471 {
AnnaBridge 167:e84263d55307 472 return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
AnnaBridge 167:e84263d55307 473 }
AnnaBridge 167:e84263d55307 474
AnnaBridge 167:e84263d55307 475 /**
AnnaBridge 167:e84263d55307 476 * @brief Clear Standby Flag
AnnaBridge 167:e84263d55307 477 * @rmtoll CR CSBF LL_PWR_ClearFlag_SB
AnnaBridge 167:e84263d55307 478 * @retval None
AnnaBridge 167:e84263d55307 479 */
AnnaBridge 167:e84263d55307 480 __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
AnnaBridge 167:e84263d55307 481 {
AnnaBridge 167:e84263d55307 482 SET_BIT(PWR->CR, PWR_CR_CSBF);
AnnaBridge 167:e84263d55307 483 }
AnnaBridge 167:e84263d55307 484
AnnaBridge 167:e84263d55307 485 /**
AnnaBridge 167:e84263d55307 486 * @brief Clear Wake-up Flags
AnnaBridge 167:e84263d55307 487 * @rmtoll CR CWUF LL_PWR_ClearFlag_WU
AnnaBridge 167:e84263d55307 488 * @retval None
AnnaBridge 167:e84263d55307 489 */
AnnaBridge 167:e84263d55307 490 __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
AnnaBridge 167:e84263d55307 491 {
AnnaBridge 167:e84263d55307 492 SET_BIT(PWR->CR, PWR_CR_CWUF);
AnnaBridge 167:e84263d55307 493 }
AnnaBridge 167:e84263d55307 494 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 167:e84263d55307 495 /** @defgroup PWR_LL_EF_Init De-initialization function
AnnaBridge 167:e84263d55307 496 * @{
AnnaBridge 167:e84263d55307 497 */
AnnaBridge 167:e84263d55307 498 ErrorStatus LL_PWR_DeInit(void);
AnnaBridge 167:e84263d55307 499 /**
AnnaBridge 167:e84263d55307 500 * @}
AnnaBridge 167:e84263d55307 501 */
AnnaBridge 167:e84263d55307 502 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 167:e84263d55307 503
AnnaBridge 167:e84263d55307 504 /**
AnnaBridge 167:e84263d55307 505 * @}
AnnaBridge 167:e84263d55307 506 */
AnnaBridge 167:e84263d55307 507
AnnaBridge 167:e84263d55307 508 /**
AnnaBridge 167:e84263d55307 509 * @}
AnnaBridge 167:e84263d55307 510 */
AnnaBridge 167:e84263d55307 511
AnnaBridge 167:e84263d55307 512 /**
AnnaBridge 167:e84263d55307 513 * @}
AnnaBridge 167:e84263d55307 514 */
AnnaBridge 167:e84263d55307 515
AnnaBridge 167:e84263d55307 516 #endif /* defined(PWR) */
AnnaBridge 167:e84263d55307 517
AnnaBridge 167:e84263d55307 518 /**
AnnaBridge 167:e84263d55307 519 * @}
AnnaBridge 167:e84263d55307 520 */
AnnaBridge 167:e84263d55307 521
AnnaBridge 167:e84263d55307 522 #ifdef __cplusplus
AnnaBridge 167:e84263d55307 523 }
AnnaBridge 167:e84263d55307 524 #endif
AnnaBridge 167:e84263d55307 525
AnnaBridge 167:e84263d55307 526 #endif /* __STM32F2xx_LL_PWR_H */
AnnaBridge 167:e84263d55307 527
AnnaBridge 167:e84263d55307 528 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/