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mbed library sources. Supersedes mbed-src.

Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_adc.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3
Parent:: 167:e84263d55307

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	167:e84263d55307	1	/**
AnnaBridge	167:e84263d55307	2	******************************************************************************
AnnaBridge	167:e84263d55307	3	* @file stm32f2xx_ll_adc.c
AnnaBridge	167:e84263d55307	4	* @author MCD Application Team
AnnaBridge	167:e84263d55307	5	* @version V1.2.1
AnnaBridge	167:e84263d55307	6	* @date 14-April-2017
AnnaBridge	167:e84263d55307	7	* @brief ADC LL module driver
AnnaBridge	167:e84263d55307	8	******************************************************************************
AnnaBridge	167:e84263d55307	9	* @attention
AnnaBridge	167:e84263d55307	10	*
AnnaBridge	167:e84263d55307	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	167:e84263d55307	12	*
AnnaBridge	167:e84263d55307	13	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	167:e84263d55307	14	* are permitted provided that the following conditions are met:
AnnaBridge	167:e84263d55307	15	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	167:e84263d55307	16	* this list of conditions and the following disclaimer.
AnnaBridge	167:e84263d55307	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	167:e84263d55307	18	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	167:e84263d55307	19	* and/or other materials provided with the distribution.
AnnaBridge	167:e84263d55307	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	167:e84263d55307	21	* may be used to endorse or promote products derived from this software
AnnaBridge	167:e84263d55307	22	* without specific prior written permission.
AnnaBridge	167:e84263d55307	23	*
AnnaBridge	167:e84263d55307	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	167:e84263d55307	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	167:e84263d55307	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	167:e84263d55307	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	167:e84263d55307	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	167:e84263d55307	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	167:e84263d55307	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	167:e84263d55307	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	167:e84263d55307	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	167:e84263d55307	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	167:e84263d55307	34	*
AnnaBridge	167:e84263d55307	35	******************************************************************************
AnnaBridge	167:e84263d55307	36	*/
AnnaBridge	167:e84263d55307	37	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	167:e84263d55307	38
AnnaBridge	167:e84263d55307	39	/* Includes ------------------------------------------------------------------*/
AnnaBridge	167:e84263d55307	40	#include "stm32f2xx_ll_adc.h"
AnnaBridge	167:e84263d55307	41	#include "stm32f2xx_ll_bus.h"
AnnaBridge	167:e84263d55307	42
AnnaBridge	167:e84263d55307	43	#ifdef USE_FULL_ASSERT
AnnaBridge	167:e84263d55307	44	#include "stm32_assert.h"
AnnaBridge	167:e84263d55307	45	#else
AnnaBridge	167:e84263d55307	46	#define assert_param(expr) ((void)0U)
AnnaBridge	167:e84263d55307	47	#endif
AnnaBridge	167:e84263d55307	48
AnnaBridge	167:e84263d55307	49	/** @addtogroup STM32F2xx_LL_Driver
AnnaBridge	167:e84263d55307	50	* @{
AnnaBridge	167:e84263d55307	51	*/
AnnaBridge	167:e84263d55307	52
AnnaBridge	167:e84263d55307	53	#if defined (ADC1) \|\| defined (ADC2) \|\| defined (ADC3)
AnnaBridge	167:e84263d55307	54
AnnaBridge	167:e84263d55307	55	/** @addtogroup ADC_LL ADC
AnnaBridge	167:e84263d55307	56	* @{
AnnaBridge	167:e84263d55307	57	*/
AnnaBridge	167:e84263d55307	58
AnnaBridge	167:e84263d55307	59	/* Private types -------------------------------------------------------------*/
AnnaBridge	167:e84263d55307	60	/* Private variables ---------------------------------------------------------*/
AnnaBridge	167:e84263d55307	61	/* Private constants ---------------------------------------------------------*/
AnnaBridge	167:e84263d55307	62	/* Private macros ------------------------------------------------------------*/
AnnaBridge	167:e84263d55307	63
AnnaBridge	167:e84263d55307	64	/** @addtogroup ADC_LL_Private_Macros
AnnaBridge	167:e84263d55307	65	* @{
AnnaBridge	167:e84263d55307	66	*/
AnnaBridge	167:e84263d55307	67
AnnaBridge	167:e84263d55307	68	/* Check of parameters for configuration of ADC hierarchical scope: */
AnnaBridge	167:e84263d55307	69	/* common to several ADC instances. */
AnnaBridge	167:e84263d55307	70	#define IS_LL_ADC_COMMON_CLOCK(__CLOCK__) \
AnnaBridge	167:e84263d55307	71	( ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV2) \
AnnaBridge	167:e84263d55307	72	\|\| ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV4) \
AnnaBridge	167:e84263d55307	73	\|\| ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV6) \
AnnaBridge	167:e84263d55307	74	\|\| ((__CLOCK__) == LL_ADC_CLOCK_SYNC_PCLK_DIV8) \
AnnaBridge	167:e84263d55307	75	)
AnnaBridge	167:e84263d55307	76
AnnaBridge	167:e84263d55307	77	/* Check of parameters for configuration of ADC hierarchical scope: */
AnnaBridge	167:e84263d55307	78	/* ADC instance. */
AnnaBridge	167:e84263d55307	79	#define IS_LL_ADC_RESOLUTION(__RESOLUTION__) \
AnnaBridge	167:e84263d55307	80	( ((__RESOLUTION__) == LL_ADC_RESOLUTION_12B) \
AnnaBridge	167:e84263d55307	81	\|\| ((__RESOLUTION__) == LL_ADC_RESOLUTION_10B) \
AnnaBridge	167:e84263d55307	82	\|\| ((__RESOLUTION__) == LL_ADC_RESOLUTION_8B) \
AnnaBridge	167:e84263d55307	83	\|\| ((__RESOLUTION__) == LL_ADC_RESOLUTION_6B) \
AnnaBridge	167:e84263d55307	84	)
AnnaBridge	167:e84263d55307	85
AnnaBridge	167:e84263d55307	86	#define IS_LL_ADC_DATA_ALIGN(__DATA_ALIGN__) \
AnnaBridge	167:e84263d55307	87	( ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_RIGHT) \
AnnaBridge	167:e84263d55307	88	\|\| ((__DATA_ALIGN__) == LL_ADC_DATA_ALIGN_LEFT) \
AnnaBridge	167:e84263d55307	89	)
AnnaBridge	167:e84263d55307	90
AnnaBridge	167:e84263d55307	91	#define IS_LL_ADC_SCAN_SELECTION(__SCAN_SELECTION__) \
AnnaBridge	167:e84263d55307	92	( ((__SCAN_SELECTION__) == LL_ADC_SEQ_SCAN_DISABLE) \
AnnaBridge	167:e84263d55307	93	\|\| ((__SCAN_SELECTION__) == LL_ADC_SEQ_SCAN_ENABLE) \
AnnaBridge	167:e84263d55307	94	)
AnnaBridge	167:e84263d55307	95
AnnaBridge	167:e84263d55307	96	#define IS_LL_ADC_SEQ_SCAN_MODE(__SEQ_SCAN_MODE__) \
AnnaBridge	167:e84263d55307	97	( ((__SCAN_MODE__) == LL_ADC_SEQ_SCAN_DISABLE) \
AnnaBridge	167:e84263d55307	98	\|\| ((__SCAN_MODE__) == LL_ADC_SEQ_SCAN_ENABLE) \
AnnaBridge	167:e84263d55307	99	)
AnnaBridge	167:e84263d55307	100
AnnaBridge	167:e84263d55307	101	/* Check of parameters for configuration of ADC hierarchical scope: */
AnnaBridge	167:e84263d55307	102	/* ADC group regular */
AnnaBridge	167:e84263d55307	103	#define IS_LL_ADC_REG_TRIG_SOURCE(__REG_TRIG_SOURCE__) \
AnnaBridge	167:e84263d55307	104	( ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_SOFTWARE) \
AnnaBridge	167:e84263d55307	105	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH1) \
AnnaBridge	167:e84263d55307	106	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH2) \
AnnaBridge	167:e84263d55307	107	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM1_CH3) \
AnnaBridge	167:e84263d55307	108	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH2) \
AnnaBridge	167:e84263d55307	109	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH3) \
AnnaBridge	167:e84263d55307	110	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_CH4) \
AnnaBridge	167:e84263d55307	111	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM2_TRGO) \
AnnaBridge	167:e84263d55307	112	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_CH1) \
AnnaBridge	167:e84263d55307	113	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM3_TRGO) \
AnnaBridge	167:e84263d55307	114	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM4_CH4) \
AnnaBridge	167:e84263d55307	115	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM5_CH1) \
AnnaBridge	167:e84263d55307	116	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM5_CH2) \
AnnaBridge	167:e84263d55307	117	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM5_CH3) \
AnnaBridge	167:e84263d55307	118	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM8_CH1) \
AnnaBridge	167:e84263d55307	119	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_TIM8_TRGO) \
AnnaBridge	167:e84263d55307	120	\|\| ((__REG_TRIG_SOURCE__) == LL_ADC_REG_TRIG_EXT_EXTI_LINE11) \
AnnaBridge	167:e84263d55307	121	)
AnnaBridge	167:e84263d55307	122	#define IS_LL_ADC_REG_CONTINUOUS_MODE(__REG_CONTINUOUS_MODE__) \
AnnaBridge	167:e84263d55307	123	( ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_SINGLE) \
AnnaBridge	167:e84263d55307	124	\|\| ((__REG_CONTINUOUS_MODE__) == LL_ADC_REG_CONV_CONTINUOUS) \
AnnaBridge	167:e84263d55307	125	)
AnnaBridge	167:e84263d55307	126
AnnaBridge	167:e84263d55307	127	#define IS_LL_ADC_REG_DMA_TRANSFER(__REG_DMA_TRANSFER__) \
AnnaBridge	167:e84263d55307	128	( ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_NONE) \
AnnaBridge	167:e84263d55307	129	\|\| ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_LIMITED) \
AnnaBridge	167:e84263d55307	130	\|\| ((__REG_DMA_TRANSFER__) == LL_ADC_REG_DMA_TRANSFER_UNLIMITED) \
AnnaBridge	167:e84263d55307	131	)
AnnaBridge	167:e84263d55307	132
AnnaBridge	167:e84263d55307	133	#define IS_LL_ADC_REG_FLAG_EOC_SELECTION(__REG_FLAG_EOC_SELECTION__) \
AnnaBridge	167:e84263d55307	134	( ((__REG_FLAG_EOC_SELECTION__) == LL_ADC_REG_FLAG_EOC_SEQUENCE_CONV) \
AnnaBridge	167:e84263d55307	135	\|\| ((__REG_FLAG_EOC_SELECTION__) == LL_ADC_REG_FLAG_EOC_UNITARY_CONV) \
AnnaBridge	167:e84263d55307	136	)
AnnaBridge	167:e84263d55307	137
AnnaBridge	167:e84263d55307	138	#define IS_LL_ADC_REG_SEQ_SCAN_LENGTH(__REG_SEQ_SCAN_LENGTH__) \
AnnaBridge	167:e84263d55307	139	( ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_DISABLE) \
AnnaBridge	167:e84263d55307	140	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_2RANKS) \
AnnaBridge	167:e84263d55307	141	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_3RANKS) \
AnnaBridge	167:e84263d55307	142	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_4RANKS) \
AnnaBridge	167:e84263d55307	143	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_5RANKS) \
AnnaBridge	167:e84263d55307	144	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_6RANKS) \
AnnaBridge	167:e84263d55307	145	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_7RANKS) \
AnnaBridge	167:e84263d55307	146	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_8RANKS) \
AnnaBridge	167:e84263d55307	147	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_9RANKS) \
AnnaBridge	167:e84263d55307	148	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_10RANKS) \
AnnaBridge	167:e84263d55307	149	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_11RANKS) \
AnnaBridge	167:e84263d55307	150	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_12RANKS) \
AnnaBridge	167:e84263d55307	151	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_13RANKS) \
AnnaBridge	167:e84263d55307	152	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_14RANKS) \
AnnaBridge	167:e84263d55307	153	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_15RANKS) \
AnnaBridge	167:e84263d55307	154	\|\| ((__REG_SEQ_SCAN_LENGTH__) == LL_ADC_REG_SEQ_SCAN_ENABLE_16RANKS) \
AnnaBridge	167:e84263d55307	155	)
AnnaBridge	167:e84263d55307	156
AnnaBridge	167:e84263d55307	157	#define IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(__REG_SEQ_DISCONT_MODE__) \
AnnaBridge	167:e84263d55307	158	( ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_DISABLE) \
AnnaBridge	167:e84263d55307	159	\|\| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_1RANK) \
AnnaBridge	167:e84263d55307	160	\|\| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_2RANKS) \
AnnaBridge	167:e84263d55307	161	\|\| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_3RANKS) \
AnnaBridge	167:e84263d55307	162	\|\| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_4RANKS) \
AnnaBridge	167:e84263d55307	163	\|\| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_5RANKS) \
AnnaBridge	167:e84263d55307	164	\|\| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_6RANKS) \
AnnaBridge	167:e84263d55307	165	\|\| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_7RANKS) \
AnnaBridge	167:e84263d55307	166	\|\| ((__REG_SEQ_DISCONT_MODE__) == LL_ADC_REG_SEQ_DISCONT_8RANKS) \
AnnaBridge	167:e84263d55307	167	)
AnnaBridge	167:e84263d55307	168
AnnaBridge	167:e84263d55307	169	/* Check of parameters for configuration of ADC hierarchical scope: */
AnnaBridge	167:e84263d55307	170	/* ADC group injected */
AnnaBridge	167:e84263d55307	171	#define IS_LL_ADC_INJ_TRIG_SOURCE(__INJ_TRIG_SOURCE__) \
AnnaBridge	167:e84263d55307	172	( ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_SOFTWARE) \
AnnaBridge	167:e84263d55307	173	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM1_CH4) \
AnnaBridge	167:e84263d55307	174	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM1_TRGO) \
AnnaBridge	167:e84263d55307	175	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM2_CH1) \
AnnaBridge	167:e84263d55307	176	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM2_TRGO) \
AnnaBridge	167:e84263d55307	177	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM3_CH2) \
AnnaBridge	167:e84263d55307	178	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM3_CH4) \
AnnaBridge	167:e84263d55307	179	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_CH1) \
AnnaBridge	167:e84263d55307	180	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_CH2) \
AnnaBridge	167:e84263d55307	181	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_CH3) \
AnnaBridge	167:e84263d55307	182	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM4_TRGO) \
AnnaBridge	167:e84263d55307	183	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM5_CH4) \
AnnaBridge	167:e84263d55307	184	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM5_TRGO) \
AnnaBridge	167:e84263d55307	185	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM8_CH2) \
AnnaBridge	167:e84263d55307	186	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM8_CH3) \
AnnaBridge	167:e84263d55307	187	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_TIM8_CH4) \
AnnaBridge	167:e84263d55307	188	\|\| ((__INJ_TRIG_SOURCE__) == LL_ADC_INJ_TRIG_EXT_EXTI_LINE15) \
AnnaBridge	167:e84263d55307	189	)
AnnaBridge	167:e84263d55307	190
AnnaBridge	167:e84263d55307	191	#define IS_LL_ADC_INJ_TRIG_EXT_EDGE(__INJ_TRIG_EXT_EDGE__) \
AnnaBridge	167:e84263d55307	192	( ((__INJ_TRIG_EXT_EDGE__) == LL_ADC_INJ_TRIG_EXT_RISING) \
AnnaBridge	167:e84263d55307	193	\|\| ((__INJ_TRIG_EXT_EDGE__) == LL_ADC_INJ_TRIG_EXT_FALLING) \
AnnaBridge	167:e84263d55307	194	\|\| ((__INJ_TRIG_EXT_EDGE__) == LL_ADC_INJ_TRIG_EXT_RISINGFALLING) \
AnnaBridge	167:e84263d55307	195	)
AnnaBridge	167:e84263d55307	196
AnnaBridge	167:e84263d55307	197	#define IS_LL_ADC_INJ_TRIG_AUTO(__INJ_TRIG_AUTO__) \
AnnaBridge	167:e84263d55307	198	( ((__INJ_TRIG_AUTO__) == LL_ADC_INJ_TRIG_INDEPENDENT) \
AnnaBridge	167:e84263d55307	199	\|\| ((__INJ_TRIG_AUTO__) == LL_ADC_INJ_TRIG_FROM_GRP_REGULAR) \
AnnaBridge	167:e84263d55307	200	)
AnnaBridge	167:e84263d55307	201
AnnaBridge	167:e84263d55307	202	#define IS_LL_ADC_INJ_SEQ_SCAN_LENGTH(__INJ_SEQ_SCAN_LENGTH__) \
AnnaBridge	167:e84263d55307	203	( ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_DISABLE) \
AnnaBridge	167:e84263d55307	204	\|\| ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_ENABLE_2RANKS) \
AnnaBridge	167:e84263d55307	205	\|\| ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_ENABLE_3RANKS) \
AnnaBridge	167:e84263d55307	206	\|\| ((__INJ_SEQ_SCAN_LENGTH__) == LL_ADC_INJ_SEQ_SCAN_ENABLE_4RANKS) \
AnnaBridge	167:e84263d55307	207	)
AnnaBridge	167:e84263d55307	208
AnnaBridge	167:e84263d55307	209	#define IS_LL_ADC_INJ_SEQ_SCAN_DISCONT_MODE(__INJ_SEQ_DISCONT_MODE__) \
AnnaBridge	167:e84263d55307	210	( ((__INJ_SEQ_DISCONT_MODE__) == LL_ADC_INJ_SEQ_DISCONT_DISABLE) \
AnnaBridge	167:e84263d55307	211	\|\| ((__INJ_SEQ_DISCONT_MODE__) == LL_ADC_INJ_SEQ_DISCONT_1RANK) \
AnnaBridge	167:e84263d55307	212	)
AnnaBridge	167:e84263d55307	213
AnnaBridge	167:e84263d55307	214	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	167:e84263d55307	215	/* Check of parameters for configuration of ADC hierarchical scope: */
AnnaBridge	167:e84263d55307	216	/* multimode. */
AnnaBridge	167:e84263d55307	217	#if defined(ADC3)
AnnaBridge	167:e84263d55307	218	#define IS_LL_ADC_MULTI_MODE(__MULTI_MODE__) \
AnnaBridge	167:e84263d55307	219	( ((__MULTI_MODE__) == LL_ADC_MULTI_INDEPENDENT) \
AnnaBridge	167:e84263d55307	220	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIMULT) \
AnnaBridge	167:e84263d55307	221	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INTERL) \
AnnaBridge	167:e84263d55307	222	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_SIMULT) \
AnnaBridge	167:e84263d55307	223	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_ALTERN) \
AnnaBridge	167:e84263d55307	224	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM) \
AnnaBridge	167:e84263d55307	225	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT) \
AnnaBridge	167:e84263d55307	226	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM) \
AnnaBridge	167:e84263d55307	227	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_SIM_INJ_SIM) \
AnnaBridge	167:e84263d55307	228	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_SIM_INJ_ALT) \
AnnaBridge	167:e84263d55307	229	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_INJ_SIMULT) \
AnnaBridge	167:e84263d55307	230	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_SIMULT) \
AnnaBridge	167:e84263d55307	231	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_REG_INTERL) \
AnnaBridge	167:e84263d55307	232	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_TRIPLE_INJ_ALTERN) \
AnnaBridge	167:e84263d55307	233	)
AnnaBridge	167:e84263d55307	234	#else
AnnaBridge	167:e84263d55307	235	#define IS_LL_ADC_MULTI_MODE(__MULTI_MODE__) \
AnnaBridge	167:e84263d55307	236	( ((__MULTI_MODE__) == LL_ADC_MULTI_INDEPENDENT) \
AnnaBridge	167:e84263d55307	237	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIMULT) \
AnnaBridge	167:e84263d55307	238	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INTERL) \
AnnaBridge	167:e84263d55307	239	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_SIMULT) \
AnnaBridge	167:e84263d55307	240	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_INJ_ALTERN) \
AnnaBridge	167:e84263d55307	241	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_SIM) \
AnnaBridge	167:e84263d55307	242	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_SIM_INJ_ALT) \
AnnaBridge	167:e84263d55307	243	\|\| ((__MULTI_MODE__) == LL_ADC_MULTI_DUAL_REG_INT_INJ_SIM) \
AnnaBridge	167:e84263d55307	244	)
AnnaBridge	167:e84263d55307	245	#endif
AnnaBridge	167:e84263d55307	246
AnnaBridge	167:e84263d55307	247	#define IS_LL_ADC_MULTI_DMA_TRANSFER(__MULTI_DMA_TRANSFER__) \
AnnaBridge	167:e84263d55307	248	( ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_EACH_ADC) \
AnnaBridge	167:e84263d55307	249	\|\| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_LIMIT_1) \
AnnaBridge	167:e84263d55307	250	\|\| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_LIMIT_2) \
AnnaBridge	167:e84263d55307	251	\|\| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_LIMIT_3) \
AnnaBridge	167:e84263d55307	252	\|\| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_UNLMT_1) \
AnnaBridge	167:e84263d55307	253	\|\| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_UNLMT_2) \
AnnaBridge	167:e84263d55307	254	\|\| ((__MULTI_DMA_TRANSFER__) == LL_ADC_MULTI_REG_DMA_UNLMT_3) \
AnnaBridge	167:e84263d55307	255	)
AnnaBridge	167:e84263d55307	256
AnnaBridge	167:e84263d55307	257	#define IS_LL_ADC_MULTI_TWOSMP_DELAY(__MULTI_TWOSMP_DELAY__) \
AnnaBridge	167:e84263d55307	258	( ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES) \
AnnaBridge	167:e84263d55307	259	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES) \
AnnaBridge	167:e84263d55307	260	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES) \
AnnaBridge	167:e84263d55307	261	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES) \
AnnaBridge	167:e84263d55307	262	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES) \
AnnaBridge	167:e84263d55307	263	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_10CYCLES) \
AnnaBridge	167:e84263d55307	264	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_11CYCLES) \
AnnaBridge	167:e84263d55307	265	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_12CYCLES) \
AnnaBridge	167:e84263d55307	266	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_13CYCLES) \
AnnaBridge	167:e84263d55307	267	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_14CYCLES) \
AnnaBridge	167:e84263d55307	268	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_15CYCLES) \
AnnaBridge	167:e84263d55307	269	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_16CYCLES) \
AnnaBridge	167:e84263d55307	270	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_17CYCLES) \
AnnaBridge	167:e84263d55307	271	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_18CYCLES) \
AnnaBridge	167:e84263d55307	272	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_19CYCLES) \
AnnaBridge	167:e84263d55307	273	\|\| ((__MULTI_TWOSMP_DELAY__) == LL_ADC_MULTI_TWOSMP_DELAY_20CYCLES) \
AnnaBridge	167:e84263d55307	274	)
AnnaBridge	167:e84263d55307	275
AnnaBridge	167:e84263d55307	276	#define IS_LL_ADC_MULTI_MASTER_SLAVE(__MULTI_MASTER_SLAVE__) \
AnnaBridge	167:e84263d55307	277	( ((__MULTI_MASTER_SLAVE__) == LL_ADC_MULTI_MASTER) \
AnnaBridge	167:e84263d55307	278	\|\| ((__MULTI_MASTER_SLAVE__) == LL_ADC_MULTI_SLAVE) \
AnnaBridge	167:e84263d55307	279	\|\| ((__MULTI_MASTER_SLAVE__) == LL_ADC_MULTI_MASTER_SLAVE) \
AnnaBridge	167:e84263d55307	280	)
AnnaBridge	167:e84263d55307	281
AnnaBridge	167:e84263d55307	282	#endif /* ADC_MULTIMODE_SUPPORT */
AnnaBridge	167:e84263d55307	283	/**
AnnaBridge	167:e84263d55307	284	* @}
AnnaBridge	167:e84263d55307	285	*/
AnnaBridge	167:e84263d55307	286
AnnaBridge	167:e84263d55307	287
AnnaBridge	167:e84263d55307	288	/* Private function prototypes -----------------------------------------------*/
AnnaBridge	167:e84263d55307	289
AnnaBridge	167:e84263d55307	290	/* Exported functions --------------------------------------------------------*/
AnnaBridge	167:e84263d55307	291	/** @addtogroup ADC_LL_Exported_Functions
AnnaBridge	167:e84263d55307	292	* @{
AnnaBridge	167:e84263d55307	293	*/
AnnaBridge	167:e84263d55307	294
AnnaBridge	167:e84263d55307	295	/** @addtogroup ADC_LL_EF_Init
AnnaBridge	167:e84263d55307	296	* @{
AnnaBridge	167:e84263d55307	297	*/
AnnaBridge	167:e84263d55307	298
AnnaBridge	167:e84263d55307	299	/**
AnnaBridge	167:e84263d55307	300	* @brief De-initialize registers of all ADC instances belonging to
AnnaBridge	167:e84263d55307	301	* the same ADC common instance to their default reset values.
AnnaBridge	167:e84263d55307	302	* @param ADCxy_COMMON ADC common instance
AnnaBridge	167:e84263d55307	303	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	167:e84263d55307	304	* @retval An ErrorStatus enumeration value:
AnnaBridge	167:e84263d55307	305	* - SUCCESS: ADC common registers are de-initialized
AnnaBridge	167:e84263d55307	306	* - ERROR: not applicable
AnnaBridge	167:e84263d55307	307	*/
AnnaBridge	167:e84263d55307	308	ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	167:e84263d55307	309	{
AnnaBridge	167:e84263d55307	310	/* Check the parameters */
AnnaBridge	167:e84263d55307	311	assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
AnnaBridge	167:e84263d55307	312
AnnaBridge	167:e84263d55307	313
AnnaBridge	167:e84263d55307	314	/* Force reset of ADC clock (core clock) */
AnnaBridge	167:e84263d55307	315	LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_ADC);
AnnaBridge	167:e84263d55307	316
AnnaBridge	167:e84263d55307	317	/* Release reset of ADC clock (core clock) */
AnnaBridge	167:e84263d55307	318	LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_ADC);
AnnaBridge	167:e84263d55307	319
AnnaBridge	167:e84263d55307	320	return SUCCESS;
AnnaBridge	167:e84263d55307	321	}
AnnaBridge	167:e84263d55307	322
AnnaBridge	167:e84263d55307	323	/**
AnnaBridge	167:e84263d55307	324	* @brief Initialize some features of ADC common parameters
AnnaBridge	167:e84263d55307	325	* (all ADC instances belonging to the same ADC common instance)
AnnaBridge	167:e84263d55307	326	* and multimode (for devices with several ADC instances available).
AnnaBridge	167:e84263d55307	327	* @note The setting of ADC common parameters is conditioned to
AnnaBridge	167:e84263d55307	328	* ADC instances state:
AnnaBridge	167:e84263d55307	329	* All ADC instances belonging to the same ADC common instance
AnnaBridge	167:e84263d55307	330	* must be disabled.
AnnaBridge	167:e84263d55307	331	* @param ADCxy_COMMON ADC common instance
AnnaBridge	167:e84263d55307	332	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	167:e84263d55307	333	* @param ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
AnnaBridge	167:e84263d55307	334	* @retval An ErrorStatus enumeration value:
AnnaBridge	167:e84263d55307	335	* - SUCCESS: ADC common registers are initialized
AnnaBridge	167:e84263d55307	336	* - ERROR: ADC common registers are not initialized
AnnaBridge	167:e84263d55307	337	*/
AnnaBridge	167:e84263d55307	338	ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef ADCxy_COMMON, LL_ADC_CommonInitTypeDef ADC_CommonInitStruct)
AnnaBridge	167:e84263d55307	339	{
AnnaBridge	167:e84263d55307	340	ErrorStatus status = SUCCESS;
AnnaBridge	167:e84263d55307	341
AnnaBridge	167:e84263d55307	342	/* Check the parameters */
AnnaBridge	167:e84263d55307	343	assert_param(IS_ADC_COMMON_INSTANCE(ADCxy_COMMON));
AnnaBridge	167:e84263d55307	344	assert_param(IS_LL_ADC_COMMON_CLOCK(ADC_CommonInitStruct->CommonClock));
AnnaBridge	167:e84263d55307	345
AnnaBridge	167:e84263d55307	346	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	167:e84263d55307	347	assert_param(IS_LL_ADC_MULTI_MODE(ADC_CommonInitStruct->Multimode));
AnnaBridge	167:e84263d55307	348	if(ADC_CommonInitStruct->Multimode != LL_ADC_MULTI_INDEPENDENT)
AnnaBridge	167:e84263d55307	349	{
AnnaBridge	167:e84263d55307	350	assert_param(IS_LL_ADC_MULTI_DMA_TRANSFER(ADC_CommonInitStruct->MultiDMATransfer));
AnnaBridge	167:e84263d55307	351	assert_param(IS_LL_ADC_MULTI_TWOSMP_DELAY(ADC_CommonInitStruct->MultiTwoSamplingDelay));
AnnaBridge	167:e84263d55307	352	}
AnnaBridge	167:e84263d55307	353	#endif /* ADC_MULTIMODE_SUPPORT */
AnnaBridge	167:e84263d55307	354
AnnaBridge	167:e84263d55307	355	/* Note: Hardware constraint (refer to description of functions */
AnnaBridge	167:e84263d55307	356	/* "LL_ADC_SetCommonXXX()" and "LL_ADC_SetMultiXXX()"): */
AnnaBridge	167:e84263d55307	357	/* On this STM32 serie, setting of these features is conditioned to */
AnnaBridge	167:e84263d55307	358	/* ADC state: */
AnnaBridge	167:e84263d55307	359	/* All ADC instances of the ADC common group must be disabled. */
AnnaBridge	167:e84263d55307	360	if(__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(ADCxy_COMMON) == 0U)
AnnaBridge	167:e84263d55307	361	{
AnnaBridge	167:e84263d55307	362	/* Configuration of ADC hierarchical scope: */
AnnaBridge	167:e84263d55307	363	/* - common to several ADC */
AnnaBridge	167:e84263d55307	364	/* (all ADC instances belonging to the same ADC common instance) */
AnnaBridge	167:e84263d55307	365	/* - Set ADC clock (conversion clock) */
AnnaBridge	167:e84263d55307	366	/* - multimode (if several ADC instances available on the */
AnnaBridge	167:e84263d55307	367	/* selected device) */
AnnaBridge	167:e84263d55307	368	/* - Set ADC multimode configuration */
AnnaBridge	167:e84263d55307	369	/* - Set ADC multimode DMA transfer */
AnnaBridge	167:e84263d55307	370	/* - Set ADC multimode: delay between 2 sampling phases */
AnnaBridge	167:e84263d55307	371	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	167:e84263d55307	372	if(ADC_CommonInitStruct->Multimode != LL_ADC_MULTI_INDEPENDENT)
AnnaBridge	167:e84263d55307	373	{
AnnaBridge	167:e84263d55307	374	MODIFY_REG(ADCxy_COMMON->CCR,
AnnaBridge	167:e84263d55307	375	ADC_CCR_ADCPRE
AnnaBridge	167:e84263d55307	376	\| ADC_CCR_MULTI
AnnaBridge	167:e84263d55307	377	\| ADC_CCR_DMA
AnnaBridge	167:e84263d55307	378	\| ADC_CCR_DDS
AnnaBridge	167:e84263d55307	379	\| ADC_CCR_DELAY
AnnaBridge	167:e84263d55307	380	,
AnnaBridge	167:e84263d55307	381	ADC_CommonInitStruct->CommonClock
AnnaBridge	167:e84263d55307	382	\| ADC_CommonInitStruct->Multimode
AnnaBridge	167:e84263d55307	383	\| ADC_CommonInitStruct->MultiDMATransfer
AnnaBridge	167:e84263d55307	384	\| ADC_CommonInitStruct->MultiTwoSamplingDelay
AnnaBridge	167:e84263d55307	385	);
AnnaBridge	167:e84263d55307	386	}
AnnaBridge	167:e84263d55307	387	else
AnnaBridge	167:e84263d55307	388	{
AnnaBridge	167:e84263d55307	389	MODIFY_REG(ADCxy_COMMON->CCR,
AnnaBridge	167:e84263d55307	390	ADC_CCR_ADCPRE
AnnaBridge	167:e84263d55307	391	\| ADC_CCR_MULTI
AnnaBridge	167:e84263d55307	392	\| ADC_CCR_DMA
AnnaBridge	167:e84263d55307	393	\| ADC_CCR_DDS
AnnaBridge	167:e84263d55307	394	\| ADC_CCR_DELAY
AnnaBridge	167:e84263d55307	395	,
AnnaBridge	167:e84263d55307	396	ADC_CommonInitStruct->CommonClock
AnnaBridge	167:e84263d55307	397	\| LL_ADC_MULTI_INDEPENDENT
AnnaBridge	167:e84263d55307	398	);
AnnaBridge	167:e84263d55307	399	}
AnnaBridge	167:e84263d55307	400	#else
AnnaBridge	167:e84263d55307	401	LL_ADC_SetCommonClock(ADCxy_COMMON, ADC_CommonInitStruct->CommonClock);
AnnaBridge	167:e84263d55307	402	#endif
AnnaBridge	167:e84263d55307	403	}
AnnaBridge	167:e84263d55307	404	else
AnnaBridge	167:e84263d55307	405	{
AnnaBridge	167:e84263d55307	406	/* Initialization error: One or several ADC instances belonging to */
AnnaBridge	167:e84263d55307	407	/* the same ADC common instance are not disabled. */
AnnaBridge	167:e84263d55307	408	status = ERROR;
AnnaBridge	167:e84263d55307	409	}
AnnaBridge	167:e84263d55307	410
AnnaBridge	167:e84263d55307	411	return status;
AnnaBridge	167:e84263d55307	412	}
AnnaBridge	167:e84263d55307	413
AnnaBridge	167:e84263d55307	414	/**
AnnaBridge	167:e84263d55307	415	* @brief Set each @ref LL_ADC_CommonInitTypeDef field to default value.
AnnaBridge	167:e84263d55307	416	* @param ADC_CommonInitStruct Pointer to a @ref LL_ADC_CommonInitTypeDef structure
AnnaBridge	167:e84263d55307	417	* whose fields will be set to default values.
AnnaBridge	167:e84263d55307	418	* @retval None
AnnaBridge	167:e84263d55307	419	*/
AnnaBridge	167:e84263d55307	420	void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct)
AnnaBridge	167:e84263d55307	421	{
AnnaBridge	167:e84263d55307	422	/* Set ADC_CommonInitStruct fields to default values */
AnnaBridge	167:e84263d55307	423	/* Set fields of ADC common */
AnnaBridge	167:e84263d55307	424	/* (all ADC instances belonging to the same ADC common instance) */
AnnaBridge	167:e84263d55307	425	ADC_CommonInitStruct->CommonClock = LL_ADC_CLOCK_SYNC_PCLK_DIV2;
AnnaBridge	167:e84263d55307	426
AnnaBridge	167:e84263d55307	427	#if defined(ADC_MULTIMODE_SUPPORT)
AnnaBridge	167:e84263d55307	428	/* Set fields of ADC multimode */
AnnaBridge	167:e84263d55307	429	ADC_CommonInitStruct->Multimode = LL_ADC_MULTI_INDEPENDENT;
AnnaBridge	167:e84263d55307	430	ADC_CommonInitStruct->MultiDMATransfer = LL_ADC_MULTI_REG_DMA_EACH_ADC;
AnnaBridge	167:e84263d55307	431	ADC_CommonInitStruct->MultiTwoSamplingDelay = LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES;
AnnaBridge	167:e84263d55307	432	#endif /* ADC_MULTIMODE_SUPPORT */
AnnaBridge	167:e84263d55307	433	}
AnnaBridge	167:e84263d55307	434
AnnaBridge	167:e84263d55307	435	/**
AnnaBridge	167:e84263d55307	436	* @brief De-initialize registers of the selected ADC instance
AnnaBridge	167:e84263d55307	437	* to their default reset values.
AnnaBridge	167:e84263d55307	438	* @note To reset all ADC instances quickly (perform a hard reset),
AnnaBridge	167:e84263d55307	439	* use function @ref LL_ADC_CommonDeInit().
AnnaBridge	167:e84263d55307	440	* @param ADCx ADC instance
AnnaBridge	167:e84263d55307	441	* @retval An ErrorStatus enumeration value:
AnnaBridge	167:e84263d55307	442	* - SUCCESS: ADC registers are de-initialized
AnnaBridge	167:e84263d55307	443	* - ERROR: ADC registers are not de-initialized
AnnaBridge	167:e84263d55307	444	*/
AnnaBridge	167:e84263d55307	445	ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx)
AnnaBridge	167:e84263d55307	446	{
AnnaBridge	167:e84263d55307	447	ErrorStatus status = SUCCESS;
AnnaBridge	167:e84263d55307	448
AnnaBridge	167:e84263d55307	449	/* Check the parameters */
AnnaBridge	167:e84263d55307	450	assert_param(IS_ADC_ALL_INSTANCE(ADCx));
AnnaBridge	167:e84263d55307	451
AnnaBridge	167:e84263d55307	452	/* Disable ADC instance if not already disabled. */
AnnaBridge	167:e84263d55307	453	if(LL_ADC_IsEnabled(ADCx) == 1U)
AnnaBridge	167:e84263d55307	454	{
AnnaBridge	167:e84263d55307	455	/* Set ADC group regular trigger source to SW start to ensure to not */
AnnaBridge	167:e84263d55307	456	/* have an external trigger event occurring during the conversion stop */
AnnaBridge	167:e84263d55307	457	/* ADC disable process. */
AnnaBridge	167:e84263d55307	458	LL_ADC_REG_SetTriggerSource(ADCx, LL_ADC_REG_TRIG_SOFTWARE);
AnnaBridge	167:e84263d55307	459
AnnaBridge	167:e84263d55307	460	/* Set ADC group injected trigger source to SW start to ensure to not */
AnnaBridge	167:e84263d55307	461	/* have an external trigger event occurring during the conversion stop */
AnnaBridge	167:e84263d55307	462	/* ADC disable process. */
AnnaBridge	167:e84263d55307	463	LL_ADC_INJ_SetTriggerSource(ADCx, LL_ADC_INJ_TRIG_SOFTWARE);
AnnaBridge	167:e84263d55307	464
AnnaBridge	167:e84263d55307	465	/* Disable the ADC instance */
AnnaBridge	167:e84263d55307	466	LL_ADC_Disable(ADCx);
AnnaBridge	167:e84263d55307	467	}
AnnaBridge	167:e84263d55307	468
AnnaBridge	167:e84263d55307	469	/* Check whether ADC state is compliant with expected state */
AnnaBridge	167:e84263d55307	470	/* (hardware requirements of bits state to reset registers below) */
AnnaBridge	167:e84263d55307	471	if(READ_BIT(ADCx->CR2, ADC_CR2_ADON) == 0U)
AnnaBridge	167:e84263d55307	472	{
AnnaBridge	167:e84263d55307	473	/* ========== Reset ADC registers ========== */
AnnaBridge	167:e84263d55307	474	/* Reset register SR */
AnnaBridge	167:e84263d55307	475	CLEAR_BIT(ADCx->SR,
AnnaBridge	167:e84263d55307	476	( LL_ADC_FLAG_STRT
AnnaBridge	167:e84263d55307	477	\| LL_ADC_FLAG_JSTRT
AnnaBridge	167:e84263d55307	478	\| LL_ADC_FLAG_EOCS
AnnaBridge	167:e84263d55307	479	\| LL_ADC_FLAG_OVR
AnnaBridge	167:e84263d55307	480	\| LL_ADC_FLAG_JEOS
AnnaBridge	167:e84263d55307	481	\| LL_ADC_FLAG_AWD1 )
AnnaBridge	167:e84263d55307	482	);
AnnaBridge	167:e84263d55307	483
AnnaBridge	167:e84263d55307	484	/* Reset register CR1 */
AnnaBridge	167:e84263d55307	485	CLEAR_BIT(ADCx->CR1,
AnnaBridge	167:e84263d55307	486	( ADC_CR1_OVRIE \| ADC_CR1_RES \| ADC_CR1_AWDEN
AnnaBridge	167:e84263d55307	487	\| ADC_CR1_JAWDEN
AnnaBridge	167:e84263d55307	488	\| ADC_CR1_DISCNUM \| ADC_CR1_JDISCEN \| ADC_CR1_DISCEN
AnnaBridge	167:e84263d55307	489	\| ADC_CR1_JAUTO \| ADC_CR1_AWDSGL \| ADC_CR1_SCAN
AnnaBridge	167:e84263d55307	490	\| ADC_CR1_JEOCIE \| ADC_CR1_AWDIE \| ADC_CR1_EOCIE
AnnaBridge	167:e84263d55307	491	\| ADC_CR1_AWDCH )
AnnaBridge	167:e84263d55307	492	);
AnnaBridge	167:e84263d55307	493
AnnaBridge	167:e84263d55307	494	/* Reset register CR2 */
AnnaBridge	167:e84263d55307	495	CLEAR_BIT(ADCx->CR2,
AnnaBridge	167:e84263d55307	496	( ADC_CR2_SWSTART \| ADC_CR2_EXTEN \| ADC_CR2_EXTSEL
AnnaBridge	167:e84263d55307	497	\| ADC_CR2_JSWSTART \| ADC_CR2_JEXTEN \| ADC_CR2_JEXTSEL
AnnaBridge	167:e84263d55307	498	\| ADC_CR2_ALIGN \| ADC_CR2_EOCS
AnnaBridge	167:e84263d55307	499	\| ADC_CR2_DDS \| ADC_CR2_DMA
AnnaBridge	167:e84263d55307	500	\| ADC_CR2_CONT \| ADC_CR2_ADON )
AnnaBridge	167:e84263d55307	501	);
AnnaBridge	167:e84263d55307	502
AnnaBridge	167:e84263d55307	503	/* Reset register SMPR1 */
AnnaBridge	167:e84263d55307	504	CLEAR_BIT(ADCx->SMPR1,
AnnaBridge	167:e84263d55307	505	( ADC_SMPR1_SMP18 \| ADC_SMPR1_SMP17 \| ADC_SMPR1_SMP16
AnnaBridge	167:e84263d55307	506	\| ADC_SMPR1_SMP15 \| ADC_SMPR1_SMP14 \| ADC_SMPR1_SMP13
AnnaBridge	167:e84263d55307	507	\| ADC_SMPR1_SMP12 \| ADC_SMPR1_SMP11 \| ADC_SMPR1_SMP10)
AnnaBridge	167:e84263d55307	508	);
AnnaBridge	167:e84263d55307	509
AnnaBridge	167:e84263d55307	510	/* Reset register SMPR2 */
AnnaBridge	167:e84263d55307	511	CLEAR_BIT(ADCx->SMPR2,
AnnaBridge	167:e84263d55307	512	( ADC_SMPR2_SMP9
AnnaBridge	167:e84263d55307	513	\| ADC_SMPR2_SMP8 \| ADC_SMPR2_SMP7 \| ADC_SMPR2_SMP6
AnnaBridge	167:e84263d55307	514	\| ADC_SMPR2_SMP5 \| ADC_SMPR2_SMP4 \| ADC_SMPR2_SMP3
AnnaBridge	167:e84263d55307	515	\| ADC_SMPR2_SMP2 \| ADC_SMPR2_SMP1 \| ADC_SMPR2_SMP0)
AnnaBridge	167:e84263d55307	516	);
AnnaBridge	167:e84263d55307	517
AnnaBridge	167:e84263d55307	518	/* Reset register JOFR1 */
AnnaBridge	167:e84263d55307	519	CLEAR_BIT(ADCx->JOFR1, ADC_JOFR1_JOFFSET1);
AnnaBridge	167:e84263d55307	520	/* Reset register JOFR2 */
AnnaBridge	167:e84263d55307	521	CLEAR_BIT(ADCx->JOFR2, ADC_JOFR2_JOFFSET2);
AnnaBridge	167:e84263d55307	522	/* Reset register JOFR3 */
AnnaBridge	167:e84263d55307	523	CLEAR_BIT(ADCx->JOFR3, ADC_JOFR3_JOFFSET3);
AnnaBridge	167:e84263d55307	524	/* Reset register JOFR4 */
AnnaBridge	167:e84263d55307	525	CLEAR_BIT(ADCx->JOFR4, ADC_JOFR4_JOFFSET4);
AnnaBridge	167:e84263d55307	526
AnnaBridge	167:e84263d55307	527	/* Reset register HTR */
AnnaBridge	167:e84263d55307	528	SET_BIT(ADCx->HTR, ADC_HTR_HT);
AnnaBridge	167:e84263d55307	529	/* Reset register LTR */
AnnaBridge	167:e84263d55307	530	CLEAR_BIT(ADCx->LTR, ADC_LTR_LT);
AnnaBridge	167:e84263d55307	531
AnnaBridge	167:e84263d55307	532	/* Reset register SQR1 */
AnnaBridge	167:e84263d55307	533	CLEAR_BIT(ADCx->SQR1,
AnnaBridge	167:e84263d55307	534	( ADC_SQR1_L
AnnaBridge	167:e84263d55307	535	\| ADC_SQR1_SQ16
AnnaBridge	167:e84263d55307	536	\| ADC_SQR1_SQ15 \| ADC_SQR1_SQ14 \| ADC_SQR1_SQ13)
AnnaBridge	167:e84263d55307	537	);
AnnaBridge	167:e84263d55307	538
AnnaBridge	167:e84263d55307	539	/* Reset register SQR2 */
AnnaBridge	167:e84263d55307	540	CLEAR_BIT(ADCx->SQR2,
AnnaBridge	167:e84263d55307	541	( ADC_SQR2_SQ12 \| ADC_SQR2_SQ11 \| ADC_SQR2_SQ10
AnnaBridge	167:e84263d55307	542	\| ADC_SQR2_SQ9 \| ADC_SQR2_SQ8 \| ADC_SQR2_SQ7)
AnnaBridge	167:e84263d55307	543	);
AnnaBridge	167:e84263d55307	544
AnnaBridge	167:e84263d55307	545
AnnaBridge	167:e84263d55307	546	/* Reset register JSQR */
AnnaBridge	167:e84263d55307	547	CLEAR_BIT(ADCx->JSQR,
AnnaBridge	167:e84263d55307	548	( ADC_JSQR_JL
AnnaBridge	167:e84263d55307	549	\| ADC_JSQR_JSQ4 \| ADC_JSQR_JSQ3
AnnaBridge	167:e84263d55307	550	\| ADC_JSQR_JSQ2 \| ADC_JSQR_JSQ1 )
AnnaBridge	167:e84263d55307	551	);
AnnaBridge	167:e84263d55307	552
AnnaBridge	167:e84263d55307	553	/* Reset register DR */
AnnaBridge	167:e84263d55307	554	/* bits in access mode read only, no direct reset applicable */
AnnaBridge	167:e84263d55307	555
AnnaBridge	167:e84263d55307	556	/* Reset registers JDR1, JDR2, JDR3, JDR4 */
AnnaBridge	167:e84263d55307	557	/* bits in access mode read only, no direct reset applicable */
AnnaBridge	167:e84263d55307	558
AnnaBridge	167:e84263d55307	559	/* Reset register CCR */
AnnaBridge	167:e84263d55307	560	CLEAR_BIT(ADC->CCR, ADC_CCR_TSVREFE \| ADC_CCR_ADCPRE);
AnnaBridge	167:e84263d55307	561	}
AnnaBridge	167:e84263d55307	562
AnnaBridge	167:e84263d55307	563	return status;
AnnaBridge	167:e84263d55307	564	}
AnnaBridge	167:e84263d55307	565
AnnaBridge	167:e84263d55307	566	/**
AnnaBridge	167:e84263d55307	567	* @brief Initialize some features of ADC instance.
AnnaBridge	167:e84263d55307	568	* @note These parameters have an impact on ADC scope: ADC instance.
AnnaBridge	167:e84263d55307	569	* Affects both group regular and group injected (availability
AnnaBridge	167:e84263d55307	570	* of ADC group injected depends on STM32 families).
AnnaBridge	167:e84263d55307	571	* Refer to corresponding unitary functions into
AnnaBridge	167:e84263d55307	572	* @ref ADC_LL_EF_Configuration_ADC_Instance .
AnnaBridge	167:e84263d55307	573	* @note The setting of these parameters by function @ref LL_ADC_Init()
AnnaBridge	167:e84263d55307	574	* is conditioned to ADC state:
AnnaBridge	167:e84263d55307	575	* ADC instance must be disabled.
AnnaBridge	167:e84263d55307	576	* This condition is applied to all ADC features, for efficiency
AnnaBridge	167:e84263d55307	577	* and compatibility over all STM32 families. However, the different
AnnaBridge	167:e84263d55307	578	* features can be set under different ADC state conditions
AnnaBridge	167:e84263d55307	579	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	167:e84263d55307	580	* ADC enabled with conversion on going, ...)
AnnaBridge	167:e84263d55307	581	* Each feature can be updated afterwards with a unitary function
AnnaBridge	167:e84263d55307	582	* and potentially with ADC in a different state than disabled,
AnnaBridge	167:e84263d55307	583	* refer to description of each function for setting
AnnaBridge	167:e84263d55307	584	* conditioned to ADC state.
AnnaBridge	167:e84263d55307	585	* @note After using this function, some other features must be configured
AnnaBridge	167:e84263d55307	586	* using LL unitary functions.
AnnaBridge	167:e84263d55307	587	* The minimum configuration remaining to be done is:
AnnaBridge	167:e84263d55307	588	* - Set ADC group regular or group injected sequencer:
AnnaBridge	167:e84263d55307	589	* map channel on the selected sequencer rank.
AnnaBridge	167:e84263d55307	590	* Refer to function @ref LL_ADC_REG_SetSequencerRanks().
AnnaBridge	167:e84263d55307	591	* - Set ADC channel sampling time
AnnaBridge	167:e84263d55307	592	* Refer to function LL_ADC_SetChannelSamplingTime();
AnnaBridge	167:e84263d55307	593	* @param ADCx ADC instance
AnnaBridge	167:e84263d55307	594	* @param ADC_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
AnnaBridge	167:e84263d55307	595	* @retval An ErrorStatus enumeration value:
AnnaBridge	167:e84263d55307	596	* - SUCCESS: ADC registers are initialized
AnnaBridge	167:e84263d55307	597	* - ERROR: ADC registers are not initialized
AnnaBridge	167:e84263d55307	598	*/
AnnaBridge	167:e84263d55307	599	ErrorStatus LL_ADC_Init(ADC_TypeDef ADCx, LL_ADC_InitTypeDef ADC_InitStruct)
AnnaBridge	167:e84263d55307	600	{
AnnaBridge	167:e84263d55307	601	ErrorStatus status = SUCCESS;
AnnaBridge	167:e84263d55307	602
AnnaBridge	167:e84263d55307	603	/* Check the parameters */
AnnaBridge	167:e84263d55307	604	assert_param(IS_ADC_ALL_INSTANCE(ADCx));
AnnaBridge	167:e84263d55307	605
AnnaBridge	167:e84263d55307	606	assert_param(IS_LL_ADC_RESOLUTION(ADC_InitStruct->Resolution));
AnnaBridge	167:e84263d55307	607	assert_param(IS_LL_ADC_DATA_ALIGN(ADC_InitStruct->DataAlignment));
AnnaBridge	167:e84263d55307	608	assert_param(IS_LL_ADC_SCAN_SELECTION(ADC_InitStruct->SequencersScanMode));
AnnaBridge	167:e84263d55307	609
AnnaBridge	167:e84263d55307	610	/* Note: Hardware constraint (refer to description of this function): */
AnnaBridge	167:e84263d55307	611	/* ADC instance must be disabled. */
AnnaBridge	167:e84263d55307	612	if(LL_ADC_IsEnabled(ADCx) == 0U)
AnnaBridge	167:e84263d55307	613	{
AnnaBridge	167:e84263d55307	614	/* Configuration of ADC hierarchical scope: */
AnnaBridge	167:e84263d55307	615	/* - ADC instance */
AnnaBridge	167:e84263d55307	616	/* - Set ADC data resolution */
AnnaBridge	167:e84263d55307	617	/* - Set ADC conversion data alignment */
AnnaBridge	167:e84263d55307	618	MODIFY_REG(ADCx->CR1,
AnnaBridge	167:e84263d55307	619	ADC_CR1_RES
AnnaBridge	167:e84263d55307	620	\| ADC_CR1_SCAN
AnnaBridge	167:e84263d55307	621	,
AnnaBridge	167:e84263d55307	622	ADC_InitStruct->Resolution
AnnaBridge	167:e84263d55307	623	\| ADC_InitStruct->SequencersScanMode
AnnaBridge	167:e84263d55307	624	);
AnnaBridge	167:e84263d55307	625
AnnaBridge	167:e84263d55307	626	MODIFY_REG(ADCx->CR2,
AnnaBridge	167:e84263d55307	627	ADC_CR2_ALIGN
AnnaBridge	167:e84263d55307	628	,
AnnaBridge	167:e84263d55307	629	ADC_InitStruct->DataAlignment
AnnaBridge	167:e84263d55307	630	);
AnnaBridge	167:e84263d55307	631
AnnaBridge	167:e84263d55307	632	}
AnnaBridge	167:e84263d55307	633	else
AnnaBridge	167:e84263d55307	634	{
AnnaBridge	167:e84263d55307	635	/* Initialization error: ADC instance is not disabled. */
AnnaBridge	167:e84263d55307	636	status = ERROR;
AnnaBridge	167:e84263d55307	637	}
AnnaBridge	167:e84263d55307	638	return status;
AnnaBridge	167:e84263d55307	639	}
AnnaBridge	167:e84263d55307	640
AnnaBridge	167:e84263d55307	641	/**
AnnaBridge	167:e84263d55307	642	* @brief Set each @ref LL_ADC_InitTypeDef field to default value.
AnnaBridge	167:e84263d55307	643	* @param ADC_InitStruct Pointer to a @ref LL_ADC_InitTypeDef structure
AnnaBridge	167:e84263d55307	644	* whose fields will be set to default values.
AnnaBridge	167:e84263d55307	645	* @retval None
AnnaBridge	167:e84263d55307	646	*/
AnnaBridge	167:e84263d55307	647	void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct)
AnnaBridge	167:e84263d55307	648	{
AnnaBridge	167:e84263d55307	649	/* Set ADC_InitStruct fields to default values */
AnnaBridge	167:e84263d55307	650	/* Set fields of ADC instance */
AnnaBridge	167:e84263d55307	651	ADC_InitStruct->Resolution = LL_ADC_RESOLUTION_12B;
AnnaBridge	167:e84263d55307	652	ADC_InitStruct->DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
AnnaBridge	167:e84263d55307	653
AnnaBridge	167:e84263d55307	654	/* Enable scan mode to have a generic behavior with ADC of other */
AnnaBridge	167:e84263d55307	655	/* STM32 families, without this setting available: */
AnnaBridge	167:e84263d55307	656	/* ADC group regular sequencer and ADC group injected sequencer depend */
AnnaBridge	167:e84263d55307	657	/* only of their own configuration. */
AnnaBridge	167:e84263d55307	658	ADC_InitStruct->SequencersScanMode = LL_ADC_SEQ_SCAN_ENABLE;
AnnaBridge	167:e84263d55307	659
AnnaBridge	167:e84263d55307	660	}
AnnaBridge	167:e84263d55307	661
AnnaBridge	167:e84263d55307	662	/**
AnnaBridge	167:e84263d55307	663	* @brief Initialize some features of ADC group regular.
AnnaBridge	167:e84263d55307	664	* @note These parameters have an impact on ADC scope: ADC group regular.
AnnaBridge	167:e84263d55307	665	* Refer to corresponding unitary functions into
AnnaBridge	167:e84263d55307	666	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
AnnaBridge	167:e84263d55307	667	* (functions with prefix "REG").
AnnaBridge	167:e84263d55307	668	* @note The setting of these parameters by function @ref LL_ADC_Init()
AnnaBridge	167:e84263d55307	669	* is conditioned to ADC state:
AnnaBridge	167:e84263d55307	670	* ADC instance must be disabled.
AnnaBridge	167:e84263d55307	671	* This condition is applied to all ADC features, for efficiency
AnnaBridge	167:e84263d55307	672	* and compatibility over all STM32 families. However, the different
AnnaBridge	167:e84263d55307	673	* features can be set under different ADC state conditions
AnnaBridge	167:e84263d55307	674	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	167:e84263d55307	675	* ADC enabled with conversion on going, ...)
AnnaBridge	167:e84263d55307	676	* Each feature can be updated afterwards with a unitary function
AnnaBridge	167:e84263d55307	677	* and potentially with ADC in a different state than disabled,
AnnaBridge	167:e84263d55307	678	* refer to description of each function for setting
AnnaBridge	167:e84263d55307	679	* conditioned to ADC state.
AnnaBridge	167:e84263d55307	680	* @note After using this function, other features must be configured
AnnaBridge	167:e84263d55307	681	* using LL unitary functions.
AnnaBridge	167:e84263d55307	682	* The minimum configuration remaining to be done is:
AnnaBridge	167:e84263d55307	683	* - Set ADC group regular or group injected sequencer:
AnnaBridge	167:e84263d55307	684	* map channel on the selected sequencer rank.
AnnaBridge	167:e84263d55307	685	* Refer to function @ref LL_ADC_REG_SetSequencerRanks().
AnnaBridge	167:e84263d55307	686	* - Set ADC channel sampling time
AnnaBridge	167:e84263d55307	687	* Refer to function LL_ADC_SetChannelSamplingTime();
AnnaBridge	167:e84263d55307	688	* @param ADCx ADC instance
AnnaBridge	167:e84263d55307	689	* @param ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
AnnaBridge	167:e84263d55307	690	* @retval An ErrorStatus enumeration value:
AnnaBridge	167:e84263d55307	691	* - SUCCESS: ADC registers are initialized
AnnaBridge	167:e84263d55307	692	* - ERROR: ADC registers are not initialized
AnnaBridge	167:e84263d55307	693	*/
AnnaBridge	167:e84263d55307	694	ErrorStatus LL_ADC_REG_Init(ADC_TypeDef ADCx, LL_ADC_REG_InitTypeDef ADC_REG_InitStruct)
AnnaBridge	167:e84263d55307	695	{
AnnaBridge	167:e84263d55307	696	ErrorStatus status = SUCCESS;
AnnaBridge	167:e84263d55307	697
AnnaBridge	167:e84263d55307	698	/* Check the parameters */
AnnaBridge	167:e84263d55307	699	assert_param(IS_ADC_ALL_INSTANCE(ADCx));
AnnaBridge	167:e84263d55307	700	assert_param(IS_LL_ADC_REG_TRIG_SOURCE(ADC_REG_InitStruct->TriggerSource));
AnnaBridge	167:e84263d55307	701	assert_param(IS_LL_ADC_REG_SEQ_SCAN_LENGTH(ADC_REG_InitStruct->SequencerLength));
AnnaBridge	167:e84263d55307	702	if(ADC_REG_InitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
AnnaBridge	167:e84263d55307	703	{
AnnaBridge	167:e84263d55307	704	assert_param(IS_LL_ADC_REG_SEQ_SCAN_DISCONT_MODE(ADC_REG_InitStruct->SequencerDiscont));
AnnaBridge	167:e84263d55307	705	}
AnnaBridge	167:e84263d55307	706	assert_param(IS_LL_ADC_REG_CONTINUOUS_MODE(ADC_REG_InitStruct->ContinuousMode));
AnnaBridge	167:e84263d55307	707	assert_param(IS_LL_ADC_REG_DMA_TRANSFER(ADC_REG_InitStruct->DMATransfer));
AnnaBridge	167:e84263d55307	708
AnnaBridge	167:e84263d55307	709	/* Note: Hardware constraint (refer to description of this function): */
AnnaBridge	167:e84263d55307	710	/* ADC instance must be disabled. */
AnnaBridge	167:e84263d55307	711	if(LL_ADC_IsEnabled(ADCx) == 0U)
AnnaBridge	167:e84263d55307	712	{
AnnaBridge	167:e84263d55307	713	/* Configuration of ADC hierarchical scope: */
AnnaBridge	167:e84263d55307	714	/* - ADC group regular */
AnnaBridge	167:e84263d55307	715	/* - Set ADC group regular trigger source */
AnnaBridge	167:e84263d55307	716	/* - Set ADC group regular sequencer length */
AnnaBridge	167:e84263d55307	717	/* - Set ADC group regular sequencer discontinuous mode */
AnnaBridge	167:e84263d55307	718	/* - Set ADC group regular continuous mode */
AnnaBridge	167:e84263d55307	719	/* - Set ADC group regular conversion data transfer: no transfer or */
AnnaBridge	167:e84263d55307	720	/* transfer by DMA, and DMA requests mode */
AnnaBridge	167:e84263d55307	721	/* Note: On this STM32 serie, ADC trigger edge is set when starting */
AnnaBridge	167:e84263d55307	722	/* ADC conversion. */
AnnaBridge	167:e84263d55307	723	/* Refer to function @ref LL_ADC_REG_StartConversionExtTrig(). */
AnnaBridge	167:e84263d55307	724	if(ADC_REG_InitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
AnnaBridge	167:e84263d55307	725	{
AnnaBridge	167:e84263d55307	726	MODIFY_REG(ADCx->CR1,
AnnaBridge	167:e84263d55307	727	ADC_CR1_DISCEN
AnnaBridge	167:e84263d55307	728	\| ADC_CR1_DISCNUM
AnnaBridge	167:e84263d55307	729	,
AnnaBridge	167:e84263d55307	730	ADC_REG_InitStruct->SequencerLength
AnnaBridge	167:e84263d55307	731	\| ADC_REG_InitStruct->SequencerDiscont
AnnaBridge	167:e84263d55307	732	);
AnnaBridge	167:e84263d55307	733	}
AnnaBridge	167:e84263d55307	734	else
AnnaBridge	167:e84263d55307	735	{
AnnaBridge	167:e84263d55307	736	MODIFY_REG(ADCx->CR1,
AnnaBridge	167:e84263d55307	737	ADC_CR1_DISCEN
AnnaBridge	167:e84263d55307	738	\| ADC_CR1_DISCNUM
AnnaBridge	167:e84263d55307	739	,
AnnaBridge	167:e84263d55307	740	ADC_REG_InitStruct->SequencerLength
AnnaBridge	167:e84263d55307	741	\| LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	167:e84263d55307	742	);
AnnaBridge	167:e84263d55307	743	}
AnnaBridge	167:e84263d55307	744
AnnaBridge	167:e84263d55307	745	MODIFY_REG(ADCx->CR2,
AnnaBridge	167:e84263d55307	746	ADC_CR2_EXTSEL
AnnaBridge	167:e84263d55307	747	\| ADC_CR2_EXTEN
AnnaBridge	167:e84263d55307	748	\| ADC_CR2_CONT
AnnaBridge	167:e84263d55307	749	\| ADC_CR2_DMA
AnnaBridge	167:e84263d55307	750	\| ADC_CR2_DDS
AnnaBridge	167:e84263d55307	751	,
AnnaBridge	167:e84263d55307	752	(ADC_REG_InitStruct->TriggerSource & ADC_CR2_EXTSEL)
AnnaBridge	167:e84263d55307	753	\| ADC_REG_InitStruct->ContinuousMode
AnnaBridge	167:e84263d55307	754	\| ADC_REG_InitStruct->DMATransfer
AnnaBridge	167:e84263d55307	755	);
AnnaBridge	167:e84263d55307	756
AnnaBridge	167:e84263d55307	757	/* Set ADC group regular sequencer length and scan direction */
AnnaBridge	167:e84263d55307	758	/* Note: Hardware constraint (refer to description of this function): */
AnnaBridge	167:e84263d55307	759	/* Note: If ADC instance feature scan mode is disabled */
AnnaBridge	167:e84263d55307	760	/* (refer to ADC instance initialization structure */
AnnaBridge	167:e84263d55307	761	/* parameter @ref SequencersScanMode */
AnnaBridge	167:e84263d55307	762	/* or function @ref LL_ADC_SetSequencersScanMode() ), */
AnnaBridge	167:e84263d55307	763	/* this parameter is discarded. */
AnnaBridge	167:e84263d55307	764	LL_ADC_REG_SetSequencerLength(ADCx, ADC_REG_InitStruct->SequencerLength);
AnnaBridge	167:e84263d55307	765	}
AnnaBridge	167:e84263d55307	766	else
AnnaBridge	167:e84263d55307	767	{
AnnaBridge	167:e84263d55307	768	/* Initialization error: ADC instance is not disabled. */
AnnaBridge	167:e84263d55307	769	status = ERROR;
AnnaBridge	167:e84263d55307	770	}
AnnaBridge	167:e84263d55307	771	return status;
AnnaBridge	167:e84263d55307	772	}
AnnaBridge	167:e84263d55307	773
AnnaBridge	167:e84263d55307	774	/**
AnnaBridge	167:e84263d55307	775	* @brief Set each @ref LL_ADC_REG_InitTypeDef field to default value.
AnnaBridge	167:e84263d55307	776	* @param ADC_REG_InitStruct Pointer to a @ref LL_ADC_REG_InitTypeDef structure
AnnaBridge	167:e84263d55307	777	* whose fields will be set to default values.
AnnaBridge	167:e84263d55307	778	* @retval None
AnnaBridge	167:e84263d55307	779	*/
AnnaBridge	167:e84263d55307	780	void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct)
AnnaBridge	167:e84263d55307	781	{
AnnaBridge	167:e84263d55307	782	/* Set ADC_REG_InitStruct fields to default values */
AnnaBridge	167:e84263d55307	783	/* Set fields of ADC group regular */
AnnaBridge	167:e84263d55307	784	/* Note: On this STM32 serie, ADC trigger edge is set when starting */
AnnaBridge	167:e84263d55307	785	/* ADC conversion. */
AnnaBridge	167:e84263d55307	786	/* Refer to function @ref LL_ADC_REG_StartConversionExtTrig(). */
AnnaBridge	167:e84263d55307	787	ADC_REG_InitStruct->TriggerSource = LL_ADC_REG_TRIG_SOFTWARE;
AnnaBridge	167:e84263d55307	788	ADC_REG_InitStruct->SequencerLength = LL_ADC_REG_SEQ_SCAN_DISABLE;
AnnaBridge	167:e84263d55307	789	ADC_REG_InitStruct->SequencerDiscont = LL_ADC_REG_SEQ_DISCONT_DISABLE;
AnnaBridge	167:e84263d55307	790	ADC_REG_InitStruct->ContinuousMode = LL_ADC_REG_CONV_SINGLE;
AnnaBridge	167:e84263d55307	791	ADC_REG_InitStruct->DMATransfer = LL_ADC_REG_DMA_TRANSFER_NONE;
AnnaBridge	167:e84263d55307	792	}
AnnaBridge	167:e84263d55307	793
AnnaBridge	167:e84263d55307	794	/**
AnnaBridge	167:e84263d55307	795	* @brief Initialize some features of ADC group injected.
AnnaBridge	167:e84263d55307	796	* @note These parameters have an impact on ADC scope: ADC group injected.
AnnaBridge	167:e84263d55307	797	* Refer to corresponding unitary functions into
AnnaBridge	167:e84263d55307	798	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
AnnaBridge	167:e84263d55307	799	* (functions with prefix "INJ").
AnnaBridge	167:e84263d55307	800	* @note The setting of these parameters by function @ref LL_ADC_Init()
AnnaBridge	167:e84263d55307	801	* is conditioned to ADC state:
AnnaBridge	167:e84263d55307	802	* ADC instance must be disabled.
AnnaBridge	167:e84263d55307	803	* This condition is applied to all ADC features, for efficiency
AnnaBridge	167:e84263d55307	804	* and compatibility over all STM32 families. However, the different
AnnaBridge	167:e84263d55307	805	* features can be set under different ADC state conditions
AnnaBridge	167:e84263d55307	806	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	167:e84263d55307	807	* ADC enabled with conversion on going, ...)
AnnaBridge	167:e84263d55307	808	* Each feature can be updated afterwards with a unitary function
AnnaBridge	167:e84263d55307	809	* and potentially with ADC in a different state than disabled,
AnnaBridge	167:e84263d55307	810	* refer to description of each function for setting
AnnaBridge	167:e84263d55307	811	* conditioned to ADC state.
AnnaBridge	167:e84263d55307	812	* @note After using this function, other features must be configured
AnnaBridge	167:e84263d55307	813	* using LL unitary functions.
AnnaBridge	167:e84263d55307	814	* The minimum configuration remaining to be done is:
AnnaBridge	167:e84263d55307	815	* - Set ADC group injected sequencer:
AnnaBridge	167:e84263d55307	816	* map channel on the selected sequencer rank.
AnnaBridge	167:e84263d55307	817	* Refer to function @ref LL_ADC_INJ_SetSequencerRanks().
AnnaBridge	167:e84263d55307	818	* - Set ADC channel sampling time
AnnaBridge	167:e84263d55307	819	* Refer to function LL_ADC_SetChannelSamplingTime();
AnnaBridge	167:e84263d55307	820	* @param ADCx ADC instance
AnnaBridge	167:e84263d55307	821	* @param ADC_INJ_InitStruct Pointer to a @ref LL_ADC_INJ_InitTypeDef structure
AnnaBridge	167:e84263d55307	822	* @retval An ErrorStatus enumeration value:
AnnaBridge	167:e84263d55307	823	* - SUCCESS: ADC registers are initialized
AnnaBridge	167:e84263d55307	824	* - ERROR: ADC registers are not initialized
AnnaBridge	167:e84263d55307	825	*/
AnnaBridge	167:e84263d55307	826	ErrorStatus LL_ADC_INJ_Init(ADC_TypeDef ADCx, LL_ADC_INJ_InitTypeDef ADC_INJ_InitStruct)
AnnaBridge	167:e84263d55307	827	{
AnnaBridge	167:e84263d55307	828	ErrorStatus status = SUCCESS;
AnnaBridge	167:e84263d55307	829
AnnaBridge	167:e84263d55307	830	/* Check the parameters */
AnnaBridge	167:e84263d55307	831	assert_param(IS_ADC_ALL_INSTANCE(ADCx));
AnnaBridge	167:e84263d55307	832	assert_param(IS_LL_ADC_INJ_TRIG_SOURCE(ADC_INJ_InitStruct->TriggerSource));
AnnaBridge	167:e84263d55307	833	assert_param(IS_LL_ADC_INJ_SEQ_SCAN_LENGTH(ADC_INJ_InitStruct->SequencerLength));
AnnaBridge	167:e84263d55307	834	if(ADC_INJ_InitStruct->SequencerLength != LL_ADC_INJ_SEQ_SCAN_DISABLE)
AnnaBridge	167:e84263d55307	835	{
AnnaBridge	167:e84263d55307	836	assert_param(IS_LL_ADC_INJ_SEQ_SCAN_DISCONT_MODE(ADC_INJ_InitStruct->SequencerDiscont));
AnnaBridge	167:e84263d55307	837	}
AnnaBridge	167:e84263d55307	838	assert_param(IS_LL_ADC_INJ_TRIG_AUTO(ADC_INJ_InitStruct->TrigAuto));
AnnaBridge	167:e84263d55307	839
AnnaBridge	167:e84263d55307	840	/* Note: Hardware constraint (refer to description of this function): */
AnnaBridge	167:e84263d55307	841	/* ADC instance must be disabled. */
AnnaBridge	167:e84263d55307	842	if(LL_ADC_IsEnabled(ADCx) == 0U)
AnnaBridge	167:e84263d55307	843	{
AnnaBridge	167:e84263d55307	844	/* Configuration of ADC hierarchical scope: */
AnnaBridge	167:e84263d55307	845	/* - ADC group injected */
AnnaBridge	167:e84263d55307	846	/* - Set ADC group injected trigger source */
AnnaBridge	167:e84263d55307	847	/* - Set ADC group injected sequencer length */
AnnaBridge	167:e84263d55307	848	/* - Set ADC group injected sequencer discontinuous mode */
AnnaBridge	167:e84263d55307	849	/* - Set ADC group injected conversion trigger: independent or */
AnnaBridge	167:e84263d55307	850	/* from ADC group regular */
AnnaBridge	167:e84263d55307	851	/* Note: On this STM32 serie, ADC trigger edge is set when starting */
AnnaBridge	167:e84263d55307	852	/* ADC conversion. */
AnnaBridge	167:e84263d55307	853	/* Refer to function @ref LL_ADC_INJ_StartConversionExtTrig(). */
AnnaBridge	167:e84263d55307	854	if(ADC_INJ_InitStruct->SequencerLength != LL_ADC_REG_SEQ_SCAN_DISABLE)
AnnaBridge	167:e84263d55307	855	{
AnnaBridge	167:e84263d55307	856	MODIFY_REG(ADCx->CR1,
AnnaBridge	167:e84263d55307	857	ADC_CR1_JDISCEN
AnnaBridge	167:e84263d55307	858	\| ADC_CR1_JAUTO
AnnaBridge	167:e84263d55307	859	,
AnnaBridge	167:e84263d55307	860	ADC_INJ_InitStruct->SequencerDiscont
AnnaBridge	167:e84263d55307	861	\| ADC_INJ_InitStruct->TrigAuto
AnnaBridge	167:e84263d55307	862	);
AnnaBridge	167:e84263d55307	863	}
AnnaBridge	167:e84263d55307	864	else
AnnaBridge	167:e84263d55307	865	{
AnnaBridge	167:e84263d55307	866	MODIFY_REG(ADCx->CR1,
AnnaBridge	167:e84263d55307	867	ADC_CR1_JDISCEN
AnnaBridge	167:e84263d55307	868	\| ADC_CR1_JAUTO
AnnaBridge	167:e84263d55307	869	,
AnnaBridge	167:e84263d55307	870	LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	167:e84263d55307	871	\| ADC_INJ_InitStruct->TrigAuto
AnnaBridge	167:e84263d55307	872	);
AnnaBridge	167:e84263d55307	873	}
AnnaBridge	167:e84263d55307	874
AnnaBridge	167:e84263d55307	875	MODIFY_REG(ADCx->CR2,
AnnaBridge	167:e84263d55307	876	ADC_CR2_JEXTSEL
AnnaBridge	167:e84263d55307	877	\| ADC_CR2_JEXTEN
AnnaBridge	167:e84263d55307	878	,
AnnaBridge	167:e84263d55307	879	(ADC_INJ_InitStruct->TriggerSource & ADC_CR2_JEXTSEL)
AnnaBridge	167:e84263d55307	880	);
AnnaBridge	167:e84263d55307	881
AnnaBridge	167:e84263d55307	882	/* Note: Hardware constraint (refer to description of this function): */
AnnaBridge	167:e84263d55307	883	/* Note: If ADC instance feature scan mode is disabled */
AnnaBridge	167:e84263d55307	884	/* (refer to ADC instance initialization structure */
AnnaBridge	167:e84263d55307	885	/* parameter @ref SequencersScanMode */
AnnaBridge	167:e84263d55307	886	/* or function @ref LL_ADC_SetSequencersScanMode() ), */
AnnaBridge	167:e84263d55307	887	/* this parameter is discarded. */
AnnaBridge	167:e84263d55307	888	LL_ADC_INJ_SetSequencerLength(ADCx, ADC_INJ_InitStruct->SequencerLength);
AnnaBridge	167:e84263d55307	889	}
AnnaBridge	167:e84263d55307	890	else
AnnaBridge	167:e84263d55307	891	{
AnnaBridge	167:e84263d55307	892	/* Initialization error: ADC instance is not disabled. */
AnnaBridge	167:e84263d55307	893	status = ERROR;
AnnaBridge	167:e84263d55307	894	}
AnnaBridge	167:e84263d55307	895	return status;
AnnaBridge	167:e84263d55307	896	}
AnnaBridge	167:e84263d55307	897
AnnaBridge	167:e84263d55307	898	/**
AnnaBridge	167:e84263d55307	899	* @brief Set each @ref LL_ADC_INJ_InitTypeDef field to default value.
AnnaBridge	167:e84263d55307	900	* @param ADC_INJ_InitStruct Pointer to a @ref LL_ADC_INJ_InitTypeDef structure
AnnaBridge	167:e84263d55307	901	* whose fields will be set to default values.
AnnaBridge	167:e84263d55307	902	* @retval None
AnnaBridge	167:e84263d55307	903	*/
AnnaBridge	167:e84263d55307	904	void LL_ADC_INJ_StructInit(LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct)
AnnaBridge	167:e84263d55307	905	{
AnnaBridge	167:e84263d55307	906	/* Set ADC_INJ_InitStruct fields to default values */
AnnaBridge	167:e84263d55307	907	/* Set fields of ADC group injected */
AnnaBridge	167:e84263d55307	908	ADC_INJ_InitStruct->TriggerSource = LL_ADC_INJ_TRIG_SOFTWARE;
AnnaBridge	167:e84263d55307	909	ADC_INJ_InitStruct->SequencerLength = LL_ADC_INJ_SEQ_SCAN_DISABLE;
AnnaBridge	167:e84263d55307	910	ADC_INJ_InitStruct->SequencerDiscont = LL_ADC_INJ_SEQ_DISCONT_DISABLE;
AnnaBridge	167:e84263d55307	911	ADC_INJ_InitStruct->TrigAuto = LL_ADC_INJ_TRIG_INDEPENDENT;
AnnaBridge	167:e84263d55307	912	}
AnnaBridge	167:e84263d55307	913
AnnaBridge	167:e84263d55307	914	/**
AnnaBridge	167:e84263d55307	915	* @}
AnnaBridge	167:e84263d55307	916	*/
AnnaBridge	167:e84263d55307	917
AnnaBridge	167:e84263d55307	918	/**
AnnaBridge	167:e84263d55307	919	* @}
AnnaBridge	167:e84263d55307	920	*/
AnnaBridge	167:e84263d55307	921
AnnaBridge	167:e84263d55307	922	/**
AnnaBridge	167:e84263d55307	923	* @}
AnnaBridge	167:e84263d55307	924	*/
AnnaBridge	167:e84263d55307	925
AnnaBridge	167:e84263d55307	926	#endif /* ADC1 \|\| ADC2 \|\| ADC3 */
AnnaBridge	167:e84263d55307	927
AnnaBridge	167:e84263d55307	928	/**
AnnaBridge	167:e84263d55307	929	* @}
AnnaBridge	167:e84263d55307	930	*/
AnnaBridge	167:e84263d55307	931
AnnaBridge	167:e84263d55307	932	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	167:e84263d55307	933
AnnaBridge	167:e84263d55307	934	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/