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targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_usart.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
167:e84263d55307 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f2xx_hal_usart.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.2.1
AnnaBridge 167:e84263d55307 6 * @date 14-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Header file of USART HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
AnnaBridge 167:e84263d55307 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F2xx_HAL_USART_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F2xx_HAL_USART_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f2xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F2xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup USART
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup USART_Exported_Types USART Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief USART Init Structure definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
<> 144:ef7eb2e8f9f7 68 The baud rate is computed using the following formula:
<> 144:ef7eb2e8f9f7 69 - IntegerDivider = ((PCLKx) / (8 * (husart->Init.BaudRate)))
<> 144:ef7eb2e8f9f7 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 73 This parameter can be a value of @ref USART_Word_Length */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 144:ef7eb2e8f9f7 76 This parameter can be a value of @ref USART_Stop_Bits */
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 79 This parameter can be a value of @ref USART_Parity
<> 144:ef7eb2e8f9f7 80 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 81 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 82 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 83 word length is set to 8 data bits). */
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 86 This parameter can be a value of @ref USART_Mode */
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
<> 144:ef7eb2e8f9f7 89 This parameter can be a value of @ref USART_Clock_Polarity */
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
<> 144:ef7eb2e8f9f7 92 This parameter can be a value of @ref USART_Clock_Phase */
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
<> 144:ef7eb2e8f9f7 95 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
<> 144:ef7eb2e8f9f7 96 This parameter can be a value of @ref USART_Last_Bit */
<> 144:ef7eb2e8f9f7 97 }USART_InitTypeDef;
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 /**
<> 144:ef7eb2e8f9f7 100 * @brief HAL State structures definition
<> 144:ef7eb2e8f9f7 101 */
<> 144:ef7eb2e8f9f7 102 typedef enum
<> 144:ef7eb2e8f9f7 103 {
<> 144:ef7eb2e8f9f7 104 HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
<> 144:ef7eb2e8f9f7 105 HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
<> 144:ef7eb2e8f9f7 106 HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
<> 144:ef7eb2e8f9f7 107 HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
<> 144:ef7eb2e8f9f7 108 HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
<> 144:ef7eb2e8f9f7 109 HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */
<> 144:ef7eb2e8f9f7 110 HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
<> 144:ef7eb2e8f9f7 111 HAL_USART_STATE_ERROR = 0x04U /*!< Error */
<> 144:ef7eb2e8f9f7 112 }HAL_USART_StateTypeDef;
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 /**
<> 144:ef7eb2e8f9f7 115 * @brief USART handle Structure definition
<> 144:ef7eb2e8f9f7 116 */
<> 144:ef7eb2e8f9f7 117 typedef struct
<> 144:ef7eb2e8f9f7 118 {
<> 144:ef7eb2e8f9f7 119 USART_TypeDef *Instance; /* USART registers base address */
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 USART_InitTypeDef Init; /* Usart communication parameters */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 uint8_t *pTxBuffPtr; /* Pointer to Usart Tx transfer Buffer */
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 uint16_t TxXferSize; /* Usart Tx Transfer size */
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 __IO uint16_t TxXferCount; /* Usart Tx Transfer Counter */
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 uint8_t *pRxBuffPtr; /* Pointer to Usart Rx transfer Buffer */
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 uint16_t RxXferSize; /* Usart Rx Transfer size */
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 __IO uint16_t RxXferCount; /* Usart Rx Transfer Counter */
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 DMA_HandleTypeDef *hdmatx; /* Usart Tx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 DMA_HandleTypeDef *hdmarx; /* Usart Rx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 HAL_LockTypeDef Lock; /* Locking object */
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 __IO HAL_USART_StateTypeDef State; /* Usart communication state */
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 __IO uint32_t ErrorCode; /* USART Error code */
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 }USART_HandleTypeDef;
<> 144:ef7eb2e8f9f7 146 /**
<> 144:ef7eb2e8f9f7 147 * @}
<> 144:ef7eb2e8f9f7 148 */
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 151 /** @defgroup USART_Exported_Constants USART Exported Constants
<> 144:ef7eb2e8f9f7 152 * @{
<> 144:ef7eb2e8f9f7 153 */
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /** @defgroup USART_Error_Code USART Error Code
<> 144:ef7eb2e8f9f7 156 * @brief USART Error Code
<> 144:ef7eb2e8f9f7 157 * @{
<> 144:ef7eb2e8f9f7 158 */
AnnaBridge 167:e84263d55307 159 #define HAL_USART_ERROR_NONE 0x00000000U /*!< No error */
AnnaBridge 167:e84263d55307 160 #define HAL_USART_ERROR_PE 0x00000001U /*!< Parity error */
AnnaBridge 167:e84263d55307 161 #define HAL_USART_ERROR_NE 0x00000002U /*!< Noise error */
AnnaBridge 167:e84263d55307 162 #define HAL_USART_ERROR_FE 0x00000004U /*!< Frame error */
AnnaBridge 167:e84263d55307 163 #define HAL_USART_ERROR_ORE 0x00000008U /*!< Overrun error */
AnnaBridge 167:e84263d55307 164 #define HAL_USART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 165 /**
<> 144:ef7eb2e8f9f7 166 * @}
<> 144:ef7eb2e8f9f7 167 */
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /** @defgroup USART_Word_Length USART Word Length
<> 144:ef7eb2e8f9f7 170 * @{
<> 144:ef7eb2e8f9f7 171 */
AnnaBridge 167:e84263d55307 172 #define USART_WORDLENGTH_8B 0x00000000U
<> 144:ef7eb2e8f9f7 173 #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 144:ef7eb2e8f9f7 174 /**
<> 144:ef7eb2e8f9f7 175 * @}
<> 144:ef7eb2e8f9f7 176 */
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
<> 144:ef7eb2e8f9f7 179 * @{
<> 144:ef7eb2e8f9f7 180 */
AnnaBridge 167:e84263d55307 181 #define USART_STOPBITS_1 0x00000000U
<> 144:ef7eb2e8f9f7 182 #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0)
<> 144:ef7eb2e8f9f7 183 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
<> 144:ef7eb2e8f9f7 184 #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1))
<> 144:ef7eb2e8f9f7 185 /**
<> 144:ef7eb2e8f9f7 186 * @}
<> 144:ef7eb2e8f9f7 187 */
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 /** @defgroup USART_Parity USART Parity
<> 144:ef7eb2e8f9f7 190 * @{
<> 144:ef7eb2e8f9f7 191 */
AnnaBridge 167:e84263d55307 192 #define USART_PARITY_NONE 0x00000000U
<> 144:ef7eb2e8f9f7 193 #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 144:ef7eb2e8f9f7 194 #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 144:ef7eb2e8f9f7 195 /**
<> 144:ef7eb2e8f9f7 196 * @}
<> 144:ef7eb2e8f9f7 197 */
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /** @defgroup USART_Mode USART Mode
<> 144:ef7eb2e8f9f7 200 * @{
<> 144:ef7eb2e8f9f7 201 */
<> 144:ef7eb2e8f9f7 202 #define USART_MODE_RX ((uint32_t)USART_CR1_RE)
<> 144:ef7eb2e8f9f7 203 #define USART_MODE_TX ((uint32_t)USART_CR1_TE)
<> 144:ef7eb2e8f9f7 204 #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 144:ef7eb2e8f9f7 205 /**
<> 144:ef7eb2e8f9f7 206 * @}
<> 144:ef7eb2e8f9f7 207 */
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /** @defgroup USART_Clock USART Clock
<> 144:ef7eb2e8f9f7 210 * @{
<> 144:ef7eb2e8f9f7 211 */
AnnaBridge 167:e84263d55307 212 #define USART_CLOCK_DISABLE 0x00000000U
<> 144:ef7eb2e8f9f7 213 #define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN)
<> 144:ef7eb2e8f9f7 214 /**
<> 144:ef7eb2e8f9f7 215 * @}
<> 144:ef7eb2e8f9f7 216 */
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 /** @defgroup USART_Clock_Polarity USART Clock Polarity
<> 144:ef7eb2e8f9f7 219 * @{
<> 144:ef7eb2e8f9f7 220 */
AnnaBridge 167:e84263d55307 221 #define USART_POLARITY_LOW 0x00000000U
<> 144:ef7eb2e8f9f7 222 #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL)
<> 144:ef7eb2e8f9f7 223 /**
<> 144:ef7eb2e8f9f7 224 * @}
<> 144:ef7eb2e8f9f7 225 */
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /** @defgroup USART_Clock_Phase USART Clock Phase
<> 144:ef7eb2e8f9f7 228 * @{
<> 144:ef7eb2e8f9f7 229 */
AnnaBridge 167:e84263d55307 230 #define USART_PHASE_1EDGE 0x00000000U
<> 144:ef7eb2e8f9f7 231 #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA)
<> 144:ef7eb2e8f9f7 232 /**
<> 144:ef7eb2e8f9f7 233 * @}
<> 144:ef7eb2e8f9f7 234 */
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 /** @defgroup USART_Last_Bit USART Last Bit
<> 144:ef7eb2e8f9f7 237 * @{
<> 144:ef7eb2e8f9f7 238 */
AnnaBridge 167:e84263d55307 239 #define USART_LASTBIT_DISABLE 0x00000000U
<> 144:ef7eb2e8f9f7 240 #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL)
<> 144:ef7eb2e8f9f7 241 /**
<> 144:ef7eb2e8f9f7 242 * @}
<> 144:ef7eb2e8f9f7 243 */
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 /** @defgroup USART_NACK_State USART NACK State
<> 144:ef7eb2e8f9f7 246 * @{
<> 144:ef7eb2e8f9f7 247 */
AnnaBridge 167:e84263d55307 248 #define USART_NACK_DISABLE 0x00000000U
<> 144:ef7eb2e8f9f7 249 #define USART_NACK_ENABLE ((uint32_t)USART_CR3_NACK)
<> 144:ef7eb2e8f9f7 250 /**
<> 144:ef7eb2e8f9f7 251 * @}
<> 144:ef7eb2e8f9f7 252 */
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 /** @defgroup USART_Flags USART Flags
<> 144:ef7eb2e8f9f7 255 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 256 * - 0xXXXX : Flag mask in the SR register
<> 144:ef7eb2e8f9f7 257 * @{
<> 144:ef7eb2e8f9f7 258 */
AnnaBridge 167:e84263d55307 259 #define USART_FLAG_TXE 0x00000080U
AnnaBridge 167:e84263d55307 260 #define USART_FLAG_TC 0x00000040U
AnnaBridge 167:e84263d55307 261 #define USART_FLAG_RXNE 0x00000020U
AnnaBridge 167:e84263d55307 262 #define USART_FLAG_IDLE 0x00000010U
AnnaBridge 167:e84263d55307 263 #define USART_FLAG_ORE 0x00000008U
AnnaBridge 167:e84263d55307 264 #define USART_FLAG_NE 0x00000004U
AnnaBridge 167:e84263d55307 265 #define USART_FLAG_FE 0x00000002U
AnnaBridge 167:e84263d55307 266 #define USART_FLAG_PE 0x00000001U
<> 144:ef7eb2e8f9f7 267 /**
<> 144:ef7eb2e8f9f7 268 * @}
<> 144:ef7eb2e8f9f7 269 */
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
<> 144:ef7eb2e8f9f7 272 * Elements values convention: 0xY000XXXX
<> 144:ef7eb2e8f9f7 273 * - XXXX : Interrupt mask in the XX register
<> 144:ef7eb2e8f9f7 274 * - Y : Interrupt source register (2bits)
<> 144:ef7eb2e8f9f7 275 * - 01: CR1 register
<> 144:ef7eb2e8f9f7 276 * - 10: CR2 register
<> 144:ef7eb2e8f9f7 277 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 278 *
<> 144:ef7eb2e8f9f7 279 * @{
<> 144:ef7eb2e8f9f7 280 */
<> 144:ef7eb2e8f9f7 281 #define USART_IT_PE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
<> 144:ef7eb2e8f9f7 282 #define USART_IT_TXE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
<> 144:ef7eb2e8f9f7 283 #define USART_IT_TC ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
<> 144:ef7eb2e8f9f7 284 #define USART_IT_RXNE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
<> 144:ef7eb2e8f9f7 285 #define USART_IT_IDLE ((uint32_t)(USART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
<> 144:ef7eb2e8f9f7 286
<> 144:ef7eb2e8f9f7 287 #define USART_IT_LBD ((uint32_t)(USART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
<> 144:ef7eb2e8f9f7 288
<> 144:ef7eb2e8f9f7 289 #define USART_IT_CTS ((uint32_t)(USART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
<> 144:ef7eb2e8f9f7 290 #define USART_IT_ERR ((uint32_t)(USART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
<> 144:ef7eb2e8f9f7 291 /**
<> 144:ef7eb2e8f9f7 292 * @}
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /**
<> 144:ef7eb2e8f9f7 296 * @}
<> 144:ef7eb2e8f9f7 297 */
<> 144:ef7eb2e8f9f7 298
<> 144:ef7eb2e8f9f7 299 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 300 /** @defgroup USART_Exported_Macros USART Exported Macros
<> 144:ef7eb2e8f9f7 301 * @{
<> 144:ef7eb2e8f9f7 302 */
<> 144:ef7eb2e8f9f7 303
<> 144:ef7eb2e8f9f7 304 /** @brief Reset USART handle state
<> 144:ef7eb2e8f9f7 305 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 306 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
<> 144:ef7eb2e8f9f7 307 * @retval None
<> 144:ef7eb2e8f9f7 308 */
<> 144:ef7eb2e8f9f7 309 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 /** @brief Checks whether the specified Smartcard flag is set or not.
<> 144:ef7eb2e8f9f7 312 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 313 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
<> 144:ef7eb2e8f9f7 314 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 315 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 316 * @arg USART_FLAG_TXE: Transmit data register empty flag
<> 144:ef7eb2e8f9f7 317 * @arg USART_FLAG_TC: Transmission Complete flag
<> 144:ef7eb2e8f9f7 318 * @arg USART_FLAG_RXNE: Receive data register not empty flag
<> 144:ef7eb2e8f9f7 319 * @arg USART_FLAG_IDLE: Idle Line detection flag
<> 144:ef7eb2e8f9f7 320 * @arg USART_FLAG_ORE: Overrun Error flag
<> 144:ef7eb2e8f9f7 321 * @arg USART_FLAG_NE: Noise Error flag
<> 144:ef7eb2e8f9f7 322 * @arg USART_FLAG_FE: Framing Error flag
<> 144:ef7eb2e8f9f7 323 * @arg USART_FLAG_PE: Parity Error flag
<> 144:ef7eb2e8f9f7 324 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 325 */
<> 144:ef7eb2e8f9f7 326 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 /** @brief Clears the specified Smartcard pending flags.
<> 144:ef7eb2e8f9f7 329 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 330 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
<> 144:ef7eb2e8f9f7 331 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 332 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 333 * @arg USART_FLAG_TC: Transmission Complete flag.
<> 144:ef7eb2e8f9f7 334 * @arg USART_FLAG_RXNE: Receive data register not empty flag.
<> 144:ef7eb2e8f9f7 335 *
<> 144:ef7eb2e8f9f7 336 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
<> 144:ef7eb2e8f9f7 337 * error) and IDLE (Idle line detected) flags are cleared by software
<> 144:ef7eb2e8f9f7 338 * sequence: a read operation to USART_SR register followed by a read
<> 144:ef7eb2e8f9f7 339 * operation to USART_DR register.
<> 144:ef7eb2e8f9f7 340 * @note RXNE flag can be also cleared by a read to the USART_DR register.
<> 144:ef7eb2e8f9f7 341 * @note TC flag can be also cleared by software sequence: a read operation to
<> 144:ef7eb2e8f9f7 342 * USART_SR register followed by a write operation to USART_DR register.
<> 144:ef7eb2e8f9f7 343 * @note TXE flag is cleared only by a write to the USART_DR register.
<> 144:ef7eb2e8f9f7 344 *
<> 144:ef7eb2e8f9f7 345 * @retval None
<> 144:ef7eb2e8f9f7 346 */
<> 144:ef7eb2e8f9f7 347 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 /** @brief Clear the USART PE pending flag.
<> 144:ef7eb2e8f9f7 350 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 351 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
<> 144:ef7eb2e8f9f7 352 * @retval None
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) \
<> 144:ef7eb2e8f9f7 355 do{ \
<> 144:ef7eb2e8f9f7 356 __IO uint32_t tmpreg_pe = 0x00U; \
<> 144:ef7eb2e8f9f7 357 tmpreg_pe = (__HANDLE__)->Instance->SR; \
<> 144:ef7eb2e8f9f7 358 tmpreg_pe = (__HANDLE__)->Instance->DR; \
<> 144:ef7eb2e8f9f7 359 UNUSED(tmpreg_pe); \
<> 144:ef7eb2e8f9f7 360 } while(0)
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 /** @brief Clear the USART FE pending flag.
<> 144:ef7eb2e8f9f7 363 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 364 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
<> 144:ef7eb2e8f9f7 365 * @retval None
<> 144:ef7eb2e8f9f7 366 */
<> 144:ef7eb2e8f9f7 367 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 /** @brief Clear the USART NE pending flag.
<> 144:ef7eb2e8f9f7 370 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 371 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
<> 144:ef7eb2e8f9f7 372 * @retval None
<> 144:ef7eb2e8f9f7 373 */
<> 144:ef7eb2e8f9f7 374 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 375
<> 144:ef7eb2e8f9f7 376 /** @brief Clear the UART ORE pending flag.
<> 144:ef7eb2e8f9f7 377 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 378 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
<> 144:ef7eb2e8f9f7 379 * @retval None
<> 144:ef7eb2e8f9f7 380 */
<> 144:ef7eb2e8f9f7 381 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 382
<> 144:ef7eb2e8f9f7 383 /** @brief Clear the USART IDLE pending flag.
<> 144:ef7eb2e8f9f7 384 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 385 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
<> 144:ef7eb2e8f9f7 386 * @retval None
<> 144:ef7eb2e8f9f7 387 */
<> 144:ef7eb2e8f9f7 388 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 389
<> 144:ef7eb2e8f9f7 390 /** @brief Enables or disables the specified USART interrupts.
<> 144:ef7eb2e8f9f7 391 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 392 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
<> 144:ef7eb2e8f9f7 393 * @param __INTERRUPT__: specifies the USART interrupt source to check.
<> 144:ef7eb2e8f9f7 394 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 395 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 396 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 397 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 398 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 399 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 400 * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 401 * This parameter can be: ENABLE or DISABLE.
<> 144:ef7eb2e8f9f7 402 * @retval None
<> 144:ef7eb2e8f9f7 403 */
<> 144:ef7eb2e8f9f7 404 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 405 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 406 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK)))
<> 144:ef7eb2e8f9f7 407 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 408 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 409 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK)))
<> 144:ef7eb2e8f9f7 410
<> 144:ef7eb2e8f9f7 411 /** @brief Checks whether the specified USART interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 412 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 413 * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral.
<> 144:ef7eb2e8f9f7 414 * @param __IT__: specifies the USART interrupt source to check.
<> 144:ef7eb2e8f9f7 415 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 416 * @arg USART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 417 * @arg USART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 418 * @arg USART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 419 * @arg USART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 420 * @arg USART_IT_ERR: Error interrupt
<> 144:ef7eb2e8f9f7 421 * @arg USART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 422 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 423 */
<> 144:ef7eb2e8f9f7 424 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \
<> 144:ef7eb2e8f9f7 425 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK))
<> 144:ef7eb2e8f9f7 426
<> 144:ef7eb2e8f9f7 427 /** @brief Macro to enable the USART's one bit sample method
<> 144:ef7eb2e8f9f7 428 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 429 * @retval None
<> 144:ef7eb2e8f9f7 430 */
<> 144:ef7eb2e8f9f7 431 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
<> 144:ef7eb2e8f9f7 432
<> 144:ef7eb2e8f9f7 433 /** @brief Macro to disable the USART's one bit sample method
<> 144:ef7eb2e8f9f7 434 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 435 * @retval None
<> 144:ef7eb2e8f9f7 436 */
<> 144:ef7eb2e8f9f7 437 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
<> 144:ef7eb2e8f9f7 438
<> 144:ef7eb2e8f9f7 439 /** @brief Enable USART
<> 144:ef7eb2e8f9f7 440 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 441 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 442 * @retval None
<> 144:ef7eb2e8f9f7 443 */
<> 144:ef7eb2e8f9f7 444 #define __HAL_USART_ENABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
<> 144:ef7eb2e8f9f7 445
<> 144:ef7eb2e8f9f7 446 /** @brief Disable USART
<> 144:ef7eb2e8f9f7 447 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 448 * USART Handle selects the USARTx peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 449 * @retval None
<> 144:ef7eb2e8f9f7 450 */
<> 144:ef7eb2e8f9f7 451 #define __HAL_USART_DISABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 /**
<> 144:ef7eb2e8f9f7 454 * @}
<> 144:ef7eb2e8f9f7 455 */
<> 144:ef7eb2e8f9f7 456 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 457 /** @addtogroup USART_Exported_Functions
<> 144:ef7eb2e8f9f7 458 * @{
<> 144:ef7eb2e8f9f7 459 */
<> 144:ef7eb2e8f9f7 460
<> 144:ef7eb2e8f9f7 461 /** @addtogroup USART_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 462 * @{
<> 144:ef7eb2e8f9f7 463 */
<> 144:ef7eb2e8f9f7 464 /* Initialization/de-initialization functions **********************************/
<> 144:ef7eb2e8f9f7 465 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 466 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 467 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 468 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 469 /**
<> 144:ef7eb2e8f9f7 470 * @}
<> 144:ef7eb2e8f9f7 471 */
<> 144:ef7eb2e8f9f7 472
<> 144:ef7eb2e8f9f7 473 /** @addtogroup USART_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 474 * @{
<> 144:ef7eb2e8f9f7 475 */
<> 144:ef7eb2e8f9f7 476 /* IO operation functions *******************************************************/
<> 144:ef7eb2e8f9f7 477 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 478 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 479 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 480 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 481 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 482 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 483 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 484 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 485 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 486 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 487 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 488 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
AnnaBridge 167:e84263d55307 489 /* Transfer Abort functions */
AnnaBridge 167:e84263d55307 490 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart);
AnnaBridge 167:e84263d55307 491 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 492
<> 144:ef7eb2e8f9f7 493 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 494 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 495 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 496 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 497 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 498 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 499 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
AnnaBridge 167:e84263d55307 500 void HAL_USART_AbortCpltCallback (USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 501 /**
<> 144:ef7eb2e8f9f7 502 * @}
<> 144:ef7eb2e8f9f7 503 */
<> 144:ef7eb2e8f9f7 504
<> 144:ef7eb2e8f9f7 505 /** @addtogroup USART_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 506 * @{
<> 144:ef7eb2e8f9f7 507 */
<> 144:ef7eb2e8f9f7 508 /* Peripheral State functions ************************************************/
<> 144:ef7eb2e8f9f7 509 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 510 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 511 /**
<> 144:ef7eb2e8f9f7 512 * @}
<> 144:ef7eb2e8f9f7 513 */
<> 144:ef7eb2e8f9f7 514
<> 144:ef7eb2e8f9f7 515 /**
<> 144:ef7eb2e8f9f7 516 * @}
<> 144:ef7eb2e8f9f7 517 */
<> 144:ef7eb2e8f9f7 518 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 519 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 520 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 521 /** @defgroup USART_Private_Constants USART Private Constants
<> 144:ef7eb2e8f9f7 522 * @{
<> 144:ef7eb2e8f9f7 523 */
<> 144:ef7eb2e8f9f7 524 /** @brief USART interruptions flag mask
<> 144:ef7eb2e8f9f7 525 *
<> 144:ef7eb2e8f9f7 526 */
<> 144:ef7eb2e8f9f7 527 #define USART_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
<> 144:ef7eb2e8f9f7 528 USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
<> 144:ef7eb2e8f9f7 529
<> 144:ef7eb2e8f9f7 530 #define USART_CR1_REG_INDEX 1U
<> 144:ef7eb2e8f9f7 531 #define USART_CR2_REG_INDEX 2U
<> 144:ef7eb2e8f9f7 532 #define USART_CR3_REG_INDEX 3U
<> 144:ef7eb2e8f9f7 533 /**
<> 144:ef7eb2e8f9f7 534 * @}
<> 144:ef7eb2e8f9f7 535 */
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 538 /** @defgroup USART_Private_Macros USART Private Macros
<> 144:ef7eb2e8f9f7 539 * @{
<> 144:ef7eb2e8f9f7 540 */
<> 144:ef7eb2e8f9f7 541 #define IS_USART_NACK_STATE(NACK) (((NACK) == USART_NACK_ENABLE) || \
<> 144:ef7eb2e8f9f7 542 ((NACK) == USART_NACK_DISABLE))
<> 144:ef7eb2e8f9f7 543 #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \
<> 144:ef7eb2e8f9f7 544 ((LASTBIT) == USART_LASTBIT_ENABLE))
<> 144:ef7eb2e8f9f7 545 #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE))
<> 144:ef7eb2e8f9f7 546 #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH))
<> 144:ef7eb2e8f9f7 547 #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLE) || \
<> 144:ef7eb2e8f9f7 548 ((CLOCK) == USART_CLOCK_ENABLE))
<> 144:ef7eb2e8f9f7 549 #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \
<> 144:ef7eb2e8f9f7 550 ((LENGTH) == USART_WORDLENGTH_9B))
<> 144:ef7eb2e8f9f7 551 #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \
<> 144:ef7eb2e8f9f7 552 ((STOPBITS) == USART_STOPBITS_0_5) || \
<> 144:ef7eb2e8f9f7 553 ((STOPBITS) == USART_STOPBITS_1_5) || \
<> 144:ef7eb2e8f9f7 554 ((STOPBITS) == USART_STOPBITS_2))
<> 144:ef7eb2e8f9f7 555 #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \
<> 144:ef7eb2e8f9f7 556 ((PARITY) == USART_PARITY_EVEN) || \
<> 144:ef7eb2e8f9f7 557 ((PARITY) == USART_PARITY_ODD))
AnnaBridge 167:e84263d55307 558 #define IS_USART_MODE(MODE) ((((MODE) & 0xFFF3U) == 0x00U) && ((MODE) != 0x00U))
<> 144:ef7eb2e8f9f7 559 #define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 7500001U)
<> 144:ef7eb2e8f9f7 560
<> 144:ef7eb2e8f9f7 561 #define USART_DIV(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
<> 144:ef7eb2e8f9f7 562 #define USART_DIVMANT(_PCLK_, _BAUD_) (USART_DIV((_PCLK_), (_BAUD_))/100U)
<> 144:ef7eb2e8f9f7 563 #define USART_DIVFRAQ(_PCLK_, _BAUD_) (((USART_DIV((_PCLK_), (_BAUD_)) - (USART_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
<> 144:ef7eb2e8f9f7 564 #define USART_BRR(_PCLK_, _BAUD_) ((USART_DIVMANT((_PCLK_), (_BAUD_)) << 4U)|(USART_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0FU))
<> 144:ef7eb2e8f9f7 565 /**
<> 144:ef7eb2e8f9f7 566 * @}
<> 144:ef7eb2e8f9f7 567 */
<> 144:ef7eb2e8f9f7 568
<> 144:ef7eb2e8f9f7 569 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 570 /** @defgroup USART_Private_Functions USART Private Functions
<> 144:ef7eb2e8f9f7 571 * @{
<> 144:ef7eb2e8f9f7 572 */
<> 144:ef7eb2e8f9f7 573
<> 144:ef7eb2e8f9f7 574 /**
<> 144:ef7eb2e8f9f7 575 * @}
<> 144:ef7eb2e8f9f7 576 */
<> 144:ef7eb2e8f9f7 577
<> 144:ef7eb2e8f9f7 578 /**
<> 144:ef7eb2e8f9f7 579 * @}
<> 144:ef7eb2e8f9f7 580 */
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 /**
<> 144:ef7eb2e8f9f7 583 * @}
<> 144:ef7eb2e8f9f7 584 */
<> 144:ef7eb2e8f9f7 585
<> 144:ef7eb2e8f9f7 586 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 587 }
<> 144:ef7eb2e8f9f7 588 #endif
<> 144:ef7eb2e8f9f7 589
<> 144:ef7eb2e8f9f7 590 #endif /* __STM32F2xx_HAL_USART_H */
<> 144:ef7eb2e8f9f7 591
<> 144:ef7eb2e8f9f7 592 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/