mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_pwr_ex.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
167:e84263d55307 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f2xx_hal_pwr_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.2.1
AnnaBridge 167:e84263d55307 6 * @date 14-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Extended PWR HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of PWR extension peripheral:
<> 144:ef7eb2e8f9f7 10 * + Peripheral Extended features functions
<> 144:ef7eb2e8f9f7 11 *
<> 144:ef7eb2e8f9f7 12 ******************************************************************************
<> 144:ef7eb2e8f9f7 13 * @attention
<> 144:ef7eb2e8f9f7 14 *
AnnaBridge 167:e84263d55307 15 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 16 *
<> 144:ef7eb2e8f9f7 17 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 18 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 19 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 20 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 21 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 22 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 23 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 25 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 26 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 27 *
<> 144:ef7eb2e8f9f7 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 38 *
<> 144:ef7eb2e8f9f7 39 ******************************************************************************
<> 144:ef7eb2e8f9f7 40 */
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 43 #include "stm32f2xx_hal.h"
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 /** @addtogroup STM32F2xx_HAL_Driver
<> 144:ef7eb2e8f9f7 46 * @{
<> 144:ef7eb2e8f9f7 47 */
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @defgroup PWREx PWREx
<> 144:ef7eb2e8f9f7 50 * @brief PWR HAL module driver
<> 144:ef7eb2e8f9f7 51 * @{
<> 144:ef7eb2e8f9f7 52 */
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 #ifdef HAL_PWR_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 57 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @addtogroup PWREx_Private_Constants
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61 #define PWR_BKPREG_TIMEOUT_VALUE 1000U
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @}
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 68 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 69 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 70 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 71 /** @defgroup PWREx_Exported_Functions PWR Exported Functions
<> 144:ef7eb2e8f9f7 72 * @{
<> 144:ef7eb2e8f9f7 73 */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions
<> 144:ef7eb2e8f9f7 76 * @brief Peripheral Extended features functions
<> 144:ef7eb2e8f9f7 77 *
<> 144:ef7eb2e8f9f7 78 @verbatim
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 ===============================================================================
<> 144:ef7eb2e8f9f7 81 ##### Peripheral extended features functions #####
<> 144:ef7eb2e8f9f7 82 ===============================================================================
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 *** Main and Backup Regulators configuration ***
<> 144:ef7eb2e8f9f7 85 ================================================
<> 144:ef7eb2e8f9f7 86 [..]
<> 144:ef7eb2e8f9f7 87 (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
<> 144:ef7eb2e8f9f7 88 the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
<> 144:ef7eb2e8f9f7 89 retained even in Standby or VBAT mode when the low power backup regulator
<> 144:ef7eb2e8f9f7 90 is enabled. It can be considered as an internal EEPROM when VBAT is
<> 144:ef7eb2e8f9f7 91 always present. You can use the HAL_PWREx_EnableBkUpReg() function to
<> 144:ef7eb2e8f9f7 92 enable the low power backup regulator.
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
<> 144:ef7eb2e8f9f7 95 the backup SRAM is powered from VDD which replaces the VBAT power supply to
<> 144:ef7eb2e8f9f7 96 save battery life.
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 (+) The backup SRAM is not mass erased by a tamper event. It is read
<> 144:ef7eb2e8f9f7 99 protected to prevent confidential data, such as cryptographic private
<> 144:ef7eb2e8f9f7 100 key, from being accessed. The backup SRAM can be erased only through
<> 144:ef7eb2e8f9f7 101 the Flash interface when a protection level change from level 1 to
<> 144:ef7eb2e8f9f7 102 level 0 is requested.
<> 144:ef7eb2e8f9f7 103 -@- Refer to the description of Read protection (RDP) in the Flash
<> 144:ef7eb2e8f9f7 104 programming manual.
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 Refer to the product datasheets for more details.
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 *** FLASH Power Down configuration ****
<> 144:ef7eb2e8f9f7 109 =======================================
<> 144:ef7eb2e8f9f7 110 [..]
<> 144:ef7eb2e8f9f7 111 (+) By setting the FPDS bit in the PWR_CR register by using the
<> 144:ef7eb2e8f9f7 112 HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power
<> 144:ef7eb2e8f9f7 113 down mode when the device enters Stop mode. When the Flash memory
<> 144:ef7eb2e8f9f7 114 is in power down mode, an additional startup delay is incurred when
<> 144:ef7eb2e8f9f7 115 waking up from Stop mode.
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 @endverbatim
<> 144:ef7eb2e8f9f7 118 * @{
<> 144:ef7eb2e8f9f7 119 */
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 /**
<> 144:ef7eb2e8f9f7 122 * @brief Enables the Backup Regulator.
<> 144:ef7eb2e8f9f7 123 * @retval HAL status
<> 144:ef7eb2e8f9f7 124 */
<> 144:ef7eb2e8f9f7 125 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
<> 144:ef7eb2e8f9f7 126 {
<> 144:ef7eb2e8f9f7 127 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE;
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 /* Get tick */
<> 144:ef7eb2e8f9f7 132 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 /* Wait till Backup regulator ready flag is set */
<> 144:ef7eb2e8f9f7 135 while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
<> 144:ef7eb2e8f9f7 136 {
<> 144:ef7eb2e8f9f7 137 if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 138 {
<> 144:ef7eb2e8f9f7 139 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 140 }
<> 144:ef7eb2e8f9f7 141 }
<> 144:ef7eb2e8f9f7 142 return HAL_OK;
<> 144:ef7eb2e8f9f7 143 }
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 /**
<> 144:ef7eb2e8f9f7 146 * @brief Disables the Backup Regulator.
<> 144:ef7eb2e8f9f7 147 * @retval HAL status
<> 144:ef7eb2e8f9f7 148 */
<> 144:ef7eb2e8f9f7 149 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
<> 144:ef7eb2e8f9f7 150 {
<> 144:ef7eb2e8f9f7 151 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE;
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /* Get tick */
<> 144:ef7eb2e8f9f7 156 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 /* Wait till Backup regulator ready flag is set */
<> 144:ef7eb2e8f9f7 159 while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET)
<> 144:ef7eb2e8f9f7 160 {
<> 144:ef7eb2e8f9f7 161 if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 162 {
<> 144:ef7eb2e8f9f7 163 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 164 }
<> 144:ef7eb2e8f9f7 165 }
<> 144:ef7eb2e8f9f7 166 return HAL_OK;
<> 144:ef7eb2e8f9f7 167 }
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /**
<> 144:ef7eb2e8f9f7 170 * @brief Enables the Flash Power Down in Stop mode.
<> 144:ef7eb2e8f9f7 171 * @retval None
<> 144:ef7eb2e8f9f7 172 */
<> 144:ef7eb2e8f9f7 173 void HAL_PWREx_EnableFlashPowerDown(void)
<> 144:ef7eb2e8f9f7 174 {
<> 144:ef7eb2e8f9f7 175 *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE;
<> 144:ef7eb2e8f9f7 176 }
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 /**
<> 144:ef7eb2e8f9f7 179 * @brief Disables the Flash Power Down in Stop mode.
<> 144:ef7eb2e8f9f7 180 * @retval None
<> 144:ef7eb2e8f9f7 181 */
<> 144:ef7eb2e8f9f7 182 void HAL_PWREx_DisableFlashPowerDown(void)
<> 144:ef7eb2e8f9f7 183 {
<> 144:ef7eb2e8f9f7 184 *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE;
<> 144:ef7eb2e8f9f7 185 }
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 /**
<> 144:ef7eb2e8f9f7 188 * @}
<> 144:ef7eb2e8f9f7 189 */
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 /**
<> 144:ef7eb2e8f9f7 192 * @}
<> 144:ef7eb2e8f9f7 193 */
<> 144:ef7eb2e8f9f7 194 #endif /* HAL_PWR_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 195 /**
<> 144:ef7eb2e8f9f7 196 * @}
<> 144:ef7eb2e8f9f7 197 */
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /**
<> 144:ef7eb2e8f9f7 200 * @}
<> 144:ef7eb2e8f9f7 201 */
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/