mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_gpio.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
167:e84263d55307 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f2xx_hal_gpio.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.2.1
AnnaBridge 167:e84263d55307 6 * @date 14-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief GPIO HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of the General Purpose Input/Output (GPIO) peripheral:
<> 144:ef7eb2e8f9f7 10 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 11 * + IO operation functions
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 @verbatim
<> 144:ef7eb2e8f9f7 14 ==============================================================================
<> 144:ef7eb2e8f9f7 15 ##### GPIO Peripheral features #####
<> 144:ef7eb2e8f9f7 16 ==============================================================================
<> 144:ef7eb2e8f9f7 17 [..]
<> 144:ef7eb2e8f9f7 18 Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each
<> 144:ef7eb2e8f9f7 19 port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software
<> 144:ef7eb2e8f9f7 20 in several modes:
<> 144:ef7eb2e8f9f7 21 (+) Input mode
<> 144:ef7eb2e8f9f7 22 (+) Analog mode
<> 144:ef7eb2e8f9f7 23 (+) Output mode
<> 144:ef7eb2e8f9f7 24 (+) Alternate function mode
<> 144:ef7eb2e8f9f7 25 (+) External interrupt/event lines
<> 144:ef7eb2e8f9f7 26
<> 144:ef7eb2e8f9f7 27 [..]
<> 144:ef7eb2e8f9f7 28 During and just after reset, the alternate functions and external interrupt
<> 144:ef7eb2e8f9f7 29 lines are not active and the I/O ports are configured in input floating mode.
<> 144:ef7eb2e8f9f7 30
<> 144:ef7eb2e8f9f7 31 [..]
<> 144:ef7eb2e8f9f7 32 All GPIO pins have weak internal pull-up and pull-down resistors, which can be
<> 144:ef7eb2e8f9f7 33 activated or not.
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 [..]
<> 144:ef7eb2e8f9f7 36 In Output or Alternate mode, each IO can be configured on open-drain or push-pull
<> 144:ef7eb2e8f9f7 37 type and the IO speed can be selected depending on the VDD value.
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 [..]
<> 144:ef7eb2e8f9f7 40 All ports have external interrupt/event capability. To use external interrupt
<> 144:ef7eb2e8f9f7 41 lines, the port must be configured in input mode. All available GPIO pins are
<> 144:ef7eb2e8f9f7 42 connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 [..]
<> 144:ef7eb2e8f9f7 45 The external interrupt/event controller consists of up to 23 edge detectors
<> 144:ef7eb2e8f9f7 46 (16 lines are connected to GPIO) for generating event/interrupt requests (each
<> 144:ef7eb2e8f9f7 47 input line can be independently configured to select the type (interrupt or event)
<> 144:ef7eb2e8f9f7 48 and the corresponding trigger event (rising or falling or both). Each line can
<> 144:ef7eb2e8f9f7 49 also be masked independently.
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 52 ==============================================================================
<> 144:ef7eb2e8f9f7 53 [..]
<> 144:ef7eb2e8f9f7 54 (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE().
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
<> 144:ef7eb2e8f9f7 57 (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
<> 144:ef7eb2e8f9f7 58 (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
<> 144:ef7eb2e8f9f7 59 structure.
<> 144:ef7eb2e8f9f7 60 (++) In case of Output or alternate function mode selection: the speed is
<> 144:ef7eb2e8f9f7 61 configured through "Speed" member from GPIO_InitTypeDef structure.
<> 144:ef7eb2e8f9f7 62 (++) In alternate mode is selection, the alternate function connected to the IO
<> 144:ef7eb2e8f9f7 63 is configured through "Alternate" member from GPIO_InitTypeDef structure.
<> 144:ef7eb2e8f9f7 64 (++) Analog mode is required when a pin is to be used as ADC channel
<> 144:ef7eb2e8f9f7 65 or DAC output.
<> 144:ef7eb2e8f9f7 66 (++) In case of external interrupt/event selection the "Mode" member from
<> 144:ef7eb2e8f9f7 67 GPIO_InitTypeDef structure select the type (interrupt or event) and
<> 144:ef7eb2e8f9f7 68 the corresponding trigger event (rising or falling or both).
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
<> 144:ef7eb2e8f9f7 71 mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
<> 144:ef7eb2e8f9f7 72 HAL_NVIC_EnableIRQ().
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 (#) To set/reset the level of a pin configured in output mode use
<> 144:ef7eb2e8f9f7 77 HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 (#) During and just after reset, the alternate functions are not
<> 144:ef7eb2e8f9f7 83 active and the GPIO pins are configured in input floating mode (except JTAG
<> 144:ef7eb2e8f9f7 84 pins).
<> 144:ef7eb2e8f9f7 85
<> 144:ef7eb2e8f9f7 86 (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
<> 144:ef7eb2e8f9f7 87 (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
<> 144:ef7eb2e8f9f7 88 priority over the GPIO function.
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
<> 144:ef7eb2e8f9f7 91 general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
<> 144:ef7eb2e8f9f7 92 The HSE has priority over the GPIO function.
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 @endverbatim
<> 144:ef7eb2e8f9f7 95 ******************************************************************************
<> 144:ef7eb2e8f9f7 96 * @attention
<> 144:ef7eb2e8f9f7 97 *
AnnaBridge 167:e84263d55307 98 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 99 *
<> 144:ef7eb2e8f9f7 100 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 101 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 102 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 103 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 104 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 105 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 106 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 107 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 108 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 109 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 110 *
<> 144:ef7eb2e8f9f7 111 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 112 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 113 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 114 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 115 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 116 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 117 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 118 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 119 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 120 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 121 *
<> 144:ef7eb2e8f9f7 122 ******************************************************************************
<> 144:ef7eb2e8f9f7 123 */
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 126 #include "stm32f2xx_hal.h"
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 /** @addtogroup STM32F2xx_HAL_Driver
<> 144:ef7eb2e8f9f7 129 * @{
<> 144:ef7eb2e8f9f7 130 */
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /** @defgroup GPIO GPIO
<> 144:ef7eb2e8f9f7 133 * @brief GPIO HAL module driver
<> 144:ef7eb2e8f9f7 134 * @{
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 #ifdef HAL_GPIO_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 140 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 141 /** @addtogroup GPIO_Private_Constants GPIO Private Constants
<> 144:ef7eb2e8f9f7 142 * @{
<> 144:ef7eb2e8f9f7 143 */
AnnaBridge 167:e84263d55307 144 #define GPIO_MODE 0x00000003U
AnnaBridge 167:e84263d55307 145 #define EXTI_MODE 0x10000000U
AnnaBridge 167:e84263d55307 146 #define GPIO_MODE_IT 0x00010000U
AnnaBridge 167:e84263d55307 147 #define GPIO_MODE_EVT 0x00020000U
AnnaBridge 167:e84263d55307 148 #define RISING_EDGE 0x00100000U
AnnaBridge 167:e84263d55307 149 #define FALLING_EDGE 0x00200000U
AnnaBridge 167:e84263d55307 150 #define GPIO_OUTPUT_TYPE 0x00000010U
<> 144:ef7eb2e8f9f7 151
AnnaBridge 167:e84263d55307 152 #define GPIO_NUMBER 16U
<> 144:ef7eb2e8f9f7 153 /**
<> 144:ef7eb2e8f9f7 154 * @}
<> 144:ef7eb2e8f9f7 155 */
<> 144:ef7eb2e8f9f7 156 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 157 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 158 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 159 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 160 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 161 /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
<> 144:ef7eb2e8f9f7 162 * @{
<> 144:ef7eb2e8f9f7 163 */
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /** @defgroup GPIO_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 166 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 167 *
<> 144:ef7eb2e8f9f7 168 @verbatim
<> 144:ef7eb2e8f9f7 169 ===============================================================================
<> 144:ef7eb2e8f9f7 170 ##### Initialization and de-initialization functions #####
<> 144:ef7eb2e8f9f7 171 ===============================================================================
<> 144:ef7eb2e8f9f7 172 [..]
<> 144:ef7eb2e8f9f7 173 This section provides functions allowing to initialize and de-initialize the GPIOs
<> 144:ef7eb2e8f9f7 174 to be ready for use.
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 @endverbatim
<> 144:ef7eb2e8f9f7 177 * @{
<> 144:ef7eb2e8f9f7 178 */
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 /**
<> 144:ef7eb2e8f9f7 182 * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
<> 144:ef7eb2e8f9f7 183 * @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
<> 144:ef7eb2e8f9f7 184 * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
<> 144:ef7eb2e8f9f7 185 * the configuration information for the specified GPIO peripheral.
<> 144:ef7eb2e8f9f7 186 * @retval None
<> 144:ef7eb2e8f9f7 187 */
<> 144:ef7eb2e8f9f7 188 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
<> 144:ef7eb2e8f9f7 189 {
<> 144:ef7eb2e8f9f7 190 uint32_t position;
<> 144:ef7eb2e8f9f7 191 uint32_t ioposition = 0x00U;
<> 144:ef7eb2e8f9f7 192 uint32_t iocurrent = 0x00U;
<> 144:ef7eb2e8f9f7 193 uint32_t temp = 0x00U;
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /* Check the parameters */
<> 144:ef7eb2e8f9f7 196 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
<> 144:ef7eb2e8f9f7 197 assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
<> 144:ef7eb2e8f9f7 198 assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
<> 144:ef7eb2e8f9f7 199 assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 /* Configure the port pins */
<> 144:ef7eb2e8f9f7 202 for(position = 0U; position < GPIO_NUMBER; position++)
<> 144:ef7eb2e8f9f7 203 {
<> 144:ef7eb2e8f9f7 204 /* Get the IO position */
AnnaBridge 167:e84263d55307 205 ioposition = 0x01U << position;
<> 144:ef7eb2e8f9f7 206 /* Get the current IO position */
<> 144:ef7eb2e8f9f7 207 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 if(iocurrent == ioposition)
<> 144:ef7eb2e8f9f7 210 {
<> 144:ef7eb2e8f9f7 211 /*--------------------- GPIO Mode Configuration ------------------------*/
<> 144:ef7eb2e8f9f7 212 /* In case of Alternate function mode selection */
<> 144:ef7eb2e8f9f7 213 if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
<> 144:ef7eb2e8f9f7 214 {
<> 144:ef7eb2e8f9f7 215 /* Check the Alternate function parameter */
<> 144:ef7eb2e8f9f7 216 assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
<> 144:ef7eb2e8f9f7 217 /* Configure Alternate function mapped with the current IO */
<> 144:ef7eb2e8f9f7 218 temp = GPIOx->AFR[position >> 3U];
AnnaBridge 167:e84263d55307 219 temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
AnnaBridge 167:e84263d55307 220 temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
<> 144:ef7eb2e8f9f7 221 GPIOx->AFR[position >> 3U] = temp;
<> 144:ef7eb2e8f9f7 222 }
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
<> 144:ef7eb2e8f9f7 225 temp = GPIOx->MODER;
<> 144:ef7eb2e8f9f7 226 temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
<> 144:ef7eb2e8f9f7 227 temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
<> 144:ef7eb2e8f9f7 228 GPIOx->MODER = temp;
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /* In case of Output or Alternate function mode selection */
<> 144:ef7eb2e8f9f7 231 if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
<> 144:ef7eb2e8f9f7 232 (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
<> 144:ef7eb2e8f9f7 233 {
<> 144:ef7eb2e8f9f7 234 /* Check the Speed parameter */
<> 144:ef7eb2e8f9f7 235 assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
<> 144:ef7eb2e8f9f7 236 /* Configure the IO Speed */
<> 144:ef7eb2e8f9f7 237 temp = GPIOx->OSPEEDR;
<> 144:ef7eb2e8f9f7 238 temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
<> 144:ef7eb2e8f9f7 239 temp |= (GPIO_Init->Speed << (position * 2U));
<> 144:ef7eb2e8f9f7 240 GPIOx->OSPEEDR = temp;
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 /* Configure the IO Output Type */
<> 144:ef7eb2e8f9f7 243 temp = GPIOx->OTYPER;
<> 144:ef7eb2e8f9f7 244 temp &= ~(GPIO_OTYPER_OT_0 << position) ;
<> 144:ef7eb2e8f9f7 245 temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
<> 144:ef7eb2e8f9f7 246 GPIOx->OTYPER = temp;
<> 144:ef7eb2e8f9f7 247 }
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 /* Activate the Pull-up or Pull down resistor for the current IO */
<> 144:ef7eb2e8f9f7 250 temp = GPIOx->PUPDR;
<> 144:ef7eb2e8f9f7 251 temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
<> 144:ef7eb2e8f9f7 252 temp |= ((GPIO_Init->Pull) << (position * 2U));
<> 144:ef7eb2e8f9f7 253 GPIOx->PUPDR = temp;
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /*--------------------- EXTI Mode Configuration ------------------------*/
<> 144:ef7eb2e8f9f7 256 /* Configure the External Interrupt or event for the current IO */
<> 144:ef7eb2e8f9f7 257 if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
<> 144:ef7eb2e8f9f7 258 {
<> 144:ef7eb2e8f9f7 259 /* Enable SYSCFG Clock */
<> 144:ef7eb2e8f9f7 260 __HAL_RCC_SYSCFG_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 261
<> 144:ef7eb2e8f9f7 262 temp = SYSCFG->EXTICR[position >> 2U];
AnnaBridge 167:e84263d55307 263 temp &= ~(0x0FU << (4U * (position & 0x03)));
<> 144:ef7eb2e8f9f7 264 temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
<> 144:ef7eb2e8f9f7 265 SYSCFG->EXTICR[position >> 2U] = temp;
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 /* Clear EXTI line configuration */
<> 144:ef7eb2e8f9f7 268 temp = EXTI->IMR;
<> 144:ef7eb2e8f9f7 269 temp &= ~((uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 270 if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
<> 144:ef7eb2e8f9f7 271 {
<> 144:ef7eb2e8f9f7 272 temp |= iocurrent;
<> 144:ef7eb2e8f9f7 273 }
<> 144:ef7eb2e8f9f7 274 EXTI->IMR = temp;
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 temp = EXTI->EMR;
<> 144:ef7eb2e8f9f7 277 temp &= ~((uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 278 if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
<> 144:ef7eb2e8f9f7 279 {
<> 144:ef7eb2e8f9f7 280 temp |= iocurrent;
<> 144:ef7eb2e8f9f7 281 }
<> 144:ef7eb2e8f9f7 282 EXTI->EMR = temp;
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 /* Clear Rising Falling edge configuration */
<> 144:ef7eb2e8f9f7 285 temp = EXTI->RTSR;
<> 144:ef7eb2e8f9f7 286 temp &= ~((uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 287 if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
<> 144:ef7eb2e8f9f7 288 {
<> 144:ef7eb2e8f9f7 289 temp |= iocurrent;
<> 144:ef7eb2e8f9f7 290 }
<> 144:ef7eb2e8f9f7 291 EXTI->RTSR = temp;
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 temp = EXTI->FTSR;
<> 144:ef7eb2e8f9f7 294 temp &= ~((uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 295 if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
<> 144:ef7eb2e8f9f7 296 {
<> 144:ef7eb2e8f9f7 297 temp |= iocurrent;
<> 144:ef7eb2e8f9f7 298 }
<> 144:ef7eb2e8f9f7 299 EXTI->FTSR = temp;
<> 144:ef7eb2e8f9f7 300 }
<> 144:ef7eb2e8f9f7 301 }
<> 144:ef7eb2e8f9f7 302 }
<> 144:ef7eb2e8f9f7 303 }
<> 144:ef7eb2e8f9f7 304
<> 144:ef7eb2e8f9f7 305 /**
<> 144:ef7eb2e8f9f7 306 * @brief De-initializes the GPIOx peripheral registers to their default reset values.
<> 144:ef7eb2e8f9f7 307 * @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
<> 144:ef7eb2e8f9f7 308 * @param GPIO_Pin: specifies the port bit to be written.
<> 144:ef7eb2e8f9f7 309 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
<> 144:ef7eb2e8f9f7 310 * @retval None
<> 144:ef7eb2e8f9f7 311 */
<> 144:ef7eb2e8f9f7 312 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 313 {
<> 144:ef7eb2e8f9f7 314 uint32_t position;
<> 144:ef7eb2e8f9f7 315 uint32_t ioposition = 0x00U;
<> 144:ef7eb2e8f9f7 316 uint32_t iocurrent = 0x00U;
<> 144:ef7eb2e8f9f7 317 uint32_t tmp = 0x00U;
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /* Check the parameters */
<> 144:ef7eb2e8f9f7 320 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 /* Configure the port pins */
<> 144:ef7eb2e8f9f7 323 for(position = 0U; position < GPIO_NUMBER; position++)
<> 144:ef7eb2e8f9f7 324 {
<> 144:ef7eb2e8f9f7 325 /* Get the IO position */
AnnaBridge 167:e84263d55307 326 ioposition = 0x01U << position;
<> 144:ef7eb2e8f9f7 327 /* Get the current IO position */
<> 144:ef7eb2e8f9f7 328 iocurrent = (GPIO_Pin) & ioposition;
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 if(iocurrent == ioposition)
<> 144:ef7eb2e8f9f7 331 {
<> 144:ef7eb2e8f9f7 332 /*------------------------- GPIO Mode Configuration --------------------*/
<> 144:ef7eb2e8f9f7 333 /* Configure IO Direction in Input Floating Mode */
<> 144:ef7eb2e8f9f7 334 GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2U));
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 /* Configure the default Alternate Function in current IO */
AnnaBridge 167:e84263d55307 337 GPIOx->AFR[position >> 3U] &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
<> 144:ef7eb2e8f9f7 338
<> 144:ef7eb2e8f9f7 339 /* Configure the default value for IO Speed */
<> 144:ef7eb2e8f9f7 340 GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
<> 144:ef7eb2e8f9f7 341
<> 144:ef7eb2e8f9f7 342 /* Configure the default value IO Output Type */
<> 144:ef7eb2e8f9f7 343 GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ;
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345 /* Deactivate the Pull-up and Pull-down resistor for the current IO */
<> 144:ef7eb2e8f9f7 346 GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
<> 144:ef7eb2e8f9f7 347
<> 144:ef7eb2e8f9f7 348 /*------------------------- EXTI Mode Configuration --------------------*/
<> 144:ef7eb2e8f9f7 349 tmp = SYSCFG->EXTICR[position >> 2U];
AnnaBridge 167:e84263d55307 350 tmp &= (0x0FU << (4U * (position & 0x03U)));
<> 144:ef7eb2e8f9f7 351 if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))))
<> 144:ef7eb2e8f9f7 352 {
<> 144:ef7eb2e8f9f7 353 /* Configure the External Interrupt or event for the current IO */
AnnaBridge 167:e84263d55307 354 tmp = 0x0FU << (4U * (position & 0x03U));
<> 144:ef7eb2e8f9f7 355 SYSCFG->EXTICR[position >> 2U] &= ~tmp;
<> 144:ef7eb2e8f9f7 356
<> 144:ef7eb2e8f9f7 357 /* Clear EXTI line configuration */
<> 144:ef7eb2e8f9f7 358 EXTI->IMR &= ~((uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 359 EXTI->EMR &= ~((uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 /* Clear Rising Falling edge configuration */
<> 144:ef7eb2e8f9f7 362 EXTI->RTSR &= ~((uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 363 EXTI->FTSR &= ~((uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 364 }
<> 144:ef7eb2e8f9f7 365 }
<> 144:ef7eb2e8f9f7 366 }
<> 144:ef7eb2e8f9f7 367 }
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 /**
<> 144:ef7eb2e8f9f7 370 * @}
<> 144:ef7eb2e8f9f7 371 */
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 374 * @brief GPIO Read and Write
<> 144:ef7eb2e8f9f7 375 *
<> 144:ef7eb2e8f9f7 376 @verbatim
<> 144:ef7eb2e8f9f7 377 ===============================================================================
<> 144:ef7eb2e8f9f7 378 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 379 ===============================================================================
<> 144:ef7eb2e8f9f7 380
<> 144:ef7eb2e8f9f7 381 @endverbatim
<> 144:ef7eb2e8f9f7 382 * @{
<> 144:ef7eb2e8f9f7 383 */
<> 144:ef7eb2e8f9f7 384
<> 144:ef7eb2e8f9f7 385 /**
<> 144:ef7eb2e8f9f7 386 * @brief Reads the specified input port pin.
<> 144:ef7eb2e8f9f7 387 * @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
<> 144:ef7eb2e8f9f7 388 * @param GPIO_Pin: specifies the port bit to read.
<> 144:ef7eb2e8f9f7 389 * This parameter can be GPIO_PIN_x where x can be (0..15).
<> 144:ef7eb2e8f9f7 390 * @retval The input port pin value.
<> 144:ef7eb2e8f9f7 391 */
<> 144:ef7eb2e8f9f7 392 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 393 {
<> 144:ef7eb2e8f9f7 394 GPIO_PinState bitstatus;
<> 144:ef7eb2e8f9f7 395
<> 144:ef7eb2e8f9f7 396 /* Check the parameters */
<> 144:ef7eb2e8f9f7 397 assert_param(IS_GPIO_PIN(GPIO_Pin));
<> 144:ef7eb2e8f9f7 398
<> 144:ef7eb2e8f9f7 399 if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
<> 144:ef7eb2e8f9f7 400 {
<> 144:ef7eb2e8f9f7 401 bitstatus = GPIO_PIN_SET;
<> 144:ef7eb2e8f9f7 402 }
<> 144:ef7eb2e8f9f7 403 else
<> 144:ef7eb2e8f9f7 404 {
<> 144:ef7eb2e8f9f7 405 bitstatus = GPIO_PIN_RESET;
<> 144:ef7eb2e8f9f7 406 }
<> 144:ef7eb2e8f9f7 407 return bitstatus;
<> 144:ef7eb2e8f9f7 408 }
<> 144:ef7eb2e8f9f7 409
<> 144:ef7eb2e8f9f7 410 /**
<> 144:ef7eb2e8f9f7 411 * @brief Sets or clears the selected data port bit.
<> 144:ef7eb2e8f9f7 412 *
<> 144:ef7eb2e8f9f7 413 * @note This function uses GPIOx_BSRR register to allow atomic read/modify
<> 144:ef7eb2e8f9f7 414 * accesses. In this way, there is no risk of an IRQ occurring between
<> 144:ef7eb2e8f9f7 415 * the read and the modify access.
<> 144:ef7eb2e8f9f7 416 *
<> 144:ef7eb2e8f9f7 417 * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for all STM32F2XX devices
<> 144:ef7eb2e8f9f7 418 * @param GPIO_Pin: specifies the port bit to be written.
<> 144:ef7eb2e8f9f7 419 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
<> 144:ef7eb2e8f9f7 420 * @param PinState: specifies the value to be written to the selected bit.
<> 144:ef7eb2e8f9f7 421 * This parameter can be one of the GPIO_PinState enum values:
<> 144:ef7eb2e8f9f7 422 * @arg GPIO_PIN_RESET: to clear the port pin
<> 144:ef7eb2e8f9f7 423 * @arg GPIO_PIN_SET: to set the port pin
<> 144:ef7eb2e8f9f7 424 * @retval None
<> 144:ef7eb2e8f9f7 425 */
<> 144:ef7eb2e8f9f7 426 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
<> 144:ef7eb2e8f9f7 427 {
<> 144:ef7eb2e8f9f7 428 /* Check the parameters */
<> 144:ef7eb2e8f9f7 429 assert_param(IS_GPIO_PIN(GPIO_Pin));
<> 144:ef7eb2e8f9f7 430 assert_param(IS_GPIO_PIN_ACTION(PinState));
<> 144:ef7eb2e8f9f7 431
<> 144:ef7eb2e8f9f7 432 if(PinState != GPIO_PIN_RESET)
<> 144:ef7eb2e8f9f7 433 {
<> 144:ef7eb2e8f9f7 434 GPIOx->BSRR = GPIO_Pin;
<> 144:ef7eb2e8f9f7 435 }
<> 144:ef7eb2e8f9f7 436 else
<> 144:ef7eb2e8f9f7 437 {
<> 144:ef7eb2e8f9f7 438 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
<> 144:ef7eb2e8f9f7 439 }
<> 144:ef7eb2e8f9f7 440 }
<> 144:ef7eb2e8f9f7 441
<> 144:ef7eb2e8f9f7 442 /**
<> 144:ef7eb2e8f9f7 443 * @brief Toggles the specified GPIO pins.
<> 144:ef7eb2e8f9f7 444 * @param GPIOx: where x can be (A..I) to select the GPIO peripheral.
<> 144:ef7eb2e8f9f7 445 * @param GPIO_Pin: Specifies the pins to be toggled.
<> 144:ef7eb2e8f9f7 446 * @retval None
<> 144:ef7eb2e8f9f7 447 */
<> 144:ef7eb2e8f9f7 448 void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 449 {
<> 144:ef7eb2e8f9f7 450 /* Check the parameters */
<> 144:ef7eb2e8f9f7 451 assert_param(IS_GPIO_PIN(GPIO_Pin));
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 GPIOx->ODR ^= GPIO_Pin;
<> 144:ef7eb2e8f9f7 454 }
<> 144:ef7eb2e8f9f7 455
<> 144:ef7eb2e8f9f7 456 /**
<> 144:ef7eb2e8f9f7 457 * @brief Locks GPIO Pins configuration registers.
<> 144:ef7eb2e8f9f7 458 * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
<> 144:ef7eb2e8f9f7 459 * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
<> 144:ef7eb2e8f9f7 460 * @note The configuration of the locked GPIO pins can no longer be modified
<> 144:ef7eb2e8f9f7 461 * until the next reset.
<> 144:ef7eb2e8f9f7 462 * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for STM32F2XX family
<> 144:ef7eb2e8f9f7 463 * @param GPIO_Pin: specifies the port bit to be locked.
<> 144:ef7eb2e8f9f7 464 * This parameter can be any combination of GPIO_PIN_x where x can be (0..15).
<> 144:ef7eb2e8f9f7 465 * @retval None
<> 144:ef7eb2e8f9f7 466 */
<> 144:ef7eb2e8f9f7 467 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 468 {
<> 144:ef7eb2e8f9f7 469 __IO uint32_t tmp = GPIO_LCKR_LCKK;
<> 144:ef7eb2e8f9f7 470
<> 144:ef7eb2e8f9f7 471 /* Check the parameters */
<> 144:ef7eb2e8f9f7 472 assert_param(IS_GPIO_PIN(GPIO_Pin));
<> 144:ef7eb2e8f9f7 473
<> 144:ef7eb2e8f9f7 474 /* Apply lock key write sequence */
<> 144:ef7eb2e8f9f7 475 tmp |= GPIO_Pin;
<> 144:ef7eb2e8f9f7 476 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
<> 144:ef7eb2e8f9f7 477 GPIOx->LCKR = tmp;
<> 144:ef7eb2e8f9f7 478 /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
<> 144:ef7eb2e8f9f7 479 GPIOx->LCKR = GPIO_Pin;
<> 144:ef7eb2e8f9f7 480 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
<> 144:ef7eb2e8f9f7 481 GPIOx->LCKR = tmp;
<> 144:ef7eb2e8f9f7 482 /* Read LCKK bit*/
<> 144:ef7eb2e8f9f7 483 tmp = GPIOx->LCKR;
<> 144:ef7eb2e8f9f7 484
<> 144:ef7eb2e8f9f7 485 if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
<> 144:ef7eb2e8f9f7 486 {
<> 144:ef7eb2e8f9f7 487 return HAL_OK;
<> 144:ef7eb2e8f9f7 488 }
<> 144:ef7eb2e8f9f7 489 else
<> 144:ef7eb2e8f9f7 490 {
<> 144:ef7eb2e8f9f7 491 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 492 }
<> 144:ef7eb2e8f9f7 493 }
<> 144:ef7eb2e8f9f7 494
<> 144:ef7eb2e8f9f7 495 /**
<> 144:ef7eb2e8f9f7 496 * @brief This function handles EXTI interrupt request.
<> 144:ef7eb2e8f9f7 497 * @param GPIO_Pin: Specifies the pins connected EXTI line
<> 144:ef7eb2e8f9f7 498 * @retval None
<> 144:ef7eb2e8f9f7 499 */
<> 144:ef7eb2e8f9f7 500 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 501 {
<> 144:ef7eb2e8f9f7 502 /* EXTI line interrupt detected */
<> 144:ef7eb2e8f9f7 503 if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
<> 144:ef7eb2e8f9f7 504 {
<> 144:ef7eb2e8f9f7 505 __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
<> 144:ef7eb2e8f9f7 506 HAL_GPIO_EXTI_Callback(GPIO_Pin);
<> 144:ef7eb2e8f9f7 507 }
<> 144:ef7eb2e8f9f7 508 }
<> 144:ef7eb2e8f9f7 509
<> 144:ef7eb2e8f9f7 510 /**
<> 144:ef7eb2e8f9f7 511 * @brief EXTI line detection callbacks.
<> 144:ef7eb2e8f9f7 512 * @param GPIO_Pin: Specifies the pins connected EXTI line
<> 144:ef7eb2e8f9f7 513 * @retval None
<> 144:ef7eb2e8f9f7 514 */
<> 144:ef7eb2e8f9f7 515 __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 516 {
<> 144:ef7eb2e8f9f7 517 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 518 UNUSED(GPIO_Pin);
<> 144:ef7eb2e8f9f7 519 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 520 the HAL_GPIO_EXTI_Callback could be implemented in the user file
<> 144:ef7eb2e8f9f7 521 */
<> 144:ef7eb2e8f9f7 522 }
<> 144:ef7eb2e8f9f7 523
<> 144:ef7eb2e8f9f7 524 /**
<> 144:ef7eb2e8f9f7 525 * @}
<> 144:ef7eb2e8f9f7 526 */
<> 144:ef7eb2e8f9f7 527
<> 144:ef7eb2e8f9f7 528 /**
<> 144:ef7eb2e8f9f7 529 * @}
<> 144:ef7eb2e8f9f7 530 */
<> 144:ef7eb2e8f9f7 531
<> 144:ef7eb2e8f9f7 532 #endif /* HAL_GPIO_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 533 /**
<> 144:ef7eb2e8f9f7 534 * @}
<> 144:ef7eb2e8f9f7 535 */
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 /**
<> 144:ef7eb2e8f9f7 538 * @}
<> 144:ef7eb2e8f9f7 539 */
<> 144:ef7eb2e8f9f7 540
<> 144:ef7eb2e8f9f7 541 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/