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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_can.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
167:e84263d55307 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f2xx_hal_can.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.2.1
AnnaBridge 167:e84263d55307 6 * @date 14-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Header file of CAN HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
AnnaBridge 167:e84263d55307 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F2xx_HAL_CAN_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F2xx_HAL_CAN_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f2xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F2xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup CAN
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup CAN_Exported_Types CAN Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief HAL State structures definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef enum
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 HAL_CAN_STATE_RESET = 0x00U, /*!< CAN not yet initialized or disabled */
<> 144:ef7eb2e8f9f7 68 HAL_CAN_STATE_READY = 0x01U, /*!< CAN initialized and ready for use */
<> 144:ef7eb2e8f9f7 69 HAL_CAN_STATE_BUSY = 0x02U, /*!< CAN process is ongoing */
<> 144:ef7eb2e8f9f7 70 HAL_CAN_STATE_BUSY_TX = 0x12U, /*!< CAN process is ongoing */
AnnaBridge 167:e84263d55307 71 HAL_CAN_STATE_BUSY_RX0 = 0x22U, /*!< CAN process is ongoing */
AnnaBridge 167:e84263d55307 72 HAL_CAN_STATE_BUSY_RX1 = 0x32U, /*!< CAN process is ongoing */
AnnaBridge 167:e84263d55307 73 HAL_CAN_STATE_BUSY_TX_RX0 = 0x42U, /*!< CAN process is ongoing */
AnnaBridge 167:e84263d55307 74 HAL_CAN_STATE_BUSY_TX_RX1 = 0x52U, /*!< CAN process is ongoing */
AnnaBridge 167:e84263d55307 75 HAL_CAN_STATE_BUSY_RX0_RX1 = 0x62U, /*!< CAN process is ongoing */
AnnaBridge 167:e84263d55307 76 HAL_CAN_STATE_BUSY_TX_RX0_RX1 = 0x72U, /*!< CAN process is ongoing */
AnnaBridge 167:e84263d55307 77 HAL_CAN_STATE_TIMEOUT = 0x03U, /*!< CAN in Timeout state */
<> 144:ef7eb2e8f9f7 78 HAL_CAN_STATE_ERROR = 0x04U /*!< CAN error state */
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 }HAL_CAN_StateTypeDef;
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 /**
<> 144:ef7eb2e8f9f7 83 * @brief CAN init structure definition
<> 144:ef7eb2e8f9f7 84 */
<> 144:ef7eb2e8f9f7 85 typedef struct
<> 144:ef7eb2e8f9f7 86 {
<> 144:ef7eb2e8f9f7 87 uint32_t Prescaler; /*!< Specifies the length of a time quantum.
<> 144:ef7eb2e8f9f7 88 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 uint32_t Mode; /*!< Specifies the CAN operating mode.
<> 144:ef7eb2e8f9f7 91 This parameter can be a value of @ref CAN_operating_mode */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 uint32_t SJW; /*!< Specifies the maximum number of time quanta
<> 144:ef7eb2e8f9f7 94 the CAN hardware is allowed to lengthen or
<> 144:ef7eb2e8f9f7 95 shorten a bit to perform resynchronization.
<> 144:ef7eb2e8f9f7 96 This parameter can be a value of @ref CAN_synchronisation_jump_width */
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
<> 144:ef7eb2e8f9f7 99 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
<> 144:ef7eb2e8f9f7 102 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
<> 144:ef7eb2e8f9f7 105 This parameter can be set to ENABLE or DISABLE. */
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
<> 144:ef7eb2e8f9f7 108 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
<> 144:ef7eb2e8f9f7 111 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
<> 144:ef7eb2e8f9f7 114 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
<> 144:ef7eb2e8f9f7 117 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
<> 144:ef7eb2e8f9f7 120 This parameter can be set to ENABLE or DISABLE */
<> 144:ef7eb2e8f9f7 121 }CAN_InitTypeDef;
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 /**
<> 144:ef7eb2e8f9f7 124 * @brief CAN filter configuration structure definition
<> 144:ef7eb2e8f9f7 125 */
<> 144:ef7eb2e8f9f7 126 typedef struct
<> 144:ef7eb2e8f9f7 127 {
<> 144:ef7eb2e8f9f7 128 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
<> 144:ef7eb2e8f9f7 129 configuration, first one for a 16-bit configuration).
<> 144:ef7eb2e8f9f7 130 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
<> 144:ef7eb2e8f9f7 133 configuration, second one for a 16-bit configuration).
<> 144:ef7eb2e8f9f7 134 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
<> 144:ef7eb2e8f9f7 137 according to the mode (MSBs for a 32-bit configuration,
<> 144:ef7eb2e8f9f7 138 first one for a 16-bit configuration).
<> 144:ef7eb2e8f9f7 139 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
<> 144:ef7eb2e8f9f7 142 according to the mode (LSBs for a 32-bit configuration,
<> 144:ef7eb2e8f9f7 143 second one for a 16-bit configuration).
<> 144:ef7eb2e8f9f7 144 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
<> 144:ef7eb2e8f9f7 147 This parameter can be a value of @ref CAN_filter_FIFO */
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
<> 144:ef7eb2e8f9f7 150 This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
<> 144:ef7eb2e8f9f7 153 This parameter can be a value of @ref CAN_filter_mode */
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 uint32_t FilterScale; /*!< Specifies the filter scale.
<> 144:ef7eb2e8f9f7 156 This parameter can be a value of @ref CAN_filter_scale */
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 uint32_t FilterActivation; /*!< Enable or disable the filter.
<> 144:ef7eb2e8f9f7 159 This parameter can be set to ENABLE or DISABLE. */
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 uint32_t BankNumber; /*!< Select the start slave bank filter.
<> 144:ef7eb2e8f9f7 162 This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 }CAN_FilterConfTypeDef;
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 /**
<> 144:ef7eb2e8f9f7 167 * @brief CAN Tx message structure definition
<> 144:ef7eb2e8f9f7 168 */
<> 144:ef7eb2e8f9f7 169 typedef struct
<> 144:ef7eb2e8f9f7 170 {
<> 144:ef7eb2e8f9f7 171 uint32_t StdId; /*!< Specifies the standard identifier.
<> 144:ef7eb2e8f9f7 172 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 uint32_t ExtId; /*!< Specifies the extended identifier.
<> 144:ef7eb2e8f9f7 175 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
<> 144:ef7eb2e8f9f7 178 This parameter can be a value of @ref CAN_Identifier_Type */
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
<> 144:ef7eb2e8f9f7 181 This parameter can be a value of @ref CAN_remote_transmission_request */
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
<> 144:ef7eb2e8f9f7 184 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 uint8_t Data[8]; /*!< Contains the data to be transmitted.
<> 144:ef7eb2e8f9f7 187 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 }CanTxMsgTypeDef;
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 /**
<> 144:ef7eb2e8f9f7 192 * @brief CAN Rx message structure definition
<> 144:ef7eb2e8f9f7 193 */
<> 144:ef7eb2e8f9f7 194 typedef struct
<> 144:ef7eb2e8f9f7 195 {
<> 144:ef7eb2e8f9f7 196 uint32_t StdId; /*!< Specifies the standard identifier.
<> 144:ef7eb2e8f9f7 197 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 uint32_t ExtId; /*!< Specifies the extended identifier.
<> 144:ef7eb2e8f9f7 200 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
<> 144:ef7eb2e8f9f7 201
<> 144:ef7eb2e8f9f7 202 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
<> 144:ef7eb2e8f9f7 203 This parameter can be a value of @ref CAN_Identifier_Type */
<> 144:ef7eb2e8f9f7 204
<> 144:ef7eb2e8f9f7 205 uint32_t RTR; /*!< Specifies the type of frame for the received message.
<> 144:ef7eb2e8f9f7 206 This parameter can be a value of @ref CAN_remote_transmission_request */
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 uint32_t DLC; /*!< Specifies the length of the frame that will be received.
<> 144:ef7eb2e8f9f7 209 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 uint8_t Data[8]; /*!< Contains the data to be received.
<> 144:ef7eb2e8f9f7 212 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
<> 144:ef7eb2e8f9f7 215 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
<> 144:ef7eb2e8f9f7 218 This parameter can be CAN_FIFO0 or CAN_FIFO1 */
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 }CanRxMsgTypeDef;
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /**
<> 144:ef7eb2e8f9f7 223 * @brief CAN handle Structure definition
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225 typedef struct
<> 144:ef7eb2e8f9f7 226 {
<> 144:ef7eb2e8f9f7 227 CAN_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 CAN_InitTypeDef Init; /*!< CAN required parameters */
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
<> 144:ef7eb2e8f9f7 232
AnnaBridge 167:e84263d55307 233 CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure for RX FIFO0 msg */
AnnaBridge 167:e84263d55307 234
AnnaBridge 167:e84263d55307 235 CanRxMsgTypeDef* pRx1Msg; /*!< Pointer to reception structure for RX FIFO1 msg */
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 HAL_LockTypeDef Lock; /*!< CAN locking object */
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 __IO uint32_t ErrorCode; /*!< CAN Error code
<> 144:ef7eb2e8f9f7 242 This parameter can be a value of @ref CAN_Error_Code */
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 }CAN_HandleTypeDef;
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 /**
<> 144:ef7eb2e8f9f7 247 * @}
<> 144:ef7eb2e8f9f7 248 */
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 251 /** @defgroup CAN_Exported_Constants CAN Exported Constants
<> 144:ef7eb2e8f9f7 252 * @{
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /** @defgroup CAN_Error_Code CAN Error Code
<> 144:ef7eb2e8f9f7 256 * @{
<> 144:ef7eb2e8f9f7 257 */
AnnaBridge 167:e84263d55307 258 #define HAL_CAN_ERROR_NONE 0x00000000U /*!< No error */
AnnaBridge 167:e84263d55307 259 #define HAL_CAN_ERROR_EWG 0x00000001U /*!< EWG error */
AnnaBridge 167:e84263d55307 260 #define HAL_CAN_ERROR_EPV 0x00000002U /*!< EPV error */
AnnaBridge 167:e84263d55307 261 #define HAL_CAN_ERROR_BOF 0x00000004U /*!< BOF error */
AnnaBridge 167:e84263d55307 262 #define HAL_CAN_ERROR_STF 0x00000008U /*!< Stuff error */
AnnaBridge 167:e84263d55307 263 #define HAL_CAN_ERROR_FOR 0x00000010U /*!< Form error */
AnnaBridge 167:e84263d55307 264 #define HAL_CAN_ERROR_ACK 0x00000020U /*!< Acknowledgment error */
AnnaBridge 167:e84263d55307 265 #define HAL_CAN_ERROR_BR 0x00000040U /*!< Bit recessive */
AnnaBridge 167:e84263d55307 266 #define HAL_CAN_ERROR_BD 0x00000080U /*!< LEC dominant */
AnnaBridge 167:e84263d55307 267 #define HAL_CAN_ERROR_CRC 0x00000100U /*!< LEC transfer error */
AnnaBridge 167:e84263d55307 268 #define HAL_CAN_ERROR_FOV0 0x00000200U /*!< FIFO0 overrun error */
AnnaBridge 167:e84263d55307 269 #define HAL_CAN_ERROR_FOV1 0x00000400U /*!< FIFO1 overrun error */
AnnaBridge 167:e84263d55307 270 #define HAL_CAN_ERROR_TXFAIL 0x00000800U /*!< Transmit failure */
<> 144:ef7eb2e8f9f7 271 /**
<> 144:ef7eb2e8f9f7 272 * @}
<> 144:ef7eb2e8f9f7 273 */
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 /** @defgroup CAN_InitStatus CAN InitStatus
<> 144:ef7eb2e8f9f7 276 * @{
<> 144:ef7eb2e8f9f7 277 */
AnnaBridge 167:e84263d55307 278 #define CAN_INITSTATUS_FAILED ((uint8_t)0x00) /*!< CAN initialization failed */
AnnaBridge 167:e84263d55307 279 #define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01) /*!< CAN initialization OK */
<> 144:ef7eb2e8f9f7 280 /**
<> 144:ef7eb2e8f9f7 281 * @}
<> 144:ef7eb2e8f9f7 282 */
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 /** @defgroup CAN_operating_mode CAN Operating Mode
<> 144:ef7eb2e8f9f7 285 * @{
<> 144:ef7eb2e8f9f7 286 */
AnnaBridge 167:e84263d55307 287 #define CAN_MODE_NORMAL 0x00000000U /*!< Normal mode */
<> 144:ef7eb2e8f9f7 288 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
<> 144:ef7eb2e8f9f7 289 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
<> 144:ef7eb2e8f9f7 290 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
<> 144:ef7eb2e8f9f7 291 /**
<> 144:ef7eb2e8f9f7 292 * @}
<> 144:ef7eb2e8f9f7 293 */
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
<> 144:ef7eb2e8f9f7 296 * @{
<> 144:ef7eb2e8f9f7 297 */
AnnaBridge 167:e84263d55307 298 #define CAN_SJW_1TQ 0x00000000U /*!< 1 time quantum */
<> 144:ef7eb2e8f9f7 299 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
<> 144:ef7eb2e8f9f7 300 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
<> 144:ef7eb2e8f9f7 301 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
<> 144:ef7eb2e8f9f7 302 /**
<> 144:ef7eb2e8f9f7 303 * @}
<> 144:ef7eb2e8f9f7 304 */
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
<> 144:ef7eb2e8f9f7 307 * @{
<> 144:ef7eb2e8f9f7 308 */
AnnaBridge 167:e84263d55307 309 #define CAN_BS1_1TQ 0x00000000U /*!< 1 time quantum */
<> 144:ef7eb2e8f9f7 310 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
<> 144:ef7eb2e8f9f7 311 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
<> 144:ef7eb2e8f9f7 312 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
<> 144:ef7eb2e8f9f7 313 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
<> 144:ef7eb2e8f9f7 314 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
<> 144:ef7eb2e8f9f7 315 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
<> 144:ef7eb2e8f9f7 316 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
<> 144:ef7eb2e8f9f7 317 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
<> 144:ef7eb2e8f9f7 318 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
<> 144:ef7eb2e8f9f7 319 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
<> 144:ef7eb2e8f9f7 320 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
<> 144:ef7eb2e8f9f7 321 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
<> 144:ef7eb2e8f9f7 322 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
<> 144:ef7eb2e8f9f7 323 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
<> 144:ef7eb2e8f9f7 324 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
<> 144:ef7eb2e8f9f7 325 /**
<> 144:ef7eb2e8f9f7 326 * @}
<> 144:ef7eb2e8f9f7 327 */
<> 144:ef7eb2e8f9f7 328
<> 144:ef7eb2e8f9f7 329 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
<> 144:ef7eb2e8f9f7 330 * @{
<> 144:ef7eb2e8f9f7 331 */
AnnaBridge 167:e84263d55307 332 #define CAN_BS2_1TQ 0x00000000U /*!< 1 time quantum */
<> 144:ef7eb2e8f9f7 333 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
<> 144:ef7eb2e8f9f7 334 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
<> 144:ef7eb2e8f9f7 335 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
<> 144:ef7eb2e8f9f7 336 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
<> 144:ef7eb2e8f9f7 337 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
<> 144:ef7eb2e8f9f7 338 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
<> 144:ef7eb2e8f9f7 339 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
<> 144:ef7eb2e8f9f7 340 /**
<> 144:ef7eb2e8f9f7 341 * @}
<> 144:ef7eb2e8f9f7 342 */
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /** @defgroup CAN_filter_mode CAN Filter Mode
<> 144:ef7eb2e8f9f7 345 * @{
<> 144:ef7eb2e8f9f7 346 */
AnnaBridge 167:e84263d55307 347 #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */
AnnaBridge 167:e84263d55307 348 #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */
<> 144:ef7eb2e8f9f7 349 /**
<> 144:ef7eb2e8f9f7 350 * @}
<> 144:ef7eb2e8f9f7 351 */
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 /** @defgroup CAN_filter_scale CAN Filter Scale
<> 144:ef7eb2e8f9f7 354 * @{
<> 144:ef7eb2e8f9f7 355 */
AnnaBridge 167:e84263d55307 356 #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */
AnnaBridge 167:e84263d55307 357 #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */
<> 144:ef7eb2e8f9f7 358 /**
<> 144:ef7eb2e8f9f7 359 * @}
<> 144:ef7eb2e8f9f7 360 */
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
<> 144:ef7eb2e8f9f7 363 * @{
<> 144:ef7eb2e8f9f7 364 */
AnnaBridge 167:e84263d55307 365 #define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
AnnaBridge 167:e84263d55307 366 #define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
<> 144:ef7eb2e8f9f7 367 /**
<> 144:ef7eb2e8f9f7 368 * @}
<> 144:ef7eb2e8f9f7 369 */
<> 144:ef7eb2e8f9f7 370
<> 144:ef7eb2e8f9f7 371 /** @defgroup CAN_Identifier_Type CAN Identifier Type
<> 144:ef7eb2e8f9f7 372 * @{
<> 144:ef7eb2e8f9f7 373 */
AnnaBridge 167:e84263d55307 374 #define CAN_ID_STD 0x00000000U /*!< Standard Id */
AnnaBridge 167:e84263d55307 375 #define CAN_ID_EXT 0x00000004U /*!< Extended Id */
<> 144:ef7eb2e8f9f7 376 /**
<> 144:ef7eb2e8f9f7 377 * @}
<> 144:ef7eb2e8f9f7 378 */
<> 144:ef7eb2e8f9f7 379
<> 144:ef7eb2e8f9f7 380 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
<> 144:ef7eb2e8f9f7 381 * @{
<> 144:ef7eb2e8f9f7 382 */
AnnaBridge 167:e84263d55307 383 #define CAN_RTR_DATA 0x00000000U /*!< Data frame */
AnnaBridge 167:e84263d55307 384 #define CAN_RTR_REMOTE 0x00000002U /*!< Remote frame */
<> 144:ef7eb2e8f9f7 385 /**
<> 144:ef7eb2e8f9f7 386 * @}
<> 144:ef7eb2e8f9f7 387 */
<> 144:ef7eb2e8f9f7 388
<> 144:ef7eb2e8f9f7 389 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
<> 144:ef7eb2e8f9f7 390 * @{
<> 144:ef7eb2e8f9f7 391 */
AnnaBridge 167:e84263d55307 392 #define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
AnnaBridge 167:e84263d55307 393 #define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
<> 144:ef7eb2e8f9f7 394 /**
<> 144:ef7eb2e8f9f7 395 * @}
<> 144:ef7eb2e8f9f7 396 */
<> 144:ef7eb2e8f9f7 397
<> 144:ef7eb2e8f9f7 398 /** @defgroup CAN_flags CAN Flags
<> 144:ef7eb2e8f9f7 399 * @{
<> 144:ef7eb2e8f9f7 400 */
<> 144:ef7eb2e8f9f7 401 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
<> 144:ef7eb2e8f9f7 402 and CAN_ClearFlag() functions. */
<> 144:ef7eb2e8f9f7 403 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
<> 144:ef7eb2e8f9f7 404 CAN_GetFlagStatus() function. */
<> 144:ef7eb2e8f9f7 405
<> 144:ef7eb2e8f9f7 406 /* Transmit Flags */
AnnaBridge 167:e84263d55307 407 #define CAN_FLAG_RQCP0 0x00000500U /*!< Request MailBox0 flag */
AnnaBridge 167:e84263d55307 408 #define CAN_FLAG_RQCP1 0x00000508U /*!< Request MailBox1 flag */
AnnaBridge 167:e84263d55307 409 #define CAN_FLAG_RQCP2 0x00000510U /*!< Request MailBox2 flag */
AnnaBridge 167:e84263d55307 410 #define CAN_FLAG_TXOK0 0x00000501U /*!< Transmission OK MailBox0 flag */
AnnaBridge 167:e84263d55307 411 #define CAN_FLAG_TXOK1 0x00000509U /*!< Transmission OK MailBox1 flag */
AnnaBridge 167:e84263d55307 412 #define CAN_FLAG_TXOK2 0x00000511U /*!< Transmission OK MailBox2 flag */
AnnaBridge 167:e84263d55307 413 #define CAN_FLAG_TME0 0x0000051AU /*!< Transmit mailbox 0 empty flag */
AnnaBridge 167:e84263d55307 414 #define CAN_FLAG_TME1 0x0000051BU /*!< Transmit mailbox 0 empty flag */
AnnaBridge 167:e84263d55307 415 #define CAN_FLAG_TME2 0x0000051CU /*!< Transmit mailbox 0 empty flag */
<> 144:ef7eb2e8f9f7 416
<> 144:ef7eb2e8f9f7 417 /* Receive Flags */
AnnaBridge 167:e84263d55307 418 #define CAN_FLAG_FF0 0x00000203U /*!< FIFO 0 Full flag */
AnnaBridge 167:e84263d55307 419 #define CAN_FLAG_FOV0 0x00000204U /*!< FIFO 0 Overrun flag */
<> 144:ef7eb2e8f9f7 420
AnnaBridge 167:e84263d55307 421 #define CAN_FLAG_FF1 0x00000403U /*!< FIFO 1 Full flag */
AnnaBridge 167:e84263d55307 422 #define CAN_FLAG_FOV1 0x00000404U /*!< FIFO 1 Overrun flag */
<> 144:ef7eb2e8f9f7 423
<> 144:ef7eb2e8f9f7 424 /* Operating Mode Flags */
AnnaBridge 167:e84263d55307 425 #define CAN_FLAG_INAK 0x00000100U /*!< Initialization acknowledge flag */
AnnaBridge 167:e84263d55307 426 #define CAN_FLAG_SLAK 0x00000101U /*!< Sleep acknowledge flag */
AnnaBridge 167:e84263d55307 427 #define CAN_FLAG_ERRI 0x00000102U /*!< Error flag */
AnnaBridge 167:e84263d55307 428 #define CAN_FLAG_WKU 0x00000103U /*!< Wake up flag */
AnnaBridge 167:e84263d55307 429 #define CAN_FLAG_SLAKI 0x00000104U /*!< Sleep acknowledge flag */
<> 144:ef7eb2e8f9f7 430
<> 144:ef7eb2e8f9f7 431 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
<> 144:ef7eb2e8f9f7 432 In this case the SLAK bit can be polled.*/
<> 144:ef7eb2e8f9f7 433
<> 144:ef7eb2e8f9f7 434 /* Error Flags */
AnnaBridge 167:e84263d55307 435 #define CAN_FLAG_EWG 0x00000300U /*!< Error warning flag */
AnnaBridge 167:e84263d55307 436 #define CAN_FLAG_EPV 0x00000301U /*!< Error passive flag */
AnnaBridge 167:e84263d55307 437 #define CAN_FLAG_BOF 0x00000302U /*!< Bus-Off flag */
<> 144:ef7eb2e8f9f7 438 /**
<> 144:ef7eb2e8f9f7 439 * @}
<> 144:ef7eb2e8f9f7 440 */
<> 144:ef7eb2e8f9f7 441
<> 144:ef7eb2e8f9f7 442 /** @defgroup CAN_Interrupts CAN Interrupts
<> 144:ef7eb2e8f9f7 443 * @{
<> 144:ef7eb2e8f9f7 444 */
AnnaBridge 167:e84263d55307 445 #define CAN_IT_TME CAN_IER_TMEIE /*!< Transmit mailbox empty interrupt */
<> 144:ef7eb2e8f9f7 446
<> 144:ef7eb2e8f9f7 447 /* Receive Interrupts */
AnnaBridge 167:e84263d55307 448 #define CAN_IT_FMP0 CAN_IER_FMPIE0 /*!< FIFO 0 message pending interrupt */
AnnaBridge 167:e84263d55307 449 #define CAN_IT_FF0 CAN_IER_FFIE0 /*!< FIFO 0 full interrupt */
AnnaBridge 167:e84263d55307 450 #define CAN_IT_FOV0 CAN_IER_FOVIE0 /*!< FIFO 0 overrun interrupt */
AnnaBridge 167:e84263d55307 451 #define CAN_IT_FMP1 CAN_IER_FMPIE1 /*!< FIFO 1 message pending interrupt */
AnnaBridge 167:e84263d55307 452 #define CAN_IT_FF1 CAN_IER_FFIE1 /*!< FIFO 1 full interrupt */
AnnaBridge 167:e84263d55307 453 #define CAN_IT_FOV1 CAN_IER_FOVIE1 /*!< FIFO 1 overrun interrupt */
<> 144:ef7eb2e8f9f7 454
<> 144:ef7eb2e8f9f7 455 /* Operating Mode Interrupts */
AnnaBridge 167:e84263d55307 456 #define CAN_IT_WKU CAN_IER_WKUIE /*!< Wake-up interrupt */
AnnaBridge 167:e84263d55307 457 #define CAN_IT_SLK CAN_IER_SLKIE /*!< Sleep acknowledge interrupt */
<> 144:ef7eb2e8f9f7 458
<> 144:ef7eb2e8f9f7 459 /* Error Interrupts */
AnnaBridge 167:e84263d55307 460 #define CAN_IT_EWG CAN_IER_EWGIE /*!< Error warning interrupt */
AnnaBridge 167:e84263d55307 461 #define CAN_IT_EPV CAN_IER_EPVIE /*!< Error passive interrupt */
AnnaBridge 167:e84263d55307 462 #define CAN_IT_BOF CAN_IER_BOFIE /*!< Bus-off interrupt */
AnnaBridge 167:e84263d55307 463 #define CAN_IT_LEC CAN_IER_LECIE /*!< Last error code interrupt */
AnnaBridge 167:e84263d55307 464 #define CAN_IT_ERR CAN_IER_ERRIE /*!< Error Interrupt */
<> 144:ef7eb2e8f9f7 465 /**
<> 144:ef7eb2e8f9f7 466 * @}
<> 144:ef7eb2e8f9f7 467 */
<> 144:ef7eb2e8f9f7 468
<> 144:ef7eb2e8f9f7 469 /** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
<> 144:ef7eb2e8f9f7 470 * @{
<> 144:ef7eb2e8f9f7 471 */
AnnaBridge 167:e84263d55307 472 #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
AnnaBridge 167:e84263d55307 473 #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
AnnaBridge 167:e84263d55307 474 #define CAN_TXMAILBOX_2 ((uint8_t)0x02)
<> 144:ef7eb2e8f9f7 475 /**
<> 144:ef7eb2e8f9f7 476 * @}
<> 144:ef7eb2e8f9f7 477 */
<> 144:ef7eb2e8f9f7 478
<> 144:ef7eb2e8f9f7 479 /**
<> 144:ef7eb2e8f9f7 480 * @}
<> 144:ef7eb2e8f9f7 481 */
<> 144:ef7eb2e8f9f7 482
<> 144:ef7eb2e8f9f7 483 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 484 /** @defgroup CAN_Exported_Macros CAN Exported Macros
<> 144:ef7eb2e8f9f7 485 * @{
<> 144:ef7eb2e8f9f7 486 */
<> 144:ef7eb2e8f9f7 487
<> 144:ef7eb2e8f9f7 488 /** @brief Reset CAN handle state
<> 144:ef7eb2e8f9f7 489 * @param __HANDLE__: specifies the CAN Handle.
<> 144:ef7eb2e8f9f7 490 * @retval None
<> 144:ef7eb2e8f9f7 491 */
<> 144:ef7eb2e8f9f7 492 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
<> 144:ef7eb2e8f9f7 493
<> 144:ef7eb2e8f9f7 494 /**
<> 144:ef7eb2e8f9f7 495 * @brief Enable the specified CAN interrupts.
<> 144:ef7eb2e8f9f7 496 * @param __HANDLE__: CAN handle
<> 144:ef7eb2e8f9f7 497 * @param __INTERRUPT__: CAN Interrupt
<> 144:ef7eb2e8f9f7 498 * @retval None
<> 144:ef7eb2e8f9f7 499 */
<> 144:ef7eb2e8f9f7 500 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 /**
<> 144:ef7eb2e8f9f7 503 * @brief Disable the specified CAN interrupts.
<> 144:ef7eb2e8f9f7 504 * @param __HANDLE__: CAN handle
<> 144:ef7eb2e8f9f7 505 * @param __INTERRUPT__: CAN Interrupt
<> 144:ef7eb2e8f9f7 506 * @retval None
<> 144:ef7eb2e8f9f7 507 */
<> 144:ef7eb2e8f9f7 508 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
<> 144:ef7eb2e8f9f7 509
<> 144:ef7eb2e8f9f7 510 /**
<> 144:ef7eb2e8f9f7 511 * @brief Return the number of pending received messages.
<> 144:ef7eb2e8f9f7 512 * @param __HANDLE__: CAN handle
<> 144:ef7eb2e8f9f7 513 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
<> 144:ef7eb2e8f9f7 514 * @retval The number of pending message.
<> 144:ef7eb2e8f9f7 515 */
<> 144:ef7eb2e8f9f7 516 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
AnnaBridge 167:e84263d55307 517 ((uint8_t)((__HANDLE__)->Instance->RF0R&0x03U)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&0x03U)))
<> 144:ef7eb2e8f9f7 518
<> 144:ef7eb2e8f9f7 519 /** @brief Check whether the specified CAN flag is set or not.
<> 144:ef7eb2e8f9f7 520 * @param __HANDLE__: CAN Handle
<> 144:ef7eb2e8f9f7 521 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 522 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 523 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
<> 144:ef7eb2e8f9f7 524 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
<> 144:ef7eb2e8f9f7 525 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
<> 144:ef7eb2e8f9f7 526 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
<> 144:ef7eb2e8f9f7 527 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
<> 144:ef7eb2e8f9f7 528 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
<> 144:ef7eb2e8f9f7 529 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
<> 144:ef7eb2e8f9f7 530 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
<> 144:ef7eb2e8f9f7 531 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
<> 144:ef7eb2e8f9f7 532 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
<> 144:ef7eb2e8f9f7 533 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
<> 144:ef7eb2e8f9f7 534 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
<> 144:ef7eb2e8f9f7 535 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
<> 144:ef7eb2e8f9f7 536 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
<> 144:ef7eb2e8f9f7 537 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
<> 144:ef7eb2e8f9f7 538 * @arg CAN_FLAG_WKU: Wake up Flag
<> 144:ef7eb2e8f9f7 539 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
<> 144:ef7eb2e8f9f7 540 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
<> 144:ef7eb2e8f9f7 541 * @arg CAN_FLAG_EWG: Error Warning Flag
<> 144:ef7eb2e8f9f7 542 * @arg CAN_FLAG_EPV: Error Passive Flag
<> 144:ef7eb2e8f9f7 543 * @arg CAN_FLAG_BOF: Bus-Off Flag
<> 144:ef7eb2e8f9f7 544 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 545 */
<> 144:ef7eb2e8f9f7 546 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
<> 144:ef7eb2e8f9f7 547 ((((__FLAG__) >> 8U) == 5U)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
<> 144:ef7eb2e8f9f7 548 (((__FLAG__) >> 8U) == 2U)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
<> 144:ef7eb2e8f9f7 549 (((__FLAG__) >> 8U) == 4U)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
<> 144:ef7eb2e8f9f7 550 (((__FLAG__) >> 8U) == 1U)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
<> 144:ef7eb2e8f9f7 551 ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
<> 144:ef7eb2e8f9f7 552
<> 144:ef7eb2e8f9f7 553 /** @brief Clear the specified CAN pending flag.
<> 144:ef7eb2e8f9f7 554 * @param __HANDLE__: CAN Handle.
<> 144:ef7eb2e8f9f7 555 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 556 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 557 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
<> 144:ef7eb2e8f9f7 558 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
<> 144:ef7eb2e8f9f7 559 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
<> 144:ef7eb2e8f9f7 560 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
<> 144:ef7eb2e8f9f7 561 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
<> 144:ef7eb2e8f9f7 562 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
<> 144:ef7eb2e8f9f7 563 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
<> 144:ef7eb2e8f9f7 564 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
<> 144:ef7eb2e8f9f7 565 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
<> 144:ef7eb2e8f9f7 566 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
<> 144:ef7eb2e8f9f7 567 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
<> 144:ef7eb2e8f9f7 568 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
<> 144:ef7eb2e8f9f7 569 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
<> 144:ef7eb2e8f9f7 570 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
<> 144:ef7eb2e8f9f7 571 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
<> 144:ef7eb2e8f9f7 572 * @arg CAN_FLAG_WKU: Wake up Flag
<> 144:ef7eb2e8f9f7 573 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
<> 144:ef7eb2e8f9f7 574 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
<> 144:ef7eb2e8f9f7 575 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 576 */
<> 144:ef7eb2e8f9f7 577 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
<> 144:ef7eb2e8f9f7 578 ((((__FLAG__) >> 8U) == 5U)? (((__HANDLE__)->Instance->TSR) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))): \
<> 144:ef7eb2e8f9f7 579 (((__FLAG__) >> 8U) == 2U)? (((__HANDLE__)->Instance->RF0R) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))): \
<> 144:ef7eb2e8f9f7 580 (((__FLAG__) >> 8U) == 4U)? (((__HANDLE__)->Instance->RF1R) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))): \
<> 144:ef7eb2e8f9f7 581 (((__HANDLE__)->Instance->MSR) = ((uint32_t)1U << ((__FLAG__) & CAN_FLAG_MASK))))
<> 144:ef7eb2e8f9f7 582
<> 144:ef7eb2e8f9f7 583 /** @brief Check if the specified CAN interrupt source is enabled or disabled.
<> 144:ef7eb2e8f9f7 584 * @param __HANDLE__: CAN Handle
<> 144:ef7eb2e8f9f7 585 * @param __INTERRUPT__: specifies the CAN interrupt source to check.
<> 144:ef7eb2e8f9f7 586 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 587 * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
<> 144:ef7eb2e8f9f7 588 * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
<> 144:ef7eb2e8f9f7 589 * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
<> 144:ef7eb2e8f9f7 590 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 591 */
<> 144:ef7eb2e8f9f7 592 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
<> 144:ef7eb2e8f9f7 593
<> 144:ef7eb2e8f9f7 594 /**
<> 144:ef7eb2e8f9f7 595 * @brief Check the transmission status of a CAN Frame.
<> 144:ef7eb2e8f9f7 596 * @param __HANDLE__: CAN Handle
<> 144:ef7eb2e8f9f7 597 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
<> 144:ef7eb2e8f9f7 598 * @retval The new status of transmission (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 599 */
<> 144:ef7eb2e8f9f7 600 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
<> 144:ef7eb2e8f9f7 601 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
<> 144:ef7eb2e8f9f7 602 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
<> 144:ef7eb2e8f9f7 603 ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605 /**
<> 144:ef7eb2e8f9f7 606 * @brief Release the specified receive FIFO.
<> 144:ef7eb2e8f9f7 607 * @param __HANDLE__: CAN handle
<> 144:ef7eb2e8f9f7 608 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
<> 144:ef7eb2e8f9f7 609 * @retval None
<> 144:ef7eb2e8f9f7 610 */
<> 144:ef7eb2e8f9f7 611 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
<> 144:ef7eb2e8f9f7 612 ((__HANDLE__)->Instance->RF0R = CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R = CAN_RF1R_RFOM1))
<> 144:ef7eb2e8f9f7 613
<> 144:ef7eb2e8f9f7 614 /**
<> 144:ef7eb2e8f9f7 615 * @brief Cancel a transmit request.
<> 144:ef7eb2e8f9f7 616 * @param __HANDLE__: CAN Handle
<> 144:ef7eb2e8f9f7 617 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
<> 144:ef7eb2e8f9f7 618 * @retval None
<> 144:ef7eb2e8f9f7 619 */
<> 144:ef7eb2e8f9f7 620 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
<> 144:ef7eb2e8f9f7 621 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ0) :\
<> 144:ef7eb2e8f9f7 622 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ1) :\
<> 144:ef7eb2e8f9f7 623 ((__HANDLE__)->Instance->TSR = CAN_TSR_ABRQ2))
<> 144:ef7eb2e8f9f7 624
<> 144:ef7eb2e8f9f7 625 /**
<> 144:ef7eb2e8f9f7 626 * @brief Enable or disable the DBG Freeze for CAN.
<> 144:ef7eb2e8f9f7 627 * @param __HANDLE__: CAN Handle
<> 144:ef7eb2e8f9f7 628 * @param __NEWSTATE__: new state of the CAN peripheral.
<> 144:ef7eb2e8f9f7 629 * This parameter can be: ENABLE (CAN reception/transmission is frozen
<> 144:ef7eb2e8f9f7 630 * during debug. Reception FIFOs can still be accessed/controlled normally)
<> 144:ef7eb2e8f9f7 631 * or DISABLE (CAN is working during debug).
<> 144:ef7eb2e8f9f7 632 * @retval None
<> 144:ef7eb2e8f9f7 633 */
<> 144:ef7eb2e8f9f7 634 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
<> 144:ef7eb2e8f9f7 635 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
<> 144:ef7eb2e8f9f7 636
<> 144:ef7eb2e8f9f7 637 /**
<> 144:ef7eb2e8f9f7 638 * @}
<> 144:ef7eb2e8f9f7 639 */
<> 144:ef7eb2e8f9f7 640
<> 144:ef7eb2e8f9f7 641 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 642 /** @addtogroup CAN_Exported_Functions
<> 144:ef7eb2e8f9f7 643 * @{
<> 144:ef7eb2e8f9f7 644 */
<> 144:ef7eb2e8f9f7 645
<> 144:ef7eb2e8f9f7 646 /** @addtogroup CAN_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 647 * @{
<> 144:ef7eb2e8f9f7 648 */
<> 144:ef7eb2e8f9f7 649 /* Initialization/de-initialization functions ***********************************/
<> 144:ef7eb2e8f9f7 650 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
<> 144:ef7eb2e8f9f7 651 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
<> 144:ef7eb2e8f9f7 652 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
<> 144:ef7eb2e8f9f7 653 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
<> 144:ef7eb2e8f9f7 654 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
<> 144:ef7eb2e8f9f7 655 /**
<> 144:ef7eb2e8f9f7 656 * @}
<> 144:ef7eb2e8f9f7 657 */
<> 144:ef7eb2e8f9f7 658
<> 144:ef7eb2e8f9f7 659 /** @addtogroup CAN_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 660 * @{
<> 144:ef7eb2e8f9f7 661 */
<> 144:ef7eb2e8f9f7 662 /* I/O operation functions ******************************************************/
<> 144:ef7eb2e8f9f7 663 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 664 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
<> 144:ef7eb2e8f9f7 665 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 666 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
<> 144:ef7eb2e8f9f7 667 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
<> 144:ef7eb2e8f9f7 668 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
<> 144:ef7eb2e8f9f7 669 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
<> 144:ef7eb2e8f9f7 670 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
<> 144:ef7eb2e8f9f7 671 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
<> 144:ef7eb2e8f9f7 672 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
<> 144:ef7eb2e8f9f7 673 /**
<> 144:ef7eb2e8f9f7 674 * @}
<> 144:ef7eb2e8f9f7 675 */
<> 144:ef7eb2e8f9f7 676
<> 144:ef7eb2e8f9f7 677 /** @addtogroup CAN_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 678 * @{
<> 144:ef7eb2e8f9f7 679 */
<> 144:ef7eb2e8f9f7 680 /* Peripheral State functions ***************************************************/
<> 144:ef7eb2e8f9f7 681 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
<> 144:ef7eb2e8f9f7 682 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
<> 144:ef7eb2e8f9f7 683 /**
<> 144:ef7eb2e8f9f7 684 * @}
<> 144:ef7eb2e8f9f7 685 */
<> 144:ef7eb2e8f9f7 686
<> 144:ef7eb2e8f9f7 687 /**
<> 144:ef7eb2e8f9f7 688 * @}
<> 144:ef7eb2e8f9f7 689 */
<> 144:ef7eb2e8f9f7 690
<> 144:ef7eb2e8f9f7 691 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 692 /** @defgroup CAN_Private_Types CAN Private Types
<> 144:ef7eb2e8f9f7 693 * @{
<> 144:ef7eb2e8f9f7 694 */
<> 144:ef7eb2e8f9f7 695
<> 144:ef7eb2e8f9f7 696 /**
<> 144:ef7eb2e8f9f7 697 * @}
<> 144:ef7eb2e8f9f7 698 */
<> 144:ef7eb2e8f9f7 699
<> 144:ef7eb2e8f9f7 700 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 701 /** @defgroup CAN_Private_Variables CAN Private Variables
<> 144:ef7eb2e8f9f7 702 * @{
<> 144:ef7eb2e8f9f7 703 */
<> 144:ef7eb2e8f9f7 704
<> 144:ef7eb2e8f9f7 705 /**
<> 144:ef7eb2e8f9f7 706 * @}
<> 144:ef7eb2e8f9f7 707 */
<> 144:ef7eb2e8f9f7 708
<> 144:ef7eb2e8f9f7 709 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 710 /** @defgroup CAN_Private_Constants CAN Private Constants
<> 144:ef7eb2e8f9f7 711 * @{
<> 144:ef7eb2e8f9f7 712 */
AnnaBridge 167:e84263d55307 713 #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
AnnaBridge 167:e84263d55307 714 #define CAN_FLAG_MASK 0x000000FFU
<> 144:ef7eb2e8f9f7 715 /**
<> 144:ef7eb2e8f9f7 716 * @}
<> 144:ef7eb2e8f9f7 717 */
<> 144:ef7eb2e8f9f7 718
<> 144:ef7eb2e8f9f7 719 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 720 /** @defgroup CAN_Private_Macros CAN Private Macros
<> 144:ef7eb2e8f9f7 721 * @{
<> 144:ef7eb2e8f9f7 722 */
<> 144:ef7eb2e8f9f7 723 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
<> 144:ef7eb2e8f9f7 724 ((MODE) == CAN_MODE_LOOPBACK)|| \
<> 144:ef7eb2e8f9f7 725 ((MODE) == CAN_MODE_SILENT) || \
<> 144:ef7eb2e8f9f7 726 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
<> 144:ef7eb2e8f9f7 727 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
<> 144:ef7eb2e8f9f7 728 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
<> 144:ef7eb2e8f9f7 729 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
<> 144:ef7eb2e8f9f7 730 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
<> 144:ef7eb2e8f9f7 731 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 1024U))
<> 144:ef7eb2e8f9f7 732 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27U)
<> 144:ef7eb2e8f9f7 733 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
<> 144:ef7eb2e8f9f7 734 ((MODE) == CAN_FILTERMODE_IDLIST))
<> 144:ef7eb2e8f9f7 735 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
<> 144:ef7eb2e8f9f7 736 ((SCALE) == CAN_FILTERSCALE_32BIT))
<> 144:ef7eb2e8f9f7 737 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
<> 144:ef7eb2e8f9f7 738 ((FIFO) == CAN_FILTER_FIFO1))
<> 144:ef7eb2e8f9f7 739 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28U)
<> 144:ef7eb2e8f9f7 740
AnnaBridge 167:e84263d55307 741 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
AnnaBridge 167:e84263d55307 742 #define IS_CAN_STDID(STDID) ((STDID) <= 0x7FFU)
AnnaBridge 167:e84263d55307 743 #define IS_CAN_EXTID(EXTID) ((EXTID) <= 0x1FFFFFFFU)
AnnaBridge 167:e84263d55307 744 #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
<> 144:ef7eb2e8f9f7 745
<> 144:ef7eb2e8f9f7 746 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
<> 144:ef7eb2e8f9f7 747 ((IDTYPE) == CAN_ID_EXT))
<> 144:ef7eb2e8f9f7 748 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
<> 144:ef7eb2e8f9f7 749 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
<> 144:ef7eb2e8f9f7 750
<> 144:ef7eb2e8f9f7 751 /**
<> 144:ef7eb2e8f9f7 752 * @}
<> 144:ef7eb2e8f9f7 753 */
<> 144:ef7eb2e8f9f7 754
<> 144:ef7eb2e8f9f7 755 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 756 /** @defgroup CAN_Private_Functions CAN Private Functions
<> 144:ef7eb2e8f9f7 757 * @{
<> 144:ef7eb2e8f9f7 758 */
<> 144:ef7eb2e8f9f7 759
<> 144:ef7eb2e8f9f7 760 /**
<> 144:ef7eb2e8f9f7 761 * @}
<> 144:ef7eb2e8f9f7 762 */
<> 144:ef7eb2e8f9f7 763
<> 144:ef7eb2e8f9f7 764
<> 144:ef7eb2e8f9f7 765 /**
<> 144:ef7eb2e8f9f7 766 * @}
<> 144:ef7eb2e8f9f7 767 */
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 /**
<> 144:ef7eb2e8f9f7 770 * @}
<> 144:ef7eb2e8f9f7 771 */
<> 144:ef7eb2e8f9f7 772
<> 144:ef7eb2e8f9f7 773 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 774 }
<> 144:ef7eb2e8f9f7 775 #endif
<> 144:ef7eb2e8f9f7 776
<> 144:ef7eb2e8f9f7 777 #endif /* __STM32F2xx_CAN_H */
<> 144:ef7eb2e8f9f7 778
<> 144:ef7eb2e8f9f7 779
<> 144:ef7eb2e8f9f7 780 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/