mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F1/device/system_stm32f1xx.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 170:19eb464bc2be
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Kojto | 170:19eb464bc2be | 1 | /** |
Kojto | 170:19eb464bc2be | 2 | ****************************************************************************** |
Kojto | 170:19eb464bc2be | 3 | * @file system_stm32f1xx.c |
Kojto | 170:19eb464bc2be | 4 | * @author MCD Application Team |
Kojto | 170:19eb464bc2be | 5 | * @version V4.2.0 |
Kojto | 170:19eb464bc2be | 6 | * @date 31-March-2017 |
Kojto | 170:19eb464bc2be | 7 | * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. |
Kojto | 170:19eb464bc2be | 8 | * |
Kojto | 170:19eb464bc2be | 9 | * 1. This file provides two functions and one global variable to be called from |
Kojto | 170:19eb464bc2be | 10 | * user application: |
Kojto | 170:19eb464bc2be | 11 | * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier |
Kojto | 170:19eb464bc2be | 12 | * factors, AHB/APBx prescalers and Flash settings). |
Kojto | 170:19eb464bc2be | 13 | * This function is called at startup just after reset and |
Kojto | 170:19eb464bc2be | 14 | * before branch to main program. This call is made inside |
Kojto | 170:19eb464bc2be | 15 | * the "startup_stm32f1xx_xx.s" file. |
Kojto | 170:19eb464bc2be | 16 | * |
Kojto | 170:19eb464bc2be | 17 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used |
Kojto | 170:19eb464bc2be | 18 | * by the user application to setup the SysTick |
Kojto | 170:19eb464bc2be | 19 | * timer or configure other parameters. |
Kojto | 170:19eb464bc2be | 20 | * |
Kojto | 170:19eb464bc2be | 21 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must |
Kojto | 170:19eb464bc2be | 22 | * be called whenever the core clock is changed |
Kojto | 170:19eb464bc2be | 23 | * during program execution. |
Kojto | 170:19eb464bc2be | 24 | * |
Kojto | 170:19eb464bc2be | 25 | * 2. After each device reset the HSI (8 MHz) is used as system clock source. |
Kojto | 170:19eb464bc2be | 26 | * Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to |
Kojto | 170:19eb464bc2be | 27 | * configure the system clock before to branch to main program. |
Kojto | 170:19eb464bc2be | 28 | * |
Kojto | 170:19eb464bc2be | 29 | * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on |
Kojto | 170:19eb464bc2be | 30 | * the product used), refer to "HSE_VALUE". |
Kojto | 170:19eb464bc2be | 31 | * When HSE is used as system clock source, directly or through PLL, and you |
Kojto | 170:19eb464bc2be | 32 | * are using different crystal you have to adapt the HSE value to your own |
Kojto | 170:19eb464bc2be | 33 | * configuration. |
Kojto | 170:19eb464bc2be | 34 | * |
Kojto | 170:19eb464bc2be | 35 | ****************************************************************************** |
Kojto | 170:19eb464bc2be | 36 | * @attention |
Kojto | 170:19eb464bc2be | 37 | * |
Kojto | 170:19eb464bc2be | 38 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
Kojto | 170:19eb464bc2be | 39 | * |
Kojto | 170:19eb464bc2be | 40 | * Redistribution and use in source and binary forms, with or without modification, |
Kojto | 170:19eb464bc2be | 41 | * are permitted provided that the following conditions are met: |
Kojto | 170:19eb464bc2be | 42 | * 1. Redistributions of source code must retain the above copyright notice, |
Kojto | 170:19eb464bc2be | 43 | * this list of conditions and the following disclaimer. |
Kojto | 170:19eb464bc2be | 44 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
Kojto | 170:19eb464bc2be | 45 | * this list of conditions and the following disclaimer in the documentation |
Kojto | 170:19eb464bc2be | 46 | * and/or other materials provided with the distribution. |
Kojto | 170:19eb464bc2be | 47 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
Kojto | 170:19eb464bc2be | 48 | * may be used to endorse or promote products derived from this software |
Kojto | 170:19eb464bc2be | 49 | * without specific prior written permission. |
Kojto | 170:19eb464bc2be | 50 | * |
Kojto | 170:19eb464bc2be | 51 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
Kojto | 170:19eb464bc2be | 52 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
Kojto | 170:19eb464bc2be | 53 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Kojto | 170:19eb464bc2be | 54 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
Kojto | 170:19eb464bc2be | 55 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
Kojto | 170:19eb464bc2be | 56 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
Kojto | 170:19eb464bc2be | 57 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
Kojto | 170:19eb464bc2be | 58 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
Kojto | 170:19eb464bc2be | 59 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
Kojto | 170:19eb464bc2be | 60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Kojto | 170:19eb464bc2be | 61 | * |
Kojto | 170:19eb464bc2be | 62 | ****************************************************************************** |
Kojto | 170:19eb464bc2be | 63 | */ |
Kojto | 170:19eb464bc2be | 64 | |
Kojto | 170:19eb464bc2be | 65 | /** @addtogroup CMSIS |
Kojto | 170:19eb464bc2be | 66 | * @{ |
Kojto | 170:19eb464bc2be | 67 | */ |
Kojto | 170:19eb464bc2be | 68 | |
Kojto | 170:19eb464bc2be | 69 | /** @addtogroup stm32f1xx_system |
Kojto | 170:19eb464bc2be | 70 | * @{ |
Kojto | 170:19eb464bc2be | 71 | */ |
Kojto | 170:19eb464bc2be | 72 | |
Kojto | 170:19eb464bc2be | 73 | /** @addtogroup STM32F1xx_System_Private_Includes |
Kojto | 170:19eb464bc2be | 74 | * @{ |
Kojto | 170:19eb464bc2be | 75 | */ |
Kojto | 170:19eb464bc2be | 76 | |
Kojto | 170:19eb464bc2be | 77 | #include "stm32f1xx.h" |
Kojto | 170:19eb464bc2be | 78 | |
Kojto | 170:19eb464bc2be | 79 | |
Kojto | 170:19eb464bc2be | 80 | /** |
Kojto | 170:19eb464bc2be | 81 | * @} |
Kojto | 170:19eb464bc2be | 82 | */ |
Kojto | 170:19eb464bc2be | 83 | |
Kojto | 170:19eb464bc2be | 84 | /** @addtogroup STM32F1xx_System_Private_TypesDefinitions |
Kojto | 170:19eb464bc2be | 85 | * @{ |
Kojto | 170:19eb464bc2be | 86 | */ |
Kojto | 170:19eb464bc2be | 87 | |
Kojto | 170:19eb464bc2be | 88 | /** |
Kojto | 170:19eb464bc2be | 89 | * @} |
Kojto | 170:19eb464bc2be | 90 | */ |
Kojto | 170:19eb464bc2be | 91 | |
Kojto | 170:19eb464bc2be | 92 | /** @addtogroup STM32F1xx_System_Private_Defines |
Kojto | 170:19eb464bc2be | 93 | * @{ |
Kojto | 170:19eb464bc2be | 94 | */ |
Kojto | 170:19eb464bc2be | 95 | |
Kojto | 170:19eb464bc2be | 96 | #if !defined (HSE_VALUE) |
Kojto | 170:19eb464bc2be | 97 | #define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz. |
Kojto | 170:19eb464bc2be | 98 | This value can be provided and adapted by the user application. */ |
Kojto | 170:19eb464bc2be | 99 | #endif /* HSE_VALUE */ |
Kojto | 170:19eb464bc2be | 100 | |
Kojto | 170:19eb464bc2be | 101 | #if !defined (HSI_VALUE) |
Kojto | 170:19eb464bc2be | 102 | #define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz. |
Kojto | 170:19eb464bc2be | 103 | This value can be provided and adapted by the user application. */ |
Kojto | 170:19eb464bc2be | 104 | #endif /* HSI_VALUE */ |
Kojto | 170:19eb464bc2be | 105 | |
Kojto | 170:19eb464bc2be | 106 | /*!< Uncomment the following line if you need to use external SRAM */ |
Kojto | 170:19eb464bc2be | 107 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) |
Kojto | 170:19eb464bc2be | 108 | /* #define DATA_IN_ExtSRAM */ |
Kojto | 170:19eb464bc2be | 109 | #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ |
Kojto | 170:19eb464bc2be | 110 | |
Kojto | 170:19eb464bc2be | 111 | /*!< Uncomment the following line if you need to relocate your vector Table in |
Kojto | 170:19eb464bc2be | 112 | Internal SRAM. */ |
Kojto | 170:19eb464bc2be | 113 | /* #define VECT_TAB_SRAM */ |
Kojto | 170:19eb464bc2be | 114 | #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. |
Kojto | 170:19eb464bc2be | 115 | This value must be a multiple of 0x200. */ |
Kojto | 170:19eb464bc2be | 116 | |
Kojto | 170:19eb464bc2be | 117 | |
Kojto | 170:19eb464bc2be | 118 | /** |
Kojto | 170:19eb464bc2be | 119 | * @} |
Kojto | 170:19eb464bc2be | 120 | */ |
Kojto | 170:19eb464bc2be | 121 | |
Kojto | 170:19eb464bc2be | 122 | /** @addtogroup STM32F1xx_System_Private_Macros |
Kojto | 170:19eb464bc2be | 123 | * @{ |
Kojto | 170:19eb464bc2be | 124 | */ |
Kojto | 170:19eb464bc2be | 125 | |
Kojto | 170:19eb464bc2be | 126 | /** |
Kojto | 170:19eb464bc2be | 127 | * @} |
Kojto | 170:19eb464bc2be | 128 | */ |
Kojto | 170:19eb464bc2be | 129 | |
Kojto | 170:19eb464bc2be | 130 | /** @addtogroup STM32F1xx_System_Private_Variables |
Kojto | 170:19eb464bc2be | 131 | * @{ |
Kojto | 170:19eb464bc2be | 132 | */ |
Kojto | 170:19eb464bc2be | 133 | |
Kojto | 170:19eb464bc2be | 134 | /******************************************************************************* |
Kojto | 170:19eb464bc2be | 135 | * Clock Definitions |
Kojto | 170:19eb464bc2be | 136 | *******************************************************************************/ |
Kojto | 170:19eb464bc2be | 137 | #if defined(STM32F100xB) ||defined(STM32F100xE) |
Kojto | 170:19eb464bc2be | 138 | uint32_t SystemCoreClock = 24000000U; /*!< System Clock Frequency (Core Clock) */ |
Kojto | 170:19eb464bc2be | 139 | #else /*!< HSI Selected as System Clock source */ |
Kojto | 170:19eb464bc2be | 140 | uint32_t SystemCoreClock = 72000000U; /*!< System Clock Frequency (Core Clock) */ |
Kojto | 170:19eb464bc2be | 141 | #endif |
Kojto | 170:19eb464bc2be | 142 | |
Kojto | 170:19eb464bc2be | 143 | const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; |
Kojto | 170:19eb464bc2be | 144 | const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4}; |
Kojto | 170:19eb464bc2be | 145 | |
Kojto | 170:19eb464bc2be | 146 | /** |
Kojto | 170:19eb464bc2be | 147 | * @} |
Kojto | 170:19eb464bc2be | 148 | */ |
Kojto | 170:19eb464bc2be | 149 | |
Kojto | 170:19eb464bc2be | 150 | /** @addtogroup STM32F1xx_System_Private_FunctionPrototypes |
Kojto | 170:19eb464bc2be | 151 | * @{ |
Kojto | 170:19eb464bc2be | 152 | */ |
Kojto | 170:19eb464bc2be | 153 | |
Kojto | 170:19eb464bc2be | 154 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) |
Kojto | 170:19eb464bc2be | 155 | #ifdef DATA_IN_ExtSRAM |
Kojto | 170:19eb464bc2be | 156 | static void SystemInit_ExtMemCtl(void); |
Kojto | 170:19eb464bc2be | 157 | #endif /* DATA_IN_ExtSRAM */ |
Kojto | 170:19eb464bc2be | 158 | #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ |
Kojto | 170:19eb464bc2be | 159 | |
Kojto | 170:19eb464bc2be | 160 | /** |
Kojto | 170:19eb464bc2be | 161 | * @} |
Kojto | 170:19eb464bc2be | 162 | */ |
Kojto | 170:19eb464bc2be | 163 | |
Kojto | 170:19eb464bc2be | 164 | /** @addtogroup STM32F1xx_System_Private_Functions |
Kojto | 170:19eb464bc2be | 165 | * @{ |
Kojto | 170:19eb464bc2be | 166 | */ |
Kojto | 170:19eb464bc2be | 167 | |
Kojto | 170:19eb464bc2be | 168 | /*+ MBED */ |
Kojto | 170:19eb464bc2be | 169 | #if 0 |
Kojto | 170:19eb464bc2be | 170 | /*- MBED */ |
Kojto | 170:19eb464bc2be | 171 | |
Kojto | 170:19eb464bc2be | 172 | /** |
Kojto | 170:19eb464bc2be | 173 | * @brief Setup the microcontroller system |
Kojto | 170:19eb464bc2be | 174 | * Initialize the Embedded Flash Interface, the PLL and update the |
Kojto | 170:19eb464bc2be | 175 | * SystemCoreClock variable. |
Kojto | 170:19eb464bc2be | 176 | * @note This function should be used only after reset. |
Kojto | 170:19eb464bc2be | 177 | * @param None |
Kojto | 170:19eb464bc2be | 178 | * @retval None |
Kojto | 170:19eb464bc2be | 179 | */ |
Kojto | 170:19eb464bc2be | 180 | void SystemInit (void) |
Kojto | 170:19eb464bc2be | 181 | { |
Kojto | 170:19eb464bc2be | 182 | /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ |
Kojto | 170:19eb464bc2be | 183 | /* Set HSION bit */ |
Kojto | 170:19eb464bc2be | 184 | RCC->CR |= 0x00000001U; |
Kojto | 170:19eb464bc2be | 185 | |
Kojto | 170:19eb464bc2be | 186 | /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ |
Kojto | 170:19eb464bc2be | 187 | #if !defined(STM32F105xC) && !defined(STM32F107xC) |
Kojto | 170:19eb464bc2be | 188 | RCC->CFGR &= 0xF8FF0000U; |
Kojto | 170:19eb464bc2be | 189 | #else |
Kojto | 170:19eb464bc2be | 190 | RCC->CFGR &= 0xF0FF0000U; |
Kojto | 170:19eb464bc2be | 191 | #endif /* STM32F105xC */ |
Kojto | 170:19eb464bc2be | 192 | |
Kojto | 170:19eb464bc2be | 193 | /* Reset HSEON, CSSON and PLLON bits */ |
Kojto | 170:19eb464bc2be | 194 | RCC->CR &= 0xFEF6FFFFU; |
Kojto | 170:19eb464bc2be | 195 | |
Kojto | 170:19eb464bc2be | 196 | /* Reset HSEBYP bit */ |
Kojto | 170:19eb464bc2be | 197 | RCC->CR &= 0xFFFBFFFFU; |
Kojto | 170:19eb464bc2be | 198 | |
Kojto | 170:19eb464bc2be | 199 | /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ |
Kojto | 170:19eb464bc2be | 200 | RCC->CFGR &= 0xFF80FFFFU; |
Kojto | 170:19eb464bc2be | 201 | |
Kojto | 170:19eb464bc2be | 202 | #if defined(STM32F105xC) || defined(STM32F107xC) |
Kojto | 170:19eb464bc2be | 203 | /* Reset PLL2ON and PLL3ON bits */ |
Kojto | 170:19eb464bc2be | 204 | RCC->CR &= 0xEBFFFFFFU; |
Kojto | 170:19eb464bc2be | 205 | |
Kojto | 170:19eb464bc2be | 206 | /* Disable all interrupts and clear pending bits */ |
Kojto | 170:19eb464bc2be | 207 | RCC->CIR = 0x00FF0000U; |
Kojto | 170:19eb464bc2be | 208 | |
Kojto | 170:19eb464bc2be | 209 | /* Reset CFGR2 register */ |
Kojto | 170:19eb464bc2be | 210 | RCC->CFGR2 = 0x00000000U; |
Kojto | 170:19eb464bc2be | 211 | #elif defined(STM32F100xB) || defined(STM32F100xE) |
Kojto | 170:19eb464bc2be | 212 | /* Disable all interrupts and clear pending bits */ |
Kojto | 170:19eb464bc2be | 213 | RCC->CIR = 0x009F0000U; |
Kojto | 170:19eb464bc2be | 214 | |
Kojto | 170:19eb464bc2be | 215 | /* Reset CFGR2 register */ |
Kojto | 170:19eb464bc2be | 216 | RCC->CFGR2 = 0x00000000U; |
Kojto | 170:19eb464bc2be | 217 | #else |
Kojto | 170:19eb464bc2be | 218 | /* Disable all interrupts and clear pending bits */ |
Kojto | 170:19eb464bc2be | 219 | RCC->CIR = 0x009F0000U; |
Kojto | 170:19eb464bc2be | 220 | #endif /* STM32F105xC */ |
Kojto | 170:19eb464bc2be | 221 | |
Kojto | 170:19eb464bc2be | 222 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) |
Kojto | 170:19eb464bc2be | 223 | #ifdef DATA_IN_ExtSRAM |
Kojto | 170:19eb464bc2be | 224 | SystemInit_ExtMemCtl(); |
Kojto | 170:19eb464bc2be | 225 | #endif /* DATA_IN_ExtSRAM */ |
Kojto | 170:19eb464bc2be | 226 | #endif |
Kojto | 170:19eb464bc2be | 227 | |
Kojto | 170:19eb464bc2be | 228 | #ifdef VECT_TAB_SRAM |
Kojto | 170:19eb464bc2be | 229 | SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ |
Kojto | 170:19eb464bc2be | 230 | #else |
Kojto | 170:19eb464bc2be | 231 | SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ |
Kojto | 170:19eb464bc2be | 232 | #endif |
Kojto | 170:19eb464bc2be | 233 | |
Kojto | 170:19eb464bc2be | 234 | } |
Kojto | 170:19eb464bc2be | 235 | |
Kojto | 170:19eb464bc2be | 236 | /*+ MBED */ |
Kojto | 170:19eb464bc2be | 237 | #endif |
Kojto | 170:19eb464bc2be | 238 | /*- MBED */ |
Kojto | 170:19eb464bc2be | 239 | |
Kojto | 170:19eb464bc2be | 240 | /** |
Kojto | 170:19eb464bc2be | 241 | * @brief Update SystemCoreClock variable according to Clock Register Values. |
Kojto | 170:19eb464bc2be | 242 | * The SystemCoreClock variable contains the core clock (HCLK), it can |
Kojto | 170:19eb464bc2be | 243 | * be used by the user application to setup the SysTick timer or configure |
Kojto | 170:19eb464bc2be | 244 | * other parameters. |
Kojto | 170:19eb464bc2be | 245 | * |
Kojto | 170:19eb464bc2be | 246 | * @note Each time the core clock (HCLK) changes, this function must be called |
Kojto | 170:19eb464bc2be | 247 | * to update SystemCoreClock variable value. Otherwise, any configuration |
Kojto | 170:19eb464bc2be | 248 | * based on this variable will be incorrect. |
Kojto | 170:19eb464bc2be | 249 | * |
Kojto | 170:19eb464bc2be | 250 | * @note - The system frequency computed by this function is not the real |
Kojto | 170:19eb464bc2be | 251 | * frequency in the chip. It is calculated based on the predefined |
Kojto | 170:19eb464bc2be | 252 | * constant and the selected clock source: |
Kojto | 170:19eb464bc2be | 253 | * |
Kojto | 170:19eb464bc2be | 254 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) |
Kojto | 170:19eb464bc2be | 255 | * |
Kojto | 170:19eb464bc2be | 256 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) |
Kojto | 170:19eb464bc2be | 257 | * |
Kojto | 170:19eb464bc2be | 258 | * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) |
Kojto | 170:19eb464bc2be | 259 | * or HSI_VALUE(*) multiplied by the PLL factors. |
Kojto | 170:19eb464bc2be | 260 | * |
Kojto | 170:19eb464bc2be | 261 | * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value |
Kojto | 170:19eb464bc2be | 262 | * 8 MHz) but the real value may vary depending on the variations |
Kojto | 170:19eb464bc2be | 263 | * in voltage and temperature. |
Kojto | 170:19eb464bc2be | 264 | * |
Kojto | 170:19eb464bc2be | 265 | * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value |
Kojto | 170:19eb464bc2be | 266 | * 8 MHz or 25 MHz, depending on the product used), user has to ensure |
Kojto | 170:19eb464bc2be | 267 | * that HSE_VALUE is same as the real frequency of the crystal used. |
Kojto | 170:19eb464bc2be | 268 | * Otherwise, this function may have wrong result. |
Kojto | 170:19eb464bc2be | 269 | * |
Kojto | 170:19eb464bc2be | 270 | * - The result of this function could be not correct when using fractional |
Kojto | 170:19eb464bc2be | 271 | * value for HSE crystal. |
Kojto | 170:19eb464bc2be | 272 | * @param None |
Kojto | 170:19eb464bc2be | 273 | * @retval None |
Kojto | 170:19eb464bc2be | 274 | */ |
Kojto | 170:19eb464bc2be | 275 | void SystemCoreClockUpdate (void) |
Kojto | 170:19eb464bc2be | 276 | { |
Kojto | 170:19eb464bc2be | 277 | uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U; |
Kojto | 170:19eb464bc2be | 278 | |
Kojto | 170:19eb464bc2be | 279 | #if defined(STM32F105xC) || defined(STM32F107xC) |
Kojto | 170:19eb464bc2be | 280 | uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U; |
Kojto | 170:19eb464bc2be | 281 | #endif /* STM32F105xC */ |
Kojto | 170:19eb464bc2be | 282 | |
Kojto | 170:19eb464bc2be | 283 | #if defined(STM32F100xB) || defined(STM32F100xE) |
Kojto | 170:19eb464bc2be | 284 | uint32_t prediv1factor = 0U; |
Kojto | 170:19eb464bc2be | 285 | #endif /* STM32F100xB or STM32F100xE */ |
Kojto | 170:19eb464bc2be | 286 | |
Kojto | 170:19eb464bc2be | 287 | /* Get SYSCLK source -------------------------------------------------------*/ |
Kojto | 170:19eb464bc2be | 288 | tmp = RCC->CFGR & RCC_CFGR_SWS; |
Kojto | 170:19eb464bc2be | 289 | |
Kojto | 170:19eb464bc2be | 290 | switch (tmp) |
Kojto | 170:19eb464bc2be | 291 | { |
Kojto | 170:19eb464bc2be | 292 | case 0x00U: /* HSI used as system clock */ |
Kojto | 170:19eb464bc2be | 293 | SystemCoreClock = HSI_VALUE; |
Kojto | 170:19eb464bc2be | 294 | break; |
Kojto | 170:19eb464bc2be | 295 | case 0x04U: /* HSE used as system clock */ |
Kojto | 170:19eb464bc2be | 296 | SystemCoreClock = HSE_VALUE; |
Kojto | 170:19eb464bc2be | 297 | break; |
Kojto | 170:19eb464bc2be | 298 | case 0x08U: /* PLL used as system clock */ |
Kojto | 170:19eb464bc2be | 299 | |
Kojto | 170:19eb464bc2be | 300 | /* Get PLL clock source and multiplication factor ----------------------*/ |
Kojto | 170:19eb464bc2be | 301 | pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; |
Kojto | 170:19eb464bc2be | 302 | pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; |
Kojto | 170:19eb464bc2be | 303 | |
Kojto | 170:19eb464bc2be | 304 | #if !defined(STM32F105xC) && !defined(STM32F107xC) |
Kojto | 170:19eb464bc2be | 305 | pllmull = ( pllmull >> 18U) + 2U; |
Kojto | 170:19eb464bc2be | 306 | |
Kojto | 170:19eb464bc2be | 307 | if (pllsource == 0x00U) |
Kojto | 170:19eb464bc2be | 308 | { |
Kojto | 170:19eb464bc2be | 309 | /* HSI oscillator clock divided by 2 selected as PLL clock entry */ |
Kojto | 170:19eb464bc2be | 310 | SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; |
Kojto | 170:19eb464bc2be | 311 | } |
Kojto | 170:19eb464bc2be | 312 | else |
Kojto | 170:19eb464bc2be | 313 | { |
Kojto | 170:19eb464bc2be | 314 | #if defined(STM32F100xB) || defined(STM32F100xE) |
Kojto | 170:19eb464bc2be | 315 | prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; |
Kojto | 170:19eb464bc2be | 316 | /* HSE oscillator clock selected as PREDIV1 clock entry */ |
Kojto | 170:19eb464bc2be | 317 | SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; |
Kojto | 170:19eb464bc2be | 318 | #else |
Kojto | 170:19eb464bc2be | 319 | /* HSE selected as PLL clock entry */ |
Kojto | 170:19eb464bc2be | 320 | if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) |
Kojto | 170:19eb464bc2be | 321 | {/* HSE oscillator clock divided by 2 */ |
Kojto | 170:19eb464bc2be | 322 | SystemCoreClock = (HSE_VALUE >> 1U) * pllmull; |
Kojto | 170:19eb464bc2be | 323 | } |
Kojto | 170:19eb464bc2be | 324 | else |
Kojto | 170:19eb464bc2be | 325 | { |
Kojto | 170:19eb464bc2be | 326 | SystemCoreClock = HSE_VALUE * pllmull; |
Kojto | 170:19eb464bc2be | 327 | } |
Kojto | 170:19eb464bc2be | 328 | #endif |
Kojto | 170:19eb464bc2be | 329 | } |
Kojto | 170:19eb464bc2be | 330 | #else |
Kojto | 170:19eb464bc2be | 331 | pllmull = pllmull >> 18U; |
Kojto | 170:19eb464bc2be | 332 | |
Kojto | 170:19eb464bc2be | 333 | if (pllmull != 0x0DU) |
Kojto | 170:19eb464bc2be | 334 | { |
Kojto | 170:19eb464bc2be | 335 | pllmull += 2U; |
Kojto | 170:19eb464bc2be | 336 | } |
Kojto | 170:19eb464bc2be | 337 | else |
Kojto | 170:19eb464bc2be | 338 | { /* PLL multiplication factor = PLL input clock * 6.5 */ |
Kojto | 170:19eb464bc2be | 339 | pllmull = 13U / 2U; |
Kojto | 170:19eb464bc2be | 340 | } |
Kojto | 170:19eb464bc2be | 341 | |
Kojto | 170:19eb464bc2be | 342 | if (pllsource == 0x00U) |
Kojto | 170:19eb464bc2be | 343 | { |
Kojto | 170:19eb464bc2be | 344 | /* HSI oscillator clock divided by 2 selected as PLL clock entry */ |
Kojto | 170:19eb464bc2be | 345 | SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; |
Kojto | 170:19eb464bc2be | 346 | } |
Kojto | 170:19eb464bc2be | 347 | else |
Kojto | 170:19eb464bc2be | 348 | {/* PREDIV1 selected as PLL clock entry */ |
Kojto | 170:19eb464bc2be | 349 | |
Kojto | 170:19eb464bc2be | 350 | /* Get PREDIV1 clock source and division factor */ |
Kojto | 170:19eb464bc2be | 351 | prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; |
Kojto | 170:19eb464bc2be | 352 | prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; |
Kojto | 170:19eb464bc2be | 353 | |
Kojto | 170:19eb464bc2be | 354 | if (prediv1source == 0U) |
Kojto | 170:19eb464bc2be | 355 | { |
Kojto | 170:19eb464bc2be | 356 | /* HSE oscillator clock selected as PREDIV1 clock entry */ |
Kojto | 170:19eb464bc2be | 357 | SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; |
Kojto | 170:19eb464bc2be | 358 | } |
Kojto | 170:19eb464bc2be | 359 | else |
Kojto | 170:19eb464bc2be | 360 | {/* PLL2 clock selected as PREDIV1 clock entry */ |
Kojto | 170:19eb464bc2be | 361 | |
Kojto | 170:19eb464bc2be | 362 | /* Get PREDIV2 division factor and PLL2 multiplication factor */ |
Kojto | 170:19eb464bc2be | 363 | prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U; |
Kojto | 170:19eb464bc2be | 364 | pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U; |
Kojto | 170:19eb464bc2be | 365 | SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; |
Kojto | 170:19eb464bc2be | 366 | } |
Kojto | 170:19eb464bc2be | 367 | } |
Kojto | 170:19eb464bc2be | 368 | #endif /* STM32F105xC */ |
Kojto | 170:19eb464bc2be | 369 | break; |
Kojto | 170:19eb464bc2be | 370 | |
Kojto | 170:19eb464bc2be | 371 | default: |
Kojto | 170:19eb464bc2be | 372 | SystemCoreClock = HSI_VALUE; |
Kojto | 170:19eb464bc2be | 373 | break; |
Kojto | 170:19eb464bc2be | 374 | } |
Kojto | 170:19eb464bc2be | 375 | |
Kojto | 170:19eb464bc2be | 376 | /* Compute HCLK clock frequency ----------------*/ |
Kojto | 170:19eb464bc2be | 377 | /* Get HCLK prescaler */ |
Kojto | 170:19eb464bc2be | 378 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; |
Kojto | 170:19eb464bc2be | 379 | /* HCLK clock frequency */ |
Kojto | 170:19eb464bc2be | 380 | SystemCoreClock >>= tmp; |
Kojto | 170:19eb464bc2be | 381 | } |
Kojto | 170:19eb464bc2be | 382 | |
Kojto | 170:19eb464bc2be | 383 | #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) |
Kojto | 170:19eb464bc2be | 384 | /** |
Kojto | 170:19eb464bc2be | 385 | * @brief Setup the external memory controller. Called in startup_stm32f1xx.s |
Kojto | 170:19eb464bc2be | 386 | * before jump to __main |
Kojto | 170:19eb464bc2be | 387 | * @param None |
Kojto | 170:19eb464bc2be | 388 | * @retval None |
Kojto | 170:19eb464bc2be | 389 | */ |
Kojto | 170:19eb464bc2be | 390 | #ifdef DATA_IN_ExtSRAM |
Kojto | 170:19eb464bc2be | 391 | /** |
Kojto | 170:19eb464bc2be | 392 | * @brief Setup the external memory controller. |
Kojto | 170:19eb464bc2be | 393 | * Called in startup_stm32f1xx_xx.s/.c before jump to main. |
Kojto | 170:19eb464bc2be | 394 | * This function configures the external SRAM mounted on STM3210E-EVAL |
Kojto | 170:19eb464bc2be | 395 | * board (STM32 High density devices). This SRAM will be used as program |
Kojto | 170:19eb464bc2be | 396 | * data memory (including heap and stack). |
Kojto | 170:19eb464bc2be | 397 | * @param None |
Kojto | 170:19eb464bc2be | 398 | * @retval None |
Kojto | 170:19eb464bc2be | 399 | */ |
Kojto | 170:19eb464bc2be | 400 | void SystemInit_ExtMemCtl(void) |
Kojto | 170:19eb464bc2be | 401 | { |
Kojto | 170:19eb464bc2be | 402 | __IO uint32_t tmpreg; |
Kojto | 170:19eb464bc2be | 403 | /*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is |
Kojto | 170:19eb464bc2be | 404 | required, then adjust the Register Addresses */ |
Kojto | 170:19eb464bc2be | 405 | |
Kojto | 170:19eb464bc2be | 406 | /* Enable FSMC clock */ |
Kojto | 170:19eb464bc2be | 407 | RCC->AHBENR = 0x00000114U; |
Kojto | 170:19eb464bc2be | 408 | |
Kojto | 170:19eb464bc2be | 409 | /* Delay after an RCC peripheral clock enabling */ |
Kojto | 170:19eb464bc2be | 410 | tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN); |
Kojto | 170:19eb464bc2be | 411 | |
Kojto | 170:19eb464bc2be | 412 | /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ |
Kojto | 170:19eb464bc2be | 413 | RCC->APB2ENR = 0x000001E0U; |
Kojto | 170:19eb464bc2be | 414 | |
Kojto | 170:19eb464bc2be | 415 | /* Delay after an RCC peripheral clock enabling */ |
Kojto | 170:19eb464bc2be | 416 | tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN); |
Kojto | 170:19eb464bc2be | 417 | |
Kojto | 170:19eb464bc2be | 418 | (void)(tmpreg); |
Kojto | 170:19eb464bc2be | 419 | |
Kojto | 170:19eb464bc2be | 420 | /* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ |
Kojto | 170:19eb464bc2be | 421 | /*---------------- SRAM Address lines configuration -------------------------*/ |
Kojto | 170:19eb464bc2be | 422 | /*---------------- NOE and NWE configuration --------------------------------*/ |
Kojto | 170:19eb464bc2be | 423 | /*---------------- NE3 configuration ----------------------------------------*/ |
Kojto | 170:19eb464bc2be | 424 | /*---------------- NBL0, NBL1 configuration ---------------------------------*/ |
Kojto | 170:19eb464bc2be | 425 | |
Kojto | 170:19eb464bc2be | 426 | GPIOD->CRL = 0x44BB44BBU; |
Kojto | 170:19eb464bc2be | 427 | GPIOD->CRH = 0xBBBBBBBBU; |
Kojto | 170:19eb464bc2be | 428 | |
Kojto | 170:19eb464bc2be | 429 | GPIOE->CRL = 0xB44444BBU; |
Kojto | 170:19eb464bc2be | 430 | GPIOE->CRH = 0xBBBBBBBBU; |
Kojto | 170:19eb464bc2be | 431 | |
Kojto | 170:19eb464bc2be | 432 | GPIOF->CRL = 0x44BBBBBBU; |
Kojto | 170:19eb464bc2be | 433 | GPIOF->CRH = 0xBBBB4444U; |
Kojto | 170:19eb464bc2be | 434 | |
Kojto | 170:19eb464bc2be | 435 | GPIOG->CRL = 0x44BBBBBBU; |
Kojto | 170:19eb464bc2be | 436 | GPIOG->CRH = 0x444B4B44U; |
Kojto | 170:19eb464bc2be | 437 | |
Kojto | 170:19eb464bc2be | 438 | /*---------------- FSMC Configuration ---------------------------------------*/ |
Kojto | 170:19eb464bc2be | 439 | /*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ |
Kojto | 170:19eb464bc2be | 440 | |
Kojto | 170:19eb464bc2be | 441 | FSMC_Bank1->BTCR[4U] = 0x00001091U; |
Kojto | 170:19eb464bc2be | 442 | FSMC_Bank1->BTCR[5U] = 0x00110212U; |
Kojto | 170:19eb464bc2be | 443 | } |
Kojto | 170:19eb464bc2be | 444 | #endif /* DATA_IN_ExtSRAM */ |
Kojto | 170:19eb464bc2be | 445 | #endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ |
Kojto | 170:19eb464bc2be | 446 | |
Kojto | 170:19eb464bc2be | 447 | /** |
Kojto | 170:19eb464bc2be | 448 | * @} |
Kojto | 170:19eb464bc2be | 449 | */ |
Kojto | 170:19eb464bc2be | 450 | |
Kojto | 170:19eb464bc2be | 451 | /** |
Kojto | 170:19eb464bc2be | 452 | * @} |
Kojto | 170:19eb464bc2be | 453 | */ |
Kojto | 170:19eb464bc2be | 454 | |
Kojto | 170:19eb464bc2be | 455 | /** |
Kojto | 170:19eb464bc2be | 456 | * @} |
Kojto | 170:19eb464bc2be | 457 | */ |
Kojto | 170:19eb464bc2be | 458 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |