mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_ll_usb.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f1xx_ll_usb.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Header file of USB Low Layer HAL module.
<> 144:ef7eb2e8f9f7 6 ******************************************************************************
<> 144:ef7eb2e8f9f7 7 * @attention
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 12 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 14 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 17 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 19 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 20 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 ******************************************************************************
<> 144:ef7eb2e8f9f7 34 */
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 37 #ifndef __STM32F1xx_LL_USB_H
<> 144:ef7eb2e8f9f7 38 #define __STM32F1xx_LL_USB_H
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 41 extern "C" {
<> 144:ef7eb2e8f9f7 42 #endif
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #if defined(STM32F102x6) || defined(STM32F102xB) || \
<> 144:ef7eb2e8f9f7 45 defined(STM32F103x6) || defined(STM32F103xB) || \
<> 144:ef7eb2e8f9f7 46 defined(STM32F103xE) || defined(STM32F103xG) || \
<> 144:ef7eb2e8f9f7 47 defined(STM32F105xC) || defined(STM32F107xC)
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 50 #include "stm32f1xx_hal_def.h"
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 /** @addtogroup STM32F1xx_HAL_Driver
<> 144:ef7eb2e8f9f7 53 * @{
<> 144:ef7eb2e8f9f7 54 */
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 /** @addtogroup USB_LL
<> 144:ef7eb2e8f9f7 57 * @{
<> 144:ef7eb2e8f9f7 58 */
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 61 /** @defgroup USB_LL_Exported_Types USB Low Layer Exported Types
<> 144:ef7eb2e8f9f7 62 * @{
<> 144:ef7eb2e8f9f7 63 */
<> 144:ef7eb2e8f9f7 64 /**
<> 144:ef7eb2e8f9f7 65 * @brief USB Mode definition
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67 typedef enum
<> 144:ef7eb2e8f9f7 68 {
<> 144:ef7eb2e8f9f7 69 USB_DEVICE_MODE = 0,
<> 144:ef7eb2e8f9f7 70 USB_HOST_MODE = 1,
<> 144:ef7eb2e8f9f7 71 USB_DRD_MODE = 2
<> 144:ef7eb2e8f9f7 72 }USB_ModeTypeDef;
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 #if defined (USB_OTG_FS)
<> 144:ef7eb2e8f9f7 75 /**
<> 144:ef7eb2e8f9f7 76 * @brief URB States definition
<> 144:ef7eb2e8f9f7 77 */
<> 144:ef7eb2e8f9f7 78 typedef enum {
<> 144:ef7eb2e8f9f7 79 URB_IDLE = 0,
<> 144:ef7eb2e8f9f7 80 URB_DONE,
<> 144:ef7eb2e8f9f7 81 URB_NOTREADY,
<> 144:ef7eb2e8f9f7 82 URB_NYET,
<> 144:ef7eb2e8f9f7 83 URB_ERROR,
<> 144:ef7eb2e8f9f7 84 URB_STALL
<> 144:ef7eb2e8f9f7 85 }USB_OTG_URBStateTypeDef;
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 /**
<> 144:ef7eb2e8f9f7 88 * @brief Host channel States definition
<> 144:ef7eb2e8f9f7 89 */
<> 144:ef7eb2e8f9f7 90 typedef enum {
<> 144:ef7eb2e8f9f7 91 HC_IDLE = 0,
<> 144:ef7eb2e8f9f7 92 HC_XFRC,
<> 144:ef7eb2e8f9f7 93 HC_HALTED,
<> 144:ef7eb2e8f9f7 94 HC_NAK,
<> 144:ef7eb2e8f9f7 95 HC_NYET,
<> 144:ef7eb2e8f9f7 96 HC_STALL,
<> 144:ef7eb2e8f9f7 97 HC_XACTERR,
<> 144:ef7eb2e8f9f7 98 HC_BBLERR,
<> 144:ef7eb2e8f9f7 99 HC_DATATGLERR
<> 144:ef7eb2e8f9f7 100 }USB_OTG_HCStateTypeDef;
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 /**
<> 144:ef7eb2e8f9f7 103 * @brief USB OTG Initialization Structure definition
<> 144:ef7eb2e8f9f7 104 */
<> 144:ef7eb2e8f9f7 105 typedef struct
<> 144:ef7eb2e8f9f7 106 {
<> 144:ef7eb2e8f9f7 107 uint32_t dev_endpoints; /*!< Device Endpoints number.
<> 144:ef7eb2e8f9f7 108 This parameter depends on the used USB core.
<> 144:ef7eb2e8f9f7 109 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 uint32_t Host_channels; /*!< Host Channels number.
<> 144:ef7eb2e8f9f7 112 This parameter Depends on the used USB core.
<> 144:ef7eb2e8f9f7 113 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 uint32_t speed; /*!< USB Core speed.
<> 144:ef7eb2e8f9f7 116 This parameter can be any value of @ref USB_Core_Speed_ */
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
<> 144:ef7eb2e8f9f7 119 This parameter can be any value of @ref USB_EP0_MPS_ */
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
<> 144:ef7eb2e8f9f7 128 }USB_OTG_CfgTypeDef;
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 typedef struct
<> 144:ef7eb2e8f9f7 131 {
<> 144:ef7eb2e8f9f7 132 uint8_t num; /*!< Endpoint number
<> 144:ef7eb2e8f9f7 133 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 uint8_t is_in; /*!< Endpoint direction
<> 144:ef7eb2e8f9f7 136 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 uint8_t is_stall; /*!< Endpoint stall condition
<> 144:ef7eb2e8f9f7 139 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 uint8_t type; /*!< Endpoint type
<> 144:ef7eb2e8f9f7 142 This parameter can be any value of @ref USB_EP_Type_ */
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 uint8_t data_pid_start; /*!< Initial data PID
<> 144:ef7eb2e8f9f7 145 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 uint8_t even_odd_frame; /*!< IFrame parity
<> 144:ef7eb2e8f9f7 148 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 uint16_t tx_fifo_num; /*!< Transmission FIFO number
<> 144:ef7eb2e8f9f7 151 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 uint32_t maxpacket; /*!< Endpoint Max packet size
<> 144:ef7eb2e8f9f7 154 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 uint32_t xfer_len; /*!< Current transfer length */
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
<> 144:ef7eb2e8f9f7 163 }USB_OTG_EPTypeDef;
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 typedef struct
<> 144:ef7eb2e8f9f7 166 {
<> 144:ef7eb2e8f9f7 167 uint8_t dev_addr ; /*!< USB device address.
<> 144:ef7eb2e8f9f7 168 This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 uint8_t ch_num; /*!< Host channel number.
<> 144:ef7eb2e8f9f7 171 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 uint8_t ep_num; /*!< Endpoint number.
<> 144:ef7eb2e8f9f7 174 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 175
<> 144:ef7eb2e8f9f7 176 uint8_t ep_is_in; /*!< Endpoint direction
<> 144:ef7eb2e8f9f7 177 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 uint8_t speed; /*!< USB Host speed.
<> 144:ef7eb2e8f9f7 180 This parameter can be any value of @ref USB_Core_Speed_ */
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 uint8_t ep_type; /*!< Endpoint Type.
<> 144:ef7eb2e8f9f7 187 This parameter can be any value of @ref USB_EP_Type_ */
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 uint16_t max_packet; /*!< Endpoint Max packet size.
<> 144:ef7eb2e8f9f7 190 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 uint8_t data_pid; /*!< Initial data PID.
<> 144:ef7eb2e8f9f7 193 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 uint32_t xfer_len; /*!< Current transfer length. */
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 uint8_t toggle_in; /*!< IN transfer current toggle flag.
<> 144:ef7eb2e8f9f7 202 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 uint8_t toggle_out; /*!< OUT transfer current toggle flag
<> 144:ef7eb2e8f9f7 205 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 uint32_t ErrCnt; /*!< Host channel error count.*/
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
<> 144:ef7eb2e8f9f7 212 This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
<> 144:ef7eb2e8f9f7 213
<> 144:ef7eb2e8f9f7 214 USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
<> 144:ef7eb2e8f9f7 215 This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
<> 144:ef7eb2e8f9f7 216 }USB_OTG_HCTypeDef;
<> 144:ef7eb2e8f9f7 217 #endif /* USB_OTG_FS */
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 #if defined (USB)
<> 144:ef7eb2e8f9f7 220 /**
<> 144:ef7eb2e8f9f7 221 * @brief USB Initialization Structure definition
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223 typedef struct
<> 144:ef7eb2e8f9f7 224 {
<> 144:ef7eb2e8f9f7 225 uint32_t dev_endpoints; /*!< Device Endpoints number.
<> 144:ef7eb2e8f9f7 226 This parameter depends on the used USB core.
<> 144:ef7eb2e8f9f7 227 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 uint32_t speed; /*!< USB Core speed.
<> 144:ef7eb2e8f9f7 230 This parameter can be any value of @ref USB_Core_Speed */
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
<> 144:ef7eb2e8f9f7 233 This parameter can be any value of @ref USB_EP0_MPS */
<> 144:ef7eb2e8f9f7 234
<> 144:ef7eb2e8f9f7 235 uint32_t phy_itface; /*!< Select the used PHY interface.
<> 144:ef7eb2e8f9f7 236 This parameter can be any value of @ref USB_Core_PHY */
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 uint32_t low_power_enable; /*!< Enable or disable Low Power mode */
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 uint32_t lpm_enable; /*!< Enable or disable Battery charging. */
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
<> 144:ef7eb2e8f9f7 245 } USB_CfgTypeDef;
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 typedef struct
<> 144:ef7eb2e8f9f7 248 {
<> 144:ef7eb2e8f9f7 249 uint8_t num; /*!< Endpoint number
<> 144:ef7eb2e8f9f7 250 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 uint8_t is_in; /*!< Endpoint direction
<> 144:ef7eb2e8f9f7 253 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 uint8_t is_stall; /*!< Endpoint stall condition
<> 144:ef7eb2e8f9f7 256 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 uint8_t type; /*!< Endpoint type
<> 144:ef7eb2e8f9f7 259 This parameter can be any value of @ref USB_EP_Type */
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 uint16_t pmaadress; /*!< PMA Address
<> 144:ef7eb2e8f9f7 262 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 uint16_t pmaaddr0; /*!< PMA Address0
<> 144:ef7eb2e8f9f7 265 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 uint16_t pmaaddr1; /*!< PMA Address1
<> 144:ef7eb2e8f9f7 268 This parameter can be any value between Min_addr = 0 and Max_addr = 1K */
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 uint8_t doublebuffer; /*!< Double buffer enable
<> 144:ef7eb2e8f9f7 271 This parameter can be 0 or 1 */
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 uint16_t tx_fifo_num; /*!< This parameter is not required by USB Device FS peripheral, it is used
<> 144:ef7eb2e8f9f7 274 only by USB OTG FS peripheral
<> 144:ef7eb2e8f9f7 275 This parameter is added to ensure compatibility across USB peripherals */
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 uint32_t maxpacket; /*!< Endpoint Max packet size
<> 144:ef7eb2e8f9f7 278 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 uint32_t xfer_len; /*!< Current transfer length */
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 } USB_EPTypeDef;
<> 144:ef7eb2e8f9f7 287 #endif /* USB */
<> 144:ef7eb2e8f9f7 288 /**
<> 144:ef7eb2e8f9f7 289 * @}
<> 144:ef7eb2e8f9f7 290 */
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 293 /** @defgroup USB_LL_Exported_Constants USB Low Layer Exported Constants
<> 144:ef7eb2e8f9f7 294 * @{
<> 144:ef7eb2e8f9f7 295 */
<> 144:ef7eb2e8f9f7 296 #if defined (USB_OTG_FS)
<> 144:ef7eb2e8f9f7 297 /** @defgroup USB_LL_Core_Mode USB Low Layer Core Mode
<> 144:ef7eb2e8f9f7 298 * @{
<> 144:ef7eb2e8f9f7 299 */
<> 144:ef7eb2e8f9f7 300 #define USB_OTG_MODE_DEVICE 0
<> 144:ef7eb2e8f9f7 301 #define USB_OTG_MODE_HOST 1
<> 144:ef7eb2e8f9f7 302 #define USB_OTG_MODE_DRD 2
<> 144:ef7eb2e8f9f7 303 /**
<> 144:ef7eb2e8f9f7 304 * @}
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /** @defgroup USB_LL_Core_Speed USB Low Layer Core Speed
<> 144:ef7eb2e8f9f7 308 * @{
<> 144:ef7eb2e8f9f7 309 */
<> 144:ef7eb2e8f9f7 310 #define USB_OTG_SPEED_LOW 2
<> 144:ef7eb2e8f9f7 311 #define USB_OTG_SPEED_FULL 3
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 /**
<> 144:ef7eb2e8f9f7 314 * @}
<> 144:ef7eb2e8f9f7 315 */
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317 /** @defgroup USB_LL_Core_PHY USB Low Layer Core PHY
<> 144:ef7eb2e8f9f7 318 * @{
<> 144:ef7eb2e8f9f7 319 */
<> 144:ef7eb2e8f9f7 320 #define USB_OTG_ULPI_PHY 1
<> 144:ef7eb2e8f9f7 321 #define USB_OTG_EMBEDDED_PHY 2
<> 144:ef7eb2e8f9f7 322 /**
<> 144:ef7eb2e8f9f7 323 * @}
<> 144:ef7eb2e8f9f7 324 */
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 /** @defgroup USB_LL_Core_MPS USB Low Layer Core MPS
<> 144:ef7eb2e8f9f7 327 * @{
<> 144:ef7eb2e8f9f7 328 */
<> 144:ef7eb2e8f9f7 329 #define USB_OTG_FS_MAX_PACKET_SIZE 64
<> 144:ef7eb2e8f9f7 330 #define USB_OTG_MAX_EP0_SIZE 64
<> 144:ef7eb2e8f9f7 331 /**
<> 144:ef7eb2e8f9f7 332 * @}
<> 144:ef7eb2e8f9f7 333 */
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 /** @defgroup USB_LL_Core_PHY_Frequency USB Low Layer Core PHY Frequency
<> 144:ef7eb2e8f9f7 336 * @{
<> 144:ef7eb2e8f9f7 337 */
<> 144:ef7eb2e8f9f7 338 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1 << 1)
<> 144:ef7eb2e8f9f7 339 #define DSTS_ENUMSPD_LS_PHY_6MHZ (2 << 1)
<> 144:ef7eb2e8f9f7 340 #define DSTS_ENUMSPD_FS_PHY_48MHZ (3 << 1)
<> 144:ef7eb2e8f9f7 341 /**
<> 144:ef7eb2e8f9f7 342 * @}
<> 144:ef7eb2e8f9f7 343 */
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345 /** @defgroup USB_LL_CORE_Frame_Interval USB Low Layer Core Frame Interval
<> 144:ef7eb2e8f9f7 346 * @{
<> 144:ef7eb2e8f9f7 347 */
<> 144:ef7eb2e8f9f7 348 #define DCFG_FRAME_INTERVAL_80 0
<> 144:ef7eb2e8f9f7 349 #define DCFG_FRAME_INTERVAL_85 1
<> 144:ef7eb2e8f9f7 350 #define DCFG_FRAME_INTERVAL_90 2
<> 144:ef7eb2e8f9f7 351 #define DCFG_FRAME_INTERVAL_95 3
<> 144:ef7eb2e8f9f7 352 /**
<> 144:ef7eb2e8f9f7 353 * @}
<> 144:ef7eb2e8f9f7 354 */
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 /** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
<> 144:ef7eb2e8f9f7 357 * @{
<> 144:ef7eb2e8f9f7 358 */
<> 144:ef7eb2e8f9f7 359 #define DEP0CTL_MPS_64 0
<> 144:ef7eb2e8f9f7 360 #define DEP0CTL_MPS_32 1
<> 144:ef7eb2e8f9f7 361 #define DEP0CTL_MPS_16 2
<> 144:ef7eb2e8f9f7 362 #define DEP0CTL_MPS_8 3
<> 144:ef7eb2e8f9f7 363 /**
<> 144:ef7eb2e8f9f7 364 * @}
<> 144:ef7eb2e8f9f7 365 */
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 /** @defgroup USB_LL_EP_Speed USB Low Layer EP Speed
<> 144:ef7eb2e8f9f7 368 * @{
<> 144:ef7eb2e8f9f7 369 */
<> 144:ef7eb2e8f9f7 370 #define EP_SPEED_LOW 0
<> 144:ef7eb2e8f9f7 371 #define EP_SPEED_FULL 1
<> 144:ef7eb2e8f9f7 372 #define EP_SPEED_HIGH 2
<> 144:ef7eb2e8f9f7 373 /**
<> 144:ef7eb2e8f9f7 374 * @}
<> 144:ef7eb2e8f9f7 375 */
<> 144:ef7eb2e8f9f7 376
<> 144:ef7eb2e8f9f7 377 /** @defgroup USB_LL_EP_Type USB Low Layer EP Type
<> 144:ef7eb2e8f9f7 378 * @{
<> 144:ef7eb2e8f9f7 379 */
<> 144:ef7eb2e8f9f7 380 #define EP_TYPE_CTRL 0
<> 144:ef7eb2e8f9f7 381 #define EP_TYPE_ISOC 1
<> 144:ef7eb2e8f9f7 382 #define EP_TYPE_BULK 2
<> 144:ef7eb2e8f9f7 383 #define EP_TYPE_INTR 3
<> 144:ef7eb2e8f9f7 384 #define EP_TYPE_MSK 3
<> 144:ef7eb2e8f9f7 385 /**
<> 144:ef7eb2e8f9f7 386 * @}
<> 144:ef7eb2e8f9f7 387 */
<> 144:ef7eb2e8f9f7 388
<> 144:ef7eb2e8f9f7 389 /** @defgroup USB_LL_STS_Defines USB Low Layer STS Defines
<> 144:ef7eb2e8f9f7 390 * @{
<> 144:ef7eb2e8f9f7 391 */
<> 144:ef7eb2e8f9f7 392 #define STS_GOUT_NAK 1
<> 144:ef7eb2e8f9f7 393 #define STS_DATA_UPDT 2
<> 144:ef7eb2e8f9f7 394 #define STS_XFER_COMP 3
<> 144:ef7eb2e8f9f7 395 #define STS_SETUP_COMP 4
<> 144:ef7eb2e8f9f7 396 #define STS_SETUP_UPDT 6
<> 144:ef7eb2e8f9f7 397 /**
<> 144:ef7eb2e8f9f7 398 * @}
<> 144:ef7eb2e8f9f7 399 */
<> 144:ef7eb2e8f9f7 400
<> 144:ef7eb2e8f9f7 401 /** @defgroup USB_LL_HCFG_SPEED_Defines USB Low Layer HCFG Speed Defines
<> 144:ef7eb2e8f9f7 402 * @{
<> 144:ef7eb2e8f9f7 403 */
<> 144:ef7eb2e8f9f7 404 #define HCFG_30_60_MHZ 0
<> 144:ef7eb2e8f9f7 405 #define HCFG_48_MHZ 1
<> 144:ef7eb2e8f9f7 406 #define HCFG_6_MHZ 2
<> 144:ef7eb2e8f9f7 407 /**
<> 144:ef7eb2e8f9f7 408 * @}
<> 144:ef7eb2e8f9f7 409 */
<> 144:ef7eb2e8f9f7 410
<> 144:ef7eb2e8f9f7 411 /** @defgroup USB_LL_HPRT0_PRTSPD_SPEED_Defines USB Low Layer HPRT0 PRTSPD Speed Defines
<> 144:ef7eb2e8f9f7 412 * @{
<> 144:ef7eb2e8f9f7 413 */
<> 144:ef7eb2e8f9f7 414 #define HPRT0_PRTSPD_HIGH_SPEED 0
<> 144:ef7eb2e8f9f7 415 #define HPRT0_PRTSPD_FULL_SPEED 1
<> 144:ef7eb2e8f9f7 416 #define HPRT0_PRTSPD_LOW_SPEED 2
<> 144:ef7eb2e8f9f7 417 /**
<> 144:ef7eb2e8f9f7 418 * @}
<> 144:ef7eb2e8f9f7 419 */
<> 144:ef7eb2e8f9f7 420
<> 144:ef7eb2e8f9f7 421 #define HCCHAR_CTRL 0
<> 144:ef7eb2e8f9f7 422 #define HCCHAR_ISOC 1
<> 144:ef7eb2e8f9f7 423 #define HCCHAR_BULK 2
<> 144:ef7eb2e8f9f7 424 #define HCCHAR_INTR 3
<> 144:ef7eb2e8f9f7 425
<> 144:ef7eb2e8f9f7 426 #define HC_PID_DATA0 0
<> 144:ef7eb2e8f9f7 427 #define HC_PID_DATA2 1
<> 144:ef7eb2e8f9f7 428 #define HC_PID_DATA1 2
<> 144:ef7eb2e8f9f7 429 #define HC_PID_SETUP 3
<> 144:ef7eb2e8f9f7 430
<> 144:ef7eb2e8f9f7 431 #define GRXSTS_PKTSTS_IN 2
<> 144:ef7eb2e8f9f7 432 #define GRXSTS_PKTSTS_IN_XFER_COMP 3
<> 144:ef7eb2e8f9f7 433 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
<> 144:ef7eb2e8f9f7 434 #define GRXSTS_PKTSTS_CH_HALTED 7
<> 144:ef7eb2e8f9f7 435
<> 144:ef7eb2e8f9f7 436 #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE)
<> 144:ef7eb2e8f9f7 437 #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE)
<> 144:ef7eb2e8f9f7 438
<> 144:ef7eb2e8f9f7 439 #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE))
<> 144:ef7eb2e8f9f7 440 #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
<> 144:ef7eb2e8f9f7 441 #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
<> 144:ef7eb2e8f9f7 442 #define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE)
<> 144:ef7eb2e8f9f7 443
<> 144:ef7eb2e8f9f7 444 #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE))
<> 144:ef7eb2e8f9f7 445 #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE))
<> 144:ef7eb2e8f9f7 446 #endif /* USB_OTG_FS */
<> 144:ef7eb2e8f9f7 447
<> 144:ef7eb2e8f9f7 448 #if defined (USB)
<> 144:ef7eb2e8f9f7 449 /** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
<> 144:ef7eb2e8f9f7 450 * @{
<> 144:ef7eb2e8f9f7 451 */
<> 144:ef7eb2e8f9f7 452 #define DEP0CTL_MPS_64 0
<> 144:ef7eb2e8f9f7 453 #define DEP0CTL_MPS_32 1
<> 144:ef7eb2e8f9f7 454 #define DEP0CTL_MPS_16 2
<> 144:ef7eb2e8f9f7 455 #define DEP0CTL_MPS_8 3
<> 144:ef7eb2e8f9f7 456 /**
<> 144:ef7eb2e8f9f7 457 * @}
<> 144:ef7eb2e8f9f7 458 */
<> 144:ef7eb2e8f9f7 459
<> 144:ef7eb2e8f9f7 460 /** @defgroup USB_LL_EP_Type USB Low Layer EP Type
<> 144:ef7eb2e8f9f7 461 * @{
<> 144:ef7eb2e8f9f7 462 */
<> 144:ef7eb2e8f9f7 463 #define EP_TYPE_CTRL 0
<> 144:ef7eb2e8f9f7 464 #define EP_TYPE_ISOC 1
<> 144:ef7eb2e8f9f7 465 #define EP_TYPE_BULK 2
<> 144:ef7eb2e8f9f7 466 #define EP_TYPE_INTR 3
<> 144:ef7eb2e8f9f7 467 #define EP_TYPE_MSK 3
<> 144:ef7eb2e8f9f7 468 /**
<> 144:ef7eb2e8f9f7 469 * @}
<> 144:ef7eb2e8f9f7 470 */
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472 #define BTABLE_ADDRESS (0x000)
<> 144:ef7eb2e8f9f7 473 #endif /* USB */
<> 144:ef7eb2e8f9f7 474 /**
<> 144:ef7eb2e8f9f7 475 * @}
<> 144:ef7eb2e8f9f7 476 */
<> 144:ef7eb2e8f9f7 477
<> 144:ef7eb2e8f9f7 478 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 479 /** @defgroup USB_LL_Exported_Macros USB Low Layer Exported Macros
<> 144:ef7eb2e8f9f7 480 * @{
<> 144:ef7eb2e8f9f7 481 */
<> 144:ef7eb2e8f9f7 482 #if defined (USB_OTG_FS)
<> 144:ef7eb2e8f9f7 483 #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
<> 144:ef7eb2e8f9f7 484 #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 485
<> 144:ef7eb2e8f9f7 486 #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 487 #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 488 #endif /* USB_OTG_FS */
<> 144:ef7eb2e8f9f7 489 /**
<> 144:ef7eb2e8f9f7 490 * @}
<> 144:ef7eb2e8f9f7 491 */
<> 144:ef7eb2e8f9f7 492
<> 144:ef7eb2e8f9f7 493 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 494 /** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions
<> 144:ef7eb2e8f9f7 495 * @{
<> 144:ef7eb2e8f9f7 496 */
<> 144:ef7eb2e8f9f7 497 /** @addtogroup USB_LL_Exported_Functions_Group1 Peripheral Control functions
<> 144:ef7eb2e8f9f7 498 * @{
<> 144:ef7eb2e8f9f7 499 */
<> 144:ef7eb2e8f9f7 500 #if defined (USB_OTG_FS)
<> 144:ef7eb2e8f9f7 501 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
<> 144:ef7eb2e8f9f7 502 HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
<> 144:ef7eb2e8f9f7 503 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 504 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 505 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_ModeTypeDef mode);
<> 144:ef7eb2e8f9f7 506 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed);
<> 144:ef7eb2e8f9f7 507 HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 508 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num );
<> 144:ef7eb2e8f9f7 509 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 510 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 511 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 512 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 513 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len);
<> 144:ef7eb2e8f9f7 514 void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
<> 144:ef7eb2e8f9f7 515 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 516 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 517 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address);
<> 144:ef7eb2e8f9f7 518 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 519 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 520 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 521 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 522 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t *psetup);
<> 144:ef7eb2e8f9f7 523 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 524 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 525 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 526 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 527 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
<> 144:ef7eb2e8f9f7 528 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 529 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
<> 144:ef7eb2e8f9f7 530 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);
<> 144:ef7eb2e8f9f7 531
<> 144:ef7eb2e8f9f7 532 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
<> 144:ef7eb2e8f9f7 533 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq);
<> 144:ef7eb2e8f9f7 534 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 535 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state);
<> 144:ef7eb2e8f9f7 536 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 537 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 538 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
<> 144:ef7eb2e8f9f7 539 uint8_t ch_num,
<> 144:ef7eb2e8f9f7 540 uint8_t epnum,
<> 144:ef7eb2e8f9f7 541 uint8_t dev_address,
<> 144:ef7eb2e8f9f7 542 uint8_t speed,
<> 144:ef7eb2e8f9f7 543 uint8_t ep_type,
<> 144:ef7eb2e8f9f7 544 uint16_t mps);
<> 144:ef7eb2e8f9f7 545 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc);
<> 144:ef7eb2e8f9f7 546 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 547 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num);
<> 144:ef7eb2e8f9f7 548 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num);
<> 144:ef7eb2e8f9f7 549 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 550 HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 551 HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx);
<> 144:ef7eb2e8f9f7 552 #endif /* USB_OTG_FS */
<> 144:ef7eb2e8f9f7 553
<> 144:ef7eb2e8f9f7 554 #if defined (USB)
<> 144:ef7eb2e8f9f7 555 HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef Init);
<> 144:ef7eb2e8f9f7 556 HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef Init);
<> 144:ef7eb2e8f9f7 557 HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 558 HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 559 HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx , USB_ModeTypeDef mode);
<> 144:ef7eb2e8f9f7 560 HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx , uint8_t speed);
<> 144:ef7eb2e8f9f7 561 HAL_StatusTypeDef USB_FlushRxFifo (USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 562 HAL_StatusTypeDef USB_FlushTxFifo (USB_TypeDef *USBx, uint32_t num );
<> 144:ef7eb2e8f9f7 563 HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 564 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 565 HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx , USB_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 566 HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len);
<> 144:ef7eb2e8f9f7 567 void * USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len);
<> 144:ef7eb2e8f9f7 568 HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx , USB_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 569 HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx , USB_EPTypeDef *ep);
<> 144:ef7eb2e8f9f7 570 HAL_StatusTypeDef USB_SetDevAddress (USB_TypeDef *USBx, uint8_t address);
<> 144:ef7eb2e8f9f7 571 HAL_StatusTypeDef USB_DevConnect (USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 572 HAL_StatusTypeDef USB_DevDisconnect (USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 573 HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 574 HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup);
<> 144:ef7eb2e8f9f7 575 uint32_t USB_ReadInterrupts (USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 576 uint32_t USB_ReadDevAllOutEpInterrupt (USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 577 uint32_t USB_ReadDevOutEPInterrupt (USB_TypeDef *USBx , uint8_t epnum);
<> 144:ef7eb2e8f9f7 578 uint32_t USB_ReadDevAllInEpInterrupt (USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 579 uint32_t USB_ReadDevInEPInterrupt (USB_TypeDef *USBx , uint8_t epnum);
<> 144:ef7eb2e8f9f7 580 void USB_ClearInterrupts (USB_TypeDef *USBx, uint32_t interrupt);
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 583 HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx);
<> 144:ef7eb2e8f9f7 584 void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
<> 144:ef7eb2e8f9f7 585 void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
<> 144:ef7eb2e8f9f7 586 #endif /* USB */
<> 144:ef7eb2e8f9f7 587 /**
<> 144:ef7eb2e8f9f7 588 * @}
<> 144:ef7eb2e8f9f7 589 */
<> 144:ef7eb2e8f9f7 590 /**
<> 144:ef7eb2e8f9f7 591 * @}
<> 144:ef7eb2e8f9f7 592 */
<> 144:ef7eb2e8f9f7 593
<> 144:ef7eb2e8f9f7 594 /**
<> 144:ef7eb2e8f9f7 595 * @}
<> 144:ef7eb2e8f9f7 596 */
<> 144:ef7eb2e8f9f7 597
<> 144:ef7eb2e8f9f7 598 /**
<> 144:ef7eb2e8f9f7 599 * @}
<> 144:ef7eb2e8f9f7 600 */
<> 144:ef7eb2e8f9f7 601
<> 144:ef7eb2e8f9f7 602 #endif /* STM32F102x6 || STM32F102xB || */
<> 144:ef7eb2e8f9f7 603 /* STM32F103x6 || STM32F103xB || */
<> 144:ef7eb2e8f9f7 604 /* STM32F103xE || STM32F103xG || */
<> 144:ef7eb2e8f9f7 605 /* STM32F105xC || STM32F107xC */
<> 144:ef7eb2e8f9f7 606
<> 144:ef7eb2e8f9f7 607 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 608 }
<> 144:ef7eb2e8f9f7 609 #endif
<> 144:ef7eb2e8f9f7 610
<> 144:ef7eb2e8f9f7 611
<> 144:ef7eb2e8f9f7 612 #endif /* __STM32F1xx_LL_USB_H */
<> 144:ef7eb2e8f9f7 613
<> 144:ef7eb2e8f9f7 614 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/