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targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_ll_usart.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 165:e614a9f1c9e2 1 /**
AnnaBridge 165:e614a9f1c9e2 2 ******************************************************************************
AnnaBridge 165:e614a9f1c9e2 3 * @file stm32f1xx_ll_usart.h
AnnaBridge 165:e614a9f1c9e2 4 * @author MCD Application Team
AnnaBridge 165:e614a9f1c9e2 5 * @brief Header file of USART LL module.
AnnaBridge 165:e614a9f1c9e2 6 ******************************************************************************
AnnaBridge 165:e614a9f1c9e2 7 * @attention
AnnaBridge 165:e614a9f1c9e2 8 *
AnnaBridge 165:e614a9f1c9e2 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 165:e614a9f1c9e2 10 *
AnnaBridge 165:e614a9f1c9e2 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 165:e614a9f1c9e2 12 * are permitted provided that the following conditions are met:
AnnaBridge 165:e614a9f1c9e2 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 165:e614a9f1c9e2 14 * this list of conditions and the following disclaimer.
AnnaBridge 165:e614a9f1c9e2 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 165:e614a9f1c9e2 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 165:e614a9f1c9e2 17 * and/or other materials provided with the distribution.
AnnaBridge 165:e614a9f1c9e2 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 165:e614a9f1c9e2 19 * may be used to endorse or promote products derived from this software
AnnaBridge 165:e614a9f1c9e2 20 * without specific prior written permission.
AnnaBridge 165:e614a9f1c9e2 21 *
AnnaBridge 165:e614a9f1c9e2 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 165:e614a9f1c9e2 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 165:e614a9f1c9e2 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 165:e614a9f1c9e2 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 165:e614a9f1c9e2 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 165:e614a9f1c9e2 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 165:e614a9f1c9e2 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 165:e614a9f1c9e2 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 165:e614a9f1c9e2 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 165:e614a9f1c9e2 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 165:e614a9f1c9e2 32 *
AnnaBridge 165:e614a9f1c9e2 33 ******************************************************************************
AnnaBridge 165:e614a9f1c9e2 34 */
AnnaBridge 165:e614a9f1c9e2 35
AnnaBridge 165:e614a9f1c9e2 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 37 #ifndef __STM32F1xx_LL_USART_H
AnnaBridge 165:e614a9f1c9e2 38 #define __STM32F1xx_LL_USART_H
AnnaBridge 165:e614a9f1c9e2 39
AnnaBridge 165:e614a9f1c9e2 40 #ifdef __cplusplus
AnnaBridge 165:e614a9f1c9e2 41 extern "C" {
AnnaBridge 165:e614a9f1c9e2 42 #endif
AnnaBridge 165:e614a9f1c9e2 43
AnnaBridge 165:e614a9f1c9e2 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 45 #include "stm32f1xx.h"
AnnaBridge 165:e614a9f1c9e2 46
AnnaBridge 165:e614a9f1c9e2 47 /** @addtogroup STM32F1xx_LL_Driver
AnnaBridge 165:e614a9f1c9e2 48 * @{
AnnaBridge 165:e614a9f1c9e2 49 */
AnnaBridge 165:e614a9f1c9e2 50
AnnaBridge 165:e614a9f1c9e2 51 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
AnnaBridge 165:e614a9f1c9e2 52
AnnaBridge 165:e614a9f1c9e2 53 /** @defgroup USART_LL USART
AnnaBridge 165:e614a9f1c9e2 54 * @{
AnnaBridge 165:e614a9f1c9e2 55 */
AnnaBridge 165:e614a9f1c9e2 56
AnnaBridge 165:e614a9f1c9e2 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 59
AnnaBridge 165:e614a9f1c9e2 60 /* Private constants ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 61 /** @defgroup USART_LL_Private_Constants USART Private Constants
AnnaBridge 165:e614a9f1c9e2 62 * @{
AnnaBridge 165:e614a9f1c9e2 63 */
AnnaBridge 165:e614a9f1c9e2 64
AnnaBridge 165:e614a9f1c9e2 65 /* Defines used for the bit position in the register and perform offsets*/
AnnaBridge 165:e614a9f1c9e2 66 #define USART_POSITION_GTPR_GT USART_GTPR_GT_Pos
AnnaBridge 165:e614a9f1c9e2 67 /**
AnnaBridge 165:e614a9f1c9e2 68 * @}
AnnaBridge 165:e614a9f1c9e2 69 */
AnnaBridge 165:e614a9f1c9e2 70
AnnaBridge 165:e614a9f1c9e2 71 /* Private macros ------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 72 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 165:e614a9f1c9e2 73 /** @defgroup USART_LL_Private_Macros USART Private Macros
AnnaBridge 165:e614a9f1c9e2 74 * @{
AnnaBridge 165:e614a9f1c9e2 75 */
AnnaBridge 165:e614a9f1c9e2 76 /**
AnnaBridge 165:e614a9f1c9e2 77 * @}
AnnaBridge 165:e614a9f1c9e2 78 */
AnnaBridge 165:e614a9f1c9e2 79 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 165:e614a9f1c9e2 80
AnnaBridge 165:e614a9f1c9e2 81 /* Exported types ------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 82 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 165:e614a9f1c9e2 83 /** @defgroup USART_LL_ES_INIT USART Exported Init structures
AnnaBridge 165:e614a9f1c9e2 84 * @{
AnnaBridge 165:e614a9f1c9e2 85 */
AnnaBridge 165:e614a9f1c9e2 86
AnnaBridge 165:e614a9f1c9e2 87 /**
AnnaBridge 165:e614a9f1c9e2 88 * @brief LL USART Init Structure definition
AnnaBridge 165:e614a9f1c9e2 89 */
AnnaBridge 165:e614a9f1c9e2 90 typedef struct
AnnaBridge 165:e614a9f1c9e2 91 {
AnnaBridge 165:e614a9f1c9e2 92 uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
AnnaBridge 165:e614a9f1c9e2 93
AnnaBridge 165:e614a9f1c9e2 94 This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
AnnaBridge 165:e614a9f1c9e2 95
AnnaBridge 165:e614a9f1c9e2 96 uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge 165:e614a9f1c9e2 97 This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
AnnaBridge 165:e614a9f1c9e2 98
AnnaBridge 165:e614a9f1c9e2 99 This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
AnnaBridge 165:e614a9f1c9e2 100
AnnaBridge 165:e614a9f1c9e2 101 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge 165:e614a9f1c9e2 102 This parameter can be a value of @ref USART_LL_EC_STOPBITS.
AnnaBridge 165:e614a9f1c9e2 103
AnnaBridge 165:e614a9f1c9e2 104 This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
AnnaBridge 165:e614a9f1c9e2 105
AnnaBridge 165:e614a9f1c9e2 106 uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge 165:e614a9f1c9e2 107 This parameter can be a value of @ref USART_LL_EC_PARITY.
AnnaBridge 165:e614a9f1c9e2 108
AnnaBridge 165:e614a9f1c9e2 109 This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
AnnaBridge 165:e614a9f1c9e2 110
AnnaBridge 165:e614a9f1c9e2 111 uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 112 This parameter can be a value of @ref USART_LL_EC_DIRECTION.
AnnaBridge 165:e614a9f1c9e2 113
AnnaBridge 165:e614a9f1c9e2 114 This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
AnnaBridge 165:e614a9f1c9e2 115
AnnaBridge 165:e614a9f1c9e2 116 uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 117 This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
AnnaBridge 165:e614a9f1c9e2 118
AnnaBridge 165:e614a9f1c9e2 119 This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
AnnaBridge 165:e614a9f1c9e2 120
AnnaBridge 165:e614a9f1c9e2 121 #if defined(USART_CR1_OVER8)
AnnaBridge 165:e614a9f1c9e2 122 uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
AnnaBridge 165:e614a9f1c9e2 123 This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
AnnaBridge 165:e614a9f1c9e2 124
AnnaBridge 165:e614a9f1c9e2 125 This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
AnnaBridge 165:e614a9f1c9e2 126
AnnaBridge 165:e614a9f1c9e2 127 #endif /* USART_OverSampling_Feature */
AnnaBridge 165:e614a9f1c9e2 128 } LL_USART_InitTypeDef;
AnnaBridge 165:e614a9f1c9e2 129
AnnaBridge 165:e614a9f1c9e2 130 /**
AnnaBridge 165:e614a9f1c9e2 131 * @brief LL USART Clock Init Structure definition
AnnaBridge 165:e614a9f1c9e2 132 */
AnnaBridge 165:e614a9f1c9e2 133 typedef struct
AnnaBridge 165:e614a9f1c9e2 134 {
AnnaBridge 165:e614a9f1c9e2 135 uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 136 This parameter can be a value of @ref USART_LL_EC_CLOCK.
AnnaBridge 165:e614a9f1c9e2 137
AnnaBridge 165:e614a9f1c9e2 138 USART HW configuration can be modified afterwards using unitary functions
AnnaBridge 165:e614a9f1c9e2 139 @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
AnnaBridge 165:e614a9f1c9e2 140 For more details, refer to description of this function. */
AnnaBridge 165:e614a9f1c9e2 141
AnnaBridge 165:e614a9f1c9e2 142 uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock.
AnnaBridge 165:e614a9f1c9e2 143 This parameter can be a value of @ref USART_LL_EC_POLARITY.
AnnaBridge 165:e614a9f1c9e2 144
AnnaBridge 165:e614a9f1c9e2 145 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
AnnaBridge 165:e614a9f1c9e2 146 For more details, refer to description of this function. */
AnnaBridge 165:e614a9f1c9e2 147
AnnaBridge 165:e614a9f1c9e2 148 uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made.
AnnaBridge 165:e614a9f1c9e2 149 This parameter can be a value of @ref USART_LL_EC_PHASE.
AnnaBridge 165:e614a9f1c9e2 150
AnnaBridge 165:e614a9f1c9e2 151 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
AnnaBridge 165:e614a9f1c9e2 152 For more details, refer to description of this function. */
AnnaBridge 165:e614a9f1c9e2 153
AnnaBridge 165:e614a9f1c9e2 154 uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted
AnnaBridge 165:e614a9f1c9e2 155 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
AnnaBridge 165:e614a9f1c9e2 156 This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
AnnaBridge 165:e614a9f1c9e2 157
AnnaBridge 165:e614a9f1c9e2 158 USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
AnnaBridge 165:e614a9f1c9e2 159 For more details, refer to description of this function. */
AnnaBridge 165:e614a9f1c9e2 160
AnnaBridge 165:e614a9f1c9e2 161 } LL_USART_ClockInitTypeDef;
AnnaBridge 165:e614a9f1c9e2 162
AnnaBridge 165:e614a9f1c9e2 163 /**
AnnaBridge 165:e614a9f1c9e2 164 * @}
AnnaBridge 165:e614a9f1c9e2 165 */
AnnaBridge 165:e614a9f1c9e2 166 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 165:e614a9f1c9e2 167
AnnaBridge 165:e614a9f1c9e2 168 /* Exported constants --------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 169 /** @defgroup USART_LL_Exported_Constants USART Exported Constants
AnnaBridge 165:e614a9f1c9e2 170 * @{
AnnaBridge 165:e614a9f1c9e2 171 */
AnnaBridge 165:e614a9f1c9e2 172
AnnaBridge 165:e614a9f1c9e2 173 /** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 165:e614a9f1c9e2 174 * @brief Flags defines which can be used with LL_USART_ReadReg function
AnnaBridge 165:e614a9f1c9e2 175 * @{
AnnaBridge 165:e614a9f1c9e2 176 */
AnnaBridge 165:e614a9f1c9e2 177 #define LL_USART_SR_PE USART_SR_PE /*!< Parity error flag */
AnnaBridge 165:e614a9f1c9e2 178 #define LL_USART_SR_FE USART_SR_FE /*!< Framing error flag */
AnnaBridge 165:e614a9f1c9e2 179 #define LL_USART_SR_NE USART_SR_NE /*!< Noise detected flag */
AnnaBridge 165:e614a9f1c9e2 180 #define LL_USART_SR_ORE USART_SR_ORE /*!< Overrun error flag */
AnnaBridge 165:e614a9f1c9e2 181 #define LL_USART_SR_IDLE USART_SR_IDLE /*!< Idle line detected flag */
AnnaBridge 165:e614a9f1c9e2 182 #define LL_USART_SR_RXNE USART_SR_RXNE /*!< Read data register not empty flag */
AnnaBridge 165:e614a9f1c9e2 183 #define LL_USART_SR_TC USART_SR_TC /*!< Transmission complete flag */
AnnaBridge 165:e614a9f1c9e2 184 #define LL_USART_SR_TXE USART_SR_TXE /*!< Transmit data register empty flag */
AnnaBridge 165:e614a9f1c9e2 185 #define LL_USART_SR_LBD USART_SR_LBD /*!< LIN break detection flag */
AnnaBridge 165:e614a9f1c9e2 186 #define LL_USART_SR_CTS USART_SR_CTS /*!< CTS flag */
AnnaBridge 165:e614a9f1c9e2 187 /**
AnnaBridge 165:e614a9f1c9e2 188 * @}
AnnaBridge 165:e614a9f1c9e2 189 */
AnnaBridge 165:e614a9f1c9e2 190
AnnaBridge 165:e614a9f1c9e2 191 /** @defgroup USART_LL_EC_IT IT Defines
AnnaBridge 165:e614a9f1c9e2 192 * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions
AnnaBridge 165:e614a9f1c9e2 193 * @{
AnnaBridge 165:e614a9f1c9e2 194 */
AnnaBridge 165:e614a9f1c9e2 195 #define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
AnnaBridge 165:e614a9f1c9e2 196 #define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
AnnaBridge 165:e614a9f1c9e2 197 #define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
AnnaBridge 165:e614a9f1c9e2 198 #define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
AnnaBridge 165:e614a9f1c9e2 199 #define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
AnnaBridge 165:e614a9f1c9e2 200 #define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */
AnnaBridge 165:e614a9f1c9e2 201 #define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
AnnaBridge 165:e614a9f1c9e2 202 #define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
AnnaBridge 165:e614a9f1c9e2 203 /**
AnnaBridge 165:e614a9f1c9e2 204 * @}
AnnaBridge 165:e614a9f1c9e2 205 */
AnnaBridge 165:e614a9f1c9e2 206
AnnaBridge 165:e614a9f1c9e2 207 /** @defgroup USART_LL_EC_DIRECTION Communication Direction
AnnaBridge 165:e614a9f1c9e2 208 * @{
AnnaBridge 165:e614a9f1c9e2 209 */
AnnaBridge 165:e614a9f1c9e2 210 #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */
AnnaBridge 165:e614a9f1c9e2 211 #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
AnnaBridge 165:e614a9f1c9e2 212 #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
AnnaBridge 165:e614a9f1c9e2 213 #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
AnnaBridge 165:e614a9f1c9e2 214 /**
AnnaBridge 165:e614a9f1c9e2 215 * @}
AnnaBridge 165:e614a9f1c9e2 216 */
AnnaBridge 165:e614a9f1c9e2 217
AnnaBridge 165:e614a9f1c9e2 218 /** @defgroup USART_LL_EC_PARITY Parity Control
AnnaBridge 165:e614a9f1c9e2 219 * @{
AnnaBridge 165:e614a9f1c9e2 220 */
AnnaBridge 165:e614a9f1c9e2 221 #define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */
AnnaBridge 165:e614a9f1c9e2 222 #define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
AnnaBridge 165:e614a9f1c9e2 223 #define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
AnnaBridge 165:e614a9f1c9e2 224 /**
AnnaBridge 165:e614a9f1c9e2 225 * @}
AnnaBridge 165:e614a9f1c9e2 226 */
AnnaBridge 165:e614a9f1c9e2 227
AnnaBridge 165:e614a9f1c9e2 228 /** @defgroup USART_LL_EC_WAKEUP Wakeup
AnnaBridge 165:e614a9f1c9e2 229 * @{
AnnaBridge 165:e614a9f1c9e2 230 */
AnnaBridge 165:e614a9f1c9e2 231 #define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */
AnnaBridge 165:e614a9f1c9e2 232 #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */
AnnaBridge 165:e614a9f1c9e2 233 /**
AnnaBridge 165:e614a9f1c9e2 234 * @}
AnnaBridge 165:e614a9f1c9e2 235 */
AnnaBridge 165:e614a9f1c9e2 236
AnnaBridge 165:e614a9f1c9e2 237 /** @defgroup USART_LL_EC_DATAWIDTH Datawidth
AnnaBridge 165:e614a9f1c9e2 238 * @{
AnnaBridge 165:e614a9f1c9e2 239 */
AnnaBridge 165:e614a9f1c9e2 240 #define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
AnnaBridge 165:e614a9f1c9e2 241 #define LL_USART_DATAWIDTH_9B USART_CR1_M /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
AnnaBridge 165:e614a9f1c9e2 242 /**
AnnaBridge 165:e614a9f1c9e2 243 * @}
AnnaBridge 165:e614a9f1c9e2 244 */
AnnaBridge 165:e614a9f1c9e2 245
AnnaBridge 165:e614a9f1c9e2 246 #if defined(USART_CR1_OVER8)
AnnaBridge 165:e614a9f1c9e2 247 /** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
AnnaBridge 165:e614a9f1c9e2 248 * @{
AnnaBridge 165:e614a9f1c9e2 249 */
AnnaBridge 165:e614a9f1c9e2 250 #define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
AnnaBridge 165:e614a9f1c9e2 251 #define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
AnnaBridge 165:e614a9f1c9e2 252 /**
AnnaBridge 165:e614a9f1c9e2 253 * @}
AnnaBridge 165:e614a9f1c9e2 254 */
AnnaBridge 165:e614a9f1c9e2 255
AnnaBridge 165:e614a9f1c9e2 256 #endif /* USART_OverSampling_Feature */
AnnaBridge 165:e614a9f1c9e2 257 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 165:e614a9f1c9e2 258 /** @defgroup USART_LL_EC_CLOCK Clock Signal
AnnaBridge 165:e614a9f1c9e2 259 * @{
AnnaBridge 165:e614a9f1c9e2 260 */
AnnaBridge 165:e614a9f1c9e2 261
AnnaBridge 165:e614a9f1c9e2 262 #define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */
AnnaBridge 165:e614a9f1c9e2 263 #define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */
AnnaBridge 165:e614a9f1c9e2 264 /**
AnnaBridge 165:e614a9f1c9e2 265 * @}
AnnaBridge 165:e614a9f1c9e2 266 */
AnnaBridge 165:e614a9f1c9e2 267 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 165:e614a9f1c9e2 268
AnnaBridge 165:e614a9f1c9e2 269 /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
AnnaBridge 165:e614a9f1c9e2 270 * @{
AnnaBridge 165:e614a9f1c9e2 271 */
AnnaBridge 165:e614a9f1c9e2 272 #define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */
AnnaBridge 165:e614a9f1c9e2 273 #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */
AnnaBridge 165:e614a9f1c9e2 274 /**
AnnaBridge 165:e614a9f1c9e2 275 * @}
AnnaBridge 165:e614a9f1c9e2 276 */
AnnaBridge 165:e614a9f1c9e2 277
AnnaBridge 165:e614a9f1c9e2 278 /** @defgroup USART_LL_EC_PHASE Clock Phase
AnnaBridge 165:e614a9f1c9e2 279 * @{
AnnaBridge 165:e614a9f1c9e2 280 */
AnnaBridge 165:e614a9f1c9e2 281 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */
AnnaBridge 165:e614a9f1c9e2 282 #define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */
AnnaBridge 165:e614a9f1c9e2 283 /**
AnnaBridge 165:e614a9f1c9e2 284 * @}
AnnaBridge 165:e614a9f1c9e2 285 */
AnnaBridge 165:e614a9f1c9e2 286
AnnaBridge 165:e614a9f1c9e2 287 /** @defgroup USART_LL_EC_POLARITY Clock Polarity
AnnaBridge 165:e614a9f1c9e2 288 * @{
AnnaBridge 165:e614a9f1c9e2 289 */
AnnaBridge 165:e614a9f1c9e2 290 #define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/
AnnaBridge 165:e614a9f1c9e2 291 #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */
AnnaBridge 165:e614a9f1c9e2 292 /**
AnnaBridge 165:e614a9f1c9e2 293 * @}
AnnaBridge 165:e614a9f1c9e2 294 */
AnnaBridge 165:e614a9f1c9e2 295
AnnaBridge 165:e614a9f1c9e2 296 /** @defgroup USART_LL_EC_STOPBITS Stop Bits
AnnaBridge 165:e614a9f1c9e2 297 * @{
AnnaBridge 165:e614a9f1c9e2 298 */
AnnaBridge 165:e614a9f1c9e2 299 #define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */
AnnaBridge 165:e614a9f1c9e2 300 #define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */
AnnaBridge 165:e614a9f1c9e2 301 #define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */
AnnaBridge 165:e614a9f1c9e2 302 #define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
AnnaBridge 165:e614a9f1c9e2 303 /**
AnnaBridge 165:e614a9f1c9e2 304 * @}
AnnaBridge 165:e614a9f1c9e2 305 */
AnnaBridge 165:e614a9f1c9e2 306
AnnaBridge 165:e614a9f1c9e2 307 /** @defgroup USART_LL_EC_HWCONTROL Hardware Control
AnnaBridge 165:e614a9f1c9e2 308 * @{
AnnaBridge 165:e614a9f1c9e2 309 */
AnnaBridge 165:e614a9f1c9e2 310 #define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */
AnnaBridge 165:e614a9f1c9e2 311 #define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
AnnaBridge 165:e614a9f1c9e2 312 #define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
AnnaBridge 165:e614a9f1c9e2 313 #define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
AnnaBridge 165:e614a9f1c9e2 314 /**
AnnaBridge 165:e614a9f1c9e2 315 * @}
AnnaBridge 165:e614a9f1c9e2 316 */
AnnaBridge 165:e614a9f1c9e2 317
AnnaBridge 165:e614a9f1c9e2 318 /** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
AnnaBridge 165:e614a9f1c9e2 319 * @{
AnnaBridge 165:e614a9f1c9e2 320 */
AnnaBridge 165:e614a9f1c9e2 321 #define LL_USART_IRDA_POWER_NORMAL 0x00000000U /*!< IrDA normal power mode */
AnnaBridge 165:e614a9f1c9e2 322 #define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */
AnnaBridge 165:e614a9f1c9e2 323 /**
AnnaBridge 165:e614a9f1c9e2 324 * @}
AnnaBridge 165:e614a9f1c9e2 325 */
AnnaBridge 165:e614a9f1c9e2 326
AnnaBridge 165:e614a9f1c9e2 327 /** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
AnnaBridge 165:e614a9f1c9e2 328 * @{
AnnaBridge 165:e614a9f1c9e2 329 */
AnnaBridge 165:e614a9f1c9e2 330 #define LL_USART_LINBREAK_DETECT_10B 0x00000000U /*!< 10-bit break detection method selected */
AnnaBridge 165:e614a9f1c9e2 331 #define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */
AnnaBridge 165:e614a9f1c9e2 332 /**
AnnaBridge 165:e614a9f1c9e2 333 * @}
AnnaBridge 165:e614a9f1c9e2 334 */
AnnaBridge 165:e614a9f1c9e2 335
AnnaBridge 165:e614a9f1c9e2 336 /**
AnnaBridge 165:e614a9f1c9e2 337 * @}
AnnaBridge 165:e614a9f1c9e2 338 */
AnnaBridge 165:e614a9f1c9e2 339
AnnaBridge 165:e614a9f1c9e2 340 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 341 /** @defgroup USART_LL_Exported_Macros USART Exported Macros
AnnaBridge 165:e614a9f1c9e2 342 * @{
AnnaBridge 165:e614a9f1c9e2 343 */
AnnaBridge 165:e614a9f1c9e2 344
AnnaBridge 165:e614a9f1c9e2 345 /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 165:e614a9f1c9e2 346 * @{
AnnaBridge 165:e614a9f1c9e2 347 */
AnnaBridge 165:e614a9f1c9e2 348
AnnaBridge 165:e614a9f1c9e2 349 /**
AnnaBridge 165:e614a9f1c9e2 350 * @brief Write a value in USART register
AnnaBridge 165:e614a9f1c9e2 351 * @param __INSTANCE__ USART Instance
AnnaBridge 165:e614a9f1c9e2 352 * @param __REG__ Register to be written
AnnaBridge 165:e614a9f1c9e2 353 * @param __VALUE__ Value to be written in the register
AnnaBridge 165:e614a9f1c9e2 354 * @retval None
AnnaBridge 165:e614a9f1c9e2 355 */
AnnaBridge 165:e614a9f1c9e2 356 #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 165:e614a9f1c9e2 357
AnnaBridge 165:e614a9f1c9e2 358 /**
AnnaBridge 165:e614a9f1c9e2 359 * @brief Read a value in USART register
AnnaBridge 165:e614a9f1c9e2 360 * @param __INSTANCE__ USART Instance
AnnaBridge 165:e614a9f1c9e2 361 * @param __REG__ Register to be read
AnnaBridge 165:e614a9f1c9e2 362 * @retval Register value
AnnaBridge 165:e614a9f1c9e2 363 */
AnnaBridge 165:e614a9f1c9e2 364 #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 165:e614a9f1c9e2 365 /**
AnnaBridge 165:e614a9f1c9e2 366 * @}
AnnaBridge 165:e614a9f1c9e2 367 */
AnnaBridge 165:e614a9f1c9e2 368
AnnaBridge 165:e614a9f1c9e2 369 /** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
AnnaBridge 165:e614a9f1c9e2 370 * @{
AnnaBridge 165:e614a9f1c9e2 371 */
AnnaBridge 165:e614a9f1c9e2 372
AnnaBridge 165:e614a9f1c9e2 373 /**
AnnaBridge 165:e614a9f1c9e2 374 * @brief Compute USARTDIV value according to Peripheral Clock and
AnnaBridge 165:e614a9f1c9e2 375 * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
AnnaBridge 165:e614a9f1c9e2 376 * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
AnnaBridge 165:e614a9f1c9e2 377 * @param __BAUDRATE__ Baud rate value to achieve
AnnaBridge 165:e614a9f1c9e2 378 * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
AnnaBridge 165:e614a9f1c9e2 379 */
AnnaBridge 165:e614a9f1c9e2 380 #define __LL_USART_DIV_SAMPLING8_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(2*(__BAUDRATE__)))
AnnaBridge 165:e614a9f1c9e2 381 #define __LL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100)
AnnaBridge 165:e614a9f1c9e2 382 #define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8 + 50) / 100)
AnnaBridge 165:e614a9f1c9e2 383 /* UART BRR = mantissa + overflow + fraction
AnnaBridge 165:e614a9f1c9e2 384 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
AnnaBridge 165:e614a9f1c9e2 385 #define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
AnnaBridge 165:e614a9f1c9e2 386 ((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
AnnaBridge 165:e614a9f1c9e2 387 (__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07))
AnnaBridge 165:e614a9f1c9e2 388
AnnaBridge 165:e614a9f1c9e2 389 /**
AnnaBridge 165:e614a9f1c9e2 390 * @brief Compute USARTDIV value according to Peripheral Clock and
AnnaBridge 165:e614a9f1c9e2 391 * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
AnnaBridge 165:e614a9f1c9e2 392 * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
AnnaBridge 165:e614a9f1c9e2 393 * @param __BAUDRATE__ Baud rate value to achieve
AnnaBridge 165:e614a9f1c9e2 394 * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
AnnaBridge 165:e614a9f1c9e2 395 */
AnnaBridge 165:e614a9f1c9e2 396 #define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(4*(__BAUDRATE__)))
AnnaBridge 165:e614a9f1c9e2 397 #define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
AnnaBridge 165:e614a9f1c9e2 398 #define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16 + 50) / 100)
AnnaBridge 165:e614a9f1c9e2 399 /* USART BRR = mantissa + overflow + fraction
AnnaBridge 165:e614a9f1c9e2 400 = (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
AnnaBridge 165:e614a9f1c9e2 401 #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
AnnaBridge 165:e614a9f1c9e2 402 (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
AnnaBridge 165:e614a9f1c9e2 403 (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))
AnnaBridge 165:e614a9f1c9e2 404
AnnaBridge 165:e614a9f1c9e2 405 /**
AnnaBridge 165:e614a9f1c9e2 406 * @}
AnnaBridge 165:e614a9f1c9e2 407 */
AnnaBridge 165:e614a9f1c9e2 408
AnnaBridge 165:e614a9f1c9e2 409 /**
AnnaBridge 165:e614a9f1c9e2 410 * @}
AnnaBridge 165:e614a9f1c9e2 411 */
AnnaBridge 165:e614a9f1c9e2 412
AnnaBridge 165:e614a9f1c9e2 413 /* Exported functions --------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 414
AnnaBridge 165:e614a9f1c9e2 415 /** @defgroup USART_LL_Exported_Functions USART Exported Functions
AnnaBridge 165:e614a9f1c9e2 416 * @{
AnnaBridge 165:e614a9f1c9e2 417 */
AnnaBridge 165:e614a9f1c9e2 418
AnnaBridge 165:e614a9f1c9e2 419 /** @defgroup USART_LL_EF_Configuration Configuration functions
AnnaBridge 165:e614a9f1c9e2 420 * @{
AnnaBridge 165:e614a9f1c9e2 421 */
AnnaBridge 165:e614a9f1c9e2 422
AnnaBridge 165:e614a9f1c9e2 423 /**
AnnaBridge 165:e614a9f1c9e2 424 * @brief USART Enable
AnnaBridge 165:e614a9f1c9e2 425 * @rmtoll CR1 UE LL_USART_Enable
AnnaBridge 165:e614a9f1c9e2 426 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 427 * @retval None
AnnaBridge 165:e614a9f1c9e2 428 */
AnnaBridge 165:e614a9f1c9e2 429 __STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 430 {
AnnaBridge 165:e614a9f1c9e2 431 SET_BIT(USARTx->CR1, USART_CR1_UE);
AnnaBridge 165:e614a9f1c9e2 432 }
AnnaBridge 165:e614a9f1c9e2 433
AnnaBridge 165:e614a9f1c9e2 434 /**
AnnaBridge 165:e614a9f1c9e2 435 * @brief USART Disable (all USART prescalers and outputs are disabled)
AnnaBridge 165:e614a9f1c9e2 436 * @note When USART is disabled, USART prescalers and outputs are stopped immediately,
AnnaBridge 165:e614a9f1c9e2 437 * and current operations are discarded. The configuration of the USART is kept, but all the status
AnnaBridge 165:e614a9f1c9e2 438 * flags, in the USARTx_SR are set to their default values.
AnnaBridge 165:e614a9f1c9e2 439 * @rmtoll CR1 UE LL_USART_Disable
AnnaBridge 165:e614a9f1c9e2 440 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 441 * @retval None
AnnaBridge 165:e614a9f1c9e2 442 */
AnnaBridge 165:e614a9f1c9e2 443 __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 444 {
AnnaBridge 165:e614a9f1c9e2 445 CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
AnnaBridge 165:e614a9f1c9e2 446 }
AnnaBridge 165:e614a9f1c9e2 447
AnnaBridge 165:e614a9f1c9e2 448 /**
AnnaBridge 165:e614a9f1c9e2 449 * @brief Indicate if USART is enabled
AnnaBridge 165:e614a9f1c9e2 450 * @rmtoll CR1 UE LL_USART_IsEnabled
AnnaBridge 165:e614a9f1c9e2 451 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 452 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 453 */
AnnaBridge 165:e614a9f1c9e2 454 __STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 455 {
AnnaBridge 165:e614a9f1c9e2 456 return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
AnnaBridge 165:e614a9f1c9e2 457 }
AnnaBridge 165:e614a9f1c9e2 458
AnnaBridge 165:e614a9f1c9e2 459 /**
AnnaBridge 165:e614a9f1c9e2 460 * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
AnnaBridge 165:e614a9f1c9e2 461 * @rmtoll CR1 RE LL_USART_EnableDirectionRx
AnnaBridge 165:e614a9f1c9e2 462 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 463 * @retval None
AnnaBridge 165:e614a9f1c9e2 464 */
AnnaBridge 165:e614a9f1c9e2 465 __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 466 {
AnnaBridge 165:e614a9f1c9e2 467 SET_BIT(USARTx->CR1, USART_CR1_RE);
AnnaBridge 165:e614a9f1c9e2 468 }
AnnaBridge 165:e614a9f1c9e2 469
AnnaBridge 165:e614a9f1c9e2 470 /**
AnnaBridge 165:e614a9f1c9e2 471 * @brief Receiver Disable
AnnaBridge 165:e614a9f1c9e2 472 * @rmtoll CR1 RE LL_USART_DisableDirectionRx
AnnaBridge 165:e614a9f1c9e2 473 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 474 * @retval None
AnnaBridge 165:e614a9f1c9e2 475 */
AnnaBridge 165:e614a9f1c9e2 476 __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 477 {
AnnaBridge 165:e614a9f1c9e2 478 CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
AnnaBridge 165:e614a9f1c9e2 479 }
AnnaBridge 165:e614a9f1c9e2 480
AnnaBridge 165:e614a9f1c9e2 481 /**
AnnaBridge 165:e614a9f1c9e2 482 * @brief Transmitter Enable
AnnaBridge 165:e614a9f1c9e2 483 * @rmtoll CR1 TE LL_USART_EnableDirectionTx
AnnaBridge 165:e614a9f1c9e2 484 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 485 * @retval None
AnnaBridge 165:e614a9f1c9e2 486 */
AnnaBridge 165:e614a9f1c9e2 487 __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 488 {
AnnaBridge 165:e614a9f1c9e2 489 SET_BIT(USARTx->CR1, USART_CR1_TE);
AnnaBridge 165:e614a9f1c9e2 490 }
AnnaBridge 165:e614a9f1c9e2 491
AnnaBridge 165:e614a9f1c9e2 492 /**
AnnaBridge 165:e614a9f1c9e2 493 * @brief Transmitter Disable
AnnaBridge 165:e614a9f1c9e2 494 * @rmtoll CR1 TE LL_USART_DisableDirectionTx
AnnaBridge 165:e614a9f1c9e2 495 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 496 * @retval None
AnnaBridge 165:e614a9f1c9e2 497 */
AnnaBridge 165:e614a9f1c9e2 498 __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 499 {
AnnaBridge 165:e614a9f1c9e2 500 CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
AnnaBridge 165:e614a9f1c9e2 501 }
AnnaBridge 165:e614a9f1c9e2 502
AnnaBridge 165:e614a9f1c9e2 503 /**
AnnaBridge 165:e614a9f1c9e2 504 * @brief Configure simultaneously enabled/disabled states
AnnaBridge 165:e614a9f1c9e2 505 * of Transmitter and Receiver
AnnaBridge 165:e614a9f1c9e2 506 * @rmtoll CR1 RE LL_USART_SetTransferDirection\n
AnnaBridge 165:e614a9f1c9e2 507 * CR1 TE LL_USART_SetTransferDirection
AnnaBridge 165:e614a9f1c9e2 508 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 509 * @param TransferDirection This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 510 * @arg @ref LL_USART_DIRECTION_NONE
AnnaBridge 165:e614a9f1c9e2 511 * @arg @ref LL_USART_DIRECTION_RX
AnnaBridge 165:e614a9f1c9e2 512 * @arg @ref LL_USART_DIRECTION_TX
AnnaBridge 165:e614a9f1c9e2 513 * @arg @ref LL_USART_DIRECTION_TX_RX
AnnaBridge 165:e614a9f1c9e2 514 * @retval None
AnnaBridge 165:e614a9f1c9e2 515 */
AnnaBridge 165:e614a9f1c9e2 516 __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
AnnaBridge 165:e614a9f1c9e2 517 {
AnnaBridge 165:e614a9f1c9e2 518 MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
AnnaBridge 165:e614a9f1c9e2 519 }
AnnaBridge 165:e614a9f1c9e2 520
AnnaBridge 165:e614a9f1c9e2 521 /**
AnnaBridge 165:e614a9f1c9e2 522 * @brief Return enabled/disabled states of Transmitter and Receiver
AnnaBridge 165:e614a9f1c9e2 523 * @rmtoll CR1 RE LL_USART_GetTransferDirection\n
AnnaBridge 165:e614a9f1c9e2 524 * CR1 TE LL_USART_GetTransferDirection
AnnaBridge 165:e614a9f1c9e2 525 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 526 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 527 * @arg @ref LL_USART_DIRECTION_NONE
AnnaBridge 165:e614a9f1c9e2 528 * @arg @ref LL_USART_DIRECTION_RX
AnnaBridge 165:e614a9f1c9e2 529 * @arg @ref LL_USART_DIRECTION_TX
AnnaBridge 165:e614a9f1c9e2 530 * @arg @ref LL_USART_DIRECTION_TX_RX
AnnaBridge 165:e614a9f1c9e2 531 */
AnnaBridge 165:e614a9f1c9e2 532 __STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 533 {
AnnaBridge 165:e614a9f1c9e2 534 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
AnnaBridge 165:e614a9f1c9e2 535 }
AnnaBridge 165:e614a9f1c9e2 536
AnnaBridge 165:e614a9f1c9e2 537 /**
AnnaBridge 165:e614a9f1c9e2 538 * @brief Configure Parity (enabled/disabled and parity mode if enabled).
AnnaBridge 165:e614a9f1c9e2 539 * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 540 * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
AnnaBridge 165:e614a9f1c9e2 541 * (9th or 8th bit depending on data width) and parity is checked on the received data.
AnnaBridge 165:e614a9f1c9e2 542 * @rmtoll CR1 PS LL_USART_SetParity\n
AnnaBridge 165:e614a9f1c9e2 543 * CR1 PCE LL_USART_SetParity
AnnaBridge 165:e614a9f1c9e2 544 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 545 * @param Parity This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 546 * @arg @ref LL_USART_PARITY_NONE
AnnaBridge 165:e614a9f1c9e2 547 * @arg @ref LL_USART_PARITY_EVEN
AnnaBridge 165:e614a9f1c9e2 548 * @arg @ref LL_USART_PARITY_ODD
AnnaBridge 165:e614a9f1c9e2 549 * @retval None
AnnaBridge 165:e614a9f1c9e2 550 */
AnnaBridge 165:e614a9f1c9e2 551 __STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
AnnaBridge 165:e614a9f1c9e2 552 {
AnnaBridge 165:e614a9f1c9e2 553 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
AnnaBridge 165:e614a9f1c9e2 554 }
AnnaBridge 165:e614a9f1c9e2 555
AnnaBridge 165:e614a9f1c9e2 556 /**
AnnaBridge 165:e614a9f1c9e2 557 * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
AnnaBridge 165:e614a9f1c9e2 558 * @rmtoll CR1 PS LL_USART_GetParity\n
AnnaBridge 165:e614a9f1c9e2 559 * CR1 PCE LL_USART_GetParity
AnnaBridge 165:e614a9f1c9e2 560 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 561 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 562 * @arg @ref LL_USART_PARITY_NONE
AnnaBridge 165:e614a9f1c9e2 563 * @arg @ref LL_USART_PARITY_EVEN
AnnaBridge 165:e614a9f1c9e2 564 * @arg @ref LL_USART_PARITY_ODD
AnnaBridge 165:e614a9f1c9e2 565 */
AnnaBridge 165:e614a9f1c9e2 566 __STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 567 {
AnnaBridge 165:e614a9f1c9e2 568 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
AnnaBridge 165:e614a9f1c9e2 569 }
AnnaBridge 165:e614a9f1c9e2 570
AnnaBridge 165:e614a9f1c9e2 571 /**
AnnaBridge 165:e614a9f1c9e2 572 * @brief Set Receiver Wake Up method from Mute mode.
AnnaBridge 165:e614a9f1c9e2 573 * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
AnnaBridge 165:e614a9f1c9e2 574 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 575 * @param Method This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 576 * @arg @ref LL_USART_WAKEUP_IDLELINE
AnnaBridge 165:e614a9f1c9e2 577 * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
AnnaBridge 165:e614a9f1c9e2 578 * @retval None
AnnaBridge 165:e614a9f1c9e2 579 */
AnnaBridge 165:e614a9f1c9e2 580 __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
AnnaBridge 165:e614a9f1c9e2 581 {
AnnaBridge 165:e614a9f1c9e2 582 MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
AnnaBridge 165:e614a9f1c9e2 583 }
AnnaBridge 165:e614a9f1c9e2 584
AnnaBridge 165:e614a9f1c9e2 585 /**
AnnaBridge 165:e614a9f1c9e2 586 * @brief Return Receiver Wake Up method from Mute mode
AnnaBridge 165:e614a9f1c9e2 587 * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod
AnnaBridge 165:e614a9f1c9e2 588 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 589 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 590 * @arg @ref LL_USART_WAKEUP_IDLELINE
AnnaBridge 165:e614a9f1c9e2 591 * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
AnnaBridge 165:e614a9f1c9e2 592 */
AnnaBridge 165:e614a9f1c9e2 593 __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 594 {
AnnaBridge 165:e614a9f1c9e2 595 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
AnnaBridge 165:e614a9f1c9e2 596 }
AnnaBridge 165:e614a9f1c9e2 597
AnnaBridge 165:e614a9f1c9e2 598 /**
AnnaBridge 165:e614a9f1c9e2 599 * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits)
AnnaBridge 165:e614a9f1c9e2 600 * @rmtoll CR1 M LL_USART_SetDataWidth
AnnaBridge 165:e614a9f1c9e2 601 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 602 * @param DataWidth This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 603 * @arg @ref LL_USART_DATAWIDTH_8B
AnnaBridge 165:e614a9f1c9e2 604 * @arg @ref LL_USART_DATAWIDTH_9B
AnnaBridge 165:e614a9f1c9e2 605 * @retval None
AnnaBridge 165:e614a9f1c9e2 606 */
AnnaBridge 165:e614a9f1c9e2 607 __STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
AnnaBridge 165:e614a9f1c9e2 608 {
AnnaBridge 165:e614a9f1c9e2 609 MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
AnnaBridge 165:e614a9f1c9e2 610 }
AnnaBridge 165:e614a9f1c9e2 611
AnnaBridge 165:e614a9f1c9e2 612 /**
AnnaBridge 165:e614a9f1c9e2 613 * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
AnnaBridge 165:e614a9f1c9e2 614 * @rmtoll CR1 M LL_USART_GetDataWidth
AnnaBridge 165:e614a9f1c9e2 615 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 616 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 617 * @arg @ref LL_USART_DATAWIDTH_8B
AnnaBridge 165:e614a9f1c9e2 618 * @arg @ref LL_USART_DATAWIDTH_9B
AnnaBridge 165:e614a9f1c9e2 619 */
AnnaBridge 165:e614a9f1c9e2 620 __STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 621 {
AnnaBridge 165:e614a9f1c9e2 622 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
AnnaBridge 165:e614a9f1c9e2 623 }
AnnaBridge 165:e614a9f1c9e2 624
AnnaBridge 165:e614a9f1c9e2 625 #if defined(USART_CR1_OVER8)
AnnaBridge 165:e614a9f1c9e2 626 /**
AnnaBridge 165:e614a9f1c9e2 627 * @brief Set Oversampling to 8-bit or 16-bit mode
AnnaBridge 165:e614a9f1c9e2 628 * @rmtoll CR1 OVER8 LL_USART_SetOverSampling
AnnaBridge 165:e614a9f1c9e2 629 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 630 * @param OverSampling This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 631 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 165:e614a9f1c9e2 632 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 165:e614a9f1c9e2 633 * @retval None
AnnaBridge 165:e614a9f1c9e2 634 */
AnnaBridge 165:e614a9f1c9e2 635 __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
AnnaBridge 165:e614a9f1c9e2 636 {
AnnaBridge 165:e614a9f1c9e2 637 MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
AnnaBridge 165:e614a9f1c9e2 638 }
AnnaBridge 165:e614a9f1c9e2 639
AnnaBridge 165:e614a9f1c9e2 640 /**
AnnaBridge 165:e614a9f1c9e2 641 * @brief Return Oversampling mode
AnnaBridge 165:e614a9f1c9e2 642 * @rmtoll CR1 OVER8 LL_USART_GetOverSampling
AnnaBridge 165:e614a9f1c9e2 643 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 644 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 645 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 165:e614a9f1c9e2 646 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 165:e614a9f1c9e2 647 */
AnnaBridge 165:e614a9f1c9e2 648 __STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 649 {
AnnaBridge 165:e614a9f1c9e2 650 return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
AnnaBridge 165:e614a9f1c9e2 651 }
AnnaBridge 165:e614a9f1c9e2 652
AnnaBridge 165:e614a9f1c9e2 653 #endif /* USART_OverSampling_Feature */
AnnaBridge 165:e614a9f1c9e2 654 /**
AnnaBridge 165:e614a9f1c9e2 655 * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
AnnaBridge 165:e614a9f1c9e2 656 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 657 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 658 * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
AnnaBridge 165:e614a9f1c9e2 659 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 660 * @param LastBitClockPulse This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 661 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
AnnaBridge 165:e614a9f1c9e2 662 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
AnnaBridge 165:e614a9f1c9e2 663 * @retval None
AnnaBridge 165:e614a9f1c9e2 664 */
AnnaBridge 165:e614a9f1c9e2 665 __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
AnnaBridge 165:e614a9f1c9e2 666 {
AnnaBridge 165:e614a9f1c9e2 667 MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
AnnaBridge 165:e614a9f1c9e2 668 }
AnnaBridge 165:e614a9f1c9e2 669
AnnaBridge 165:e614a9f1c9e2 670 /**
AnnaBridge 165:e614a9f1c9e2 671 * @brief Retrieve Clock pulse of the last data bit output configuration
AnnaBridge 165:e614a9f1c9e2 672 * (Last bit Clock pulse output to the SCLK pin or not)
AnnaBridge 165:e614a9f1c9e2 673 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 674 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 675 * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
AnnaBridge 165:e614a9f1c9e2 676 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 677 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 678 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
AnnaBridge 165:e614a9f1c9e2 679 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
AnnaBridge 165:e614a9f1c9e2 680 */
AnnaBridge 165:e614a9f1c9e2 681 __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 682 {
AnnaBridge 165:e614a9f1c9e2 683 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
AnnaBridge 165:e614a9f1c9e2 684 }
AnnaBridge 165:e614a9f1c9e2 685
AnnaBridge 165:e614a9f1c9e2 686 /**
AnnaBridge 165:e614a9f1c9e2 687 * @brief Select the phase of the clock output on the SCLK pin in synchronous mode
AnnaBridge 165:e614a9f1c9e2 688 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 689 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 690 * @rmtoll CR2 CPHA LL_USART_SetClockPhase
AnnaBridge 165:e614a9f1c9e2 691 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 692 * @param ClockPhase This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 693 * @arg @ref LL_USART_PHASE_1EDGE
AnnaBridge 165:e614a9f1c9e2 694 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 165:e614a9f1c9e2 695 * @retval None
AnnaBridge 165:e614a9f1c9e2 696 */
AnnaBridge 165:e614a9f1c9e2 697 __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
AnnaBridge 165:e614a9f1c9e2 698 {
AnnaBridge 165:e614a9f1c9e2 699 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
AnnaBridge 165:e614a9f1c9e2 700 }
AnnaBridge 165:e614a9f1c9e2 701
AnnaBridge 165:e614a9f1c9e2 702 /**
AnnaBridge 165:e614a9f1c9e2 703 * @brief Return phase of the clock output on the SCLK pin in synchronous mode
AnnaBridge 165:e614a9f1c9e2 704 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 705 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 706 * @rmtoll CR2 CPHA LL_USART_GetClockPhase
AnnaBridge 165:e614a9f1c9e2 707 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 708 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 709 * @arg @ref LL_USART_PHASE_1EDGE
AnnaBridge 165:e614a9f1c9e2 710 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 165:e614a9f1c9e2 711 */
AnnaBridge 165:e614a9f1c9e2 712 __STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 713 {
AnnaBridge 165:e614a9f1c9e2 714 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
AnnaBridge 165:e614a9f1c9e2 715 }
AnnaBridge 165:e614a9f1c9e2 716
AnnaBridge 165:e614a9f1c9e2 717 /**
AnnaBridge 165:e614a9f1c9e2 718 * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
AnnaBridge 165:e614a9f1c9e2 719 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 720 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 721 * @rmtoll CR2 CPOL LL_USART_SetClockPolarity
AnnaBridge 165:e614a9f1c9e2 722 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 723 * @param ClockPolarity This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 724 * @arg @ref LL_USART_POLARITY_LOW
AnnaBridge 165:e614a9f1c9e2 725 * @arg @ref LL_USART_POLARITY_HIGH
AnnaBridge 165:e614a9f1c9e2 726 * @retval None
AnnaBridge 165:e614a9f1c9e2 727 */
AnnaBridge 165:e614a9f1c9e2 728 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
AnnaBridge 165:e614a9f1c9e2 729 {
AnnaBridge 165:e614a9f1c9e2 730 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
AnnaBridge 165:e614a9f1c9e2 731 }
AnnaBridge 165:e614a9f1c9e2 732
AnnaBridge 165:e614a9f1c9e2 733 /**
AnnaBridge 165:e614a9f1c9e2 734 * @brief Return polarity of the clock output on the SCLK pin in synchronous mode
AnnaBridge 165:e614a9f1c9e2 735 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 736 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 737 * @rmtoll CR2 CPOL LL_USART_GetClockPolarity
AnnaBridge 165:e614a9f1c9e2 738 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 739 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 740 * @arg @ref LL_USART_POLARITY_LOW
AnnaBridge 165:e614a9f1c9e2 741 * @arg @ref LL_USART_POLARITY_HIGH
AnnaBridge 165:e614a9f1c9e2 742 */
AnnaBridge 165:e614a9f1c9e2 743 __STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 744 {
AnnaBridge 165:e614a9f1c9e2 745 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
AnnaBridge 165:e614a9f1c9e2 746 }
AnnaBridge 165:e614a9f1c9e2 747
AnnaBridge 165:e614a9f1c9e2 748 /**
AnnaBridge 165:e614a9f1c9e2 749 * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
AnnaBridge 165:e614a9f1c9e2 750 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 751 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 752 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 165:e614a9f1c9e2 753 * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
AnnaBridge 165:e614a9f1c9e2 754 * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
AnnaBridge 165:e614a9f1c9e2 755 * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
AnnaBridge 165:e614a9f1c9e2 756 * @rmtoll CR2 CPHA LL_USART_ConfigClock\n
AnnaBridge 165:e614a9f1c9e2 757 * CR2 CPOL LL_USART_ConfigClock\n
AnnaBridge 165:e614a9f1c9e2 758 * CR2 LBCL LL_USART_ConfigClock
AnnaBridge 165:e614a9f1c9e2 759 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 760 * @param Phase This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 761 * @arg @ref LL_USART_PHASE_1EDGE
AnnaBridge 165:e614a9f1c9e2 762 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 165:e614a9f1c9e2 763 * @param Polarity This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 764 * @arg @ref LL_USART_POLARITY_LOW
AnnaBridge 165:e614a9f1c9e2 765 * @arg @ref LL_USART_POLARITY_HIGH
AnnaBridge 165:e614a9f1c9e2 766 * @param LBCPOutput This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 767 * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
AnnaBridge 165:e614a9f1c9e2 768 * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
AnnaBridge 165:e614a9f1c9e2 769 * @retval None
AnnaBridge 165:e614a9f1c9e2 770 */
AnnaBridge 165:e614a9f1c9e2 771 __STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
AnnaBridge 165:e614a9f1c9e2 772 {
AnnaBridge 165:e614a9f1c9e2 773 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
AnnaBridge 165:e614a9f1c9e2 774 }
AnnaBridge 165:e614a9f1c9e2 775
AnnaBridge 165:e614a9f1c9e2 776 /**
AnnaBridge 165:e614a9f1c9e2 777 * @brief Enable Clock output on SCLK pin
AnnaBridge 165:e614a9f1c9e2 778 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 779 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 780 * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
AnnaBridge 165:e614a9f1c9e2 781 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 782 * @retval None
AnnaBridge 165:e614a9f1c9e2 783 */
AnnaBridge 165:e614a9f1c9e2 784 __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 785 {
AnnaBridge 165:e614a9f1c9e2 786 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
AnnaBridge 165:e614a9f1c9e2 787 }
AnnaBridge 165:e614a9f1c9e2 788
AnnaBridge 165:e614a9f1c9e2 789 /**
AnnaBridge 165:e614a9f1c9e2 790 * @brief Disable Clock output on SCLK pin
AnnaBridge 165:e614a9f1c9e2 791 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 792 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 793 * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
AnnaBridge 165:e614a9f1c9e2 794 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 795 * @retval None
AnnaBridge 165:e614a9f1c9e2 796 */
AnnaBridge 165:e614a9f1c9e2 797 __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 798 {
AnnaBridge 165:e614a9f1c9e2 799 CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
AnnaBridge 165:e614a9f1c9e2 800 }
AnnaBridge 165:e614a9f1c9e2 801
AnnaBridge 165:e614a9f1c9e2 802 /**
AnnaBridge 165:e614a9f1c9e2 803 * @brief Indicate if Clock output on SCLK pin is enabled
AnnaBridge 165:e614a9f1c9e2 804 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 805 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 806 * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
AnnaBridge 165:e614a9f1c9e2 807 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 808 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 809 */
AnnaBridge 165:e614a9f1c9e2 810 __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 811 {
AnnaBridge 165:e614a9f1c9e2 812 return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
AnnaBridge 165:e614a9f1c9e2 813 }
AnnaBridge 165:e614a9f1c9e2 814
AnnaBridge 165:e614a9f1c9e2 815 /**
AnnaBridge 165:e614a9f1c9e2 816 * @brief Set the length of the stop bits
AnnaBridge 165:e614a9f1c9e2 817 * @rmtoll CR2 STOP LL_USART_SetStopBitsLength
AnnaBridge 165:e614a9f1c9e2 818 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 819 * @param StopBits This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 820 * @arg @ref LL_USART_STOPBITS_0_5
AnnaBridge 165:e614a9f1c9e2 821 * @arg @ref LL_USART_STOPBITS_1
AnnaBridge 165:e614a9f1c9e2 822 * @arg @ref LL_USART_STOPBITS_1_5
AnnaBridge 165:e614a9f1c9e2 823 * @arg @ref LL_USART_STOPBITS_2
AnnaBridge 165:e614a9f1c9e2 824 * @retval None
AnnaBridge 165:e614a9f1c9e2 825 */
AnnaBridge 165:e614a9f1c9e2 826 __STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
AnnaBridge 165:e614a9f1c9e2 827 {
AnnaBridge 165:e614a9f1c9e2 828 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
AnnaBridge 165:e614a9f1c9e2 829 }
AnnaBridge 165:e614a9f1c9e2 830
AnnaBridge 165:e614a9f1c9e2 831 /**
AnnaBridge 165:e614a9f1c9e2 832 * @brief Retrieve the length of the stop bits
AnnaBridge 165:e614a9f1c9e2 833 * @rmtoll CR2 STOP LL_USART_GetStopBitsLength
AnnaBridge 165:e614a9f1c9e2 834 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 835 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 836 * @arg @ref LL_USART_STOPBITS_0_5
AnnaBridge 165:e614a9f1c9e2 837 * @arg @ref LL_USART_STOPBITS_1
AnnaBridge 165:e614a9f1c9e2 838 * @arg @ref LL_USART_STOPBITS_1_5
AnnaBridge 165:e614a9f1c9e2 839 * @arg @ref LL_USART_STOPBITS_2
AnnaBridge 165:e614a9f1c9e2 840 */
AnnaBridge 165:e614a9f1c9e2 841 __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 842 {
AnnaBridge 165:e614a9f1c9e2 843 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
AnnaBridge 165:e614a9f1c9e2 844 }
AnnaBridge 165:e614a9f1c9e2 845
AnnaBridge 165:e614a9f1c9e2 846 /**
AnnaBridge 165:e614a9f1c9e2 847 * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
AnnaBridge 165:e614a9f1c9e2 848 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 165:e614a9f1c9e2 849 * - Data Width configuration using @ref LL_USART_SetDataWidth() function
AnnaBridge 165:e614a9f1c9e2 850 * - Parity Control and mode configuration using @ref LL_USART_SetParity() function
AnnaBridge 165:e614a9f1c9e2 851 * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 165:e614a9f1c9e2 852 * @rmtoll CR1 PS LL_USART_ConfigCharacter\n
AnnaBridge 165:e614a9f1c9e2 853 * CR1 PCE LL_USART_ConfigCharacter\n
AnnaBridge 165:e614a9f1c9e2 854 * CR1 M LL_USART_ConfigCharacter\n
AnnaBridge 165:e614a9f1c9e2 855 * CR2 STOP LL_USART_ConfigCharacter
AnnaBridge 165:e614a9f1c9e2 856 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 857 * @param DataWidth This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 858 * @arg @ref LL_USART_DATAWIDTH_8B
AnnaBridge 165:e614a9f1c9e2 859 * @arg @ref LL_USART_DATAWIDTH_9B
AnnaBridge 165:e614a9f1c9e2 860 * @param Parity This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 861 * @arg @ref LL_USART_PARITY_NONE
AnnaBridge 165:e614a9f1c9e2 862 * @arg @ref LL_USART_PARITY_EVEN
AnnaBridge 165:e614a9f1c9e2 863 * @arg @ref LL_USART_PARITY_ODD
AnnaBridge 165:e614a9f1c9e2 864 * @param StopBits This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 865 * @arg @ref LL_USART_STOPBITS_0_5
AnnaBridge 165:e614a9f1c9e2 866 * @arg @ref LL_USART_STOPBITS_1
AnnaBridge 165:e614a9f1c9e2 867 * @arg @ref LL_USART_STOPBITS_1_5
AnnaBridge 165:e614a9f1c9e2 868 * @arg @ref LL_USART_STOPBITS_2
AnnaBridge 165:e614a9f1c9e2 869 * @retval None
AnnaBridge 165:e614a9f1c9e2 870 */
AnnaBridge 165:e614a9f1c9e2 871 __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
AnnaBridge 165:e614a9f1c9e2 872 uint32_t StopBits)
AnnaBridge 165:e614a9f1c9e2 873 {
AnnaBridge 165:e614a9f1c9e2 874 MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
AnnaBridge 165:e614a9f1c9e2 875 MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
AnnaBridge 165:e614a9f1c9e2 876 }
AnnaBridge 165:e614a9f1c9e2 877
AnnaBridge 165:e614a9f1c9e2 878 /**
AnnaBridge 165:e614a9f1c9e2 879 * @brief Set Address of the USART node.
AnnaBridge 165:e614a9f1c9e2 880 * @note This is used in multiprocessor communication during Mute mode or Stop mode,
AnnaBridge 165:e614a9f1c9e2 881 * for wake up with address mark detection.
AnnaBridge 165:e614a9f1c9e2 882 * @rmtoll CR2 ADD LL_USART_SetNodeAddress
AnnaBridge 165:e614a9f1c9e2 883 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 884 * @param NodeAddress 4 bit Address of the USART node.
AnnaBridge 165:e614a9f1c9e2 885 * @retval None
AnnaBridge 165:e614a9f1c9e2 886 */
AnnaBridge 165:e614a9f1c9e2 887 __STATIC_INLINE void LL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t NodeAddress)
AnnaBridge 165:e614a9f1c9e2 888 {
AnnaBridge 165:e614a9f1c9e2 889 MODIFY_REG(USARTx->CR2, USART_CR2_ADD, (NodeAddress & USART_CR2_ADD));
AnnaBridge 165:e614a9f1c9e2 890 }
AnnaBridge 165:e614a9f1c9e2 891
AnnaBridge 165:e614a9f1c9e2 892 /**
AnnaBridge 165:e614a9f1c9e2 893 * @brief Return 4 bit Address of the USART node as set in ADD field of CR2.
AnnaBridge 165:e614a9f1c9e2 894 * @note only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
AnnaBridge 165:e614a9f1c9e2 895 * @rmtoll CR2 ADD LL_USART_GetNodeAddress
AnnaBridge 165:e614a9f1c9e2 896 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 897 * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
AnnaBridge 165:e614a9f1c9e2 898 */
AnnaBridge 165:e614a9f1c9e2 899 __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 900 {
AnnaBridge 165:e614a9f1c9e2 901 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD));
AnnaBridge 165:e614a9f1c9e2 902 }
AnnaBridge 165:e614a9f1c9e2 903
AnnaBridge 165:e614a9f1c9e2 904 /**
AnnaBridge 165:e614a9f1c9e2 905 * @brief Enable RTS HW Flow Control
AnnaBridge 165:e614a9f1c9e2 906 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 907 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 908 * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
AnnaBridge 165:e614a9f1c9e2 909 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 910 * @retval None
AnnaBridge 165:e614a9f1c9e2 911 */
AnnaBridge 165:e614a9f1c9e2 912 __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 913 {
AnnaBridge 165:e614a9f1c9e2 914 SET_BIT(USARTx->CR3, USART_CR3_RTSE);
AnnaBridge 165:e614a9f1c9e2 915 }
AnnaBridge 165:e614a9f1c9e2 916
AnnaBridge 165:e614a9f1c9e2 917 /**
AnnaBridge 165:e614a9f1c9e2 918 * @brief Disable RTS HW Flow Control
AnnaBridge 165:e614a9f1c9e2 919 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 920 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 921 * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
AnnaBridge 165:e614a9f1c9e2 922 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 923 * @retval None
AnnaBridge 165:e614a9f1c9e2 924 */
AnnaBridge 165:e614a9f1c9e2 925 __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 926 {
AnnaBridge 165:e614a9f1c9e2 927 CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
AnnaBridge 165:e614a9f1c9e2 928 }
AnnaBridge 165:e614a9f1c9e2 929
AnnaBridge 165:e614a9f1c9e2 930 /**
AnnaBridge 165:e614a9f1c9e2 931 * @brief Enable CTS HW Flow Control
AnnaBridge 165:e614a9f1c9e2 932 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 933 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 934 * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
AnnaBridge 165:e614a9f1c9e2 935 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 936 * @retval None
AnnaBridge 165:e614a9f1c9e2 937 */
AnnaBridge 165:e614a9f1c9e2 938 __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 939 {
AnnaBridge 165:e614a9f1c9e2 940 SET_BIT(USARTx->CR3, USART_CR3_CTSE);
AnnaBridge 165:e614a9f1c9e2 941 }
AnnaBridge 165:e614a9f1c9e2 942
AnnaBridge 165:e614a9f1c9e2 943 /**
AnnaBridge 165:e614a9f1c9e2 944 * @brief Disable CTS HW Flow Control
AnnaBridge 165:e614a9f1c9e2 945 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 946 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 947 * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
AnnaBridge 165:e614a9f1c9e2 948 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 949 * @retval None
AnnaBridge 165:e614a9f1c9e2 950 */
AnnaBridge 165:e614a9f1c9e2 951 __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 952 {
AnnaBridge 165:e614a9f1c9e2 953 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
AnnaBridge 165:e614a9f1c9e2 954 }
AnnaBridge 165:e614a9f1c9e2 955
AnnaBridge 165:e614a9f1c9e2 956 /**
AnnaBridge 165:e614a9f1c9e2 957 * @brief Configure HW Flow Control mode (both CTS and RTS)
AnnaBridge 165:e614a9f1c9e2 958 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 959 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 960 * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
AnnaBridge 165:e614a9f1c9e2 961 * CR3 CTSE LL_USART_SetHWFlowCtrl
AnnaBridge 165:e614a9f1c9e2 962 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 963 * @param HardwareFlowControl This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 964 * @arg @ref LL_USART_HWCONTROL_NONE
AnnaBridge 165:e614a9f1c9e2 965 * @arg @ref LL_USART_HWCONTROL_RTS
AnnaBridge 165:e614a9f1c9e2 966 * @arg @ref LL_USART_HWCONTROL_CTS
AnnaBridge 165:e614a9f1c9e2 967 * @arg @ref LL_USART_HWCONTROL_RTS_CTS
AnnaBridge 165:e614a9f1c9e2 968 * @retval None
AnnaBridge 165:e614a9f1c9e2 969 */
AnnaBridge 165:e614a9f1c9e2 970 __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
AnnaBridge 165:e614a9f1c9e2 971 {
AnnaBridge 165:e614a9f1c9e2 972 MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
AnnaBridge 165:e614a9f1c9e2 973 }
AnnaBridge 165:e614a9f1c9e2 974
AnnaBridge 165:e614a9f1c9e2 975 /**
AnnaBridge 165:e614a9f1c9e2 976 * @brief Return HW Flow Control configuration (both CTS and RTS)
AnnaBridge 165:e614a9f1c9e2 977 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 978 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 979 * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
AnnaBridge 165:e614a9f1c9e2 980 * CR3 CTSE LL_USART_GetHWFlowCtrl
AnnaBridge 165:e614a9f1c9e2 981 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 982 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 983 * @arg @ref LL_USART_HWCONTROL_NONE
AnnaBridge 165:e614a9f1c9e2 984 * @arg @ref LL_USART_HWCONTROL_RTS
AnnaBridge 165:e614a9f1c9e2 985 * @arg @ref LL_USART_HWCONTROL_CTS
AnnaBridge 165:e614a9f1c9e2 986 * @arg @ref LL_USART_HWCONTROL_RTS_CTS
AnnaBridge 165:e614a9f1c9e2 987 */
AnnaBridge 165:e614a9f1c9e2 988 __STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 989 {
AnnaBridge 165:e614a9f1c9e2 990 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
AnnaBridge 165:e614a9f1c9e2 991 }
AnnaBridge 165:e614a9f1c9e2 992
AnnaBridge 165:e614a9f1c9e2 993 #if defined(USART_CR3_ONEBIT)
AnnaBridge 165:e614a9f1c9e2 994 /**
AnnaBridge 165:e614a9f1c9e2 995 * @brief Enable One bit sampling method
AnnaBridge 165:e614a9f1c9e2 996 * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp
AnnaBridge 165:e614a9f1c9e2 997 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 998 * @retval None
AnnaBridge 165:e614a9f1c9e2 999 */
AnnaBridge 165:e614a9f1c9e2 1000 __STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1001 {
AnnaBridge 165:e614a9f1c9e2 1002 SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
AnnaBridge 165:e614a9f1c9e2 1003 }
AnnaBridge 165:e614a9f1c9e2 1004
AnnaBridge 165:e614a9f1c9e2 1005 /**
AnnaBridge 165:e614a9f1c9e2 1006 * @brief Disable One bit sampling method
AnnaBridge 165:e614a9f1c9e2 1007 * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp
AnnaBridge 165:e614a9f1c9e2 1008 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1009 * @retval None
AnnaBridge 165:e614a9f1c9e2 1010 */
AnnaBridge 165:e614a9f1c9e2 1011 __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1012 {
AnnaBridge 165:e614a9f1c9e2 1013 CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
AnnaBridge 165:e614a9f1c9e2 1014 }
AnnaBridge 165:e614a9f1c9e2 1015
AnnaBridge 165:e614a9f1c9e2 1016 /**
AnnaBridge 165:e614a9f1c9e2 1017 * @brief Indicate if One bit sampling method is enabled
AnnaBridge 165:e614a9f1c9e2 1018 * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp
AnnaBridge 165:e614a9f1c9e2 1019 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1020 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1021 */
AnnaBridge 165:e614a9f1c9e2 1022 __STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1023 {
AnnaBridge 165:e614a9f1c9e2 1024 return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
AnnaBridge 165:e614a9f1c9e2 1025 }
AnnaBridge 165:e614a9f1c9e2 1026 #endif /* USART_OneBitSampling_Feature */
AnnaBridge 165:e614a9f1c9e2 1027
AnnaBridge 165:e614a9f1c9e2 1028 #if defined(USART_CR1_OVER8)
AnnaBridge 165:e614a9f1c9e2 1029 /**
AnnaBridge 165:e614a9f1c9e2 1030 * @brief Configure USART BRR register for achieving expected Baud Rate value.
AnnaBridge 165:e614a9f1c9e2 1031 * @note Compute and set USARTDIV value in BRR Register (full BRR content)
AnnaBridge 165:e614a9f1c9e2 1032 * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
AnnaBridge 165:e614a9f1c9e2 1033 * @note Peripheral clock and Baud rate values provided as function parameters should be valid
AnnaBridge 165:e614a9f1c9e2 1034 * (Baud rate value != 0)
AnnaBridge 165:e614a9f1c9e2 1035 * @rmtoll BRR BRR LL_USART_SetBaudRate
AnnaBridge 165:e614a9f1c9e2 1036 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1037 * @param PeriphClk Peripheral Clock
AnnaBridge 165:e614a9f1c9e2 1038 * @param OverSampling This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 1039 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 165:e614a9f1c9e2 1040 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 165:e614a9f1c9e2 1041 * @param BaudRate Baud Rate
AnnaBridge 165:e614a9f1c9e2 1042 * @retval None
AnnaBridge 165:e614a9f1c9e2 1043 */
AnnaBridge 165:e614a9f1c9e2 1044 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
AnnaBridge 165:e614a9f1c9e2 1045 uint32_t BaudRate)
AnnaBridge 165:e614a9f1c9e2 1046 {
AnnaBridge 165:e614a9f1c9e2 1047 if (OverSampling == LL_USART_OVERSAMPLING_8)
AnnaBridge 165:e614a9f1c9e2 1048 {
AnnaBridge 165:e614a9f1c9e2 1049 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
AnnaBridge 165:e614a9f1c9e2 1050 }
AnnaBridge 165:e614a9f1c9e2 1051 else
AnnaBridge 165:e614a9f1c9e2 1052 {
AnnaBridge 165:e614a9f1c9e2 1053 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
AnnaBridge 165:e614a9f1c9e2 1054 }
AnnaBridge 165:e614a9f1c9e2 1055 }
AnnaBridge 165:e614a9f1c9e2 1056
AnnaBridge 165:e614a9f1c9e2 1057 /**
AnnaBridge 165:e614a9f1c9e2 1058 * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
AnnaBridge 165:e614a9f1c9e2 1059 * (full BRR content), and to used Peripheral Clock and Oversampling mode values
AnnaBridge 165:e614a9f1c9e2 1060 * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
AnnaBridge 165:e614a9f1c9e2 1061 * @rmtoll BRR BRR LL_USART_GetBaudRate
AnnaBridge 165:e614a9f1c9e2 1062 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1063 * @param PeriphClk Peripheral Clock
AnnaBridge 165:e614a9f1c9e2 1064 * @param OverSampling This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 1065 * @arg @ref LL_USART_OVERSAMPLING_16
AnnaBridge 165:e614a9f1c9e2 1066 * @arg @ref LL_USART_OVERSAMPLING_8
AnnaBridge 165:e614a9f1c9e2 1067 * @retval Baud Rate
AnnaBridge 165:e614a9f1c9e2 1068 */
AnnaBridge 165:e614a9f1c9e2 1069 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
AnnaBridge 165:e614a9f1c9e2 1070 {
AnnaBridge 165:e614a9f1c9e2 1071 register uint32_t usartdiv = 0x0U;
AnnaBridge 165:e614a9f1c9e2 1072 register uint32_t brrresult = 0x0U;
AnnaBridge 165:e614a9f1c9e2 1073
AnnaBridge 165:e614a9f1c9e2 1074 usartdiv = USARTx->BRR;
AnnaBridge 165:e614a9f1c9e2 1075
AnnaBridge 165:e614a9f1c9e2 1076 if (OverSampling == LL_USART_OVERSAMPLING_8)
AnnaBridge 165:e614a9f1c9e2 1077 {
AnnaBridge 165:e614a9f1c9e2 1078 if ((usartdiv & 0xFFF7U) != 0U)
AnnaBridge 165:e614a9f1c9e2 1079 {
AnnaBridge 165:e614a9f1c9e2 1080 usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
AnnaBridge 165:e614a9f1c9e2 1081 brrresult = (PeriphClk * 2U) / usartdiv;
AnnaBridge 165:e614a9f1c9e2 1082 }
AnnaBridge 165:e614a9f1c9e2 1083 }
AnnaBridge 165:e614a9f1c9e2 1084 else
AnnaBridge 165:e614a9f1c9e2 1085 {
AnnaBridge 165:e614a9f1c9e2 1086 if ((usartdiv & 0xFFFFU) != 0U)
AnnaBridge 165:e614a9f1c9e2 1087 {
AnnaBridge 165:e614a9f1c9e2 1088 brrresult = PeriphClk / usartdiv;
AnnaBridge 165:e614a9f1c9e2 1089 }
AnnaBridge 165:e614a9f1c9e2 1090 }
AnnaBridge 165:e614a9f1c9e2 1091 return (brrresult);
AnnaBridge 165:e614a9f1c9e2 1092 }
AnnaBridge 165:e614a9f1c9e2 1093 #else
AnnaBridge 165:e614a9f1c9e2 1094 /**
AnnaBridge 165:e614a9f1c9e2 1095 * @brief Configure USART BRR register for achieving expected Baud Rate value.
AnnaBridge 165:e614a9f1c9e2 1096 * @note Compute and set USARTDIV value in BRR Register (full BRR content)
AnnaBridge 165:e614a9f1c9e2 1097 * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
AnnaBridge 165:e614a9f1c9e2 1098 * @note Peripheral clock and Baud rate values provided as function parameters should be valid
AnnaBridge 165:e614a9f1c9e2 1099 * (Baud rate value != 0)
AnnaBridge 165:e614a9f1c9e2 1100 * @rmtoll BRR BRR LL_USART_SetBaudRate
AnnaBridge 165:e614a9f1c9e2 1101 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1102 * @param PeriphClk Peripheral Clock
AnnaBridge 165:e614a9f1c9e2 1103 * @param BaudRate Baud Rate
AnnaBridge 165:e614a9f1c9e2 1104 * @retval None
AnnaBridge 165:e614a9f1c9e2 1105 */
AnnaBridge 165:e614a9f1c9e2 1106 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t BaudRate)
AnnaBridge 165:e614a9f1c9e2 1107 {
AnnaBridge 165:e614a9f1c9e2 1108 USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
AnnaBridge 165:e614a9f1c9e2 1109 }
AnnaBridge 165:e614a9f1c9e2 1110
AnnaBridge 165:e614a9f1c9e2 1111 /**
AnnaBridge 165:e614a9f1c9e2 1112 * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
AnnaBridge 165:e614a9f1c9e2 1113 * (full BRR content), and to used Peripheral Clock and Oversampling mode values
AnnaBridge 165:e614a9f1c9e2 1114 * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
AnnaBridge 165:e614a9f1c9e2 1115 * @rmtoll BRR BRR LL_USART_GetBaudRate
AnnaBridge 165:e614a9f1c9e2 1116 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1117 * @param PeriphClk Peripheral Clock
AnnaBridge 165:e614a9f1c9e2 1118 * @retval Baud Rate
AnnaBridge 165:e614a9f1c9e2 1119 */
AnnaBridge 165:e614a9f1c9e2 1120 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk)
AnnaBridge 165:e614a9f1c9e2 1121 {
AnnaBridge 165:e614a9f1c9e2 1122 register uint32_t usartdiv = 0x0U;
AnnaBridge 165:e614a9f1c9e2 1123 register uint32_t brrresult = 0x0U;
AnnaBridge 165:e614a9f1c9e2 1124
AnnaBridge 165:e614a9f1c9e2 1125 usartdiv = USARTx->BRR;
AnnaBridge 165:e614a9f1c9e2 1126
AnnaBridge 165:e614a9f1c9e2 1127 if ((usartdiv & 0xFFFFU) != 0U)
AnnaBridge 165:e614a9f1c9e2 1128 {
AnnaBridge 165:e614a9f1c9e2 1129 brrresult = PeriphClk / usartdiv;
AnnaBridge 165:e614a9f1c9e2 1130 }
AnnaBridge 165:e614a9f1c9e2 1131 return (brrresult);
AnnaBridge 165:e614a9f1c9e2 1132 }
AnnaBridge 165:e614a9f1c9e2 1133 #endif /* USART_OverSampling_Feature */
AnnaBridge 165:e614a9f1c9e2 1134
AnnaBridge 165:e614a9f1c9e2 1135 /**
AnnaBridge 165:e614a9f1c9e2 1136 * @}
AnnaBridge 165:e614a9f1c9e2 1137 */
AnnaBridge 165:e614a9f1c9e2 1138
AnnaBridge 165:e614a9f1c9e2 1139 /** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
AnnaBridge 165:e614a9f1c9e2 1140 * @{
AnnaBridge 165:e614a9f1c9e2 1141 */
AnnaBridge 165:e614a9f1c9e2 1142
AnnaBridge 165:e614a9f1c9e2 1143 /**
AnnaBridge 165:e614a9f1c9e2 1144 * @brief Enable IrDA mode
AnnaBridge 165:e614a9f1c9e2 1145 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1146 * IrDA feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1147 * @rmtoll CR3 IREN LL_USART_EnableIrda
AnnaBridge 165:e614a9f1c9e2 1148 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1149 * @retval None
AnnaBridge 165:e614a9f1c9e2 1150 */
AnnaBridge 165:e614a9f1c9e2 1151 __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1152 {
AnnaBridge 165:e614a9f1c9e2 1153 SET_BIT(USARTx->CR3, USART_CR3_IREN);
AnnaBridge 165:e614a9f1c9e2 1154 }
AnnaBridge 165:e614a9f1c9e2 1155
AnnaBridge 165:e614a9f1c9e2 1156 /**
AnnaBridge 165:e614a9f1c9e2 1157 * @brief Disable IrDA mode
AnnaBridge 165:e614a9f1c9e2 1158 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1159 * IrDA feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1160 * @rmtoll CR3 IREN LL_USART_DisableIrda
AnnaBridge 165:e614a9f1c9e2 1161 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1162 * @retval None
AnnaBridge 165:e614a9f1c9e2 1163 */
AnnaBridge 165:e614a9f1c9e2 1164 __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1165 {
AnnaBridge 165:e614a9f1c9e2 1166 CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
AnnaBridge 165:e614a9f1c9e2 1167 }
AnnaBridge 165:e614a9f1c9e2 1168
AnnaBridge 165:e614a9f1c9e2 1169 /**
AnnaBridge 165:e614a9f1c9e2 1170 * @brief Indicate if IrDA mode is enabled
AnnaBridge 165:e614a9f1c9e2 1171 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1172 * IrDA feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1173 * @rmtoll CR3 IREN LL_USART_IsEnabledIrda
AnnaBridge 165:e614a9f1c9e2 1174 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1175 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1176 */
AnnaBridge 165:e614a9f1c9e2 1177 __STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1178 {
AnnaBridge 165:e614a9f1c9e2 1179 return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
AnnaBridge 165:e614a9f1c9e2 1180 }
AnnaBridge 165:e614a9f1c9e2 1181
AnnaBridge 165:e614a9f1c9e2 1182 /**
AnnaBridge 165:e614a9f1c9e2 1183 * @brief Configure IrDA Power Mode (Normal or Low Power)
AnnaBridge 165:e614a9f1c9e2 1184 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1185 * IrDA feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1186 * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
AnnaBridge 165:e614a9f1c9e2 1187 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1188 * @param PowerMode This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 1189 * @arg @ref LL_USART_IRDA_POWER_NORMAL
AnnaBridge 165:e614a9f1c9e2 1190 * @arg @ref LL_USART_IRDA_POWER_LOW
AnnaBridge 165:e614a9f1c9e2 1191 * @retval None
AnnaBridge 165:e614a9f1c9e2 1192 */
AnnaBridge 165:e614a9f1c9e2 1193 __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
AnnaBridge 165:e614a9f1c9e2 1194 {
AnnaBridge 165:e614a9f1c9e2 1195 MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
AnnaBridge 165:e614a9f1c9e2 1196 }
AnnaBridge 165:e614a9f1c9e2 1197
AnnaBridge 165:e614a9f1c9e2 1198 /**
AnnaBridge 165:e614a9f1c9e2 1199 * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
AnnaBridge 165:e614a9f1c9e2 1200 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1201 * IrDA feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1202 * @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
AnnaBridge 165:e614a9f1c9e2 1203 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1204 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 1205 * @arg @ref LL_USART_IRDA_POWER_NORMAL
AnnaBridge 165:e614a9f1c9e2 1206 * @arg @ref LL_USART_PHASE_2EDGE
AnnaBridge 165:e614a9f1c9e2 1207 */
AnnaBridge 165:e614a9f1c9e2 1208 __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1209 {
AnnaBridge 165:e614a9f1c9e2 1210 return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
AnnaBridge 165:e614a9f1c9e2 1211 }
AnnaBridge 165:e614a9f1c9e2 1212
AnnaBridge 165:e614a9f1c9e2 1213 /**
AnnaBridge 165:e614a9f1c9e2 1214 * @brief Set Irda prescaler value, used for dividing the USART clock source
AnnaBridge 165:e614a9f1c9e2 1215 * to achieve the Irda Low Power frequency (8 bits value)
AnnaBridge 165:e614a9f1c9e2 1216 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1217 * IrDA feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1218 * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
AnnaBridge 165:e614a9f1c9e2 1219 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1220 * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 165:e614a9f1c9e2 1221 * @retval None
AnnaBridge 165:e614a9f1c9e2 1222 */
AnnaBridge 165:e614a9f1c9e2 1223 __STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
AnnaBridge 165:e614a9f1c9e2 1224 {
AnnaBridge 165:e614a9f1c9e2 1225 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
AnnaBridge 165:e614a9f1c9e2 1226 }
AnnaBridge 165:e614a9f1c9e2 1227
AnnaBridge 165:e614a9f1c9e2 1228 /**
AnnaBridge 165:e614a9f1c9e2 1229 * @brief Return Irda prescaler value, used for dividing the USART clock source
AnnaBridge 165:e614a9f1c9e2 1230 * to achieve the Irda Low Power frequency (8 bits value)
AnnaBridge 165:e614a9f1c9e2 1231 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1232 * IrDA feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1233 * @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
AnnaBridge 165:e614a9f1c9e2 1234 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1235 * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
AnnaBridge 165:e614a9f1c9e2 1236 */
AnnaBridge 165:e614a9f1c9e2 1237 __STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1238 {
AnnaBridge 165:e614a9f1c9e2 1239 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
AnnaBridge 165:e614a9f1c9e2 1240 }
AnnaBridge 165:e614a9f1c9e2 1241
AnnaBridge 165:e614a9f1c9e2 1242 /**
AnnaBridge 165:e614a9f1c9e2 1243 * @}
AnnaBridge 165:e614a9f1c9e2 1244 */
AnnaBridge 165:e614a9f1c9e2 1245
AnnaBridge 165:e614a9f1c9e2 1246 /** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature
AnnaBridge 165:e614a9f1c9e2 1247 * @{
AnnaBridge 165:e614a9f1c9e2 1248 */
AnnaBridge 165:e614a9f1c9e2 1249
AnnaBridge 165:e614a9f1c9e2 1250 /**
AnnaBridge 165:e614a9f1c9e2 1251 * @brief Enable Smartcard NACK transmission
AnnaBridge 165:e614a9f1c9e2 1252 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1253 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1254 * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
AnnaBridge 165:e614a9f1c9e2 1255 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1256 * @retval None
AnnaBridge 165:e614a9f1c9e2 1257 */
AnnaBridge 165:e614a9f1c9e2 1258 __STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1259 {
AnnaBridge 165:e614a9f1c9e2 1260 SET_BIT(USARTx->CR3, USART_CR3_NACK);
AnnaBridge 165:e614a9f1c9e2 1261 }
AnnaBridge 165:e614a9f1c9e2 1262
AnnaBridge 165:e614a9f1c9e2 1263 /**
AnnaBridge 165:e614a9f1c9e2 1264 * @brief Disable Smartcard NACK transmission
AnnaBridge 165:e614a9f1c9e2 1265 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1266 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1267 * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
AnnaBridge 165:e614a9f1c9e2 1268 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1269 * @retval None
AnnaBridge 165:e614a9f1c9e2 1270 */
AnnaBridge 165:e614a9f1c9e2 1271 __STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1272 {
AnnaBridge 165:e614a9f1c9e2 1273 CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
AnnaBridge 165:e614a9f1c9e2 1274 }
AnnaBridge 165:e614a9f1c9e2 1275
AnnaBridge 165:e614a9f1c9e2 1276 /**
AnnaBridge 165:e614a9f1c9e2 1277 * @brief Indicate if Smartcard NACK transmission is enabled
AnnaBridge 165:e614a9f1c9e2 1278 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1279 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1280 * @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
AnnaBridge 165:e614a9f1c9e2 1281 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1282 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1283 */
AnnaBridge 165:e614a9f1c9e2 1284 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1285 {
AnnaBridge 165:e614a9f1c9e2 1286 return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
AnnaBridge 165:e614a9f1c9e2 1287 }
AnnaBridge 165:e614a9f1c9e2 1288
AnnaBridge 165:e614a9f1c9e2 1289 /**
AnnaBridge 165:e614a9f1c9e2 1290 * @brief Enable Smartcard mode
AnnaBridge 165:e614a9f1c9e2 1291 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1292 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1293 * @rmtoll CR3 SCEN LL_USART_EnableSmartcard
AnnaBridge 165:e614a9f1c9e2 1294 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1295 * @retval None
AnnaBridge 165:e614a9f1c9e2 1296 */
AnnaBridge 165:e614a9f1c9e2 1297 __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1298 {
AnnaBridge 165:e614a9f1c9e2 1299 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
AnnaBridge 165:e614a9f1c9e2 1300 }
AnnaBridge 165:e614a9f1c9e2 1301
AnnaBridge 165:e614a9f1c9e2 1302 /**
AnnaBridge 165:e614a9f1c9e2 1303 * @brief Disable Smartcard mode
AnnaBridge 165:e614a9f1c9e2 1304 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1305 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1306 * @rmtoll CR3 SCEN LL_USART_DisableSmartcard
AnnaBridge 165:e614a9f1c9e2 1307 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1308 * @retval None
AnnaBridge 165:e614a9f1c9e2 1309 */
AnnaBridge 165:e614a9f1c9e2 1310 __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1311 {
AnnaBridge 165:e614a9f1c9e2 1312 CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
AnnaBridge 165:e614a9f1c9e2 1313 }
AnnaBridge 165:e614a9f1c9e2 1314
AnnaBridge 165:e614a9f1c9e2 1315 /**
AnnaBridge 165:e614a9f1c9e2 1316 * @brief Indicate if Smartcard mode is enabled
AnnaBridge 165:e614a9f1c9e2 1317 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1318 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1319 * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
AnnaBridge 165:e614a9f1c9e2 1320 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1321 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1322 */
AnnaBridge 165:e614a9f1c9e2 1323 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1324 {
AnnaBridge 165:e614a9f1c9e2 1325 return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
AnnaBridge 165:e614a9f1c9e2 1326 }
AnnaBridge 165:e614a9f1c9e2 1327
AnnaBridge 165:e614a9f1c9e2 1328 /**
AnnaBridge 165:e614a9f1c9e2 1329 * @brief Set Smartcard prescaler value, used for dividing the USART clock
AnnaBridge 165:e614a9f1c9e2 1330 * source to provide the SMARTCARD Clock (5 bits value)
AnnaBridge 165:e614a9f1c9e2 1331 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1332 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1333 * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
AnnaBridge 165:e614a9f1c9e2 1334 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1335 * @param PrescalerValue Value between Min_Data=0 and Max_Data=31
AnnaBridge 165:e614a9f1c9e2 1336 * @retval None
AnnaBridge 165:e614a9f1c9e2 1337 */
AnnaBridge 165:e614a9f1c9e2 1338 __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
AnnaBridge 165:e614a9f1c9e2 1339 {
AnnaBridge 165:e614a9f1c9e2 1340 MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
AnnaBridge 165:e614a9f1c9e2 1341 }
AnnaBridge 165:e614a9f1c9e2 1342
AnnaBridge 165:e614a9f1c9e2 1343 /**
AnnaBridge 165:e614a9f1c9e2 1344 * @brief Return Smartcard prescaler value, used for dividing the USART clock
AnnaBridge 165:e614a9f1c9e2 1345 * source to provide the SMARTCARD Clock (5 bits value)
AnnaBridge 165:e614a9f1c9e2 1346 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1347 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1348 * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
AnnaBridge 165:e614a9f1c9e2 1349 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1350 * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
AnnaBridge 165:e614a9f1c9e2 1351 */
AnnaBridge 165:e614a9f1c9e2 1352 __STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1353 {
AnnaBridge 165:e614a9f1c9e2 1354 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
AnnaBridge 165:e614a9f1c9e2 1355 }
AnnaBridge 165:e614a9f1c9e2 1356
AnnaBridge 165:e614a9f1c9e2 1357 /**
AnnaBridge 165:e614a9f1c9e2 1358 * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
AnnaBridge 165:e614a9f1c9e2 1359 * (GT[7:0] bits : Guard time value)
AnnaBridge 165:e614a9f1c9e2 1360 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1361 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1362 * @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
AnnaBridge 165:e614a9f1c9e2 1363 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1364 * @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 165:e614a9f1c9e2 1365 * @retval None
AnnaBridge 165:e614a9f1c9e2 1366 */
AnnaBridge 165:e614a9f1c9e2 1367 __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
AnnaBridge 165:e614a9f1c9e2 1368 {
AnnaBridge 165:e614a9f1c9e2 1369 MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_POSITION_GTPR_GT);
AnnaBridge 165:e614a9f1c9e2 1370 }
AnnaBridge 165:e614a9f1c9e2 1371
AnnaBridge 165:e614a9f1c9e2 1372 /**
AnnaBridge 165:e614a9f1c9e2 1373 * @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
AnnaBridge 165:e614a9f1c9e2 1374 * (GT[7:0] bits : Guard time value)
AnnaBridge 165:e614a9f1c9e2 1375 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1376 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1377 * @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
AnnaBridge 165:e614a9f1c9e2 1378 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1379 * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
AnnaBridge 165:e614a9f1c9e2 1380 */
AnnaBridge 165:e614a9f1c9e2 1381 __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1382 {
AnnaBridge 165:e614a9f1c9e2 1383 return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_POSITION_GTPR_GT);
AnnaBridge 165:e614a9f1c9e2 1384 }
AnnaBridge 165:e614a9f1c9e2 1385
AnnaBridge 165:e614a9f1c9e2 1386 /**
AnnaBridge 165:e614a9f1c9e2 1387 * @}
AnnaBridge 165:e614a9f1c9e2 1388 */
AnnaBridge 165:e614a9f1c9e2 1389
AnnaBridge 165:e614a9f1c9e2 1390 /** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
AnnaBridge 165:e614a9f1c9e2 1391 * @{
AnnaBridge 165:e614a9f1c9e2 1392 */
AnnaBridge 165:e614a9f1c9e2 1393
AnnaBridge 165:e614a9f1c9e2 1394 /**
AnnaBridge 165:e614a9f1c9e2 1395 * @brief Enable Single Wire Half-Duplex mode
AnnaBridge 165:e614a9f1c9e2 1396 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1397 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1398 * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
AnnaBridge 165:e614a9f1c9e2 1399 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1400 * @retval None
AnnaBridge 165:e614a9f1c9e2 1401 */
AnnaBridge 165:e614a9f1c9e2 1402 __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1403 {
AnnaBridge 165:e614a9f1c9e2 1404 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 165:e614a9f1c9e2 1405 }
AnnaBridge 165:e614a9f1c9e2 1406
AnnaBridge 165:e614a9f1c9e2 1407 /**
AnnaBridge 165:e614a9f1c9e2 1408 * @brief Disable Single Wire Half-Duplex mode
AnnaBridge 165:e614a9f1c9e2 1409 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1410 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1411 * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
AnnaBridge 165:e614a9f1c9e2 1412 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1413 * @retval None
AnnaBridge 165:e614a9f1c9e2 1414 */
AnnaBridge 165:e614a9f1c9e2 1415 __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1416 {
AnnaBridge 165:e614a9f1c9e2 1417 CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 165:e614a9f1c9e2 1418 }
AnnaBridge 165:e614a9f1c9e2 1419
AnnaBridge 165:e614a9f1c9e2 1420 /**
AnnaBridge 165:e614a9f1c9e2 1421 * @brief Indicate if Single Wire Half-Duplex mode is enabled
AnnaBridge 165:e614a9f1c9e2 1422 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1423 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1424 * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
AnnaBridge 165:e614a9f1c9e2 1425 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1426 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1427 */
AnnaBridge 165:e614a9f1c9e2 1428 __STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1429 {
AnnaBridge 165:e614a9f1c9e2 1430 return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
AnnaBridge 165:e614a9f1c9e2 1431 }
AnnaBridge 165:e614a9f1c9e2 1432
AnnaBridge 165:e614a9f1c9e2 1433 /**
AnnaBridge 165:e614a9f1c9e2 1434 * @}
AnnaBridge 165:e614a9f1c9e2 1435 */
AnnaBridge 165:e614a9f1c9e2 1436
AnnaBridge 165:e614a9f1c9e2 1437 /** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
AnnaBridge 165:e614a9f1c9e2 1438 * @{
AnnaBridge 165:e614a9f1c9e2 1439 */
AnnaBridge 165:e614a9f1c9e2 1440
AnnaBridge 165:e614a9f1c9e2 1441 /**
AnnaBridge 165:e614a9f1c9e2 1442 * @brief Set LIN Break Detection Length
AnnaBridge 165:e614a9f1c9e2 1443 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1444 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1445 * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
AnnaBridge 165:e614a9f1c9e2 1446 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1447 * @param LINBDLength This parameter can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 1448 * @arg @ref LL_USART_LINBREAK_DETECT_10B
AnnaBridge 165:e614a9f1c9e2 1449 * @arg @ref LL_USART_LINBREAK_DETECT_11B
AnnaBridge 165:e614a9f1c9e2 1450 * @retval None
AnnaBridge 165:e614a9f1c9e2 1451 */
AnnaBridge 165:e614a9f1c9e2 1452 __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
AnnaBridge 165:e614a9f1c9e2 1453 {
AnnaBridge 165:e614a9f1c9e2 1454 MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
AnnaBridge 165:e614a9f1c9e2 1455 }
AnnaBridge 165:e614a9f1c9e2 1456
AnnaBridge 165:e614a9f1c9e2 1457 /**
AnnaBridge 165:e614a9f1c9e2 1458 * @brief Return LIN Break Detection Length
AnnaBridge 165:e614a9f1c9e2 1459 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1460 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1461 * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
AnnaBridge 165:e614a9f1c9e2 1462 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1463 * @retval Returned value can be one of the following values:
AnnaBridge 165:e614a9f1c9e2 1464 * @arg @ref LL_USART_LINBREAK_DETECT_10B
AnnaBridge 165:e614a9f1c9e2 1465 * @arg @ref LL_USART_LINBREAK_DETECT_11B
AnnaBridge 165:e614a9f1c9e2 1466 */
AnnaBridge 165:e614a9f1c9e2 1467 __STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1468 {
AnnaBridge 165:e614a9f1c9e2 1469 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
AnnaBridge 165:e614a9f1c9e2 1470 }
AnnaBridge 165:e614a9f1c9e2 1471
AnnaBridge 165:e614a9f1c9e2 1472 /**
AnnaBridge 165:e614a9f1c9e2 1473 * @brief Enable LIN mode
AnnaBridge 165:e614a9f1c9e2 1474 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1475 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1476 * @rmtoll CR2 LINEN LL_USART_EnableLIN
AnnaBridge 165:e614a9f1c9e2 1477 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1478 * @retval None
AnnaBridge 165:e614a9f1c9e2 1479 */
AnnaBridge 165:e614a9f1c9e2 1480 __STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1481 {
AnnaBridge 165:e614a9f1c9e2 1482 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
AnnaBridge 165:e614a9f1c9e2 1483 }
AnnaBridge 165:e614a9f1c9e2 1484
AnnaBridge 165:e614a9f1c9e2 1485 /**
AnnaBridge 165:e614a9f1c9e2 1486 * @brief Disable LIN mode
AnnaBridge 165:e614a9f1c9e2 1487 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1488 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1489 * @rmtoll CR2 LINEN LL_USART_DisableLIN
AnnaBridge 165:e614a9f1c9e2 1490 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1491 * @retval None
AnnaBridge 165:e614a9f1c9e2 1492 */
AnnaBridge 165:e614a9f1c9e2 1493 __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1494 {
AnnaBridge 165:e614a9f1c9e2 1495 CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
AnnaBridge 165:e614a9f1c9e2 1496 }
AnnaBridge 165:e614a9f1c9e2 1497
AnnaBridge 165:e614a9f1c9e2 1498 /**
AnnaBridge 165:e614a9f1c9e2 1499 * @brief Indicate if LIN mode is enabled
AnnaBridge 165:e614a9f1c9e2 1500 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1501 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1502 * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
AnnaBridge 165:e614a9f1c9e2 1503 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1504 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1505 */
AnnaBridge 165:e614a9f1c9e2 1506 __STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1507 {
AnnaBridge 165:e614a9f1c9e2 1508 return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
AnnaBridge 165:e614a9f1c9e2 1509 }
AnnaBridge 165:e614a9f1c9e2 1510
AnnaBridge 165:e614a9f1c9e2 1511 /**
AnnaBridge 165:e614a9f1c9e2 1512 * @}
AnnaBridge 165:e614a9f1c9e2 1513 */
AnnaBridge 165:e614a9f1c9e2 1514
AnnaBridge 165:e614a9f1c9e2 1515 /** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services
AnnaBridge 165:e614a9f1c9e2 1516 * @{
AnnaBridge 165:e614a9f1c9e2 1517 */
AnnaBridge 165:e614a9f1c9e2 1518
AnnaBridge 165:e614a9f1c9e2 1519 /**
AnnaBridge 165:e614a9f1c9e2 1520 * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
AnnaBridge 165:e614a9f1c9e2 1521 * @note In UART mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1522 * - LINEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1523 * - CLKEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1524 * - SCEN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1525 * - IREN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1526 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 165:e614a9f1c9e2 1527 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 165:e614a9f1c9e2 1528 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 165:e614a9f1c9e2 1529 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 165:e614a9f1c9e2 1530 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 165:e614a9f1c9e2 1531 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 165:e614a9f1c9e2 1532 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 165:e614a9f1c9e2 1533 * @note Other remaining configurations items related to Asynchronous Mode
AnnaBridge 165:e614a9f1c9e2 1534 * (as Baud Rate, Word length, Parity, ...) should be set using
AnnaBridge 165:e614a9f1c9e2 1535 * dedicated functions
AnnaBridge 165:e614a9f1c9e2 1536 * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n
AnnaBridge 165:e614a9f1c9e2 1537 * CR2 CLKEN LL_USART_ConfigAsyncMode\n
AnnaBridge 165:e614a9f1c9e2 1538 * CR3 SCEN LL_USART_ConfigAsyncMode\n
AnnaBridge 165:e614a9f1c9e2 1539 * CR3 IREN LL_USART_ConfigAsyncMode\n
AnnaBridge 165:e614a9f1c9e2 1540 * CR3 HDSEL LL_USART_ConfigAsyncMode
AnnaBridge 165:e614a9f1c9e2 1541 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1542 * @retval None
AnnaBridge 165:e614a9f1c9e2 1543 */
AnnaBridge 165:e614a9f1c9e2 1544 __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1545 {
AnnaBridge 165:e614a9f1c9e2 1546 /* In Asynchronous mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1547 - LINEN, CLKEN bits in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1548 - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 165:e614a9f1c9e2 1549 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
AnnaBridge 165:e614a9f1c9e2 1550 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
AnnaBridge 165:e614a9f1c9e2 1551 }
AnnaBridge 165:e614a9f1c9e2 1552
AnnaBridge 165:e614a9f1c9e2 1553 /**
AnnaBridge 165:e614a9f1c9e2 1554 * @brief Perform basic configuration of USART for enabling use in Synchronous Mode
AnnaBridge 165:e614a9f1c9e2 1555 * @note In Synchronous mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1556 * - LINEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1557 * - SCEN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1558 * - IREN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1559 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 165:e614a9f1c9e2 1560 * This function also sets the USART in Synchronous mode.
AnnaBridge 165:e614a9f1c9e2 1561 * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1562 * Synchronous mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1563 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 165:e614a9f1c9e2 1564 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 165:e614a9f1c9e2 1565 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 165:e614a9f1c9e2 1566 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 165:e614a9f1c9e2 1567 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 165:e614a9f1c9e2 1568 * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
AnnaBridge 165:e614a9f1c9e2 1569 * @note Other remaining configurations items related to Synchronous Mode
AnnaBridge 165:e614a9f1c9e2 1570 * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
AnnaBridge 165:e614a9f1c9e2 1571 * dedicated functions
AnnaBridge 165:e614a9f1c9e2 1572 * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n
AnnaBridge 165:e614a9f1c9e2 1573 * CR2 CLKEN LL_USART_ConfigSyncMode\n
AnnaBridge 165:e614a9f1c9e2 1574 * CR3 SCEN LL_USART_ConfigSyncMode\n
AnnaBridge 165:e614a9f1c9e2 1575 * CR3 IREN LL_USART_ConfigSyncMode\n
AnnaBridge 165:e614a9f1c9e2 1576 * CR3 HDSEL LL_USART_ConfigSyncMode
AnnaBridge 165:e614a9f1c9e2 1577 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1578 * @retval None
AnnaBridge 165:e614a9f1c9e2 1579 */
AnnaBridge 165:e614a9f1c9e2 1580 __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1581 {
AnnaBridge 165:e614a9f1c9e2 1582 /* In Synchronous mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1583 - LINEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1584 - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 165:e614a9f1c9e2 1585 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
AnnaBridge 165:e614a9f1c9e2 1586 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
AnnaBridge 165:e614a9f1c9e2 1587 /* set the UART/USART in Synchronous mode */
AnnaBridge 165:e614a9f1c9e2 1588 SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
AnnaBridge 165:e614a9f1c9e2 1589 }
AnnaBridge 165:e614a9f1c9e2 1590
AnnaBridge 165:e614a9f1c9e2 1591 /**
AnnaBridge 165:e614a9f1c9e2 1592 * @brief Perform basic configuration of USART for enabling use in LIN Mode
AnnaBridge 165:e614a9f1c9e2 1593 * @note In LIN mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1594 * - STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1595 * - SCEN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1596 * - IREN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1597 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 165:e614a9f1c9e2 1598 * This function also set the UART/USART in LIN mode.
AnnaBridge 165:e614a9f1c9e2 1599 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1600 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1601 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 165:e614a9f1c9e2 1602 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 165:e614a9f1c9e2 1603 * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 165:e614a9f1c9e2 1604 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 165:e614a9f1c9e2 1605 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 165:e614a9f1c9e2 1606 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 165:e614a9f1c9e2 1607 * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
AnnaBridge 165:e614a9f1c9e2 1608 * @note Other remaining configurations items related to LIN Mode
AnnaBridge 165:e614a9f1c9e2 1609 * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
AnnaBridge 165:e614a9f1c9e2 1610 * dedicated functions
AnnaBridge 165:e614a9f1c9e2 1611 * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
AnnaBridge 165:e614a9f1c9e2 1612 * CR2 STOP LL_USART_ConfigLINMode\n
AnnaBridge 165:e614a9f1c9e2 1613 * CR2 LINEN LL_USART_ConfigLINMode\n
AnnaBridge 165:e614a9f1c9e2 1614 * CR3 IREN LL_USART_ConfigLINMode\n
AnnaBridge 165:e614a9f1c9e2 1615 * CR3 SCEN LL_USART_ConfigLINMode\n
AnnaBridge 165:e614a9f1c9e2 1616 * CR3 HDSEL LL_USART_ConfigLINMode
AnnaBridge 165:e614a9f1c9e2 1617 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1618 * @retval None
AnnaBridge 165:e614a9f1c9e2 1619 */
AnnaBridge 165:e614a9f1c9e2 1620 __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1621 {
AnnaBridge 165:e614a9f1c9e2 1622 /* In LIN mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1623 - STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1624 - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 165:e614a9f1c9e2 1625 CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
AnnaBridge 165:e614a9f1c9e2 1626 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
AnnaBridge 165:e614a9f1c9e2 1627 /* Set the UART/USART in LIN mode */
AnnaBridge 165:e614a9f1c9e2 1628 SET_BIT(USARTx->CR2, USART_CR2_LINEN);
AnnaBridge 165:e614a9f1c9e2 1629 }
AnnaBridge 165:e614a9f1c9e2 1630
AnnaBridge 165:e614a9f1c9e2 1631 /**
AnnaBridge 165:e614a9f1c9e2 1632 * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
AnnaBridge 165:e614a9f1c9e2 1633 * @note In Half Duplex mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1634 * - LINEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1635 * - CLKEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1636 * - SCEN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1637 * - IREN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1638 * This function also sets the UART/USART in Half Duplex mode.
AnnaBridge 165:e614a9f1c9e2 1639 * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1640 * Half-Duplex mode is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1641 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 165:e614a9f1c9e2 1642 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 165:e614a9f1c9e2 1643 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 165:e614a9f1c9e2 1644 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 165:e614a9f1c9e2 1645 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 165:e614a9f1c9e2 1646 * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
AnnaBridge 165:e614a9f1c9e2 1647 * @note Other remaining configurations items related to Half Duplex Mode
AnnaBridge 165:e614a9f1c9e2 1648 * (as Baud Rate, Word length, Parity, ...) should be set using
AnnaBridge 165:e614a9f1c9e2 1649 * dedicated functions
AnnaBridge 165:e614a9f1c9e2 1650 * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 165:e614a9f1c9e2 1651 * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 165:e614a9f1c9e2 1652 * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 165:e614a9f1c9e2 1653 * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n
AnnaBridge 165:e614a9f1c9e2 1654 * CR3 IREN LL_USART_ConfigHalfDuplexMode
AnnaBridge 165:e614a9f1c9e2 1655 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1656 * @retval None
AnnaBridge 165:e614a9f1c9e2 1657 */
AnnaBridge 165:e614a9f1c9e2 1658 __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1659 {
AnnaBridge 165:e614a9f1c9e2 1660 /* In Half Duplex mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1661 - LINEN and CLKEN bits in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1662 - SCEN and IREN bits in the USART_CR3 register.*/
AnnaBridge 165:e614a9f1c9e2 1663 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
AnnaBridge 165:e614a9f1c9e2 1664 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
AnnaBridge 165:e614a9f1c9e2 1665 /* set the UART/USART in Half Duplex mode */
AnnaBridge 165:e614a9f1c9e2 1666 SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
AnnaBridge 165:e614a9f1c9e2 1667 }
AnnaBridge 165:e614a9f1c9e2 1668
AnnaBridge 165:e614a9f1c9e2 1669 /**
AnnaBridge 165:e614a9f1c9e2 1670 * @brief Perform basic configuration of USART for enabling use in Smartcard Mode
AnnaBridge 165:e614a9f1c9e2 1671 * @note In Smartcard mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1672 * - LINEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1673 * - IREN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1674 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 165:e614a9f1c9e2 1675 * This function also configures Stop bits to 1.5 bits and
AnnaBridge 165:e614a9f1c9e2 1676 * sets the USART in Smartcard mode (SCEN bit).
AnnaBridge 165:e614a9f1c9e2 1677 * Clock Output is also enabled (CLKEN).
AnnaBridge 165:e614a9f1c9e2 1678 * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1679 * Smartcard feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1680 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 165:e614a9f1c9e2 1681 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 165:e614a9f1c9e2 1682 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 165:e614a9f1c9e2 1683 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 165:e614a9f1c9e2 1684 * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 165:e614a9f1c9e2 1685 * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
AnnaBridge 165:e614a9f1c9e2 1686 * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
AnnaBridge 165:e614a9f1c9e2 1687 * @note Other remaining configurations items related to Smartcard Mode
AnnaBridge 165:e614a9f1c9e2 1688 * (as Baud Rate, Word length, Parity, ...) should be set using
AnnaBridge 165:e614a9f1c9e2 1689 * dedicated functions
AnnaBridge 165:e614a9f1c9e2 1690 * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n
AnnaBridge 165:e614a9f1c9e2 1691 * CR2 STOP LL_USART_ConfigSmartcardMode\n
AnnaBridge 165:e614a9f1c9e2 1692 * CR2 CLKEN LL_USART_ConfigSmartcardMode\n
AnnaBridge 165:e614a9f1c9e2 1693 * CR3 HDSEL LL_USART_ConfigSmartcardMode\n
AnnaBridge 165:e614a9f1c9e2 1694 * CR3 SCEN LL_USART_ConfigSmartcardMode
AnnaBridge 165:e614a9f1c9e2 1695 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1696 * @retval None
AnnaBridge 165:e614a9f1c9e2 1697 */
AnnaBridge 165:e614a9f1c9e2 1698 __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1699 {
AnnaBridge 165:e614a9f1c9e2 1700 /* In Smartcard mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1701 - LINEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1702 - IREN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 165:e614a9f1c9e2 1703 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
AnnaBridge 165:e614a9f1c9e2 1704 CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
AnnaBridge 165:e614a9f1c9e2 1705 /* Configure Stop bits to 1.5 bits */
AnnaBridge 165:e614a9f1c9e2 1706 /* Synchronous mode is activated by default */
AnnaBridge 165:e614a9f1c9e2 1707 SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
AnnaBridge 165:e614a9f1c9e2 1708 /* set the UART/USART in Smartcard mode */
AnnaBridge 165:e614a9f1c9e2 1709 SET_BIT(USARTx->CR3, USART_CR3_SCEN);
AnnaBridge 165:e614a9f1c9e2 1710 }
AnnaBridge 165:e614a9f1c9e2 1711
AnnaBridge 165:e614a9f1c9e2 1712 /**
AnnaBridge 165:e614a9f1c9e2 1713 * @brief Perform basic configuration of USART for enabling use in Irda Mode
AnnaBridge 165:e614a9f1c9e2 1714 * @note In IRDA mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1715 * - LINEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1716 * - STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1717 * - SCEN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1718 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 165:e614a9f1c9e2 1719 * This function also sets the UART/USART in IRDA mode (IREN bit).
AnnaBridge 165:e614a9f1c9e2 1720 * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1721 * IrDA feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1722 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 165:e614a9f1c9e2 1723 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 165:e614a9f1c9e2 1724 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 165:e614a9f1c9e2 1725 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 165:e614a9f1c9e2 1726 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 165:e614a9f1c9e2 1727 * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
AnnaBridge 165:e614a9f1c9e2 1728 * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
AnnaBridge 165:e614a9f1c9e2 1729 * @note Other remaining configurations items related to Irda Mode
AnnaBridge 165:e614a9f1c9e2 1730 * (as Baud Rate, Word length, Power mode, ...) should be set using
AnnaBridge 165:e614a9f1c9e2 1731 * dedicated functions
AnnaBridge 165:e614a9f1c9e2 1732 * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n
AnnaBridge 165:e614a9f1c9e2 1733 * CR2 CLKEN LL_USART_ConfigIrdaMode\n
AnnaBridge 165:e614a9f1c9e2 1734 * CR2 STOP LL_USART_ConfigIrdaMode\n
AnnaBridge 165:e614a9f1c9e2 1735 * CR3 SCEN LL_USART_ConfigIrdaMode\n
AnnaBridge 165:e614a9f1c9e2 1736 * CR3 HDSEL LL_USART_ConfigIrdaMode\n
AnnaBridge 165:e614a9f1c9e2 1737 * CR3 IREN LL_USART_ConfigIrdaMode
AnnaBridge 165:e614a9f1c9e2 1738 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1739 * @retval None
AnnaBridge 165:e614a9f1c9e2 1740 */
AnnaBridge 165:e614a9f1c9e2 1741 __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1742 {
AnnaBridge 165:e614a9f1c9e2 1743 /* In IRDA mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1744 - LINEN, STOP and CLKEN bits in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1745 - SCEN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 165:e614a9f1c9e2 1746 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
AnnaBridge 165:e614a9f1c9e2 1747 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
AnnaBridge 165:e614a9f1c9e2 1748 /* set the UART/USART in IRDA mode */
AnnaBridge 165:e614a9f1c9e2 1749 SET_BIT(USARTx->CR3, USART_CR3_IREN);
AnnaBridge 165:e614a9f1c9e2 1750 }
AnnaBridge 165:e614a9f1c9e2 1751
AnnaBridge 165:e614a9f1c9e2 1752 /**
AnnaBridge 165:e614a9f1c9e2 1753 * @brief Perform basic configuration of USART for enabling use in Multi processor Mode
AnnaBridge 165:e614a9f1c9e2 1754 * (several USARTs connected in a network, one of the USARTs can be the master,
AnnaBridge 165:e614a9f1c9e2 1755 * its TX output connected to the RX inputs of the other slaves USARTs).
AnnaBridge 165:e614a9f1c9e2 1756 * @note In MultiProcessor mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1757 * - LINEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1758 * - CLKEN bit in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1759 * - SCEN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1760 * - IREN bit in the USART_CR3 register,
AnnaBridge 165:e614a9f1c9e2 1761 * - HDSEL bit in the USART_CR3 register.
AnnaBridge 165:e614a9f1c9e2 1762 * @note Call of this function is equivalent to following function call sequence :
AnnaBridge 165:e614a9f1c9e2 1763 * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
AnnaBridge 165:e614a9f1c9e2 1764 * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
AnnaBridge 165:e614a9f1c9e2 1765 * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
AnnaBridge 165:e614a9f1c9e2 1766 * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
AnnaBridge 165:e614a9f1c9e2 1767 * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
AnnaBridge 165:e614a9f1c9e2 1768 * @note Other remaining configurations items related to Multi processor Mode
AnnaBridge 165:e614a9f1c9e2 1769 * (as Baud Rate, Wake Up Method, Node address, ...) should be set using
AnnaBridge 165:e614a9f1c9e2 1770 * dedicated functions
AnnaBridge 165:e614a9f1c9e2 1771 * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n
AnnaBridge 165:e614a9f1c9e2 1772 * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
AnnaBridge 165:e614a9f1c9e2 1773 * CR3 SCEN LL_USART_ConfigMultiProcessMode\n
AnnaBridge 165:e614a9f1c9e2 1774 * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n
AnnaBridge 165:e614a9f1c9e2 1775 * CR3 IREN LL_USART_ConfigMultiProcessMode
AnnaBridge 165:e614a9f1c9e2 1776 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1777 * @retval None
AnnaBridge 165:e614a9f1c9e2 1778 */
AnnaBridge 165:e614a9f1c9e2 1779 __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1780 {
AnnaBridge 165:e614a9f1c9e2 1781 /* In Multi Processor mode, the following bits must be kept cleared:
AnnaBridge 165:e614a9f1c9e2 1782 - LINEN and CLKEN bits in the USART_CR2 register,
AnnaBridge 165:e614a9f1c9e2 1783 - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
AnnaBridge 165:e614a9f1c9e2 1784 CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
AnnaBridge 165:e614a9f1c9e2 1785 CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
AnnaBridge 165:e614a9f1c9e2 1786 }
AnnaBridge 165:e614a9f1c9e2 1787
AnnaBridge 165:e614a9f1c9e2 1788 /**
AnnaBridge 165:e614a9f1c9e2 1789 * @}
AnnaBridge 165:e614a9f1c9e2 1790 */
AnnaBridge 165:e614a9f1c9e2 1791
AnnaBridge 165:e614a9f1c9e2 1792 /** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
AnnaBridge 165:e614a9f1c9e2 1793 * @{
AnnaBridge 165:e614a9f1c9e2 1794 */
AnnaBridge 165:e614a9f1c9e2 1795
AnnaBridge 165:e614a9f1c9e2 1796 /**
AnnaBridge 165:e614a9f1c9e2 1797 * @brief Check if the USART Parity Error Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1798 * @rmtoll SR PE LL_USART_IsActiveFlag_PE
AnnaBridge 165:e614a9f1c9e2 1799 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1800 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1801 */
AnnaBridge 165:e614a9f1c9e2 1802 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1803 {
AnnaBridge 165:e614a9f1c9e2 1804 return (READ_BIT(USARTx->SR, USART_SR_PE) == (USART_SR_PE));
AnnaBridge 165:e614a9f1c9e2 1805 }
AnnaBridge 165:e614a9f1c9e2 1806
AnnaBridge 165:e614a9f1c9e2 1807 /**
AnnaBridge 165:e614a9f1c9e2 1808 * @brief Check if the USART Framing Error Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1809 * @rmtoll SR FE LL_USART_IsActiveFlag_FE
AnnaBridge 165:e614a9f1c9e2 1810 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1811 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1812 */
AnnaBridge 165:e614a9f1c9e2 1813 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1814 {
AnnaBridge 165:e614a9f1c9e2 1815 return (READ_BIT(USARTx->SR, USART_SR_FE) == (USART_SR_FE));
AnnaBridge 165:e614a9f1c9e2 1816 }
AnnaBridge 165:e614a9f1c9e2 1817
AnnaBridge 165:e614a9f1c9e2 1818 /**
AnnaBridge 165:e614a9f1c9e2 1819 * @brief Check if the USART Noise error detected Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1820 * @rmtoll SR NF LL_USART_IsActiveFlag_NE
AnnaBridge 165:e614a9f1c9e2 1821 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1822 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1823 */
AnnaBridge 165:e614a9f1c9e2 1824 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1825 {
AnnaBridge 165:e614a9f1c9e2 1826 return (READ_BIT(USARTx->SR, USART_SR_NE) == (USART_SR_NE));
AnnaBridge 165:e614a9f1c9e2 1827 }
AnnaBridge 165:e614a9f1c9e2 1828
AnnaBridge 165:e614a9f1c9e2 1829 /**
AnnaBridge 165:e614a9f1c9e2 1830 * @brief Check if the USART OverRun Error Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1831 * @rmtoll SR ORE LL_USART_IsActiveFlag_ORE
AnnaBridge 165:e614a9f1c9e2 1832 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1833 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1834 */
AnnaBridge 165:e614a9f1c9e2 1835 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1836 {
AnnaBridge 165:e614a9f1c9e2 1837 return (READ_BIT(USARTx->SR, USART_SR_ORE) == (USART_SR_ORE));
AnnaBridge 165:e614a9f1c9e2 1838 }
AnnaBridge 165:e614a9f1c9e2 1839
AnnaBridge 165:e614a9f1c9e2 1840 /**
AnnaBridge 165:e614a9f1c9e2 1841 * @brief Check if the USART IDLE line detected Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1842 * @rmtoll SR IDLE LL_USART_IsActiveFlag_IDLE
AnnaBridge 165:e614a9f1c9e2 1843 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1844 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1845 */
AnnaBridge 165:e614a9f1c9e2 1846 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1847 {
AnnaBridge 165:e614a9f1c9e2 1848 return (READ_BIT(USARTx->SR, USART_SR_IDLE) == (USART_SR_IDLE));
AnnaBridge 165:e614a9f1c9e2 1849 }
AnnaBridge 165:e614a9f1c9e2 1850
AnnaBridge 165:e614a9f1c9e2 1851 /**
AnnaBridge 165:e614a9f1c9e2 1852 * @brief Check if the USART Read Data Register Not Empty Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1853 * @rmtoll SR RXNE LL_USART_IsActiveFlag_RXNE
AnnaBridge 165:e614a9f1c9e2 1854 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1855 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1856 */
AnnaBridge 165:e614a9f1c9e2 1857 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1858 {
AnnaBridge 165:e614a9f1c9e2 1859 return (READ_BIT(USARTx->SR, USART_SR_RXNE) == (USART_SR_RXNE));
AnnaBridge 165:e614a9f1c9e2 1860 }
AnnaBridge 165:e614a9f1c9e2 1861
AnnaBridge 165:e614a9f1c9e2 1862 /**
AnnaBridge 165:e614a9f1c9e2 1863 * @brief Check if the USART Transmission Complete Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1864 * @rmtoll SR TC LL_USART_IsActiveFlag_TC
AnnaBridge 165:e614a9f1c9e2 1865 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1866 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1867 */
AnnaBridge 165:e614a9f1c9e2 1868 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1869 {
AnnaBridge 165:e614a9f1c9e2 1870 return (READ_BIT(USARTx->SR, USART_SR_TC) == (USART_SR_TC));
AnnaBridge 165:e614a9f1c9e2 1871 }
AnnaBridge 165:e614a9f1c9e2 1872
AnnaBridge 165:e614a9f1c9e2 1873 /**
AnnaBridge 165:e614a9f1c9e2 1874 * @brief Check if the USART Transmit Data Register Empty Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1875 * @rmtoll SR TXE LL_USART_IsActiveFlag_TXE
AnnaBridge 165:e614a9f1c9e2 1876 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1877 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1878 */
AnnaBridge 165:e614a9f1c9e2 1879 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1880 {
AnnaBridge 165:e614a9f1c9e2 1881 return (READ_BIT(USARTx->SR, USART_SR_TXE) == (USART_SR_TXE));
AnnaBridge 165:e614a9f1c9e2 1882 }
AnnaBridge 165:e614a9f1c9e2 1883
AnnaBridge 165:e614a9f1c9e2 1884 /**
AnnaBridge 165:e614a9f1c9e2 1885 * @brief Check if the USART LIN Break Detection Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1886 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1887 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1888 * @rmtoll SR LBD LL_USART_IsActiveFlag_LBD
AnnaBridge 165:e614a9f1c9e2 1889 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1890 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1891 */
AnnaBridge 165:e614a9f1c9e2 1892 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1893 {
AnnaBridge 165:e614a9f1c9e2 1894 return (READ_BIT(USARTx->SR, USART_SR_LBD) == (USART_SR_LBD));
AnnaBridge 165:e614a9f1c9e2 1895 }
AnnaBridge 165:e614a9f1c9e2 1896
AnnaBridge 165:e614a9f1c9e2 1897 /**
AnnaBridge 165:e614a9f1c9e2 1898 * @brief Check if the USART CTS Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1899 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 1900 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 1901 * @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS
AnnaBridge 165:e614a9f1c9e2 1902 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1903 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1904 */
AnnaBridge 165:e614a9f1c9e2 1905 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1906 {
AnnaBridge 165:e614a9f1c9e2 1907 return (READ_BIT(USARTx->SR, USART_SR_CTS) == (USART_SR_CTS));
AnnaBridge 165:e614a9f1c9e2 1908 }
AnnaBridge 165:e614a9f1c9e2 1909
AnnaBridge 165:e614a9f1c9e2 1910 /**
AnnaBridge 165:e614a9f1c9e2 1911 * @brief Check if the USART Send Break Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1912 * @rmtoll CR1 SBK LL_USART_IsActiveFlag_SBK
AnnaBridge 165:e614a9f1c9e2 1913 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1914 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1915 */
AnnaBridge 165:e614a9f1c9e2 1916 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1917 {
AnnaBridge 165:e614a9f1c9e2 1918 return (READ_BIT(USARTx->CR1, USART_CR1_SBK) == (USART_CR1_SBK));
AnnaBridge 165:e614a9f1c9e2 1919 }
AnnaBridge 165:e614a9f1c9e2 1920
AnnaBridge 165:e614a9f1c9e2 1921 /**
AnnaBridge 165:e614a9f1c9e2 1922 * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
AnnaBridge 165:e614a9f1c9e2 1923 * @rmtoll CR1 RWU LL_USART_IsActiveFlag_RWU
AnnaBridge 165:e614a9f1c9e2 1924 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1925 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 1926 */
AnnaBridge 165:e614a9f1c9e2 1927 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1928 {
AnnaBridge 165:e614a9f1c9e2 1929 return (READ_BIT(USARTx->CR1, USART_CR1_RWU) == (USART_CR1_RWU));
AnnaBridge 165:e614a9f1c9e2 1930 }
AnnaBridge 165:e614a9f1c9e2 1931
AnnaBridge 165:e614a9f1c9e2 1932 /**
AnnaBridge 165:e614a9f1c9e2 1933 * @brief Clear Parity Error Flag
AnnaBridge 165:e614a9f1c9e2 1934 * @note Clearing this flag is done by a read access to the USARTx_SR
AnnaBridge 165:e614a9f1c9e2 1935 * register followed by a read access to the USARTx_DR register.
AnnaBridge 165:e614a9f1c9e2 1936 * @note Please also consider that when clearing this flag, other flags as
AnnaBridge 165:e614a9f1c9e2 1937 * NE, FE, ORE, IDLE would also be cleared.
AnnaBridge 165:e614a9f1c9e2 1938 * @rmtoll SR PE LL_USART_ClearFlag_PE
AnnaBridge 165:e614a9f1c9e2 1939 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1940 * @retval None
AnnaBridge 165:e614a9f1c9e2 1941 */
AnnaBridge 165:e614a9f1c9e2 1942 __STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1943 {
AnnaBridge 165:e614a9f1c9e2 1944 __IO uint32_t tmpreg;
AnnaBridge 165:e614a9f1c9e2 1945 tmpreg = USARTx->SR;
AnnaBridge 165:e614a9f1c9e2 1946 (void) tmpreg;
AnnaBridge 165:e614a9f1c9e2 1947 tmpreg = USARTx->DR;
AnnaBridge 165:e614a9f1c9e2 1948 (void) tmpreg;
AnnaBridge 165:e614a9f1c9e2 1949 }
AnnaBridge 165:e614a9f1c9e2 1950
AnnaBridge 165:e614a9f1c9e2 1951 /**
AnnaBridge 165:e614a9f1c9e2 1952 * @brief Clear Framing Error Flag
AnnaBridge 165:e614a9f1c9e2 1953 * @note Clearing this flag is done by a read access to the USARTx_SR
AnnaBridge 165:e614a9f1c9e2 1954 * register followed by a read access to the USARTx_DR register.
AnnaBridge 165:e614a9f1c9e2 1955 * @note Please also consider that when clearing this flag, other flags as
AnnaBridge 165:e614a9f1c9e2 1956 * PE, NE, ORE, IDLE would also be cleared.
AnnaBridge 165:e614a9f1c9e2 1957 * @rmtoll SR FE LL_USART_ClearFlag_FE
AnnaBridge 165:e614a9f1c9e2 1958 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1959 * @retval None
AnnaBridge 165:e614a9f1c9e2 1960 */
AnnaBridge 165:e614a9f1c9e2 1961 __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1962 {
AnnaBridge 165:e614a9f1c9e2 1963 __IO uint32_t tmpreg;
AnnaBridge 165:e614a9f1c9e2 1964 tmpreg = USARTx->SR;
AnnaBridge 165:e614a9f1c9e2 1965 (void) tmpreg;
AnnaBridge 165:e614a9f1c9e2 1966 tmpreg = USARTx->DR;
AnnaBridge 165:e614a9f1c9e2 1967 (void) tmpreg;
AnnaBridge 165:e614a9f1c9e2 1968 }
AnnaBridge 165:e614a9f1c9e2 1969
AnnaBridge 165:e614a9f1c9e2 1970 /**
AnnaBridge 165:e614a9f1c9e2 1971 * @brief Clear Noise detected Flag
AnnaBridge 165:e614a9f1c9e2 1972 * @note Clearing this flag is done by a read access to the USARTx_SR
AnnaBridge 165:e614a9f1c9e2 1973 * register followed by a read access to the USARTx_DR register.
AnnaBridge 165:e614a9f1c9e2 1974 * @note Please also consider that when clearing this flag, other flags as
AnnaBridge 165:e614a9f1c9e2 1975 * PE, FE, ORE, IDLE would also be cleared.
AnnaBridge 165:e614a9f1c9e2 1976 * @rmtoll SR NF LL_USART_ClearFlag_NE
AnnaBridge 165:e614a9f1c9e2 1977 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1978 * @retval None
AnnaBridge 165:e614a9f1c9e2 1979 */
AnnaBridge 165:e614a9f1c9e2 1980 __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 1981 {
AnnaBridge 165:e614a9f1c9e2 1982 __IO uint32_t tmpreg;
AnnaBridge 165:e614a9f1c9e2 1983 tmpreg = USARTx->SR;
AnnaBridge 165:e614a9f1c9e2 1984 (void) tmpreg;
AnnaBridge 165:e614a9f1c9e2 1985 tmpreg = USARTx->DR;
AnnaBridge 165:e614a9f1c9e2 1986 (void) tmpreg;
AnnaBridge 165:e614a9f1c9e2 1987 }
AnnaBridge 165:e614a9f1c9e2 1988
AnnaBridge 165:e614a9f1c9e2 1989 /**
AnnaBridge 165:e614a9f1c9e2 1990 * @brief Clear OverRun Error Flag
AnnaBridge 165:e614a9f1c9e2 1991 * @note Clearing this flag is done by a read access to the USARTx_SR
AnnaBridge 165:e614a9f1c9e2 1992 * register followed by a read access to the USARTx_DR register.
AnnaBridge 165:e614a9f1c9e2 1993 * @note Please also consider that when clearing this flag, other flags as
AnnaBridge 165:e614a9f1c9e2 1994 * PE, NE, FE, IDLE would also be cleared.
AnnaBridge 165:e614a9f1c9e2 1995 * @rmtoll SR ORE LL_USART_ClearFlag_ORE
AnnaBridge 165:e614a9f1c9e2 1996 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 1997 * @retval None
AnnaBridge 165:e614a9f1c9e2 1998 */
AnnaBridge 165:e614a9f1c9e2 1999 __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2000 {
AnnaBridge 165:e614a9f1c9e2 2001 __IO uint32_t tmpreg;
AnnaBridge 165:e614a9f1c9e2 2002 tmpreg = USARTx->SR;
AnnaBridge 165:e614a9f1c9e2 2003 (void) tmpreg;
AnnaBridge 165:e614a9f1c9e2 2004 tmpreg = USARTx->DR;
AnnaBridge 165:e614a9f1c9e2 2005 (void) tmpreg;
AnnaBridge 165:e614a9f1c9e2 2006 }
AnnaBridge 165:e614a9f1c9e2 2007
AnnaBridge 165:e614a9f1c9e2 2008 /**
AnnaBridge 165:e614a9f1c9e2 2009 * @brief Clear IDLE line detected Flag
AnnaBridge 165:e614a9f1c9e2 2010 * @note Clearing this flag is done by a read access to the USARTx_SR
AnnaBridge 165:e614a9f1c9e2 2011 * register followed by a read access to the USARTx_DR register.
AnnaBridge 165:e614a9f1c9e2 2012 * @note Please also consider that when clearing this flag, other flags as
AnnaBridge 165:e614a9f1c9e2 2013 * PE, NE, FE, ORE would also be cleared.
AnnaBridge 165:e614a9f1c9e2 2014 * @rmtoll SR IDLE LL_USART_ClearFlag_IDLE
AnnaBridge 165:e614a9f1c9e2 2015 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2016 * @retval None
AnnaBridge 165:e614a9f1c9e2 2017 */
AnnaBridge 165:e614a9f1c9e2 2018 __STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2019 {
AnnaBridge 165:e614a9f1c9e2 2020 __IO uint32_t tmpreg;
AnnaBridge 165:e614a9f1c9e2 2021 tmpreg = USARTx->SR;
AnnaBridge 165:e614a9f1c9e2 2022 (void) tmpreg;
AnnaBridge 165:e614a9f1c9e2 2023 tmpreg = USARTx->DR;
AnnaBridge 165:e614a9f1c9e2 2024 (void) tmpreg;
AnnaBridge 165:e614a9f1c9e2 2025 }
AnnaBridge 165:e614a9f1c9e2 2026
AnnaBridge 165:e614a9f1c9e2 2027 /**
AnnaBridge 165:e614a9f1c9e2 2028 * @brief Clear Transmission Complete Flag
AnnaBridge 165:e614a9f1c9e2 2029 * @rmtoll SR TC LL_USART_ClearFlag_TC
AnnaBridge 165:e614a9f1c9e2 2030 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2031 * @retval None
AnnaBridge 165:e614a9f1c9e2 2032 */
AnnaBridge 165:e614a9f1c9e2 2033 __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2034 {
AnnaBridge 165:e614a9f1c9e2 2035 WRITE_REG(USARTx->SR , ~(USART_SR_TC));
AnnaBridge 165:e614a9f1c9e2 2036 }
AnnaBridge 165:e614a9f1c9e2 2037
AnnaBridge 165:e614a9f1c9e2 2038 /**
AnnaBridge 165:e614a9f1c9e2 2039 * @brief Clear RX Not Empty Flag
AnnaBridge 165:e614a9f1c9e2 2040 * @rmtoll SR RXNE LL_USART_ClearFlag_RXNE
AnnaBridge 165:e614a9f1c9e2 2041 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2042 * @retval None
AnnaBridge 165:e614a9f1c9e2 2043 */
AnnaBridge 165:e614a9f1c9e2 2044 __STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2045 {
AnnaBridge 165:e614a9f1c9e2 2046 WRITE_REG(USARTx->SR , ~(USART_SR_RXNE));
AnnaBridge 165:e614a9f1c9e2 2047 }
AnnaBridge 165:e614a9f1c9e2 2048
AnnaBridge 165:e614a9f1c9e2 2049 /**
AnnaBridge 165:e614a9f1c9e2 2050 * @brief Clear LIN Break Detection Flag
AnnaBridge 165:e614a9f1c9e2 2051 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 2052 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 2053 * @rmtoll SR LBD LL_USART_ClearFlag_LBD
AnnaBridge 165:e614a9f1c9e2 2054 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2055 * @retval None
AnnaBridge 165:e614a9f1c9e2 2056 */
AnnaBridge 165:e614a9f1c9e2 2057 __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2058 {
AnnaBridge 165:e614a9f1c9e2 2059 WRITE_REG(USARTx->SR , ~(USART_SR_LBD));
AnnaBridge 165:e614a9f1c9e2 2060 }
AnnaBridge 165:e614a9f1c9e2 2061
AnnaBridge 165:e614a9f1c9e2 2062 /**
AnnaBridge 165:e614a9f1c9e2 2063 * @brief Clear CTS Interrupt Flag
AnnaBridge 165:e614a9f1c9e2 2064 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 2065 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 2066 * @rmtoll SR CTS LL_USART_ClearFlag_nCTS
AnnaBridge 165:e614a9f1c9e2 2067 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2068 * @retval None
AnnaBridge 165:e614a9f1c9e2 2069 */
AnnaBridge 165:e614a9f1c9e2 2070 __STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2071 {
AnnaBridge 165:e614a9f1c9e2 2072 WRITE_REG(USARTx->SR , ~(USART_SR_CTS));
AnnaBridge 165:e614a9f1c9e2 2073 }
AnnaBridge 165:e614a9f1c9e2 2074
AnnaBridge 165:e614a9f1c9e2 2075 /**
AnnaBridge 165:e614a9f1c9e2 2076 * @}
AnnaBridge 165:e614a9f1c9e2 2077 */
AnnaBridge 165:e614a9f1c9e2 2078
AnnaBridge 165:e614a9f1c9e2 2079 /** @defgroup USART_LL_EF_IT_Management IT_Management
AnnaBridge 165:e614a9f1c9e2 2080 * @{
AnnaBridge 165:e614a9f1c9e2 2081 */
AnnaBridge 165:e614a9f1c9e2 2082
AnnaBridge 165:e614a9f1c9e2 2083 /**
AnnaBridge 165:e614a9f1c9e2 2084 * @brief Enable IDLE Interrupt
AnnaBridge 165:e614a9f1c9e2 2085 * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
AnnaBridge 165:e614a9f1c9e2 2086 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2087 * @retval None
AnnaBridge 165:e614a9f1c9e2 2088 */
AnnaBridge 165:e614a9f1c9e2 2089 __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2090 {
AnnaBridge 165:e614a9f1c9e2 2091 SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
AnnaBridge 165:e614a9f1c9e2 2092 }
AnnaBridge 165:e614a9f1c9e2 2093
AnnaBridge 165:e614a9f1c9e2 2094 /**
AnnaBridge 165:e614a9f1c9e2 2095 * @brief Enable RX Not Empty Interrupt
AnnaBridge 165:e614a9f1c9e2 2096 * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
AnnaBridge 165:e614a9f1c9e2 2097 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2098 * @retval None
AnnaBridge 165:e614a9f1c9e2 2099 */
AnnaBridge 165:e614a9f1c9e2 2100 __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2101 {
AnnaBridge 165:e614a9f1c9e2 2102 SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
AnnaBridge 165:e614a9f1c9e2 2103 }
AnnaBridge 165:e614a9f1c9e2 2104
AnnaBridge 165:e614a9f1c9e2 2105 /**
AnnaBridge 165:e614a9f1c9e2 2106 * @brief Enable Transmission Complete Interrupt
AnnaBridge 165:e614a9f1c9e2 2107 * @rmtoll CR1 TCIE LL_USART_EnableIT_TC
AnnaBridge 165:e614a9f1c9e2 2108 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2109 * @retval None
AnnaBridge 165:e614a9f1c9e2 2110 */
AnnaBridge 165:e614a9f1c9e2 2111 __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2112 {
AnnaBridge 165:e614a9f1c9e2 2113 SET_BIT(USARTx->CR1, USART_CR1_TCIE);
AnnaBridge 165:e614a9f1c9e2 2114 }
AnnaBridge 165:e614a9f1c9e2 2115
AnnaBridge 165:e614a9f1c9e2 2116 /**
AnnaBridge 165:e614a9f1c9e2 2117 * @brief Enable TX Empty Interrupt
AnnaBridge 165:e614a9f1c9e2 2118 * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
AnnaBridge 165:e614a9f1c9e2 2119 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2120 * @retval None
AnnaBridge 165:e614a9f1c9e2 2121 */
AnnaBridge 165:e614a9f1c9e2 2122 __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2123 {
AnnaBridge 165:e614a9f1c9e2 2124 SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
AnnaBridge 165:e614a9f1c9e2 2125 }
AnnaBridge 165:e614a9f1c9e2 2126
AnnaBridge 165:e614a9f1c9e2 2127 /**
AnnaBridge 165:e614a9f1c9e2 2128 * @brief Enable Parity Error Interrupt
AnnaBridge 165:e614a9f1c9e2 2129 * @rmtoll CR1 PEIE LL_USART_EnableIT_PE
AnnaBridge 165:e614a9f1c9e2 2130 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2131 * @retval None
AnnaBridge 165:e614a9f1c9e2 2132 */
AnnaBridge 165:e614a9f1c9e2 2133 __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2134 {
AnnaBridge 165:e614a9f1c9e2 2135 SET_BIT(USARTx->CR1, USART_CR1_PEIE);
AnnaBridge 165:e614a9f1c9e2 2136 }
AnnaBridge 165:e614a9f1c9e2 2137
AnnaBridge 165:e614a9f1c9e2 2138 /**
AnnaBridge 165:e614a9f1c9e2 2139 * @brief Enable LIN Break Detection Interrupt
AnnaBridge 165:e614a9f1c9e2 2140 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 2141 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 2142 * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
AnnaBridge 165:e614a9f1c9e2 2143 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2144 * @retval None
AnnaBridge 165:e614a9f1c9e2 2145 */
AnnaBridge 165:e614a9f1c9e2 2146 __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2147 {
AnnaBridge 165:e614a9f1c9e2 2148 SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
AnnaBridge 165:e614a9f1c9e2 2149 }
AnnaBridge 165:e614a9f1c9e2 2150
AnnaBridge 165:e614a9f1c9e2 2151 /**
AnnaBridge 165:e614a9f1c9e2 2152 * @brief Enable Error Interrupt
AnnaBridge 165:e614a9f1c9e2 2153 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
AnnaBridge 165:e614a9f1c9e2 2154 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
AnnaBridge 165:e614a9f1c9e2 2155 * 0: Interrupt is inhibited
AnnaBridge 165:e614a9f1c9e2 2156 * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
AnnaBridge 165:e614a9f1c9e2 2157 * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
AnnaBridge 165:e614a9f1c9e2 2158 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2159 * @retval None
AnnaBridge 165:e614a9f1c9e2 2160 */
AnnaBridge 165:e614a9f1c9e2 2161 __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2162 {
AnnaBridge 165:e614a9f1c9e2 2163 SET_BIT(USARTx->CR3, USART_CR3_EIE);
AnnaBridge 165:e614a9f1c9e2 2164 }
AnnaBridge 165:e614a9f1c9e2 2165
AnnaBridge 165:e614a9f1c9e2 2166 /**
AnnaBridge 165:e614a9f1c9e2 2167 * @brief Enable CTS Interrupt
AnnaBridge 165:e614a9f1c9e2 2168 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 2169 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 2170 * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
AnnaBridge 165:e614a9f1c9e2 2171 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2172 * @retval None
AnnaBridge 165:e614a9f1c9e2 2173 */
AnnaBridge 165:e614a9f1c9e2 2174 __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2175 {
AnnaBridge 165:e614a9f1c9e2 2176 SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
AnnaBridge 165:e614a9f1c9e2 2177 }
AnnaBridge 165:e614a9f1c9e2 2178
AnnaBridge 165:e614a9f1c9e2 2179 /**
AnnaBridge 165:e614a9f1c9e2 2180 * @brief Disable IDLE Interrupt
AnnaBridge 165:e614a9f1c9e2 2181 * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
AnnaBridge 165:e614a9f1c9e2 2182 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2183 * @retval None
AnnaBridge 165:e614a9f1c9e2 2184 */
AnnaBridge 165:e614a9f1c9e2 2185 __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2186 {
AnnaBridge 165:e614a9f1c9e2 2187 CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
AnnaBridge 165:e614a9f1c9e2 2188 }
AnnaBridge 165:e614a9f1c9e2 2189
AnnaBridge 165:e614a9f1c9e2 2190 /**
AnnaBridge 165:e614a9f1c9e2 2191 * @brief Disable RX Not Empty Interrupt
AnnaBridge 165:e614a9f1c9e2 2192 * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
AnnaBridge 165:e614a9f1c9e2 2193 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2194 * @retval None
AnnaBridge 165:e614a9f1c9e2 2195 */
AnnaBridge 165:e614a9f1c9e2 2196 __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2197 {
AnnaBridge 165:e614a9f1c9e2 2198 CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
AnnaBridge 165:e614a9f1c9e2 2199 }
AnnaBridge 165:e614a9f1c9e2 2200
AnnaBridge 165:e614a9f1c9e2 2201 /**
AnnaBridge 165:e614a9f1c9e2 2202 * @brief Disable Transmission Complete Interrupt
AnnaBridge 165:e614a9f1c9e2 2203 * @rmtoll CR1 TCIE LL_USART_DisableIT_TC
AnnaBridge 165:e614a9f1c9e2 2204 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2205 * @retval None
AnnaBridge 165:e614a9f1c9e2 2206 */
AnnaBridge 165:e614a9f1c9e2 2207 __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2208 {
AnnaBridge 165:e614a9f1c9e2 2209 CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
AnnaBridge 165:e614a9f1c9e2 2210 }
AnnaBridge 165:e614a9f1c9e2 2211
AnnaBridge 165:e614a9f1c9e2 2212 /**
AnnaBridge 165:e614a9f1c9e2 2213 * @brief Disable TX Empty Interrupt
AnnaBridge 165:e614a9f1c9e2 2214 * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
AnnaBridge 165:e614a9f1c9e2 2215 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2216 * @retval None
AnnaBridge 165:e614a9f1c9e2 2217 */
AnnaBridge 165:e614a9f1c9e2 2218 __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2219 {
AnnaBridge 165:e614a9f1c9e2 2220 CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
AnnaBridge 165:e614a9f1c9e2 2221 }
AnnaBridge 165:e614a9f1c9e2 2222
AnnaBridge 165:e614a9f1c9e2 2223 /**
AnnaBridge 165:e614a9f1c9e2 2224 * @brief Disable Parity Error Interrupt
AnnaBridge 165:e614a9f1c9e2 2225 * @rmtoll CR1 PEIE LL_USART_DisableIT_PE
AnnaBridge 165:e614a9f1c9e2 2226 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2227 * @retval None
AnnaBridge 165:e614a9f1c9e2 2228 */
AnnaBridge 165:e614a9f1c9e2 2229 __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2230 {
AnnaBridge 165:e614a9f1c9e2 2231 CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
AnnaBridge 165:e614a9f1c9e2 2232 }
AnnaBridge 165:e614a9f1c9e2 2233
AnnaBridge 165:e614a9f1c9e2 2234 /**
AnnaBridge 165:e614a9f1c9e2 2235 * @brief Disable LIN Break Detection Interrupt
AnnaBridge 165:e614a9f1c9e2 2236 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 2237 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 2238 * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
AnnaBridge 165:e614a9f1c9e2 2239 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2240 * @retval None
AnnaBridge 165:e614a9f1c9e2 2241 */
AnnaBridge 165:e614a9f1c9e2 2242 __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2243 {
AnnaBridge 165:e614a9f1c9e2 2244 CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
AnnaBridge 165:e614a9f1c9e2 2245 }
AnnaBridge 165:e614a9f1c9e2 2246
AnnaBridge 165:e614a9f1c9e2 2247 /**
AnnaBridge 165:e614a9f1c9e2 2248 * @brief Disable Error Interrupt
AnnaBridge 165:e614a9f1c9e2 2249 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
AnnaBridge 165:e614a9f1c9e2 2250 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
AnnaBridge 165:e614a9f1c9e2 2251 * 0: Interrupt is inhibited
AnnaBridge 165:e614a9f1c9e2 2252 * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
AnnaBridge 165:e614a9f1c9e2 2253 * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
AnnaBridge 165:e614a9f1c9e2 2254 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2255 * @retval None
AnnaBridge 165:e614a9f1c9e2 2256 */
AnnaBridge 165:e614a9f1c9e2 2257 __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2258 {
AnnaBridge 165:e614a9f1c9e2 2259 CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
AnnaBridge 165:e614a9f1c9e2 2260 }
AnnaBridge 165:e614a9f1c9e2 2261
AnnaBridge 165:e614a9f1c9e2 2262 /**
AnnaBridge 165:e614a9f1c9e2 2263 * @brief Disable CTS Interrupt
AnnaBridge 165:e614a9f1c9e2 2264 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 2265 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 2266 * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
AnnaBridge 165:e614a9f1c9e2 2267 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2268 * @retval None
AnnaBridge 165:e614a9f1c9e2 2269 */
AnnaBridge 165:e614a9f1c9e2 2270 __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2271 {
AnnaBridge 165:e614a9f1c9e2 2272 CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
AnnaBridge 165:e614a9f1c9e2 2273 }
AnnaBridge 165:e614a9f1c9e2 2274
AnnaBridge 165:e614a9f1c9e2 2275 /**
AnnaBridge 165:e614a9f1c9e2 2276 * @brief Check if the USART IDLE Interrupt source is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 2277 * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
AnnaBridge 165:e614a9f1c9e2 2278 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2279 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 2280 */
AnnaBridge 165:e614a9f1c9e2 2281 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2282 {
AnnaBridge 165:e614a9f1c9e2 2283 return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
AnnaBridge 165:e614a9f1c9e2 2284 }
AnnaBridge 165:e614a9f1c9e2 2285
AnnaBridge 165:e614a9f1c9e2 2286 /**
AnnaBridge 165:e614a9f1c9e2 2287 * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 2288 * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
AnnaBridge 165:e614a9f1c9e2 2289 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2290 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 2291 */
AnnaBridge 165:e614a9f1c9e2 2292 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2293 {
AnnaBridge 165:e614a9f1c9e2 2294 return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
AnnaBridge 165:e614a9f1c9e2 2295 }
AnnaBridge 165:e614a9f1c9e2 2296
AnnaBridge 165:e614a9f1c9e2 2297 /**
AnnaBridge 165:e614a9f1c9e2 2298 * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 2299 * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
AnnaBridge 165:e614a9f1c9e2 2300 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2301 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 2302 */
AnnaBridge 165:e614a9f1c9e2 2303 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2304 {
AnnaBridge 165:e614a9f1c9e2 2305 return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
AnnaBridge 165:e614a9f1c9e2 2306 }
AnnaBridge 165:e614a9f1c9e2 2307
AnnaBridge 165:e614a9f1c9e2 2308 /**
AnnaBridge 165:e614a9f1c9e2 2309 * @brief Check if the USART TX Empty Interrupt is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 2310 * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
AnnaBridge 165:e614a9f1c9e2 2311 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2312 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 2313 */
AnnaBridge 165:e614a9f1c9e2 2314 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2315 {
AnnaBridge 165:e614a9f1c9e2 2316 return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
AnnaBridge 165:e614a9f1c9e2 2317 }
AnnaBridge 165:e614a9f1c9e2 2318
AnnaBridge 165:e614a9f1c9e2 2319 /**
AnnaBridge 165:e614a9f1c9e2 2320 * @brief Check if the USART Parity Error Interrupt is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 2321 * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
AnnaBridge 165:e614a9f1c9e2 2322 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2323 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 2324 */
AnnaBridge 165:e614a9f1c9e2 2325 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2326 {
AnnaBridge 165:e614a9f1c9e2 2327 return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
AnnaBridge 165:e614a9f1c9e2 2328 }
AnnaBridge 165:e614a9f1c9e2 2329
AnnaBridge 165:e614a9f1c9e2 2330 /**
AnnaBridge 165:e614a9f1c9e2 2331 * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 2332 * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 2333 * LIN feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 2334 * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
AnnaBridge 165:e614a9f1c9e2 2335 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2336 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 2337 */
AnnaBridge 165:e614a9f1c9e2 2338 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2339 {
AnnaBridge 165:e614a9f1c9e2 2340 return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
AnnaBridge 165:e614a9f1c9e2 2341 }
AnnaBridge 165:e614a9f1c9e2 2342
AnnaBridge 165:e614a9f1c9e2 2343 /**
AnnaBridge 165:e614a9f1c9e2 2344 * @brief Check if the USART Error Interrupt is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 2345 * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
AnnaBridge 165:e614a9f1c9e2 2346 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2347 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 2348 */
AnnaBridge 165:e614a9f1c9e2 2349 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2350 {
AnnaBridge 165:e614a9f1c9e2 2351 return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
AnnaBridge 165:e614a9f1c9e2 2352 }
AnnaBridge 165:e614a9f1c9e2 2353
AnnaBridge 165:e614a9f1c9e2 2354 /**
AnnaBridge 165:e614a9f1c9e2 2355 * @brief Check if the USART CTS Interrupt is enabled or disabled.
AnnaBridge 165:e614a9f1c9e2 2356 * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
AnnaBridge 165:e614a9f1c9e2 2357 * Hardware Flow control feature is supported by the USARTx instance.
AnnaBridge 165:e614a9f1c9e2 2358 * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
AnnaBridge 165:e614a9f1c9e2 2359 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2360 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 2361 */
AnnaBridge 165:e614a9f1c9e2 2362 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2363 {
AnnaBridge 165:e614a9f1c9e2 2364 return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
AnnaBridge 165:e614a9f1c9e2 2365 }
AnnaBridge 165:e614a9f1c9e2 2366
AnnaBridge 165:e614a9f1c9e2 2367 /**
AnnaBridge 165:e614a9f1c9e2 2368 * @}
AnnaBridge 165:e614a9f1c9e2 2369 */
AnnaBridge 165:e614a9f1c9e2 2370
AnnaBridge 165:e614a9f1c9e2 2371 /** @defgroup USART_LL_EF_DMA_Management DMA_Management
AnnaBridge 165:e614a9f1c9e2 2372 * @{
AnnaBridge 165:e614a9f1c9e2 2373 */
AnnaBridge 165:e614a9f1c9e2 2374
AnnaBridge 165:e614a9f1c9e2 2375 /**
AnnaBridge 165:e614a9f1c9e2 2376 * @brief Enable DMA Mode for reception
AnnaBridge 165:e614a9f1c9e2 2377 * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX
AnnaBridge 165:e614a9f1c9e2 2378 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2379 * @retval None
AnnaBridge 165:e614a9f1c9e2 2380 */
AnnaBridge 165:e614a9f1c9e2 2381 __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2382 {
AnnaBridge 165:e614a9f1c9e2 2383 SET_BIT(USARTx->CR3, USART_CR3_DMAR);
AnnaBridge 165:e614a9f1c9e2 2384 }
AnnaBridge 165:e614a9f1c9e2 2385
AnnaBridge 165:e614a9f1c9e2 2386 /**
AnnaBridge 165:e614a9f1c9e2 2387 * @brief Disable DMA Mode for reception
AnnaBridge 165:e614a9f1c9e2 2388 * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
AnnaBridge 165:e614a9f1c9e2 2389 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2390 * @retval None
AnnaBridge 165:e614a9f1c9e2 2391 */
AnnaBridge 165:e614a9f1c9e2 2392 __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2393 {
AnnaBridge 165:e614a9f1c9e2 2394 CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
AnnaBridge 165:e614a9f1c9e2 2395 }
AnnaBridge 165:e614a9f1c9e2 2396
AnnaBridge 165:e614a9f1c9e2 2397 /**
AnnaBridge 165:e614a9f1c9e2 2398 * @brief Check if DMA Mode is enabled for reception
AnnaBridge 165:e614a9f1c9e2 2399 * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX
AnnaBridge 165:e614a9f1c9e2 2400 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2401 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 2402 */
AnnaBridge 165:e614a9f1c9e2 2403 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2404 {
AnnaBridge 165:e614a9f1c9e2 2405 return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
AnnaBridge 165:e614a9f1c9e2 2406 }
AnnaBridge 165:e614a9f1c9e2 2407
AnnaBridge 165:e614a9f1c9e2 2408 /**
AnnaBridge 165:e614a9f1c9e2 2409 * @brief Enable DMA Mode for transmission
AnnaBridge 165:e614a9f1c9e2 2410 * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
AnnaBridge 165:e614a9f1c9e2 2411 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2412 * @retval None
AnnaBridge 165:e614a9f1c9e2 2413 */
AnnaBridge 165:e614a9f1c9e2 2414 __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2415 {
AnnaBridge 165:e614a9f1c9e2 2416 SET_BIT(USARTx->CR3, USART_CR3_DMAT);
AnnaBridge 165:e614a9f1c9e2 2417 }
AnnaBridge 165:e614a9f1c9e2 2418
AnnaBridge 165:e614a9f1c9e2 2419 /**
AnnaBridge 165:e614a9f1c9e2 2420 * @brief Disable DMA Mode for transmission
AnnaBridge 165:e614a9f1c9e2 2421 * @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX
AnnaBridge 165:e614a9f1c9e2 2422 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2423 * @retval None
AnnaBridge 165:e614a9f1c9e2 2424 */
AnnaBridge 165:e614a9f1c9e2 2425 __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2426 {
AnnaBridge 165:e614a9f1c9e2 2427 CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
AnnaBridge 165:e614a9f1c9e2 2428 }
AnnaBridge 165:e614a9f1c9e2 2429
AnnaBridge 165:e614a9f1c9e2 2430 /**
AnnaBridge 165:e614a9f1c9e2 2431 * @brief Check if DMA Mode is enabled for transmission
AnnaBridge 165:e614a9f1c9e2 2432 * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX
AnnaBridge 165:e614a9f1c9e2 2433 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2434 * @retval State of bit (1 or 0).
AnnaBridge 165:e614a9f1c9e2 2435 */
AnnaBridge 165:e614a9f1c9e2 2436 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2437 {
AnnaBridge 165:e614a9f1c9e2 2438 return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
AnnaBridge 165:e614a9f1c9e2 2439 }
AnnaBridge 165:e614a9f1c9e2 2440
AnnaBridge 165:e614a9f1c9e2 2441 /**
AnnaBridge 165:e614a9f1c9e2 2442 * @brief Get the data register address used for DMA transfer
AnnaBridge 165:e614a9f1c9e2 2443 * @rmtoll DR DR LL_USART_DMA_GetRegAddr
AnnaBridge 165:e614a9f1c9e2 2444 * @note Address of Data Register is valid for both Transmit and Receive transfers.
AnnaBridge 165:e614a9f1c9e2 2445 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2446 * @retval Address of data register
AnnaBridge 165:e614a9f1c9e2 2447 */
AnnaBridge 165:e614a9f1c9e2 2448 __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2449 {
AnnaBridge 165:e614a9f1c9e2 2450 /* return address of DR register */
AnnaBridge 165:e614a9f1c9e2 2451 return ((uint32_t) &(USARTx->DR));
AnnaBridge 165:e614a9f1c9e2 2452 }
AnnaBridge 165:e614a9f1c9e2 2453
AnnaBridge 165:e614a9f1c9e2 2454 /**
AnnaBridge 165:e614a9f1c9e2 2455 * @}
AnnaBridge 165:e614a9f1c9e2 2456 */
AnnaBridge 165:e614a9f1c9e2 2457
AnnaBridge 165:e614a9f1c9e2 2458 /** @defgroup USART_LL_EF_Data_Management Data_Management
AnnaBridge 165:e614a9f1c9e2 2459 * @{
AnnaBridge 165:e614a9f1c9e2 2460 */
AnnaBridge 165:e614a9f1c9e2 2461
AnnaBridge 165:e614a9f1c9e2 2462 /**
AnnaBridge 165:e614a9f1c9e2 2463 * @brief Read Receiver Data register (Receive Data value, 8 bits)
AnnaBridge 165:e614a9f1c9e2 2464 * @rmtoll DR DR LL_USART_ReceiveData8
AnnaBridge 165:e614a9f1c9e2 2465 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2466 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 165:e614a9f1c9e2 2467 */
AnnaBridge 165:e614a9f1c9e2 2468 __STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2469 {
AnnaBridge 165:e614a9f1c9e2 2470 return (uint8_t)(READ_BIT(USARTx->DR, USART_DR_DR));
AnnaBridge 165:e614a9f1c9e2 2471 }
AnnaBridge 165:e614a9f1c9e2 2472
AnnaBridge 165:e614a9f1c9e2 2473 /**
AnnaBridge 165:e614a9f1c9e2 2474 * @brief Read Receiver Data register (Receive Data value, 9 bits)
AnnaBridge 165:e614a9f1c9e2 2475 * @rmtoll DR DR LL_USART_ReceiveData9
AnnaBridge 165:e614a9f1c9e2 2476 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2477 * @retval Value between Min_Data=0x00 and Max_Data=0x1FF
AnnaBridge 165:e614a9f1c9e2 2478 */
AnnaBridge 165:e614a9f1c9e2 2479 __STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2480 {
AnnaBridge 165:e614a9f1c9e2 2481 return (uint16_t)(READ_BIT(USARTx->DR, USART_DR_DR));
AnnaBridge 165:e614a9f1c9e2 2482 }
AnnaBridge 165:e614a9f1c9e2 2483
AnnaBridge 165:e614a9f1c9e2 2484 /**
AnnaBridge 165:e614a9f1c9e2 2485 * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
AnnaBridge 165:e614a9f1c9e2 2486 * @rmtoll DR DR LL_USART_TransmitData8
AnnaBridge 165:e614a9f1c9e2 2487 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2488 * @param Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 165:e614a9f1c9e2 2489 * @retval None
AnnaBridge 165:e614a9f1c9e2 2490 */
AnnaBridge 165:e614a9f1c9e2 2491 __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
AnnaBridge 165:e614a9f1c9e2 2492 {
AnnaBridge 165:e614a9f1c9e2 2493 USARTx->DR = Value;
AnnaBridge 165:e614a9f1c9e2 2494 }
AnnaBridge 165:e614a9f1c9e2 2495
AnnaBridge 165:e614a9f1c9e2 2496 /**
AnnaBridge 165:e614a9f1c9e2 2497 * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
AnnaBridge 165:e614a9f1c9e2 2498 * @rmtoll DR DR LL_USART_TransmitData9
AnnaBridge 165:e614a9f1c9e2 2499 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2500 * @param Value between Min_Data=0x00 and Max_Data=0x1FF
AnnaBridge 165:e614a9f1c9e2 2501 * @retval None
AnnaBridge 165:e614a9f1c9e2 2502 */
AnnaBridge 165:e614a9f1c9e2 2503 __STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
AnnaBridge 165:e614a9f1c9e2 2504 {
AnnaBridge 165:e614a9f1c9e2 2505 USARTx->DR = Value & 0x1FFU;
AnnaBridge 165:e614a9f1c9e2 2506 }
AnnaBridge 165:e614a9f1c9e2 2507
AnnaBridge 165:e614a9f1c9e2 2508 /**
AnnaBridge 165:e614a9f1c9e2 2509 * @}
AnnaBridge 165:e614a9f1c9e2 2510 */
AnnaBridge 165:e614a9f1c9e2 2511
AnnaBridge 165:e614a9f1c9e2 2512 /** @defgroup USART_LL_EF_Execution Execution
AnnaBridge 165:e614a9f1c9e2 2513 * @{
AnnaBridge 165:e614a9f1c9e2 2514 */
AnnaBridge 165:e614a9f1c9e2 2515
AnnaBridge 165:e614a9f1c9e2 2516 /**
AnnaBridge 165:e614a9f1c9e2 2517 * @brief Request Break sending
AnnaBridge 165:e614a9f1c9e2 2518 * @rmtoll CR1 SBK LL_USART_RequestBreakSending
AnnaBridge 165:e614a9f1c9e2 2519 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2520 * @retval None
AnnaBridge 165:e614a9f1c9e2 2521 */
AnnaBridge 165:e614a9f1c9e2 2522 __STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2523 {
AnnaBridge 165:e614a9f1c9e2 2524 SET_BIT(USARTx->CR1, USART_CR1_SBK);
AnnaBridge 165:e614a9f1c9e2 2525 }
AnnaBridge 165:e614a9f1c9e2 2526
AnnaBridge 165:e614a9f1c9e2 2527 /**
AnnaBridge 165:e614a9f1c9e2 2528 * @brief Put USART in Mute mode
AnnaBridge 165:e614a9f1c9e2 2529 * @rmtoll CR1 RWU LL_USART_RequestEnterMuteMode
AnnaBridge 165:e614a9f1c9e2 2530 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2531 * @retval None
AnnaBridge 165:e614a9f1c9e2 2532 */
AnnaBridge 165:e614a9f1c9e2 2533 __STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2534 {
AnnaBridge 165:e614a9f1c9e2 2535 SET_BIT(USARTx->CR1, USART_CR1_RWU);
AnnaBridge 165:e614a9f1c9e2 2536 }
AnnaBridge 165:e614a9f1c9e2 2537
AnnaBridge 165:e614a9f1c9e2 2538 /**
AnnaBridge 165:e614a9f1c9e2 2539 * @brief Put USART in Active mode
AnnaBridge 165:e614a9f1c9e2 2540 * @rmtoll CR1 RWU LL_USART_RequestExitMuteMode
AnnaBridge 165:e614a9f1c9e2 2541 * @param USARTx USART Instance
AnnaBridge 165:e614a9f1c9e2 2542 * @retval None
AnnaBridge 165:e614a9f1c9e2 2543 */
AnnaBridge 165:e614a9f1c9e2 2544 __STATIC_INLINE void LL_USART_RequestExitMuteMode(USART_TypeDef *USARTx)
AnnaBridge 165:e614a9f1c9e2 2545 {
AnnaBridge 165:e614a9f1c9e2 2546 CLEAR_BIT(USARTx->CR1, USART_CR1_RWU);
AnnaBridge 165:e614a9f1c9e2 2547 }
AnnaBridge 165:e614a9f1c9e2 2548
AnnaBridge 165:e614a9f1c9e2 2549 /**
AnnaBridge 165:e614a9f1c9e2 2550 * @}
AnnaBridge 165:e614a9f1c9e2 2551 */
AnnaBridge 165:e614a9f1c9e2 2552
AnnaBridge 165:e614a9f1c9e2 2553 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 165:e614a9f1c9e2 2554 /** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
AnnaBridge 165:e614a9f1c9e2 2555 * @{
AnnaBridge 165:e614a9f1c9e2 2556 */
AnnaBridge 165:e614a9f1c9e2 2557 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
AnnaBridge 165:e614a9f1c9e2 2558 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
AnnaBridge 165:e614a9f1c9e2 2559 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
AnnaBridge 165:e614a9f1c9e2 2560 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
AnnaBridge 165:e614a9f1c9e2 2561 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
AnnaBridge 165:e614a9f1c9e2 2562 /**
AnnaBridge 165:e614a9f1c9e2 2563 * @}
AnnaBridge 165:e614a9f1c9e2 2564 */
AnnaBridge 165:e614a9f1c9e2 2565 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 165:e614a9f1c9e2 2566
AnnaBridge 165:e614a9f1c9e2 2567 /**
AnnaBridge 165:e614a9f1c9e2 2568 * @}
AnnaBridge 165:e614a9f1c9e2 2569 */
AnnaBridge 165:e614a9f1c9e2 2570
AnnaBridge 165:e614a9f1c9e2 2571 /**
AnnaBridge 165:e614a9f1c9e2 2572 * @}
AnnaBridge 165:e614a9f1c9e2 2573 */
AnnaBridge 165:e614a9f1c9e2 2574
AnnaBridge 165:e614a9f1c9e2 2575 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
AnnaBridge 165:e614a9f1c9e2 2576
AnnaBridge 165:e614a9f1c9e2 2577 /**
AnnaBridge 165:e614a9f1c9e2 2578 * @}
AnnaBridge 165:e614a9f1c9e2 2579 */
AnnaBridge 165:e614a9f1c9e2 2580
AnnaBridge 165:e614a9f1c9e2 2581 #ifdef __cplusplus
AnnaBridge 165:e614a9f1c9e2 2582 }
AnnaBridge 165:e614a9f1c9e2 2583 #endif
AnnaBridge 165:e614a9f1c9e2 2584
AnnaBridge 165:e614a9f1c9e2 2585 #endif /* __STM32F1xx_LL_USART_H */
AnnaBridge 165:e614a9f1c9e2 2586
AnnaBridge 165:e614a9f1c9e2 2587 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/