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mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_ll_spi.c@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
- Parent:
- 187:0387e8f68319
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 165:e614a9f1c9e2 | 1 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 2 | ****************************************************************************** |
| AnnaBridge | 165:e614a9f1c9e2 | 3 | * @file stm32f1xx_ll_spi.c |
| AnnaBridge | 165:e614a9f1c9e2 | 4 | * @author MCD Application Team |
| AnnaBridge | 165:e614a9f1c9e2 | 5 | * @brief SPI LL module driver. |
| AnnaBridge | 165:e614a9f1c9e2 | 6 | ****************************************************************************** |
| AnnaBridge | 165:e614a9f1c9e2 | 7 | * @attention |
| AnnaBridge | 165:e614a9f1c9e2 | 8 | * |
| AnnaBridge | 165:e614a9f1c9e2 | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 165:e614a9f1c9e2 | 10 | * |
| AnnaBridge | 165:e614a9f1c9e2 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 165:e614a9f1c9e2 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 165:e614a9f1c9e2 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 165:e614a9f1c9e2 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 165:e614a9f1c9e2 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 165:e614a9f1c9e2 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 165:e614a9f1c9e2 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 165:e614a9f1c9e2 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 165:e614a9f1c9e2 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 165:e614a9f1c9e2 | 20 | * without specific prior written permission. |
| AnnaBridge | 165:e614a9f1c9e2 | 21 | * |
| AnnaBridge | 165:e614a9f1c9e2 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 165:e614a9f1c9e2 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 165:e614a9f1c9e2 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 165:e614a9f1c9e2 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 165:e614a9f1c9e2 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 165:e614a9f1c9e2 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 165:e614a9f1c9e2 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 165:e614a9f1c9e2 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 165:e614a9f1c9e2 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 165:e614a9f1c9e2 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 165:e614a9f1c9e2 | 32 | * |
| AnnaBridge | 165:e614a9f1c9e2 | 33 | ****************************************************************************** |
| AnnaBridge | 165:e614a9f1c9e2 | 34 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 35 | #if defined(USE_FULL_LL_DRIVER) |
| AnnaBridge | 165:e614a9f1c9e2 | 36 | |
| AnnaBridge | 165:e614a9f1c9e2 | 37 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 38 | #include "stm32f1xx_ll_spi.h" |
| AnnaBridge | 165:e614a9f1c9e2 | 39 | #include "stm32f1xx_ll_bus.h" |
| AnnaBridge | 165:e614a9f1c9e2 | 40 | #include "stm32f1xx_ll_rcc.h" |
| AnnaBridge | 165:e614a9f1c9e2 | 41 | |
| AnnaBridge | 165:e614a9f1c9e2 | 42 | #ifdef USE_FULL_ASSERT |
| AnnaBridge | 165:e614a9f1c9e2 | 43 | #include "stm32_assert.h" |
| AnnaBridge | 165:e614a9f1c9e2 | 44 | #else |
| AnnaBridge | 165:e614a9f1c9e2 | 45 | #define assert_param(expr) ((void)0U) |
| AnnaBridge | 165:e614a9f1c9e2 | 46 | #endif |
| AnnaBridge | 165:e614a9f1c9e2 | 47 | |
| AnnaBridge | 165:e614a9f1c9e2 | 48 | /** @addtogroup STM32F1xx_LL_Driver |
| AnnaBridge | 165:e614a9f1c9e2 | 49 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 50 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 51 | |
| AnnaBridge | 165:e614a9f1c9e2 | 52 | #if defined (SPI1) || defined (SPI2) || defined (SPI3) |
| AnnaBridge | 165:e614a9f1c9e2 | 53 | |
| AnnaBridge | 165:e614a9f1c9e2 | 54 | /** @addtogroup SPI_LL |
| AnnaBridge | 165:e614a9f1c9e2 | 55 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 56 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 57 | |
| AnnaBridge | 165:e614a9f1c9e2 | 58 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 59 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 60 | |
| AnnaBridge | 165:e614a9f1c9e2 | 61 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 62 | /** @defgroup SPI_LL_Private_Constants SPI Private Constants |
| AnnaBridge | 165:e614a9f1c9e2 | 63 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 64 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 65 | /* SPI registers Masks */ |
| AnnaBridge | 165:e614a9f1c9e2 | 66 | #define SPI_CR1_CLEAR_MASK (SPI_CR1_CPHA | SPI_CR1_CPOL | SPI_CR1_MSTR | \ |
| AnnaBridge | 165:e614a9f1c9e2 | 67 | SPI_CR1_BR | SPI_CR1_LSBFIRST | SPI_CR1_SSI | \ |
| AnnaBridge | 165:e614a9f1c9e2 | 68 | SPI_CR1_SSM | SPI_CR1_RXONLY | SPI_CR1_DFF | \ |
| AnnaBridge | 165:e614a9f1c9e2 | 69 | SPI_CR1_CRCNEXT | SPI_CR1_CRCEN | SPI_CR1_BIDIOE | \ |
| AnnaBridge | 165:e614a9f1c9e2 | 70 | SPI_CR1_BIDIMODE) |
| AnnaBridge | 165:e614a9f1c9e2 | 71 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 72 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 73 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 74 | |
| AnnaBridge | 165:e614a9f1c9e2 | 75 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 76 | /** @defgroup SPI_LL_Private_Macros SPI Private Macros |
| AnnaBridge | 165:e614a9f1c9e2 | 77 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 78 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 79 | #define IS_LL_SPI_TRANSFER_DIRECTION(__VALUE__) (((__VALUE__) == LL_SPI_FULL_DUPLEX) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 80 | || ((__VALUE__) == LL_SPI_SIMPLEX_RX) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 81 | || ((__VALUE__) == LL_SPI_HALF_DUPLEX_RX) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 82 | || ((__VALUE__) == LL_SPI_HALF_DUPLEX_TX)) |
| AnnaBridge | 165:e614a9f1c9e2 | 83 | |
| AnnaBridge | 165:e614a9f1c9e2 | 84 | #define IS_LL_SPI_MODE(__VALUE__) (((__VALUE__) == LL_SPI_MODE_MASTER) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 85 | || ((__VALUE__) == LL_SPI_MODE_SLAVE)) |
| AnnaBridge | 165:e614a9f1c9e2 | 86 | |
| AnnaBridge | 165:e614a9f1c9e2 | 87 | #define IS_LL_SPI_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_SPI_DATAWIDTH_8BIT) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 88 | || ((__VALUE__) == LL_SPI_DATAWIDTH_16BIT)) |
| AnnaBridge | 165:e614a9f1c9e2 | 89 | |
| AnnaBridge | 165:e614a9f1c9e2 | 90 | #define IS_LL_SPI_POLARITY(__VALUE__) (((__VALUE__) == LL_SPI_POLARITY_LOW) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 91 | || ((__VALUE__) == LL_SPI_POLARITY_HIGH)) |
| AnnaBridge | 165:e614a9f1c9e2 | 92 | |
| AnnaBridge | 165:e614a9f1c9e2 | 93 | #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 94 | || ((__VALUE__) == LL_SPI_PHASE_2EDGE)) |
| AnnaBridge | 165:e614a9f1c9e2 | 95 | |
| AnnaBridge | 165:e614a9f1c9e2 | 96 | #define IS_LL_SPI_NSS(__VALUE__) (((__VALUE__) == LL_SPI_NSS_SOFT) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 97 | || ((__VALUE__) == LL_SPI_NSS_HARD_INPUT) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 98 | || ((__VALUE__) == LL_SPI_NSS_HARD_OUTPUT)) |
| AnnaBridge | 165:e614a9f1c9e2 | 99 | |
| AnnaBridge | 165:e614a9f1c9e2 | 100 | #define IS_LL_SPI_BAUDRATE(__VALUE__) (((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV2) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 101 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV4) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 102 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV8) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 103 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV16) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 104 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV32) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 105 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV64) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 106 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV128) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 107 | || ((__VALUE__) == LL_SPI_BAUDRATEPRESCALER_DIV256)) |
| AnnaBridge | 165:e614a9f1c9e2 | 108 | |
| AnnaBridge | 165:e614a9f1c9e2 | 109 | #define IS_LL_SPI_BITORDER(__VALUE__) (((__VALUE__) == LL_SPI_LSB_FIRST) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 110 | || ((__VALUE__) == LL_SPI_MSB_FIRST)) |
| AnnaBridge | 165:e614a9f1c9e2 | 111 | |
| AnnaBridge | 165:e614a9f1c9e2 | 112 | #define IS_LL_SPI_CRCCALCULATION(__VALUE__) (((__VALUE__) == LL_SPI_CRCCALCULATION_ENABLE) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 113 | || ((__VALUE__) == LL_SPI_CRCCALCULATION_DISABLE)) |
| AnnaBridge | 165:e614a9f1c9e2 | 114 | |
| AnnaBridge | 165:e614a9f1c9e2 | 115 | #define IS_LL_SPI_CRC_POLYNOMIAL(__VALUE__) ((__VALUE__) >= 0x1U) |
| AnnaBridge | 165:e614a9f1c9e2 | 116 | |
| AnnaBridge | 165:e614a9f1c9e2 | 117 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 118 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 119 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 120 | |
| AnnaBridge | 165:e614a9f1c9e2 | 121 | /* Private function prototypes -----------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 122 | |
| AnnaBridge | 165:e614a9f1c9e2 | 123 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 124 | /** @addtogroup SPI_LL_Exported_Functions |
| AnnaBridge | 165:e614a9f1c9e2 | 125 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 126 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 127 | |
| AnnaBridge | 165:e614a9f1c9e2 | 128 | /** @addtogroup SPI_LL_EF_Init |
| AnnaBridge | 165:e614a9f1c9e2 | 129 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 130 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 131 | |
| AnnaBridge | 165:e614a9f1c9e2 | 132 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 133 | * @brief De-initialize the SPI registers to their default reset values. |
| AnnaBridge | 165:e614a9f1c9e2 | 134 | * @param SPIx SPI Instance |
| AnnaBridge | 165:e614a9f1c9e2 | 135 | * @retval An ErrorStatus enumeration value: |
| AnnaBridge | 165:e614a9f1c9e2 | 136 | * - SUCCESS: SPI registers are de-initialized |
| AnnaBridge | 165:e614a9f1c9e2 | 137 | * - ERROR: SPI registers are not de-initialized |
| AnnaBridge | 165:e614a9f1c9e2 | 138 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 139 | ErrorStatus LL_SPI_DeInit(SPI_TypeDef *SPIx) |
| AnnaBridge | 165:e614a9f1c9e2 | 140 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 141 | ErrorStatus status = ERROR; |
| AnnaBridge | 165:e614a9f1c9e2 | 142 | |
| AnnaBridge | 165:e614a9f1c9e2 | 143 | /* Check the parameters */ |
| AnnaBridge | 165:e614a9f1c9e2 | 144 | assert_param(IS_SPI_ALL_INSTANCE(SPIx)); |
| AnnaBridge | 165:e614a9f1c9e2 | 145 | |
| AnnaBridge | 165:e614a9f1c9e2 | 146 | #if defined(SPI1) |
| AnnaBridge | 165:e614a9f1c9e2 | 147 | if (SPIx == SPI1) |
| AnnaBridge | 165:e614a9f1c9e2 | 148 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 149 | /* Force reset of SPI clock */ |
| AnnaBridge | 165:e614a9f1c9e2 | 150 | LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI1); |
| AnnaBridge | 165:e614a9f1c9e2 | 151 | |
| AnnaBridge | 165:e614a9f1c9e2 | 152 | /* Release reset of SPI clock */ |
| AnnaBridge | 165:e614a9f1c9e2 | 153 | LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_SPI1); |
| AnnaBridge | 165:e614a9f1c9e2 | 154 | |
| AnnaBridge | 165:e614a9f1c9e2 | 155 | status = SUCCESS; |
| AnnaBridge | 165:e614a9f1c9e2 | 156 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 157 | #endif /* SPI1 */ |
| AnnaBridge | 165:e614a9f1c9e2 | 158 | #if defined(SPI2) |
| AnnaBridge | 165:e614a9f1c9e2 | 159 | if (SPIx == SPI2) |
| AnnaBridge | 165:e614a9f1c9e2 | 160 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 161 | /* Force reset of SPI clock */ |
| AnnaBridge | 165:e614a9f1c9e2 | 162 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI2); |
| AnnaBridge | 165:e614a9f1c9e2 | 163 | |
| AnnaBridge | 165:e614a9f1c9e2 | 164 | /* Release reset of SPI clock */ |
| AnnaBridge | 165:e614a9f1c9e2 | 165 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI2); |
| AnnaBridge | 165:e614a9f1c9e2 | 166 | |
| AnnaBridge | 165:e614a9f1c9e2 | 167 | status = SUCCESS; |
| AnnaBridge | 165:e614a9f1c9e2 | 168 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 169 | #endif /* SPI2 */ |
| AnnaBridge | 165:e614a9f1c9e2 | 170 | #if defined(SPI3) |
| AnnaBridge | 165:e614a9f1c9e2 | 171 | if (SPIx == SPI3) |
| AnnaBridge | 165:e614a9f1c9e2 | 172 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 173 | /* Force reset of SPI clock */ |
| AnnaBridge | 165:e614a9f1c9e2 | 174 | LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3); |
| AnnaBridge | 165:e614a9f1c9e2 | 175 | |
| AnnaBridge | 165:e614a9f1c9e2 | 176 | /* Release reset of SPI clock */ |
| AnnaBridge | 165:e614a9f1c9e2 | 177 | LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_SPI3); |
| AnnaBridge | 165:e614a9f1c9e2 | 178 | |
| AnnaBridge | 165:e614a9f1c9e2 | 179 | status = SUCCESS; |
| AnnaBridge | 165:e614a9f1c9e2 | 180 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 181 | #endif /* SPI3 */ |
| AnnaBridge | 165:e614a9f1c9e2 | 182 | |
| AnnaBridge | 165:e614a9f1c9e2 | 183 | return status; |
| AnnaBridge | 165:e614a9f1c9e2 | 184 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 185 | |
| AnnaBridge | 165:e614a9f1c9e2 | 186 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 187 | * @brief Initialize the SPI registers according to the specified parameters in SPI_InitStruct. |
| AnnaBridge | 165:e614a9f1c9e2 | 188 | * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0), |
| AnnaBridge | 165:e614a9f1c9e2 | 189 | * SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. |
| AnnaBridge | 165:e614a9f1c9e2 | 190 | * @param SPIx SPI Instance |
| AnnaBridge | 165:e614a9f1c9e2 | 191 | * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure |
| AnnaBridge | 165:e614a9f1c9e2 | 192 | * @retval An ErrorStatus enumeration value. (Return always SUCCESS) |
| AnnaBridge | 165:e614a9f1c9e2 | 193 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 194 | ErrorStatus LL_SPI_Init(SPI_TypeDef *SPIx, LL_SPI_InitTypeDef *SPI_InitStruct) |
| AnnaBridge | 165:e614a9f1c9e2 | 195 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 196 | ErrorStatus status = ERROR; |
| AnnaBridge | 165:e614a9f1c9e2 | 197 | |
| AnnaBridge | 165:e614a9f1c9e2 | 198 | /* Check the SPI Instance SPIx*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 199 | assert_param(IS_SPI_ALL_INSTANCE(SPIx)); |
| AnnaBridge | 165:e614a9f1c9e2 | 200 | |
| AnnaBridge | 165:e614a9f1c9e2 | 201 | /* Check the SPI parameters from SPI_InitStruct*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 202 | assert_param(IS_LL_SPI_TRANSFER_DIRECTION(SPI_InitStruct->TransferDirection)); |
| AnnaBridge | 165:e614a9f1c9e2 | 203 | assert_param(IS_LL_SPI_MODE(SPI_InitStruct->Mode)); |
| AnnaBridge | 165:e614a9f1c9e2 | 204 | assert_param(IS_LL_SPI_DATAWIDTH(SPI_InitStruct->DataWidth)); |
| AnnaBridge | 165:e614a9f1c9e2 | 205 | assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity)); |
| AnnaBridge | 165:e614a9f1c9e2 | 206 | assert_param(IS_LL_SPI_PHASE(SPI_InitStruct->ClockPhase)); |
| AnnaBridge | 165:e614a9f1c9e2 | 207 | assert_param(IS_LL_SPI_NSS(SPI_InitStruct->NSS)); |
| AnnaBridge | 165:e614a9f1c9e2 | 208 | assert_param(IS_LL_SPI_BAUDRATE(SPI_InitStruct->BaudRate)); |
| AnnaBridge | 165:e614a9f1c9e2 | 209 | assert_param(IS_LL_SPI_BITORDER(SPI_InitStruct->BitOrder)); |
| AnnaBridge | 165:e614a9f1c9e2 | 210 | assert_param(IS_LL_SPI_CRCCALCULATION(SPI_InitStruct->CRCCalculation)); |
| AnnaBridge | 165:e614a9f1c9e2 | 211 | |
| AnnaBridge | 165:e614a9f1c9e2 | 212 | if (LL_SPI_IsEnabled(SPIx) == 0x00000000U) |
| AnnaBridge | 165:e614a9f1c9e2 | 213 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 214 | /*---------------------------- SPIx CR1 Configuration ------------------------ |
| AnnaBridge | 165:e614a9f1c9e2 | 215 | * Configure SPIx CR1 with parameters: |
| AnnaBridge | 165:e614a9f1c9e2 | 216 | * - TransferDirection: SPI_CR1_BIDIMODE, SPI_CR1_BIDIOE and SPI_CR1_RXONLY bits |
| AnnaBridge | 165:e614a9f1c9e2 | 217 | * - Master/Slave Mode: SPI_CR1_MSTR bit |
| AnnaBridge | 165:e614a9f1c9e2 | 218 | * - DataWidth: SPI_CR1_DFF bit |
| AnnaBridge | 165:e614a9f1c9e2 | 219 | * - ClockPolarity: SPI_CR1_CPOL bit |
| AnnaBridge | 165:e614a9f1c9e2 | 220 | * - ClockPhase: SPI_CR1_CPHA bit |
| AnnaBridge | 165:e614a9f1c9e2 | 221 | * - NSS management: SPI_CR1_SSM bit |
| AnnaBridge | 165:e614a9f1c9e2 | 222 | * - BaudRate prescaler: SPI_CR1_BR[2:0] bits |
| AnnaBridge | 165:e614a9f1c9e2 | 223 | * - BitOrder: SPI_CR1_LSBFIRST bit |
| AnnaBridge | 165:e614a9f1c9e2 | 224 | * - CRCCalculation: SPI_CR1_CRCEN bit |
| AnnaBridge | 165:e614a9f1c9e2 | 225 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 226 | MODIFY_REG(SPIx->CR1, |
| AnnaBridge | 165:e614a9f1c9e2 | 227 | SPI_CR1_CLEAR_MASK, |
| AnnaBridge | 165:e614a9f1c9e2 | 228 | SPI_InitStruct->TransferDirection | SPI_InitStruct->Mode | SPI_InitStruct->DataWidth | |
| AnnaBridge | 165:e614a9f1c9e2 | 229 | SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase | |
| AnnaBridge | 165:e614a9f1c9e2 | 230 | SPI_InitStruct->NSS | SPI_InitStruct->BaudRate | |
| AnnaBridge | 165:e614a9f1c9e2 | 231 | SPI_InitStruct->BitOrder | SPI_InitStruct->CRCCalculation); |
| AnnaBridge | 165:e614a9f1c9e2 | 232 | |
| AnnaBridge | 165:e614a9f1c9e2 | 233 | /*---------------------------- SPIx CR2 Configuration ------------------------ |
| AnnaBridge | 165:e614a9f1c9e2 | 234 | * Configure SPIx CR2 with parameters: |
| AnnaBridge | 165:e614a9f1c9e2 | 235 | * - NSS management: SSOE bit |
| AnnaBridge | 165:e614a9f1c9e2 | 236 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 237 | MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, (SPI_InitStruct->NSS >> 16U)); |
| AnnaBridge | 165:e614a9f1c9e2 | 238 | |
| AnnaBridge | 165:e614a9f1c9e2 | 239 | /*---------------------------- SPIx CRCPR Configuration ---------------------- |
| AnnaBridge | 165:e614a9f1c9e2 | 240 | * Configure SPIx CRCPR with parameters: |
| AnnaBridge | 165:e614a9f1c9e2 | 241 | * - CRCPoly: CRCPOLY[15:0] bits |
| AnnaBridge | 165:e614a9f1c9e2 | 242 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 243 | if (SPI_InitStruct->CRCCalculation == LL_SPI_CRCCALCULATION_ENABLE) |
| AnnaBridge | 165:e614a9f1c9e2 | 244 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 245 | assert_param(IS_LL_SPI_CRC_POLYNOMIAL(SPI_InitStruct->CRCPoly)); |
| AnnaBridge | 165:e614a9f1c9e2 | 246 | LL_SPI_SetCRCPolynomial(SPIx, SPI_InitStruct->CRCPoly); |
| AnnaBridge | 165:e614a9f1c9e2 | 247 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 248 | status = SUCCESS; |
| AnnaBridge | 165:e614a9f1c9e2 | 249 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 250 | |
| AnnaBridge | 165:e614a9f1c9e2 | 251 | #if defined (SPI_I2S_SUPPORT) |
| AnnaBridge | 165:e614a9f1c9e2 | 252 | /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */ |
| AnnaBridge | 165:e614a9f1c9e2 | 253 | CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD); |
| AnnaBridge | 165:e614a9f1c9e2 | 254 | #endif /* SPI_I2S_SUPPORT */ |
| AnnaBridge | 165:e614a9f1c9e2 | 255 | return status; |
| AnnaBridge | 165:e614a9f1c9e2 | 256 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 257 | |
| AnnaBridge | 165:e614a9f1c9e2 | 258 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 259 | * @brief Set each @ref LL_SPI_InitTypeDef field to default value. |
| AnnaBridge | 165:e614a9f1c9e2 | 260 | * @param SPI_InitStruct pointer to a @ref LL_SPI_InitTypeDef structure |
| AnnaBridge | 165:e614a9f1c9e2 | 261 | * whose fields will be set to default values. |
| AnnaBridge | 165:e614a9f1c9e2 | 262 | * @retval None |
| AnnaBridge | 165:e614a9f1c9e2 | 263 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 264 | void LL_SPI_StructInit(LL_SPI_InitTypeDef *SPI_InitStruct) |
| AnnaBridge | 165:e614a9f1c9e2 | 265 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 266 | /* Set SPI_InitStruct fields to default values */ |
| AnnaBridge | 165:e614a9f1c9e2 | 267 | SPI_InitStruct->TransferDirection = LL_SPI_FULL_DUPLEX; |
| AnnaBridge | 165:e614a9f1c9e2 | 268 | SPI_InitStruct->Mode = LL_SPI_MODE_SLAVE; |
| AnnaBridge | 165:e614a9f1c9e2 | 269 | SPI_InitStruct->DataWidth = LL_SPI_DATAWIDTH_8BIT; |
| AnnaBridge | 165:e614a9f1c9e2 | 270 | SPI_InitStruct->ClockPolarity = LL_SPI_POLARITY_LOW; |
| AnnaBridge | 165:e614a9f1c9e2 | 271 | SPI_InitStruct->ClockPhase = LL_SPI_PHASE_1EDGE; |
| AnnaBridge | 165:e614a9f1c9e2 | 272 | SPI_InitStruct->NSS = LL_SPI_NSS_HARD_INPUT; |
| AnnaBridge | 165:e614a9f1c9e2 | 273 | SPI_InitStruct->BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2; |
| AnnaBridge | 165:e614a9f1c9e2 | 274 | SPI_InitStruct->BitOrder = LL_SPI_MSB_FIRST; |
| AnnaBridge | 165:e614a9f1c9e2 | 275 | SPI_InitStruct->CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; |
| AnnaBridge | 165:e614a9f1c9e2 | 276 | SPI_InitStruct->CRCPoly = 7U; |
| AnnaBridge | 165:e614a9f1c9e2 | 277 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 278 | |
| AnnaBridge | 165:e614a9f1c9e2 | 279 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 280 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 281 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 282 | |
| AnnaBridge | 165:e614a9f1c9e2 | 283 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 284 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 285 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 286 | |
| AnnaBridge | 165:e614a9f1c9e2 | 287 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 288 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 289 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 290 | |
| AnnaBridge | 165:e614a9f1c9e2 | 291 | #if defined(SPI_I2S_SUPPORT) |
| AnnaBridge | 165:e614a9f1c9e2 | 292 | /** @addtogroup I2S_LL |
| AnnaBridge | 165:e614a9f1c9e2 | 293 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 294 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 295 | |
| AnnaBridge | 165:e614a9f1c9e2 | 296 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 297 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 298 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 299 | /** @defgroup I2S_LL_Private_Constants I2S Private Constants |
| AnnaBridge | 165:e614a9f1c9e2 | 300 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 301 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 302 | /* I2S registers Masks */ |
| AnnaBridge | 165:e614a9f1c9e2 | 303 | #define I2S_I2SCFGR_CLEAR_MASK (SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | \ |
| AnnaBridge | 165:e614a9f1c9e2 | 304 | SPI_I2SCFGR_CKPOL | SPI_I2SCFGR_I2SSTD | \ |
| AnnaBridge | 165:e614a9f1c9e2 | 305 | SPI_I2SCFGR_I2SCFG | SPI_I2SCFGR_I2SMOD ) |
| AnnaBridge | 165:e614a9f1c9e2 | 306 | |
| AnnaBridge | 165:e614a9f1c9e2 | 307 | #define I2S_I2SPR_CLEAR_MASK 0x0002U |
| AnnaBridge | 165:e614a9f1c9e2 | 308 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 309 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 310 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 311 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 312 | /** @defgroup I2S_LL_Private_Macros I2S Private Macros |
| AnnaBridge | 165:e614a9f1c9e2 | 313 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 314 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 315 | |
| AnnaBridge | 165:e614a9f1c9e2 | 316 | #define IS_LL_I2S_DATAFORMAT(__VALUE__) (((__VALUE__) == LL_I2S_DATAFORMAT_16B) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 317 | || ((__VALUE__) == LL_I2S_DATAFORMAT_16B_EXTENDED) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 318 | || ((__VALUE__) == LL_I2S_DATAFORMAT_24B) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 319 | || ((__VALUE__) == LL_I2S_DATAFORMAT_32B)) |
| AnnaBridge | 165:e614a9f1c9e2 | 320 | |
| AnnaBridge | 165:e614a9f1c9e2 | 321 | #define IS_LL_I2S_CPOL(__VALUE__) (((__VALUE__) == LL_I2S_POLARITY_LOW) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 322 | || ((__VALUE__) == LL_I2S_POLARITY_HIGH)) |
| AnnaBridge | 165:e614a9f1c9e2 | 323 | |
| AnnaBridge | 165:e614a9f1c9e2 | 324 | #define IS_LL_I2S_STANDARD(__VALUE__) (((__VALUE__) == LL_I2S_STANDARD_PHILIPS) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 325 | || ((__VALUE__) == LL_I2S_STANDARD_MSB) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 326 | || ((__VALUE__) == LL_I2S_STANDARD_LSB) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 327 | || ((__VALUE__) == LL_I2S_STANDARD_PCM_SHORT) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 328 | || ((__VALUE__) == LL_I2S_STANDARD_PCM_LONG)) |
| AnnaBridge | 165:e614a9f1c9e2 | 329 | |
| AnnaBridge | 165:e614a9f1c9e2 | 330 | #define IS_LL_I2S_MODE(__VALUE__) (((__VALUE__) == LL_I2S_MODE_SLAVE_TX) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 331 | || ((__VALUE__) == LL_I2S_MODE_SLAVE_RX) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 332 | || ((__VALUE__) == LL_I2S_MODE_MASTER_TX) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 333 | || ((__VALUE__) == LL_I2S_MODE_MASTER_RX)) |
| AnnaBridge | 165:e614a9f1c9e2 | 334 | |
| AnnaBridge | 165:e614a9f1c9e2 | 335 | #define IS_LL_I2S_MCLK_OUTPUT(__VALUE__) (((__VALUE__) == LL_I2S_MCLK_OUTPUT_ENABLE) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 336 | || ((__VALUE__) == LL_I2S_MCLK_OUTPUT_DISABLE)) |
| AnnaBridge | 165:e614a9f1c9e2 | 337 | |
| AnnaBridge | 165:e614a9f1c9e2 | 338 | #define IS_LL_I2S_AUDIO_FREQ(__VALUE__) ((((__VALUE__) >= LL_I2S_AUDIOFREQ_8K) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 339 | && ((__VALUE__) <= LL_I2S_AUDIOFREQ_192K)) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 340 | || ((__VALUE__) == LL_I2S_AUDIOFREQ_DEFAULT)) |
| AnnaBridge | 165:e614a9f1c9e2 | 341 | |
| AnnaBridge | 165:e614a9f1c9e2 | 342 | #define IS_LL_I2S_PRESCALER_LINEAR(__VALUE__) ((__VALUE__) >= 0x2U) |
| AnnaBridge | 165:e614a9f1c9e2 | 343 | |
| AnnaBridge | 165:e614a9f1c9e2 | 344 | #define IS_LL_I2S_PRESCALER_PARITY(__VALUE__) (((__VALUE__) == LL_I2S_PRESCALER_PARITY_EVEN) \ |
| AnnaBridge | 165:e614a9f1c9e2 | 345 | || ((__VALUE__) == LL_I2S_PRESCALER_PARITY_ODD)) |
| AnnaBridge | 165:e614a9f1c9e2 | 346 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 347 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 348 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 349 | |
| AnnaBridge | 165:e614a9f1c9e2 | 350 | /* Private function prototypes -----------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 351 | |
| AnnaBridge | 165:e614a9f1c9e2 | 352 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 353 | /** @addtogroup I2S_LL_Exported_Functions |
| AnnaBridge | 165:e614a9f1c9e2 | 354 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 355 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 356 | |
| AnnaBridge | 165:e614a9f1c9e2 | 357 | /** @addtogroup I2S_LL_EF_Init |
| AnnaBridge | 165:e614a9f1c9e2 | 358 | * @{ |
| AnnaBridge | 165:e614a9f1c9e2 | 359 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 360 | |
| AnnaBridge | 165:e614a9f1c9e2 | 361 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 362 | * @brief De-initialize the SPI/I2S registers to their default reset values. |
| AnnaBridge | 165:e614a9f1c9e2 | 363 | * @param SPIx SPI Instance |
| AnnaBridge | 165:e614a9f1c9e2 | 364 | * @retval An ErrorStatus enumeration value: |
| AnnaBridge | 165:e614a9f1c9e2 | 365 | * - SUCCESS: SPI registers are de-initialized |
| AnnaBridge | 165:e614a9f1c9e2 | 366 | * - ERROR: SPI registers are not de-initialized |
| AnnaBridge | 165:e614a9f1c9e2 | 367 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 368 | ErrorStatus LL_I2S_DeInit(SPI_TypeDef *SPIx) |
| AnnaBridge | 165:e614a9f1c9e2 | 369 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 370 | return LL_SPI_DeInit(SPIx); |
| AnnaBridge | 165:e614a9f1c9e2 | 371 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 372 | |
| AnnaBridge | 165:e614a9f1c9e2 | 373 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 374 | * @brief Initializes the SPI/I2S registers according to the specified parameters in I2S_InitStruct. |
| AnnaBridge | 165:e614a9f1c9e2 | 375 | * @note As some bits in SPI configuration registers can only be written when the SPI is disabled (SPI_CR1_SPE bit =0), |
| AnnaBridge | 165:e614a9f1c9e2 | 376 | * SPI IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. |
| AnnaBridge | 165:e614a9f1c9e2 | 377 | * @param SPIx SPI Instance |
| AnnaBridge | 165:e614a9f1c9e2 | 378 | * @param I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure |
| AnnaBridge | 165:e614a9f1c9e2 | 379 | * @retval An ErrorStatus enumeration value: |
| AnnaBridge | 165:e614a9f1c9e2 | 380 | * - SUCCESS: SPI registers are Initialized |
| AnnaBridge | 165:e614a9f1c9e2 | 381 | * - ERROR: SPI registers are not Initialized |
| AnnaBridge | 165:e614a9f1c9e2 | 382 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 383 | ErrorStatus LL_I2S_Init(SPI_TypeDef *SPIx, LL_I2S_InitTypeDef *I2S_InitStruct) |
| AnnaBridge | 165:e614a9f1c9e2 | 384 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 385 | uint16_t i2sdiv = 2U, i2sodd = 0U, packetlength = 1U; |
| AnnaBridge | 165:e614a9f1c9e2 | 386 | uint32_t tmp = 0U; |
| AnnaBridge | 165:e614a9f1c9e2 | 387 | uint32_t sourceclock = 0U; |
| AnnaBridge | 165:e614a9f1c9e2 | 388 | #if defined(I2S2_I2S3_CLOCK_FEATURE) |
| AnnaBridge | 165:e614a9f1c9e2 | 389 | #else |
| AnnaBridge | 165:e614a9f1c9e2 | 390 | LL_RCC_ClocksTypeDef rcc_clocks; |
| AnnaBridge | 165:e614a9f1c9e2 | 391 | #endif /* I2S2_I2S3_CLOCK_FEATURE */ |
| AnnaBridge | 165:e614a9f1c9e2 | 392 | ErrorStatus status = ERROR; |
| AnnaBridge | 165:e614a9f1c9e2 | 393 | |
| AnnaBridge | 165:e614a9f1c9e2 | 394 | /* Check the I2S parameters */ |
| AnnaBridge | 165:e614a9f1c9e2 | 395 | assert_param(IS_I2S_ALL_INSTANCE(SPIx)); |
| AnnaBridge | 165:e614a9f1c9e2 | 396 | assert_param(IS_LL_I2S_MODE(I2S_InitStruct->Mode)); |
| AnnaBridge | 165:e614a9f1c9e2 | 397 | assert_param(IS_LL_I2S_STANDARD(I2S_InitStruct->Standard)); |
| AnnaBridge | 165:e614a9f1c9e2 | 398 | assert_param(IS_LL_I2S_DATAFORMAT(I2S_InitStruct->DataFormat)); |
| AnnaBridge | 165:e614a9f1c9e2 | 399 | assert_param(IS_LL_I2S_MCLK_OUTPUT(I2S_InitStruct->MCLKOutput)); |
| AnnaBridge | 165:e614a9f1c9e2 | 400 | assert_param(IS_LL_I2S_AUDIO_FREQ(I2S_InitStruct->AudioFreq)); |
| AnnaBridge | 165:e614a9f1c9e2 | 401 | assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity)); |
| AnnaBridge | 165:e614a9f1c9e2 | 402 | |
| AnnaBridge | 165:e614a9f1c9e2 | 403 | if (LL_I2S_IsEnabled(SPIx) == 0x00000000U) |
| AnnaBridge | 165:e614a9f1c9e2 | 404 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 405 | /*---------------------------- SPIx I2SCFGR Configuration -------------------- |
| AnnaBridge | 165:e614a9f1c9e2 | 406 | * Configure SPIx I2SCFGR with parameters: |
| AnnaBridge | 165:e614a9f1c9e2 | 407 | * - Mode: SPI_I2SCFGR_I2SCFG[1:0] bit |
| AnnaBridge | 165:e614a9f1c9e2 | 408 | * - Standard: SPI_I2SCFGR_I2SSTD[1:0] and SPI_I2SCFGR_PCMSYNC bits |
| AnnaBridge | 165:e614a9f1c9e2 | 409 | * - DataFormat: SPI_I2SCFGR_CHLEN and SPI_I2SCFGR_DATLEN bits |
| AnnaBridge | 165:e614a9f1c9e2 | 410 | * - ClockPolarity: SPI_I2SCFGR_CKPOL bit |
| AnnaBridge | 165:e614a9f1c9e2 | 411 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 412 | |
| AnnaBridge | 165:e614a9f1c9e2 | 413 | /* Write to SPIx I2SCFGR */ |
| AnnaBridge | 165:e614a9f1c9e2 | 414 | MODIFY_REG(SPIx->I2SCFGR, |
| AnnaBridge | 165:e614a9f1c9e2 | 415 | I2S_I2SCFGR_CLEAR_MASK, |
| AnnaBridge | 165:e614a9f1c9e2 | 416 | I2S_InitStruct->Mode | I2S_InitStruct->Standard | |
| AnnaBridge | 165:e614a9f1c9e2 | 417 | I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity | |
| AnnaBridge | 165:e614a9f1c9e2 | 418 | SPI_I2SCFGR_I2SMOD); |
| AnnaBridge | 165:e614a9f1c9e2 | 419 | |
| AnnaBridge | 165:e614a9f1c9e2 | 420 | /*---------------------------- SPIx I2SPR Configuration ---------------------- |
| AnnaBridge | 165:e614a9f1c9e2 | 421 | * Configure SPIx I2SPR with parameters: |
| AnnaBridge | 165:e614a9f1c9e2 | 422 | * - MCLKOutput: SPI_I2SPR_MCKOE bit |
| AnnaBridge | 165:e614a9f1c9e2 | 423 | * - AudioFreq: SPI_I2SPR_I2SDIV[7:0] and SPI_I2SPR_ODD bits |
| AnnaBridge | 165:e614a9f1c9e2 | 424 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 425 | |
| AnnaBridge | 165:e614a9f1c9e2 | 426 | /* If the requested audio frequency is not the default, compute the prescaler (i2sodd, i2sdiv) |
| AnnaBridge | 165:e614a9f1c9e2 | 427 | * else, default values are used: i2sodd = 0U, i2sdiv = 2U. |
| AnnaBridge | 165:e614a9f1c9e2 | 428 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 429 | if (I2S_InitStruct->AudioFreq != LL_I2S_AUDIOFREQ_DEFAULT) |
| AnnaBridge | 165:e614a9f1c9e2 | 430 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 431 | /* Check the frame length (For the Prescaler computing) |
| AnnaBridge | 165:e614a9f1c9e2 | 432 | * Default value: LL_I2S_DATAFORMAT_16B (packetlength = 1U). |
| AnnaBridge | 165:e614a9f1c9e2 | 433 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 434 | if (I2S_InitStruct->DataFormat != LL_I2S_DATAFORMAT_16B) |
| AnnaBridge | 165:e614a9f1c9e2 | 435 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 436 | /* Packet length is 32 bits */ |
| AnnaBridge | 165:e614a9f1c9e2 | 437 | packetlength = 2U; |
| AnnaBridge | 165:e614a9f1c9e2 | 438 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 439 | #if defined(I2S2_I2S3_CLOCK_FEATURE) |
| AnnaBridge | 165:e614a9f1c9e2 | 440 | /* If an external I2S clock has to be used, the specific define should be set |
| AnnaBridge | 165:e614a9f1c9e2 | 441 | in the project configuration or in the stm32f1xx_ll_rcc.h file */ |
| AnnaBridge | 165:e614a9f1c9e2 | 442 | if(SPIx == SPI2) |
| AnnaBridge | 165:e614a9f1c9e2 | 443 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 444 | /* Get the I2S source clock value */ |
| AnnaBridge | 165:e614a9f1c9e2 | 445 | sourceclock = LL_RCC_GetI2SClockFreq(LL_RCC_I2S2_CLKSOURCE); |
| AnnaBridge | 165:e614a9f1c9e2 | 446 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 447 | else /* SPI3 */ |
| AnnaBridge | 165:e614a9f1c9e2 | 448 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 449 | /* Get the I2S source clock value */ |
| AnnaBridge | 165:e614a9f1c9e2 | 450 | sourceclock = LL_RCC_GetI2SClockFreq(LL_RCC_I2S3_CLKSOURCE); |
| AnnaBridge | 165:e614a9f1c9e2 | 451 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 452 | #else |
| AnnaBridge | 165:e614a9f1c9e2 | 453 | /* I2S Clock source is System clock: Get System Clock frequency */ |
| AnnaBridge | 165:e614a9f1c9e2 | 454 | LL_RCC_GetSystemClocksFreq(&rcc_clocks); |
| AnnaBridge | 165:e614a9f1c9e2 | 455 | |
| AnnaBridge | 165:e614a9f1c9e2 | 456 | /* Get the source clock value: based on System Clock value */ |
| AnnaBridge | 165:e614a9f1c9e2 | 457 | sourceclock = rcc_clocks.SYSCLK_Frequency; |
| AnnaBridge | 165:e614a9f1c9e2 | 458 | #endif /* I2S2_I2S3_CLOCK_FEATURE */ |
| AnnaBridge | 165:e614a9f1c9e2 | 459 | /* Compute the Real divider depending on the MCLK output state with a floating point */ |
| AnnaBridge | 165:e614a9f1c9e2 | 460 | if (I2S_InitStruct->MCLKOutput == LL_I2S_MCLK_OUTPUT_ENABLE) |
| AnnaBridge | 165:e614a9f1c9e2 | 461 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 462 | /* MCLK output is enabled */ |
| AnnaBridge | 165:e614a9f1c9e2 | 463 | tmp = (uint16_t)(((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U); |
| AnnaBridge | 165:e614a9f1c9e2 | 464 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 465 | else |
| AnnaBridge | 165:e614a9f1c9e2 | 466 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 467 | /* MCLK output is disabled */ |
| AnnaBridge | 165:e614a9f1c9e2 | 468 | tmp = (uint16_t)(((((sourceclock / (32U * packetlength)) * 10U) / I2S_InitStruct->AudioFreq)) + 5U); |
| AnnaBridge | 165:e614a9f1c9e2 | 469 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 470 | |
| AnnaBridge | 165:e614a9f1c9e2 | 471 | /* Remove the floating point */ |
| AnnaBridge | 165:e614a9f1c9e2 | 472 | tmp = tmp / 10U; |
| AnnaBridge | 165:e614a9f1c9e2 | 473 | |
| AnnaBridge | 165:e614a9f1c9e2 | 474 | /* Check the parity of the divider */ |
| AnnaBridge | 165:e614a9f1c9e2 | 475 | i2sodd = (uint16_t)(tmp & (uint16_t)0x0001U); |
| AnnaBridge | 165:e614a9f1c9e2 | 476 | |
| AnnaBridge | 165:e614a9f1c9e2 | 477 | /* Compute the i2sdiv prescaler */ |
| AnnaBridge | 165:e614a9f1c9e2 | 478 | i2sdiv = (uint16_t)((tmp - i2sodd) / 2U); |
| AnnaBridge | 165:e614a9f1c9e2 | 479 | |
| AnnaBridge | 165:e614a9f1c9e2 | 480 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
| AnnaBridge | 165:e614a9f1c9e2 | 481 | i2sodd = (uint16_t)(i2sodd << 8U); |
| AnnaBridge | 165:e614a9f1c9e2 | 482 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 483 | |
| AnnaBridge | 165:e614a9f1c9e2 | 484 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
| AnnaBridge | 165:e614a9f1c9e2 | 485 | if ((i2sdiv < 2U) || (i2sdiv > 0xFFU)) |
| AnnaBridge | 165:e614a9f1c9e2 | 486 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 487 | /* Set the default values */ |
| AnnaBridge | 165:e614a9f1c9e2 | 488 | i2sdiv = 2U; |
| AnnaBridge | 165:e614a9f1c9e2 | 489 | i2sodd = 0U; |
| AnnaBridge | 165:e614a9f1c9e2 | 490 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 491 | |
| AnnaBridge | 165:e614a9f1c9e2 | 492 | /* Write to SPIx I2SPR register the computed value */ |
| AnnaBridge | 165:e614a9f1c9e2 | 493 | WRITE_REG(SPIx->I2SPR, i2sdiv | i2sodd | I2S_InitStruct->MCLKOutput); |
| AnnaBridge | 165:e614a9f1c9e2 | 494 | |
| AnnaBridge | 165:e614a9f1c9e2 | 495 | status = SUCCESS; |
| AnnaBridge | 165:e614a9f1c9e2 | 496 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 497 | return status; |
| AnnaBridge | 165:e614a9f1c9e2 | 498 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 499 | |
| AnnaBridge | 165:e614a9f1c9e2 | 500 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 501 | * @brief Set each @ref LL_I2S_InitTypeDef field to default value. |
| AnnaBridge | 165:e614a9f1c9e2 | 502 | * @param I2S_InitStruct pointer to a @ref LL_I2S_InitTypeDef structure |
| AnnaBridge | 165:e614a9f1c9e2 | 503 | * whose fields will be set to default values. |
| AnnaBridge | 165:e614a9f1c9e2 | 504 | * @retval None |
| AnnaBridge | 165:e614a9f1c9e2 | 505 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 506 | void LL_I2S_StructInit(LL_I2S_InitTypeDef *I2S_InitStruct) |
| AnnaBridge | 165:e614a9f1c9e2 | 507 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 508 | /*--------------- Reset I2S init structure parameters values -----------------*/ |
| AnnaBridge | 165:e614a9f1c9e2 | 509 | I2S_InitStruct->Mode = LL_I2S_MODE_SLAVE_TX; |
| AnnaBridge | 165:e614a9f1c9e2 | 510 | I2S_InitStruct->Standard = LL_I2S_STANDARD_PHILIPS; |
| AnnaBridge | 165:e614a9f1c9e2 | 511 | I2S_InitStruct->DataFormat = LL_I2S_DATAFORMAT_16B; |
| AnnaBridge | 165:e614a9f1c9e2 | 512 | I2S_InitStruct->MCLKOutput = LL_I2S_MCLK_OUTPUT_DISABLE; |
| AnnaBridge | 165:e614a9f1c9e2 | 513 | I2S_InitStruct->AudioFreq = LL_I2S_AUDIOFREQ_DEFAULT; |
| AnnaBridge | 165:e614a9f1c9e2 | 514 | I2S_InitStruct->ClockPolarity = LL_I2S_POLARITY_LOW; |
| AnnaBridge | 165:e614a9f1c9e2 | 515 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 516 | |
| AnnaBridge | 165:e614a9f1c9e2 | 517 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 518 | * @brief Set linear and parity prescaler. |
| AnnaBridge | 165:e614a9f1c9e2 | 519 | * @note To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n |
| AnnaBridge | 165:e614a9f1c9e2 | 520 | * Check Audio frequency table and formulas inside Reference Manual (SPI/I2S). |
| AnnaBridge | 165:e614a9f1c9e2 | 521 | * @param SPIx SPI Instance |
| AnnaBridge | 165:e614a9f1c9e2 | 522 | * @param PrescalerLinear value: Min_Data=0x02 and Max_Data=0xFF. |
| AnnaBridge | 165:e614a9f1c9e2 | 523 | * @param PrescalerParity This parameter can be one of the following values: |
| AnnaBridge | 165:e614a9f1c9e2 | 524 | * @arg @ref LL_I2S_PRESCALER_PARITY_EVEN |
| AnnaBridge | 165:e614a9f1c9e2 | 525 | * @arg @ref LL_I2S_PRESCALER_PARITY_ODD |
| AnnaBridge | 165:e614a9f1c9e2 | 526 | * @retval None |
| AnnaBridge | 165:e614a9f1c9e2 | 527 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 528 | void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_t PrescalerParity) |
| AnnaBridge | 165:e614a9f1c9e2 | 529 | { |
| AnnaBridge | 165:e614a9f1c9e2 | 530 | /* Check the I2S parameters */ |
| AnnaBridge | 165:e614a9f1c9e2 | 531 | assert_param(IS_I2S_ALL_INSTANCE(SPIx)); |
| AnnaBridge | 165:e614a9f1c9e2 | 532 | assert_param(IS_LL_I2S_PRESCALER_LINEAR(PrescalerLinear)); |
| AnnaBridge | 165:e614a9f1c9e2 | 533 | assert_param(IS_LL_I2S_PRESCALER_PARITY(PrescalerParity)); |
| AnnaBridge | 165:e614a9f1c9e2 | 534 | |
| AnnaBridge | 165:e614a9f1c9e2 | 535 | /* Write to SPIx I2SPR */ |
| AnnaBridge | 165:e614a9f1c9e2 | 536 | MODIFY_REG(SPIx->I2SPR, SPI_I2SPR_I2SDIV | SPI_I2SPR_ODD, PrescalerLinear | (PrescalerParity << 8U)); |
| AnnaBridge | 165:e614a9f1c9e2 | 537 | } |
| AnnaBridge | 165:e614a9f1c9e2 | 538 | |
| AnnaBridge | 165:e614a9f1c9e2 | 539 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 540 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 541 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 542 | |
| AnnaBridge | 165:e614a9f1c9e2 | 543 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 544 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 545 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 546 | |
| AnnaBridge | 165:e614a9f1c9e2 | 547 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 548 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 549 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 550 | #endif /* SPI_I2S_SUPPORT */ |
| AnnaBridge | 165:e614a9f1c9e2 | 551 | |
| AnnaBridge | 165:e614a9f1c9e2 | 552 | #endif /* defined (SPI1) || defined (SPI2) || defined (SPI3) */ |
| AnnaBridge | 165:e614a9f1c9e2 | 553 | |
| AnnaBridge | 165:e614a9f1c9e2 | 554 | /** |
| AnnaBridge | 165:e614a9f1c9e2 | 555 | * @} |
| AnnaBridge | 165:e614a9f1c9e2 | 556 | */ |
| AnnaBridge | 165:e614a9f1c9e2 | 557 | |
| AnnaBridge | 165:e614a9f1c9e2 | 558 | #endif /* USE_FULL_LL_DRIVER */ |
| AnnaBridge | 165:e614a9f1c9e2 | 559 | |
| AnnaBridge | 165:e614a9f1c9e2 | 560 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
