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mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_ll_exti.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /**
<> 154:37f96f9d4de2 2 ******************************************************************************
<> 154:37f96f9d4de2 3 * @file stm32f1xx_ll_exti.h
<> 154:37f96f9d4de2 4 * @author MCD Application Team
<> 154:37f96f9d4de2 5 * @brief Header file of EXTI LL module.
<> 154:37f96f9d4de2 6 ******************************************************************************
<> 154:37f96f9d4de2 7 * @attention
<> 154:37f96f9d4de2 8 *
<> 154:37f96f9d4de2 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 154:37f96f9d4de2 10 *
<> 154:37f96f9d4de2 11 * Redistribution and use in source and binary forms, with or without modification,
<> 154:37f96f9d4de2 12 * are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 154:37f96f9d4de2 14 * this list of conditions and the following disclaimer.
<> 154:37f96f9d4de2 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 154:37f96f9d4de2 16 * this list of conditions and the following disclaimer in the documentation
<> 154:37f96f9d4de2 17 * and/or other materials provided with the distribution.
<> 154:37f96f9d4de2 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 154:37f96f9d4de2 19 * may be used to endorse or promote products derived from this software
<> 154:37f96f9d4de2 20 * without specific prior written permission.
<> 154:37f96f9d4de2 21 *
<> 154:37f96f9d4de2 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 154:37f96f9d4de2 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 154:37f96f9d4de2 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 154:37f96f9d4de2 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 154:37f96f9d4de2 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 154:37f96f9d4de2 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 154:37f96f9d4de2 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 154:37f96f9d4de2 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 154:37f96f9d4de2 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 32 *
<> 154:37f96f9d4de2 33 ******************************************************************************
<> 154:37f96f9d4de2 34 */
<> 154:37f96f9d4de2 35
<> 154:37f96f9d4de2 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 154:37f96f9d4de2 37 #ifndef __STM32F1xx_LL_EXTI_H
<> 154:37f96f9d4de2 38 #define __STM32F1xx_LL_EXTI_H
<> 154:37f96f9d4de2 39
<> 154:37f96f9d4de2 40 #ifdef __cplusplus
<> 154:37f96f9d4de2 41 extern "C" {
<> 154:37f96f9d4de2 42 #endif
<> 154:37f96f9d4de2 43
<> 154:37f96f9d4de2 44 /* Includes ------------------------------------------------------------------*/
<> 154:37f96f9d4de2 45 #include "stm32f1xx.h"
<> 154:37f96f9d4de2 46
<> 154:37f96f9d4de2 47 /** @addtogroup STM32F1xx_LL_Driver
<> 154:37f96f9d4de2 48 * @{
<> 154:37f96f9d4de2 49 */
<> 154:37f96f9d4de2 50
<> 154:37f96f9d4de2 51 #if defined (EXTI)
<> 154:37f96f9d4de2 52
<> 154:37f96f9d4de2 53 /** @defgroup EXTI_LL EXTI
<> 154:37f96f9d4de2 54 * @{
<> 154:37f96f9d4de2 55 */
<> 154:37f96f9d4de2 56
<> 154:37f96f9d4de2 57 /* Private types -------------------------------------------------------------*/
<> 154:37f96f9d4de2 58 /* Private variables ---------------------------------------------------------*/
<> 154:37f96f9d4de2 59 /* Private constants ---------------------------------------------------------*/
<> 154:37f96f9d4de2 60 /* Private Macros ------------------------------------------------------------*/
<> 154:37f96f9d4de2 61 #if defined(USE_FULL_LL_DRIVER)
<> 154:37f96f9d4de2 62 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
<> 154:37f96f9d4de2 63 * @{
<> 154:37f96f9d4de2 64 */
<> 154:37f96f9d4de2 65 /**
<> 154:37f96f9d4de2 66 * @}
<> 154:37f96f9d4de2 67 */
<> 154:37f96f9d4de2 68 #endif /*USE_FULL_LL_DRIVER*/
<> 154:37f96f9d4de2 69 /* Exported types ------------------------------------------------------------*/
<> 154:37f96f9d4de2 70 #if defined(USE_FULL_LL_DRIVER)
<> 154:37f96f9d4de2 71 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
<> 154:37f96f9d4de2 72 * @{
<> 154:37f96f9d4de2 73 */
<> 154:37f96f9d4de2 74 typedef struct
<> 154:37f96f9d4de2 75 {
<> 154:37f96f9d4de2 76
<> 154:37f96f9d4de2 77 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
<> 154:37f96f9d4de2 78 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
<> 154:37f96f9d4de2 79
<> 154:37f96f9d4de2 80 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
<> 154:37f96f9d4de2 81 This parameter can be set either to ENABLE or DISABLE */
<> 154:37f96f9d4de2 82
<> 154:37f96f9d4de2 83 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
<> 154:37f96f9d4de2 84 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
<> 154:37f96f9d4de2 85
<> 154:37f96f9d4de2 86 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
<> 154:37f96f9d4de2 87 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
<> 154:37f96f9d4de2 88 } LL_EXTI_InitTypeDef;
<> 154:37f96f9d4de2 89
<> 154:37f96f9d4de2 90 /**
<> 154:37f96f9d4de2 91 * @}
<> 154:37f96f9d4de2 92 */
<> 154:37f96f9d4de2 93 #endif /*USE_FULL_LL_DRIVER*/
<> 154:37f96f9d4de2 94
<> 154:37f96f9d4de2 95 /* Exported constants --------------------------------------------------------*/
<> 154:37f96f9d4de2 96 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
<> 154:37f96f9d4de2 97 * @{
<> 154:37f96f9d4de2 98 */
<> 154:37f96f9d4de2 99
<> 154:37f96f9d4de2 100 /** @defgroup EXTI_LL_EC_LINE LINE
<> 154:37f96f9d4de2 101 * @{
<> 154:37f96f9d4de2 102 */
<> 154:37f96f9d4de2 103 #define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */
<> 154:37f96f9d4de2 104 #define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */
<> 154:37f96f9d4de2 105 #define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */
<> 154:37f96f9d4de2 106 #define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */
<> 154:37f96f9d4de2 107 #define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */
<> 154:37f96f9d4de2 108 #define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */
<> 154:37f96f9d4de2 109 #define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */
<> 154:37f96f9d4de2 110 #define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */
<> 154:37f96f9d4de2 111 #define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */
<> 154:37f96f9d4de2 112 #define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */
<> 154:37f96f9d4de2 113 #define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */
<> 154:37f96f9d4de2 114 #define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */
<> 154:37f96f9d4de2 115 #define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */
<> 154:37f96f9d4de2 116 #define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */
<> 154:37f96f9d4de2 117 #define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */
<> 154:37f96f9d4de2 118 #define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */
<> 154:37f96f9d4de2 119 #if defined(EXTI_IMR_IM16)
<> 154:37f96f9d4de2 120 #define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */
<> 154:37f96f9d4de2 121 #endif
<> 154:37f96f9d4de2 122 #define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */
<> 154:37f96f9d4de2 123 #if defined(EXTI_IMR_IM18)
<> 154:37f96f9d4de2 124 #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */
<> 154:37f96f9d4de2 125 #endif
<> 154:37f96f9d4de2 126 #if defined(EXTI_IMR_IM19)
<> 154:37f96f9d4de2 127 #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */
<> 154:37f96f9d4de2 128 #endif
<> 154:37f96f9d4de2 129 #if defined(EXTI_IMR_IM20)
<> 154:37f96f9d4de2 130 #define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */
<> 154:37f96f9d4de2 131 #endif
<> 154:37f96f9d4de2 132 #if defined(EXTI_IMR_IM21)
<> 154:37f96f9d4de2 133 #define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */
<> 154:37f96f9d4de2 134 #endif
<> 154:37f96f9d4de2 135 #if defined(EXTI_IMR_IM22)
<> 154:37f96f9d4de2 136 #define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */
<> 154:37f96f9d4de2 137 #endif
<> 154:37f96f9d4de2 138 #if defined(EXTI_IMR_IM23)
<> 154:37f96f9d4de2 139 #define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */
<> 154:37f96f9d4de2 140 #endif
<> 154:37f96f9d4de2 141 #if defined(EXTI_IMR_IM24)
<> 154:37f96f9d4de2 142 #define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */
<> 154:37f96f9d4de2 143 #endif
<> 154:37f96f9d4de2 144 #if defined(EXTI_IMR_IM25)
<> 154:37f96f9d4de2 145 #define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */
<> 154:37f96f9d4de2 146 #endif
<> 154:37f96f9d4de2 147 #if defined(EXTI_IMR_IM26)
<> 154:37f96f9d4de2 148 #define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */
<> 154:37f96f9d4de2 149 #endif
<> 154:37f96f9d4de2 150 #if defined(EXTI_IMR_IM27)
<> 154:37f96f9d4de2 151 #define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */
<> 154:37f96f9d4de2 152 #endif
<> 154:37f96f9d4de2 153 #if defined(EXTI_IMR_IM28)
<> 154:37f96f9d4de2 154 #define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */
<> 154:37f96f9d4de2 155 #endif
<> 154:37f96f9d4de2 156 #if defined(EXTI_IMR_IM29)
<> 154:37f96f9d4de2 157 #define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */
<> 154:37f96f9d4de2 158 #endif
<> 154:37f96f9d4de2 159 #if defined(EXTI_IMR_IM30)
<> 154:37f96f9d4de2 160 #define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */
<> 154:37f96f9d4de2 161 #endif
<> 154:37f96f9d4de2 162 #if defined(EXTI_IMR_IM31)
<> 154:37f96f9d4de2 163 #define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */
<> 154:37f96f9d4de2 164 #endif
<> 154:37f96f9d4de2 165 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/
<> 154:37f96f9d4de2 166
<> 154:37f96f9d4de2 167
AnnaBridge 165:e614a9f1c9e2 168 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
<> 154:37f96f9d4de2 169
<> 154:37f96f9d4de2 170 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 165:e614a9f1c9e2 171 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
<> 154:37f96f9d4de2 172 #endif /*USE_FULL_LL_DRIVER*/
<> 154:37f96f9d4de2 173
<> 154:37f96f9d4de2 174 /**
<> 154:37f96f9d4de2 175 * @}
<> 154:37f96f9d4de2 176 */
<> 154:37f96f9d4de2 177 #if defined(USE_FULL_LL_DRIVER)
<> 154:37f96f9d4de2 178
<> 154:37f96f9d4de2 179 /** @defgroup EXTI_LL_EC_MODE Mode
<> 154:37f96f9d4de2 180 * @{
<> 154:37f96f9d4de2 181 */
AnnaBridge 165:e614a9f1c9e2 182 #define LL_EXTI_MODE_IT ((uint8_t)0x00) /*!< Interrupt Mode */
AnnaBridge 165:e614a9f1c9e2 183 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01) /*!< Event Mode */
AnnaBridge 165:e614a9f1c9e2 184 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02) /*!< Interrupt & Event Mode */
<> 154:37f96f9d4de2 185 /**
<> 154:37f96f9d4de2 186 * @}
<> 154:37f96f9d4de2 187 */
<> 154:37f96f9d4de2 188
<> 154:37f96f9d4de2 189 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
<> 154:37f96f9d4de2 190 * @{
<> 154:37f96f9d4de2 191 */
AnnaBridge 165:e614a9f1c9e2 192 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00) /*!< No Trigger Mode */
AnnaBridge 165:e614a9f1c9e2 193 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01) /*!< Trigger Rising Mode */
AnnaBridge 165:e614a9f1c9e2 194 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02) /*!< Trigger Falling Mode */
AnnaBridge 165:e614a9f1c9e2 195 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03) /*!< Trigger Rising & Falling Mode */
<> 154:37f96f9d4de2 196
<> 154:37f96f9d4de2 197 /**
<> 154:37f96f9d4de2 198 * @}
<> 154:37f96f9d4de2 199 */
<> 154:37f96f9d4de2 200
<> 154:37f96f9d4de2 201
<> 154:37f96f9d4de2 202 #endif /*USE_FULL_LL_DRIVER*/
<> 154:37f96f9d4de2 203
<> 154:37f96f9d4de2 204
<> 154:37f96f9d4de2 205 /**
<> 154:37f96f9d4de2 206 * @}
<> 154:37f96f9d4de2 207 */
<> 154:37f96f9d4de2 208
<> 154:37f96f9d4de2 209 /* Exported macro ------------------------------------------------------------*/
<> 154:37f96f9d4de2 210 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
<> 154:37f96f9d4de2 211 * @{
<> 154:37f96f9d4de2 212 */
<> 154:37f96f9d4de2 213
<> 154:37f96f9d4de2 214 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
<> 154:37f96f9d4de2 215 * @{
<> 154:37f96f9d4de2 216 */
<> 154:37f96f9d4de2 217
<> 154:37f96f9d4de2 218 /**
<> 154:37f96f9d4de2 219 * @brief Write a value in EXTI register
<> 154:37f96f9d4de2 220 * @param __REG__ Register to be written
<> 154:37f96f9d4de2 221 * @param __VALUE__ Value to be written in the register
<> 154:37f96f9d4de2 222 * @retval None
<> 154:37f96f9d4de2 223 */
<> 154:37f96f9d4de2 224 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
<> 154:37f96f9d4de2 225
<> 154:37f96f9d4de2 226 /**
<> 154:37f96f9d4de2 227 * @brief Read a value in EXTI register
<> 154:37f96f9d4de2 228 * @param __REG__ Register to be read
<> 154:37f96f9d4de2 229 * @retval Register value
<> 154:37f96f9d4de2 230 */
<> 154:37f96f9d4de2 231 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
<> 154:37f96f9d4de2 232 /**
<> 154:37f96f9d4de2 233 * @}
<> 154:37f96f9d4de2 234 */
<> 154:37f96f9d4de2 235
<> 154:37f96f9d4de2 236
<> 154:37f96f9d4de2 237 /**
<> 154:37f96f9d4de2 238 * @}
<> 154:37f96f9d4de2 239 */
<> 154:37f96f9d4de2 240
<> 154:37f96f9d4de2 241
<> 154:37f96f9d4de2 242
<> 154:37f96f9d4de2 243 /* Exported functions --------------------------------------------------------*/
<> 154:37f96f9d4de2 244 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
<> 154:37f96f9d4de2 245 * @{
<> 154:37f96f9d4de2 246 */
<> 154:37f96f9d4de2 247 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
<> 154:37f96f9d4de2 248 * @{
<> 154:37f96f9d4de2 249 */
<> 154:37f96f9d4de2 250
<> 154:37f96f9d4de2 251 /**
<> 154:37f96f9d4de2 252 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
<> 154:37f96f9d4de2 253 * @note The reset value for the direct or internal lines (see RM)
<> 154:37f96f9d4de2 254 * is set to 1 in order to enable the interrupt by default.
<> 154:37f96f9d4de2 255 * Bits are set automatically at Power on.
<> 154:37f96f9d4de2 256 * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31
<> 154:37f96f9d4de2 257 * @param ExtiLine This parameter can be one of the following values:
<> 154:37f96f9d4de2 258 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 259 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 260 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 261 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 262 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 263 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 264 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 265 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 266 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 267 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 268 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 269 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 270 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 271 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 272 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 273 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 274 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 275 * @arg @ref LL_EXTI_LINE_17
<> 154:37f96f9d4de2 276 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 277 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 278 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 154:37f96f9d4de2 279 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 280 * @retval None
<> 154:37f96f9d4de2 281 */
<> 154:37f96f9d4de2 282 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 283 {
<> 154:37f96f9d4de2 284 SET_BIT(EXTI->IMR, ExtiLine);
<> 154:37f96f9d4de2 285 }
<> 154:37f96f9d4de2 286
<> 154:37f96f9d4de2 287 /**
<> 154:37f96f9d4de2 288 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
<> 154:37f96f9d4de2 289 * @note The reset value for the direct or internal lines (see RM)
<> 154:37f96f9d4de2 290 * is set to 1 in order to enable the interrupt by default.
<> 154:37f96f9d4de2 291 * Bits are set automatically at Power on.
<> 154:37f96f9d4de2 292 * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31
<> 154:37f96f9d4de2 293 * @param ExtiLine This parameter can be one of the following values:
<> 154:37f96f9d4de2 294 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 295 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 296 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 297 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 298 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 299 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 300 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 301 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 302 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 303 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 304 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 305 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 306 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 307 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 308 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 309 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 310 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 311 * @arg @ref LL_EXTI_LINE_17
<> 154:37f96f9d4de2 312 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 313 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 314 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 154:37f96f9d4de2 315 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 316 * @retval None
<> 154:37f96f9d4de2 317 */
<> 154:37f96f9d4de2 318 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 319 {
<> 154:37f96f9d4de2 320 CLEAR_BIT(EXTI->IMR, ExtiLine);
<> 154:37f96f9d4de2 321 }
<> 154:37f96f9d4de2 322
<> 154:37f96f9d4de2 323
<> 154:37f96f9d4de2 324 /**
<> 154:37f96f9d4de2 325 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
<> 154:37f96f9d4de2 326 * @note The reset value for the direct or internal lines (see RM)
<> 154:37f96f9d4de2 327 * is set to 1 in order to enable the interrupt by default.
<> 154:37f96f9d4de2 328 * Bits are set automatically at Power on.
<> 154:37f96f9d4de2 329 * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31
<> 154:37f96f9d4de2 330 * @param ExtiLine This parameter can be one of the following values:
<> 154:37f96f9d4de2 331 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 332 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 333 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 334 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 335 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 336 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 337 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 338 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 339 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 340 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 341 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 342 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 343 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 344 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 345 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 346 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 347 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 348 * @arg @ref LL_EXTI_LINE_17
<> 154:37f96f9d4de2 349 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 350 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 351 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 154:37f96f9d4de2 352 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 353 * @retval State of bit (1 or 0).
<> 154:37f96f9d4de2 354 */
<> 154:37f96f9d4de2 355 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 356 {
<> 154:37f96f9d4de2 357 return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine));
<> 154:37f96f9d4de2 358 }
<> 154:37f96f9d4de2 359
<> 154:37f96f9d4de2 360
<> 154:37f96f9d4de2 361 /**
<> 154:37f96f9d4de2 362 * @}
<> 154:37f96f9d4de2 363 */
<> 154:37f96f9d4de2 364
<> 154:37f96f9d4de2 365 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
<> 154:37f96f9d4de2 366 * @{
<> 154:37f96f9d4de2 367 */
<> 154:37f96f9d4de2 368
<> 154:37f96f9d4de2 369 /**
<> 154:37f96f9d4de2 370 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
<> 154:37f96f9d4de2 371 * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31
<> 154:37f96f9d4de2 372 * @param ExtiLine This parameter can be one of the following values:
<> 154:37f96f9d4de2 373 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 374 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 375 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 376 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 377 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 378 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 379 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 380 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 381 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 382 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 383 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 384 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 385 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 386 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 387 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 388 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 389 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 390 * @arg @ref LL_EXTI_LINE_17
<> 154:37f96f9d4de2 391 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 392 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 393 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 154:37f96f9d4de2 394 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 395 * @retval None
<> 154:37f96f9d4de2 396 */
<> 154:37f96f9d4de2 397 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 398 {
<> 154:37f96f9d4de2 399 SET_BIT(EXTI->EMR, ExtiLine);
<> 154:37f96f9d4de2 400
<> 154:37f96f9d4de2 401 }
<> 154:37f96f9d4de2 402
<> 154:37f96f9d4de2 403
<> 154:37f96f9d4de2 404 /**
<> 154:37f96f9d4de2 405 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
<> 154:37f96f9d4de2 406 * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31
<> 154:37f96f9d4de2 407 * @param ExtiLine This parameter can be one of the following values:
<> 154:37f96f9d4de2 408 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 409 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 410 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 411 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 412 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 413 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 414 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 415 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 416 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 417 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 418 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 419 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 420 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 421 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 422 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 423 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 424 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 425 * @arg @ref LL_EXTI_LINE_17
<> 154:37f96f9d4de2 426 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 427 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 428 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 154:37f96f9d4de2 429 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 430 * @retval None
<> 154:37f96f9d4de2 431 */
<> 154:37f96f9d4de2 432 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 433 {
<> 154:37f96f9d4de2 434 CLEAR_BIT(EXTI->EMR, ExtiLine);
<> 154:37f96f9d4de2 435 }
<> 154:37f96f9d4de2 436
<> 154:37f96f9d4de2 437
<> 154:37f96f9d4de2 438 /**
<> 154:37f96f9d4de2 439 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
<> 154:37f96f9d4de2 440 * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31
<> 154:37f96f9d4de2 441 * @param ExtiLine This parameter can be one of the following values:
<> 154:37f96f9d4de2 442 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 443 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 444 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 445 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 446 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 447 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 448 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 449 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 450 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 451 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 452 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 453 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 454 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 455 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 456 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 457 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 458 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 459 * @arg @ref LL_EXTI_LINE_17
<> 154:37f96f9d4de2 460 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 461 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 462 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 154:37f96f9d4de2 463 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 464 * @retval State of bit (1 or 0).
<> 154:37f96f9d4de2 465 */
<> 154:37f96f9d4de2 466 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 467 {
<> 154:37f96f9d4de2 468 return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine));
<> 154:37f96f9d4de2 469
<> 154:37f96f9d4de2 470 }
<> 154:37f96f9d4de2 471
<> 154:37f96f9d4de2 472
<> 154:37f96f9d4de2 473 /**
<> 154:37f96f9d4de2 474 * @}
<> 154:37f96f9d4de2 475 */
<> 154:37f96f9d4de2 476
<> 154:37f96f9d4de2 477 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
<> 154:37f96f9d4de2 478 * @{
<> 154:37f96f9d4de2 479 */
<> 154:37f96f9d4de2 480
<> 154:37f96f9d4de2 481 /**
<> 154:37f96f9d4de2 482 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 154:37f96f9d4de2 483 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 154:37f96f9d4de2 484 * generated on these lines. If a rising edge on a configurable interrupt
<> 154:37f96f9d4de2 485 * line occurs during a write operation in the EXTI_RTSR register, the
<> 154:37f96f9d4de2 486 * pending bit is not set.
<> 154:37f96f9d4de2 487 * Rising and falling edge triggers can be set for
<> 154:37f96f9d4de2 488 * the same interrupt line. In this case, both generate a trigger
<> 154:37f96f9d4de2 489 * condition.
<> 154:37f96f9d4de2 490 * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31
<> 154:37f96f9d4de2 491 * @param ExtiLine This parameter can be a combination of the following values:
<> 154:37f96f9d4de2 492 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 493 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 494 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 495 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 496 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 497 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 498 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 499 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 500 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 501 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 502 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 503 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 504 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 505 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 506 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 507 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 508 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 509 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 510 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 511 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 512 * @retval None
<> 154:37f96f9d4de2 513 */
<> 154:37f96f9d4de2 514 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 515 {
<> 154:37f96f9d4de2 516 SET_BIT(EXTI->RTSR, ExtiLine);
<> 154:37f96f9d4de2 517
<> 154:37f96f9d4de2 518 }
<> 154:37f96f9d4de2 519
<> 154:37f96f9d4de2 520
<> 154:37f96f9d4de2 521 /**
<> 154:37f96f9d4de2 522 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 154:37f96f9d4de2 523 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 154:37f96f9d4de2 524 * generated on these lines. If a rising edge on a configurable interrupt
<> 154:37f96f9d4de2 525 * line occurs during a write operation in the EXTI_RTSR register, the
<> 154:37f96f9d4de2 526 * pending bit is not set.
<> 154:37f96f9d4de2 527 * Rising and falling edge triggers can be set for
<> 154:37f96f9d4de2 528 * the same interrupt line. In this case, both generate a trigger
<> 154:37f96f9d4de2 529 * condition.
<> 154:37f96f9d4de2 530 * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31
<> 154:37f96f9d4de2 531 * @param ExtiLine This parameter can be a combination of the following values:
<> 154:37f96f9d4de2 532 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 533 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 534 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 535 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 536 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 537 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 538 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 539 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 540 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 541 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 542 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 543 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 544 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 545 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 546 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 547 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 548 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 549 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 550 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 551 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 552 * @retval None
<> 154:37f96f9d4de2 553 */
<> 154:37f96f9d4de2 554 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 555 {
<> 154:37f96f9d4de2 556 CLEAR_BIT(EXTI->RTSR, ExtiLine);
<> 154:37f96f9d4de2 557
<> 154:37f96f9d4de2 558 }
<> 154:37f96f9d4de2 559
<> 154:37f96f9d4de2 560
<> 154:37f96f9d4de2 561 /**
<> 154:37f96f9d4de2 562 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
<> 154:37f96f9d4de2 563 * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31
<> 154:37f96f9d4de2 564 * @param ExtiLine This parameter can be a combination of the following values:
<> 154:37f96f9d4de2 565 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 566 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 567 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 568 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 569 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 570 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 571 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 572 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 573 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 574 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 575 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 576 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 577 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 578 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 579 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 580 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 581 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 582 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 583 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 584 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 585 * @retval State of bit (1 or 0).
<> 154:37f96f9d4de2 586 */
<> 154:37f96f9d4de2 587 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 588 {
<> 154:37f96f9d4de2 589 return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine));
<> 154:37f96f9d4de2 590 }
<> 154:37f96f9d4de2 591
<> 154:37f96f9d4de2 592
<> 154:37f96f9d4de2 593 /**
<> 154:37f96f9d4de2 594 * @}
<> 154:37f96f9d4de2 595 */
<> 154:37f96f9d4de2 596
<> 154:37f96f9d4de2 597 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
<> 154:37f96f9d4de2 598 * @{
<> 154:37f96f9d4de2 599 */
<> 154:37f96f9d4de2 600
<> 154:37f96f9d4de2 601 /**
<> 154:37f96f9d4de2 602 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 154:37f96f9d4de2 603 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 154:37f96f9d4de2 604 * generated on these lines. If a falling edge on a configurable interrupt
<> 154:37f96f9d4de2 605 * line occurs during a write operation in the EXTI_FTSR register, the
<> 154:37f96f9d4de2 606 * pending bit is not set.
<> 154:37f96f9d4de2 607 * Rising and falling edge triggers can be set for
<> 154:37f96f9d4de2 608 * the same interrupt line. In this case, both generate a trigger
<> 154:37f96f9d4de2 609 * condition.
<> 154:37f96f9d4de2 610 * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31
<> 154:37f96f9d4de2 611 * @param ExtiLine This parameter can be a combination of the following values:
<> 154:37f96f9d4de2 612 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 613 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 614 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 615 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 616 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 617 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 618 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 619 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 620 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 621 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 622 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 623 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 624 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 625 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 626 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 627 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 628 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 629 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 630 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 631 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 632 * @retval None
<> 154:37f96f9d4de2 633 */
<> 154:37f96f9d4de2 634 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 635 {
<> 154:37f96f9d4de2 636 SET_BIT(EXTI->FTSR, ExtiLine);
<> 154:37f96f9d4de2 637 }
<> 154:37f96f9d4de2 638
<> 154:37f96f9d4de2 639
<> 154:37f96f9d4de2 640 /**
<> 154:37f96f9d4de2 641 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 154:37f96f9d4de2 642 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 154:37f96f9d4de2 643 * generated on these lines. If a Falling edge on a configurable interrupt
<> 154:37f96f9d4de2 644 * line occurs during a write operation in the EXTI_FTSR register, the
<> 154:37f96f9d4de2 645 * pending bit is not set.
<> 154:37f96f9d4de2 646 * Rising and falling edge triggers can be set for the same interrupt line.
<> 154:37f96f9d4de2 647 * In this case, both generate a trigger condition.
<> 154:37f96f9d4de2 648 * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31
<> 154:37f96f9d4de2 649 * @param ExtiLine This parameter can be a combination of the following values:
<> 154:37f96f9d4de2 650 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 651 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 652 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 653 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 654 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 655 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 656 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 657 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 658 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 659 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 660 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 661 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 662 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 663 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 664 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 665 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 666 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 667 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 668 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 669 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 670 * @retval None
<> 154:37f96f9d4de2 671 */
<> 154:37f96f9d4de2 672 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 673 {
<> 154:37f96f9d4de2 674 CLEAR_BIT(EXTI->FTSR, ExtiLine);
<> 154:37f96f9d4de2 675 }
<> 154:37f96f9d4de2 676
<> 154:37f96f9d4de2 677
<> 154:37f96f9d4de2 678 /**
<> 154:37f96f9d4de2 679 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
<> 154:37f96f9d4de2 680 * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31
<> 154:37f96f9d4de2 681 * @param ExtiLine This parameter can be a combination of the following values:
<> 154:37f96f9d4de2 682 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 683 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 684 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 685 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 686 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 687 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 688 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 689 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 690 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 691 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 692 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 693 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 694 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 695 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 696 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 697 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 698 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 699 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 700 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 701 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 702 * @retval State of bit (1 or 0).
<> 154:37f96f9d4de2 703 */
<> 154:37f96f9d4de2 704 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 705 {
<> 154:37f96f9d4de2 706 return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine));
<> 154:37f96f9d4de2 707 }
<> 154:37f96f9d4de2 708
<> 154:37f96f9d4de2 709
<> 154:37f96f9d4de2 710 /**
<> 154:37f96f9d4de2 711 * @}
<> 154:37f96f9d4de2 712 */
<> 154:37f96f9d4de2 713
<> 154:37f96f9d4de2 714 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
<> 154:37f96f9d4de2 715 * @{
<> 154:37f96f9d4de2 716 */
<> 154:37f96f9d4de2 717
<> 154:37f96f9d4de2 718 /**
<> 154:37f96f9d4de2 719 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
<> 154:37f96f9d4de2 720 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
<> 154:37f96f9d4de2 721 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
<> 154:37f96f9d4de2 722 * resulting in an interrupt request generation.
<> 154:37f96f9d4de2 723 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
<> 154:37f96f9d4de2 724 * register (by writing a 1 into the bit)
<> 154:37f96f9d4de2 725 * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31
<> 154:37f96f9d4de2 726 * @param ExtiLine This parameter can be a combination of the following values:
<> 154:37f96f9d4de2 727 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 728 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 729 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 730 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 731 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 732 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 733 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 734 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 735 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 736 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 737 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 738 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 739 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 740 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 741 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 742 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 743 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 744 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 745 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 746 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 747 * @retval None
<> 154:37f96f9d4de2 748 */
<> 154:37f96f9d4de2 749 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 750 {
<> 154:37f96f9d4de2 751 SET_BIT(EXTI->SWIER, ExtiLine);
<> 154:37f96f9d4de2 752 }
<> 154:37f96f9d4de2 753
<> 154:37f96f9d4de2 754
<> 154:37f96f9d4de2 755 /**
<> 154:37f96f9d4de2 756 * @}
<> 154:37f96f9d4de2 757 */
<> 154:37f96f9d4de2 758
<> 154:37f96f9d4de2 759 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
<> 154:37f96f9d4de2 760 * @{
<> 154:37f96f9d4de2 761 */
<> 154:37f96f9d4de2 762
<> 154:37f96f9d4de2 763 /**
<> 154:37f96f9d4de2 764 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
<> 154:37f96f9d4de2 765 * @note This bit is set when the selected edge event arrives on the interrupt
<> 154:37f96f9d4de2 766 * line. This bit is cleared by writing a 1 to the bit.
<> 154:37f96f9d4de2 767 * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31
<> 154:37f96f9d4de2 768 * @param ExtiLine This parameter can be a combination of the following values:
<> 154:37f96f9d4de2 769 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 770 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 771 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 772 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 773 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 774 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 775 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 776 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 777 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 778 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 779 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 780 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 781 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 782 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 783 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 784 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 785 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 786 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 787 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 788 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 789 * @retval State of bit (1 or 0).
<> 154:37f96f9d4de2 790 */
<> 154:37f96f9d4de2 791 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 792 {
<> 154:37f96f9d4de2 793 return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine));
<> 154:37f96f9d4de2 794 }
<> 154:37f96f9d4de2 795
<> 154:37f96f9d4de2 796
<> 154:37f96f9d4de2 797 /**
<> 154:37f96f9d4de2 798 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
<> 154:37f96f9d4de2 799 * @note This bit is set when the selected edge event arrives on the interrupt
<> 154:37f96f9d4de2 800 * line. This bit is cleared by writing a 1 to the bit.
<> 154:37f96f9d4de2 801 * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31
<> 154:37f96f9d4de2 802 * @param ExtiLine This parameter can be a combination of the following values:
<> 154:37f96f9d4de2 803 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 804 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 805 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 806 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 807 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 808 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 809 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 810 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 811 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 812 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 813 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 814 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 815 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 816 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 817 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 818 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 819 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 820 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 821 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 822 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 823 * @retval @note This bit is set when the selected edge event arrives on the interrupt
<> 154:37f96f9d4de2 824 */
<> 154:37f96f9d4de2 825 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 826 {
<> 154:37f96f9d4de2 827 return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine));
<> 154:37f96f9d4de2 828 }
<> 154:37f96f9d4de2 829
<> 154:37f96f9d4de2 830
<> 154:37f96f9d4de2 831 /**
<> 154:37f96f9d4de2 832 * @brief Clear ExtLine Flags for Lines in range 0 to 31
<> 154:37f96f9d4de2 833 * @note This bit is set when the selected edge event arrives on the interrupt
<> 154:37f96f9d4de2 834 * line. This bit is cleared by writing a 1 to the bit.
<> 154:37f96f9d4de2 835 * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31
<> 154:37f96f9d4de2 836 * @param ExtiLine This parameter can be a combination of the following values:
<> 154:37f96f9d4de2 837 * @arg @ref LL_EXTI_LINE_0
<> 154:37f96f9d4de2 838 * @arg @ref LL_EXTI_LINE_1
<> 154:37f96f9d4de2 839 * @arg @ref LL_EXTI_LINE_2
<> 154:37f96f9d4de2 840 * @arg @ref LL_EXTI_LINE_3
<> 154:37f96f9d4de2 841 * @arg @ref LL_EXTI_LINE_4
<> 154:37f96f9d4de2 842 * @arg @ref LL_EXTI_LINE_5
<> 154:37f96f9d4de2 843 * @arg @ref LL_EXTI_LINE_6
<> 154:37f96f9d4de2 844 * @arg @ref LL_EXTI_LINE_7
<> 154:37f96f9d4de2 845 * @arg @ref LL_EXTI_LINE_8
<> 154:37f96f9d4de2 846 * @arg @ref LL_EXTI_LINE_9
<> 154:37f96f9d4de2 847 * @arg @ref LL_EXTI_LINE_10
<> 154:37f96f9d4de2 848 * @arg @ref LL_EXTI_LINE_11
<> 154:37f96f9d4de2 849 * @arg @ref LL_EXTI_LINE_12
<> 154:37f96f9d4de2 850 * @arg @ref LL_EXTI_LINE_13
<> 154:37f96f9d4de2 851 * @arg @ref LL_EXTI_LINE_14
<> 154:37f96f9d4de2 852 * @arg @ref LL_EXTI_LINE_15
<> 154:37f96f9d4de2 853 * @arg @ref LL_EXTI_LINE_16
<> 154:37f96f9d4de2 854 * @arg @ref LL_EXTI_LINE_18
<> 154:37f96f9d4de2 855 * @arg @ref LL_EXTI_LINE_19
<> 154:37f96f9d4de2 856 * @note Please check each device line mapping for EXTI Line availability
<> 154:37f96f9d4de2 857 * @retval None
<> 154:37f96f9d4de2 858 */
<> 154:37f96f9d4de2 859 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
<> 154:37f96f9d4de2 860 {
<> 154:37f96f9d4de2 861 WRITE_REG(EXTI->PR, ExtiLine);
<> 154:37f96f9d4de2 862 }
<> 154:37f96f9d4de2 863
<> 154:37f96f9d4de2 864
<> 154:37f96f9d4de2 865 /**
<> 154:37f96f9d4de2 866 * @}
<> 154:37f96f9d4de2 867 */
<> 154:37f96f9d4de2 868
<> 154:37f96f9d4de2 869 #if defined(USE_FULL_LL_DRIVER)
<> 154:37f96f9d4de2 870 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
<> 154:37f96f9d4de2 871 * @{
<> 154:37f96f9d4de2 872 */
<> 154:37f96f9d4de2 873
<> 154:37f96f9d4de2 874 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 154:37f96f9d4de2 875 uint32_t LL_EXTI_DeInit(void);
<> 154:37f96f9d4de2 876 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 154:37f96f9d4de2 877
<> 154:37f96f9d4de2 878
<> 154:37f96f9d4de2 879 /**
<> 154:37f96f9d4de2 880 * @}
<> 154:37f96f9d4de2 881 */
<> 154:37f96f9d4de2 882 #endif /* USE_FULL_LL_DRIVER */
<> 154:37f96f9d4de2 883
<> 154:37f96f9d4de2 884 /**
<> 154:37f96f9d4de2 885 * @}
<> 154:37f96f9d4de2 886 */
<> 154:37f96f9d4de2 887
<> 154:37f96f9d4de2 888 /**
<> 154:37f96f9d4de2 889 * @}
<> 154:37f96f9d4de2 890 */
<> 154:37f96f9d4de2 891
<> 154:37f96f9d4de2 892 #endif /* EXTI */
<> 154:37f96f9d4de2 893
<> 154:37f96f9d4de2 894 /**
<> 154:37f96f9d4de2 895 * @}
<> 154:37f96f9d4de2 896 */
<> 154:37f96f9d4de2 897
<> 154:37f96f9d4de2 898 #ifdef __cplusplus
<> 154:37f96f9d4de2 899 }
<> 154:37f96f9d4de2 900 #endif
<> 154:37f96f9d4de2 901
<> 154:37f96f9d4de2 902 #endif /* __STM32F1xx_LL_EXTI_H */
<> 154:37f96f9d4de2 903
<> 154:37f96f9d4de2 904 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/