mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_uart.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f1xx_hal_uart.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Header file of UART HAL module.
<> 144:ef7eb2e8f9f7 6 ******************************************************************************
<> 144:ef7eb2e8f9f7 7 * @attention
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 12 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 14 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 17 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 19 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 20 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 ******************************************************************************
AnnaBridge 165:e614a9f1c9e2 34 */
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 37 #ifndef __STM32F1xx_HAL_UART_H
<> 144:ef7eb2e8f9f7 38 #define __STM32F1xx_HAL_UART_H
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 41 extern "C" {
<> 144:ef7eb2e8f9f7 42 #endif
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 45 #include "stm32f1xx_hal_def.h"
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /** @addtogroup STM32F1xx_HAL_Driver
<> 144:ef7eb2e8f9f7 48 * @{
<> 144:ef7eb2e8f9f7 49 */
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /** @addtogroup UART
<> 144:ef7eb2e8f9f7 52 * @{
AnnaBridge 165:e614a9f1c9e2 53 */
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 56 /** @defgroup UART_Exported_Types UART Exported Types
<> 144:ef7eb2e8f9f7 57 * @{
AnnaBridge 165:e614a9f1c9e2 58 */
<> 144:ef7eb2e8f9f7 59
AnnaBridge 165:e614a9f1c9e2 60 /**
<> 144:ef7eb2e8f9f7 61 * @brief UART Init Structure definition
AnnaBridge 165:e614a9f1c9e2 62 */
<> 144:ef7eb2e8f9f7 63 typedef struct
<> 144:ef7eb2e8f9f7 64 {
<> 144:ef7eb2e8f9f7 65 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
<> 144:ef7eb2e8f9f7 66 The baud rate is computed using the following formula:
<> 144:ef7eb2e8f9f7 67 - IntegerDivider = ((PCLKx) / (16 * (huart->Init.BaudRate)))
<> 144:ef7eb2e8f9f7 68 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 16) + 0.5 */
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 71 This parameter can be a value of @ref UART_Word_Length */
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 144:ef7eb2e8f9f7 74 This parameter can be a value of @ref UART_Stop_Bits */
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 77 This parameter can be a value of @ref UART_Parity
<> 144:ef7eb2e8f9f7 78 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 79 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 80 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 81 word length is set to 8 data bits). */
AnnaBridge 165:e614a9f1c9e2 82
AnnaBridge 165:e614a9f1c9e2 83 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 84 This parameter can be a value of @ref UART_Mode */
<> 144:ef7eb2e8f9f7 85
AnnaBridge 165:e614a9f1c9e2 86 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 87 This parameter can be a value of @ref UART_Hardware_Flow_Control */
AnnaBridge 165:e614a9f1c9e2 88
<> 144:ef7eb2e8f9f7 89 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
AnnaBridge 165:e614a9f1c9e2 90 This parameter can be a value of @ref UART_Over_Sampling. This feature is only available
AnnaBridge 165:e614a9f1c9e2 91 on STM32F100xx family, so OverSampling parameter should always be set to 16. */
<> 144:ef7eb2e8f9f7 92 }UART_InitTypeDef;
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 /**
AnnaBridge 165:e614a9f1c9e2 95 * @brief HAL UART State structures definition
AnnaBridge 165:e614a9f1c9e2 96 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
AnnaBridge 165:e614a9f1c9e2 97 * - gState contains UART state information related to global Handle management
AnnaBridge 165:e614a9f1c9e2 98 * and also information related to Tx operations.
AnnaBridge 165:e614a9f1c9e2 99 * gState value coding follow below described bitmap :
AnnaBridge 165:e614a9f1c9e2 100 * b7-b6 Error information
AnnaBridge 165:e614a9f1c9e2 101 * 00 : No Error
AnnaBridge 165:e614a9f1c9e2 102 * 01 : (Not Used)
AnnaBridge 165:e614a9f1c9e2 103 * 10 : Timeout
AnnaBridge 165:e614a9f1c9e2 104 * 11 : Error
AnnaBridge 165:e614a9f1c9e2 105 * b5 IP initilisation status
AnnaBridge 165:e614a9f1c9e2 106 * 0 : Reset (IP not initialized)
AnnaBridge 165:e614a9f1c9e2 107 * 1 : Init done (IP not initialized. HAL UART Init function already called)
AnnaBridge 165:e614a9f1c9e2 108 * b4-b3 (not used)
AnnaBridge 165:e614a9f1c9e2 109 * xx : Should be set to 00
AnnaBridge 165:e614a9f1c9e2 110 * b2 Intrinsic process state
AnnaBridge 165:e614a9f1c9e2 111 * 0 : Ready
AnnaBridge 165:e614a9f1c9e2 112 * 1 : Busy (IP busy with some configuration or internal operations)
AnnaBridge 165:e614a9f1c9e2 113 * b1 (not used)
AnnaBridge 165:e614a9f1c9e2 114 * x : Should be set to 0
AnnaBridge 165:e614a9f1c9e2 115 * b0 Tx state
AnnaBridge 165:e614a9f1c9e2 116 * 0 : Ready (no Tx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 117 * 1 : Busy (Tx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 118 * - RxState contains information related to Rx operations.
AnnaBridge 165:e614a9f1c9e2 119 * RxState value coding follow below described bitmap :
AnnaBridge 165:e614a9f1c9e2 120 * b7-b6 (not used)
AnnaBridge 165:e614a9f1c9e2 121 * xx : Should be set to 00
AnnaBridge 165:e614a9f1c9e2 122 * b5 IP initilisation status
AnnaBridge 165:e614a9f1c9e2 123 * 0 : Reset (IP not initialized)
AnnaBridge 165:e614a9f1c9e2 124 * 1 : Init done (IP not initialized)
AnnaBridge 165:e614a9f1c9e2 125 * b4-b2 (not used)
AnnaBridge 165:e614a9f1c9e2 126 * xxx : Should be set to 000
AnnaBridge 165:e614a9f1c9e2 127 * b1 Rx state
AnnaBridge 165:e614a9f1c9e2 128 * 0 : Ready (no Rx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 129 * 1 : Busy (Rx operation ongoing)
AnnaBridge 165:e614a9f1c9e2 130 * b0 (not used)
AnnaBridge 165:e614a9f1c9e2 131 * x : Should be set to 0.
AnnaBridge 165:e614a9f1c9e2 132 */
<> 144:ef7eb2e8f9f7 133 typedef enum
<> 144:ef7eb2e8f9f7 134 {
AnnaBridge 165:e614a9f1c9e2 135 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
AnnaBridge 165:e614a9f1c9e2 136 Value is allowed for gState and RxState */
AnnaBridge 165:e614a9f1c9e2 137 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
AnnaBridge 165:e614a9f1c9e2 138 Value is allowed for gState and RxState */
AnnaBridge 165:e614a9f1c9e2 139 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
AnnaBridge 165:e614a9f1c9e2 140 Value is allowed for gState only */
AnnaBridge 165:e614a9f1c9e2 141 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
AnnaBridge 165:e614a9f1c9e2 142 Value is allowed for gState only */
AnnaBridge 165:e614a9f1c9e2 143 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
AnnaBridge 165:e614a9f1c9e2 144 Value is allowed for RxState only */
AnnaBridge 165:e614a9f1c9e2 145 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
AnnaBridge 165:e614a9f1c9e2 146 Not to be used for neither gState nor RxState.
AnnaBridge 165:e614a9f1c9e2 147 Value is result of combination (Or) between gState and RxState values */
AnnaBridge 165:e614a9f1c9e2 148 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
AnnaBridge 165:e614a9f1c9e2 149 Value is allowed for gState only */
AnnaBridge 165:e614a9f1c9e2 150 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
AnnaBridge 165:e614a9f1c9e2 151 Value is allowed for gState only */
<> 144:ef7eb2e8f9f7 152 }HAL_UART_StateTypeDef;
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 /**
AnnaBridge 165:e614a9f1c9e2 155 * @brief UART handle Structure definition
AnnaBridge 165:e614a9f1c9e2 156 */
<> 144:ef7eb2e8f9f7 157 typedef struct
<> 144:ef7eb2e8f9f7 158 {
<> 144:ef7eb2e8f9f7 159 USART_TypeDef *Instance; /*!< UART registers base address */
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 UART_InitTypeDef Init; /*!< UART communication parameters */
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 uint16_t TxXferSize; /*!< UART Tx Transfer size */
<> 144:ef7eb2e8f9f7 166
AnnaBridge 165:e614a9f1c9e2 167 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 uint16_t RxXferSize; /*!< UART Rx Transfer size */
<> 144:ef7eb2e8f9f7 172
AnnaBridge 165:e614a9f1c9e2 173 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 HAL_LockTypeDef Lock; /*!< Locking object */
<> 144:ef7eb2e8f9f7 180
AnnaBridge 165:e614a9f1c9e2 181 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
AnnaBridge 165:e614a9f1c9e2 182 and also related to Tx operations.
AnnaBridge 165:e614a9f1c9e2 183 This parameter can be a value of @ref HAL_UART_StateTypeDef */
<> 144:ef7eb2e8f9f7 184
AnnaBridge 165:e614a9f1c9e2 185 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
AnnaBridge 165:e614a9f1c9e2 186 This parameter can be a value of @ref HAL_UART_StateTypeDef */
AnnaBridge 165:e614a9f1c9e2 187
<> 144:ef7eb2e8f9f7 188 __IO uint32_t ErrorCode; /*!< UART Error code */
<> 144:ef7eb2e8f9f7 189 }UART_HandleTypeDef;
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 /**
<> 144:ef7eb2e8f9f7 192 * @}
<> 144:ef7eb2e8f9f7 193 */
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 196 /** @defgroup UART_Exported_Constants UART Exported constants
<> 144:ef7eb2e8f9f7 197 * @{
<> 144:ef7eb2e8f9f7 198 */
<> 144:ef7eb2e8f9f7 199
AnnaBridge 165:e614a9f1c9e2 200 /** @defgroup UART_Error_Code UART Error Code
<> 144:ef7eb2e8f9f7 201 * @{
<> 144:ef7eb2e8f9f7 202 */
AnnaBridge 165:e614a9f1c9e2 203 #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */
AnnaBridge 165:e614a9f1c9e2 204 #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */
AnnaBridge 165:e614a9f1c9e2 205 #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */
AnnaBridge 165:e614a9f1c9e2 206 #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */
AnnaBridge 165:e614a9f1c9e2 207 #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */
AnnaBridge 165:e614a9f1c9e2 208 #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 209 /**
<> 144:ef7eb2e8f9f7 210 * @}
<> 144:ef7eb2e8f9f7 211 */
<> 144:ef7eb2e8f9f7 212
AnnaBridge 165:e614a9f1c9e2 213 /** @defgroup UART_Word_Length UART Word Length
<> 144:ef7eb2e8f9f7 214 * @{
<> 144:ef7eb2e8f9f7 215 */
AnnaBridge 165:e614a9f1c9e2 216 #define UART_WORDLENGTH_8B 0x00000000U
<> 144:ef7eb2e8f9f7 217 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
<> 144:ef7eb2e8f9f7 218 /**
<> 144:ef7eb2e8f9f7 219 * @}
<> 144:ef7eb2e8f9f7 220 */
<> 144:ef7eb2e8f9f7 221
AnnaBridge 165:e614a9f1c9e2 222 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
<> 144:ef7eb2e8f9f7 223 * @{
<> 144:ef7eb2e8f9f7 224 */
AnnaBridge 165:e614a9f1c9e2 225 #define UART_STOPBITS_1 0x00000000U
<> 144:ef7eb2e8f9f7 226 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
<> 144:ef7eb2e8f9f7 227 /**
<> 144:ef7eb2e8f9f7 228 * @}
AnnaBridge 165:e614a9f1c9e2 229 */
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 /** @defgroup UART_Parity UART Parity
<> 144:ef7eb2e8f9f7 232 * @{
AnnaBridge 165:e614a9f1c9e2 233 */
AnnaBridge 165:e614a9f1c9e2 234 #define UART_PARITY_NONE 0x00000000U
<> 144:ef7eb2e8f9f7 235 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 144:ef7eb2e8f9f7 236 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 144:ef7eb2e8f9f7 237 /**
<> 144:ef7eb2e8f9f7 238 * @}
AnnaBridge 165:e614a9f1c9e2 239 */
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
<> 144:ef7eb2e8f9f7 242 * @{
AnnaBridge 165:e614a9f1c9e2 243 */
AnnaBridge 165:e614a9f1c9e2 244 #define UART_HWCONTROL_NONE 0x00000000U
<> 144:ef7eb2e8f9f7 245 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
<> 144:ef7eb2e8f9f7 246 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
<> 144:ef7eb2e8f9f7 247 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
<> 144:ef7eb2e8f9f7 248 /**
<> 144:ef7eb2e8f9f7 249 * @}
<> 144:ef7eb2e8f9f7 250 */
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 /** @defgroup UART_Mode UART Transfer Mode
<> 144:ef7eb2e8f9f7 253 * @{
<> 144:ef7eb2e8f9f7 254 */
<> 144:ef7eb2e8f9f7 255 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
<> 144:ef7eb2e8f9f7 256 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
<> 144:ef7eb2e8f9f7 257 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 144:ef7eb2e8f9f7 258 /**
<> 144:ef7eb2e8f9f7 259 * @}
<> 144:ef7eb2e8f9f7 260 */
AnnaBridge 165:e614a9f1c9e2 261
AnnaBridge 165:e614a9f1c9e2 262 /** @defgroup UART_State UART State
<> 144:ef7eb2e8f9f7 263 * @{
AnnaBridge 165:e614a9f1c9e2 264 */
AnnaBridge 165:e614a9f1c9e2 265 #define UART_STATE_DISABLE 0x00000000U
<> 144:ef7eb2e8f9f7 266 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
<> 144:ef7eb2e8f9f7 267 /**
<> 144:ef7eb2e8f9f7 268 * @}
<> 144:ef7eb2e8f9f7 269 */
<> 144:ef7eb2e8f9f7 270
AnnaBridge 165:e614a9f1c9e2 271
<> 144:ef7eb2e8f9f7 272 /** @defgroup UART_Over_Sampling UART Over Sampling
<> 144:ef7eb2e8f9f7 273 * @{
<> 144:ef7eb2e8f9f7 274 */
AnnaBridge 165:e614a9f1c9e2 275 #define UART_OVERSAMPLING_16 0x00000000U
AnnaBridge 165:e614a9f1c9e2 276 #if defined(USART_CR1_OVER8)
AnnaBridge 165:e614a9f1c9e2 277 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
AnnaBridge 165:e614a9f1c9e2 278 #endif /* USART_CR1_OVER8 */
<> 144:ef7eb2e8f9f7 279 /**
<> 144:ef7eb2e8f9f7 280 * @}
<> 144:ef7eb2e8f9f7 281 */
<> 144:ef7eb2e8f9f7 282
AnnaBridge 165:e614a9f1c9e2 283
<> 144:ef7eb2e8f9f7 284 /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
<> 144:ef7eb2e8f9f7 285 * @{
<> 144:ef7eb2e8f9f7 286 */
AnnaBridge 165:e614a9f1c9e2 287 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U
<> 144:ef7eb2e8f9f7 288 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
<> 144:ef7eb2e8f9f7 289 /**
<> 144:ef7eb2e8f9f7 290 * @}
<> 144:ef7eb2e8f9f7 291 */
AnnaBridge 165:e614a9f1c9e2 292 /** @defgroup UART_WakeUp_functions UART Wakeup Functions
<> 144:ef7eb2e8f9f7 293 * @{
<> 144:ef7eb2e8f9f7 294 */
AnnaBridge 165:e614a9f1c9e2 295 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U
<> 144:ef7eb2e8f9f7 296 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
<> 144:ef7eb2e8f9f7 297 /**
<> 144:ef7eb2e8f9f7 298 * @}
<> 144:ef7eb2e8f9f7 299 */
<> 144:ef7eb2e8f9f7 300
<> 144:ef7eb2e8f9f7 301 /** @defgroup UART_Flags UART FLags
<> 144:ef7eb2e8f9f7 302 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 303 * - 0xXXXX : Flag mask in the SR register
<> 144:ef7eb2e8f9f7 304 * @{
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306 #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
<> 144:ef7eb2e8f9f7 307 #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
<> 144:ef7eb2e8f9f7 308 #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
<> 144:ef7eb2e8f9f7 309 #define UART_FLAG_TC ((uint32_t)USART_SR_TC)
<> 144:ef7eb2e8f9f7 310 #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
<> 144:ef7eb2e8f9f7 311 #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
<> 144:ef7eb2e8f9f7 312 #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
<> 144:ef7eb2e8f9f7 313 #define UART_FLAG_NE ((uint32_t)USART_SR_NE)
<> 144:ef7eb2e8f9f7 314 #define UART_FLAG_FE ((uint32_t)USART_SR_FE)
<> 144:ef7eb2e8f9f7 315 #define UART_FLAG_PE ((uint32_t)USART_SR_PE)
<> 144:ef7eb2e8f9f7 316 /**
<> 144:ef7eb2e8f9f7 317 * @}
<> 144:ef7eb2e8f9f7 318 */
<> 144:ef7eb2e8f9f7 319
<> 144:ef7eb2e8f9f7 320 /** @defgroup UART_Interrupt_definition UART Interrupt Definitions
<> 144:ef7eb2e8f9f7 321 * Elements values convention: 0xY000XXXX
<> 144:ef7eb2e8f9f7 322 * - XXXX : Interrupt mask (16 bits) in the Y register
<> 144:ef7eb2e8f9f7 323 * - Y : Interrupt source register (2bits)
AnnaBridge 165:e614a9f1c9e2 324 * - 01: CR1 register
AnnaBridge 165:e614a9f1c9e2 325 * - 10: CR2 register
AnnaBridge 165:e614a9f1c9e2 326 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 327 * @{
AnnaBridge 165:e614a9f1c9e2 328 */
<> 144:ef7eb2e8f9f7 329
AnnaBridge 165:e614a9f1c9e2 330 #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
AnnaBridge 165:e614a9f1c9e2 331 #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
AnnaBridge 165:e614a9f1c9e2 332 #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
AnnaBridge 165:e614a9f1c9e2 333 #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
AnnaBridge 165:e614a9f1c9e2 334 #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
<> 144:ef7eb2e8f9f7 335
AnnaBridge 165:e614a9f1c9e2 336 #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
<> 144:ef7eb2e8f9f7 337
AnnaBridge 165:e614a9f1c9e2 338 #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
AnnaBridge 165:e614a9f1c9e2 339 #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
<> 144:ef7eb2e8f9f7 340 /**
<> 144:ef7eb2e8f9f7 341 * @}
<> 144:ef7eb2e8f9f7 342 */
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /**
<> 144:ef7eb2e8f9f7 345 * @}
<> 144:ef7eb2e8f9f7 346 */
<> 144:ef7eb2e8f9f7 347
<> 144:ef7eb2e8f9f7 348 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 349 /** @defgroup UART_Exported_Macros UART Exported Macros
<> 144:ef7eb2e8f9f7 350 * @{
<> 144:ef7eb2e8f9f7 351 */
<> 144:ef7eb2e8f9f7 352
AnnaBridge 165:e614a9f1c9e2 353 /** @brief Reset UART handle gstate & RxState
<> 144:ef7eb2e8f9f7 354 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 355 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 356 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 357 */
AnnaBridge 165:e614a9f1c9e2 358 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
AnnaBridge 165:e614a9f1c9e2 359 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
AnnaBridge 165:e614a9f1c9e2 360 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
AnnaBridge 165:e614a9f1c9e2 361 } while(0U)
<> 144:ef7eb2e8f9f7 362
AnnaBridge 165:e614a9f1c9e2 363 /** @brief Flushs the UART DR register
<> 144:ef7eb2e8f9f7 364 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 365 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 366 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 367 */
<> 144:ef7eb2e8f9f7 368 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
<> 144:ef7eb2e8f9f7 369
AnnaBridge 165:e614a9f1c9e2 370 /** @brief Checks whether the specified UART flag is set or not.
<> 144:ef7eb2e8f9f7 371 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 372 * This parameter can be UARTx where x: 1, 2, 3, 4 or 5 to select the USART or
AnnaBridge 165:e614a9f1c9e2 373 * UART peripheral.
<> 144:ef7eb2e8f9f7 374 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 375 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 376 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
<> 144:ef7eb2e8f9f7 377 * @arg UART_FLAG_LBD: LIN Break detection flag
<> 144:ef7eb2e8f9f7 378 * @arg UART_FLAG_TXE: Transmit data register empty flag
<> 144:ef7eb2e8f9f7 379 * @arg UART_FLAG_TC: Transmission Complete flag
<> 144:ef7eb2e8f9f7 380 * @arg UART_FLAG_RXNE: Receive data register not empty flag
<> 144:ef7eb2e8f9f7 381 * @arg UART_FLAG_IDLE: Idle Line detection flag
<> 144:ef7eb2e8f9f7 382 * @arg UART_FLAG_ORE: OverRun Error flag
<> 144:ef7eb2e8f9f7 383 * @arg UART_FLAG_NE: Noise Error flag
<> 144:ef7eb2e8f9f7 384 * @arg UART_FLAG_FE: Framing Error flag
<> 144:ef7eb2e8f9f7 385 * @arg UART_FLAG_PE: Parity Error flag
<> 144:ef7eb2e8f9f7 386 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 387 */
<> 144:ef7eb2e8f9f7 388 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 389
AnnaBridge 165:e614a9f1c9e2 390 /** @brief Clears the specified UART pending flag.
<> 144:ef7eb2e8f9f7 391 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 392 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 393 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 394 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 395 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 396 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
<> 144:ef7eb2e8f9f7 397 * @arg UART_FLAG_LBD: LIN Break detection flag.
<> 144:ef7eb2e8f9f7 398 * @arg UART_FLAG_TC: Transmission Complete flag.
<> 144:ef7eb2e8f9f7 399 * @arg UART_FLAG_RXNE: Receive data register not empty flag.
<> 144:ef7eb2e8f9f7 400 *
<> 144:ef7eb2e8f9f7 401 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
<> 144:ef7eb2e8f9f7 402 * error) and IDLE (Idle line detected) flags are cleared by software
<> 144:ef7eb2e8f9f7 403 * sequence: a read operation to USART_SR register followed by a read
<> 144:ef7eb2e8f9f7 404 * operation to USART_DR register.
<> 144:ef7eb2e8f9f7 405 * @note RXNE flag can be also cleared by a read to the USART_DR register.
<> 144:ef7eb2e8f9f7 406 * @note TC flag can be also cleared by software sequence: a read operation to
<> 144:ef7eb2e8f9f7 407 * USART_SR register followed by a write operation to USART_DR register.
<> 144:ef7eb2e8f9f7 408 * @note TXE flag is cleared only by a write to the USART_DR register.
<> 144:ef7eb2e8f9f7 409 *
<> 144:ef7eb2e8f9f7 410 */
<> 144:ef7eb2e8f9f7 411 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
<> 144:ef7eb2e8f9f7 412
AnnaBridge 165:e614a9f1c9e2 413 /** @brief Clears the UART PE pending flag.
<> 144:ef7eb2e8f9f7 414 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 415 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 416 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 417 */
AnnaBridge 165:e614a9f1c9e2 418 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
AnnaBridge 165:e614a9f1c9e2 419 do{ \
AnnaBridge 165:e614a9f1c9e2 420 __IO uint32_t tmpreg = 0x00U; \
AnnaBridge 165:e614a9f1c9e2 421 tmpreg = (__HANDLE__)->Instance->SR; \
AnnaBridge 165:e614a9f1c9e2 422 tmpreg = (__HANDLE__)->Instance->DR; \
AnnaBridge 165:e614a9f1c9e2 423 UNUSED(tmpreg); \
AnnaBridge 165:e614a9f1c9e2 424 } while(0U)
<> 144:ef7eb2e8f9f7 425
AnnaBridge 165:e614a9f1c9e2 426 /** @brief Clears the UART FE pending flag.
<> 144:ef7eb2e8f9f7 427 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 428 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 429 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 430 */
<> 144:ef7eb2e8f9f7 431 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 432
AnnaBridge 165:e614a9f1c9e2 433 /** @brief Clears the UART NE pending flag.
<> 144:ef7eb2e8f9f7 434 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 435 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 436 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 437 */
<> 144:ef7eb2e8f9f7 438 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 439
AnnaBridge 165:e614a9f1c9e2 440 /** @brief Clears the UART ORE pending flag.
<> 144:ef7eb2e8f9f7 441 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 442 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 443 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 444 */
<> 144:ef7eb2e8f9f7 445 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
<> 144:ef7eb2e8f9f7 446
AnnaBridge 165:e614a9f1c9e2 447 /** @brief Clears the UART IDLE pending flag.
<> 144:ef7eb2e8f9f7 448 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 449 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 450 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 451 */
<> 144:ef7eb2e8f9f7 452 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
AnnaBridge 165:e614a9f1c9e2 453
<> 144:ef7eb2e8f9f7 454 /** @brief Enable the specified UART interrupt.
<> 144:ef7eb2e8f9f7 455 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 456 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 457 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 458 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
<> 144:ef7eb2e8f9f7 459 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 460 * @arg UART_IT_CTS: CTS change interrupt
<> 144:ef7eb2e8f9f7 461 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 144:ef7eb2e8f9f7 462 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 463 * @arg UART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 464 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 465 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 466 * @arg UART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 467 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 468 */
AnnaBridge 165:e614a9f1c9e2 469 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
AnnaBridge 165:e614a9f1c9e2 470 (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 471 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
<> 144:ef7eb2e8f9f7 472
<> 144:ef7eb2e8f9f7 473 /** @brief Disable the specified UART interrupt.
<> 144:ef7eb2e8f9f7 474 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 475 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 476 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 477 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
<> 144:ef7eb2e8f9f7 478 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 479 * @arg UART_IT_CTS: CTS change interrupt
<> 144:ef7eb2e8f9f7 480 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 144:ef7eb2e8f9f7 481 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 482 * @arg UART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 483 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 484 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 485 * @arg UART_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 486 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 487 */
AnnaBridge 165:e614a9f1c9e2 488 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
AnnaBridge 165:e614a9f1c9e2 489 (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
<> 144:ef7eb2e8f9f7 490 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
AnnaBridge 165:e614a9f1c9e2 491
AnnaBridge 165:e614a9f1c9e2 492 /** @brief Checks whether the specified UART interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 493 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 494 * UART Handle selects the USARTx or UARTy peripheral
<> 144:ef7eb2e8f9f7 495 * (USART,UART availability and x,y values depending on device).
<> 144:ef7eb2e8f9f7 496 * @param __IT__: specifies the UART interrupt source to check.
<> 144:ef7eb2e8f9f7 497 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 498 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
<> 144:ef7eb2e8f9f7 499 * @arg UART_IT_LBD: LIN Break detection interrupt
<> 144:ef7eb2e8f9f7 500 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 501 * @arg UART_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 502 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 503 * @arg UART_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 504 * @arg UART_IT_ERR: Error interrupt
<> 144:ef7eb2e8f9f7 505 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 506 */
AnnaBridge 165:e614a9f1c9e2 507 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == UART_CR2_REG_INDEX)? \
<> 144:ef7eb2e8f9f7 508 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
<> 144:ef7eb2e8f9f7 509
<> 144:ef7eb2e8f9f7 510 /** @brief Enable CTS flow control
<> 144:ef7eb2e8f9f7 511 * This macro allows to enable CTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 512 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 513 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 514 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 515 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 516 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 517 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 518 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 519 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 520 * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
<> 144:ef7eb2e8f9f7 521 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 522 */
<> 144:ef7eb2e8f9f7 523 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 524 do{ \
<> 144:ef7eb2e8f9f7 525 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
<> 144:ef7eb2e8f9f7 526 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
AnnaBridge 165:e614a9f1c9e2 527 } while(0U)
<> 144:ef7eb2e8f9f7 528
<> 144:ef7eb2e8f9f7 529 /** @brief Disable CTS flow control
<> 144:ef7eb2e8f9f7 530 * This macro allows to disable CTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 531 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 532 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 533 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 534 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 535 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 536 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 537 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 538 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 539 * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
<> 144:ef7eb2e8f9f7 540 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 541 */
<> 144:ef7eb2e8f9f7 542 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 543 do{ \
<> 144:ef7eb2e8f9f7 544 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
<> 144:ef7eb2e8f9f7 545 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
AnnaBridge 165:e614a9f1c9e2 546 } while(0U)
<> 144:ef7eb2e8f9f7 547
<> 144:ef7eb2e8f9f7 548 /** @brief Enable RTS flow control
<> 144:ef7eb2e8f9f7 549 * This macro allows to enable RTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 550 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 551 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 552 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 553 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 554 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 555 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 556 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 557 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 558 * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
<> 144:ef7eb2e8f9f7 559 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 560 */
<> 144:ef7eb2e8f9f7 561 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 562 do{ \
<> 144:ef7eb2e8f9f7 563 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
<> 144:ef7eb2e8f9f7 564 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
AnnaBridge 165:e614a9f1c9e2 565 } while(0U)
<> 144:ef7eb2e8f9f7 566
<> 144:ef7eb2e8f9f7 567 /** @brief Disable RTS flow control
<> 144:ef7eb2e8f9f7 568 * This macro allows to disable RTS hardware flow control for a given UART instance,
<> 144:ef7eb2e8f9f7 569 * without need to call HAL_UART_Init() function.
<> 144:ef7eb2e8f9f7 570 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
<> 144:ef7eb2e8f9f7 571 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
<> 144:ef7eb2e8f9f7 572 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
<> 144:ef7eb2e8f9f7 573 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
<> 144:ef7eb2e8f9f7 574 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
<> 144:ef7eb2e8f9f7 575 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
<> 144:ef7eb2e8f9f7 576 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 577 * The Handle Instance can be any USARTx (supporting the HW Flow control feature).
<> 144:ef7eb2e8f9f7 578 * It is used to select the USART peripheral (USART availability and x value depending on device).
<> 144:ef7eb2e8f9f7 579 */
<> 144:ef7eb2e8f9f7 580 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 581 do{ \
<> 144:ef7eb2e8f9f7 582 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
<> 144:ef7eb2e8f9f7 583 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
AnnaBridge 165:e614a9f1c9e2 584 } while(0U)
<> 144:ef7eb2e8f9f7 585
AnnaBridge 165:e614a9f1c9e2 586 #if defined(USART_CR3_ONEBIT)
AnnaBridge 165:e614a9f1c9e2 587 /** @brief macros to enables the UART's one bit sample method
AnnaBridge 165:e614a9f1c9e2 588 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 589 */
AnnaBridge 165:e614a9f1c9e2 590 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
AnnaBridge 165:e614a9f1c9e2 591
AnnaBridge 165:e614a9f1c9e2 592 /** @brief macros to disables the UART's one bit sample method
AnnaBridge 165:e614a9f1c9e2 593 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 594 * @retval None
AnnaBridge 165:e614a9f1c9e2 595 */
AnnaBridge 165:e614a9f1c9e2 596 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
AnnaBridge 165:e614a9f1c9e2 597 #endif /* USART_CR3_ONEBIT */
<> 144:ef7eb2e8f9f7 598
<> 144:ef7eb2e8f9f7 599 /** @brief Enable UART
<> 144:ef7eb2e8f9f7 600 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 165:e614a9f1c9e2 601 */
<> 144:ef7eb2e8f9f7 602 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
<> 144:ef7eb2e8f9f7 603
<> 144:ef7eb2e8f9f7 604 /** @brief Disable UART
AnnaBridge 165:e614a9f1c9e2 605 * @param __HANDLE__: specifies the UART Handle.
<> 144:ef7eb2e8f9f7 606 */
<> 144:ef7eb2e8f9f7 607 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
<> 144:ef7eb2e8f9f7 608 /**
<> 144:ef7eb2e8f9f7 609 * @}
<> 144:ef7eb2e8f9f7 610 */
AnnaBridge 165:e614a9f1c9e2 611 /* Exported functions --------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 612 /** @addtogroup UART_Exported_Functions
<> 144:ef7eb2e8f9f7 613 * @{
<> 144:ef7eb2e8f9f7 614 */
<> 144:ef7eb2e8f9f7 615
AnnaBridge 165:e614a9f1c9e2 616 /** @addtogroup UART_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 617 * @{
<> 144:ef7eb2e8f9f7 618 */
AnnaBridge 165:e614a9f1c9e2 619 /* Initialization/de-initialization functions **********************************/
<> 144:ef7eb2e8f9f7 620 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 621 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 622 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
<> 144:ef7eb2e8f9f7 623 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
<> 144:ef7eb2e8f9f7 624 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 625 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 626 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 627 /**
<> 144:ef7eb2e8f9f7 628 * @}
<> 144:ef7eb2e8f9f7 629 */
<> 144:ef7eb2e8f9f7 630
AnnaBridge 165:e614a9f1c9e2 631 /** @addtogroup UART_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 632 * @{
<> 144:ef7eb2e8f9f7 633 */
AnnaBridge 165:e614a9f1c9e2 634 /* IO operation functions *******************************************************/
<> 144:ef7eb2e8f9f7 635 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 636 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 637 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 638 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 639 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 640 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 641 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 642 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 643 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 644 /* Transfer Abort functions */
AnnaBridge 165:e614a9f1c9e2 645 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 646 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 647 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 648 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 649 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 650 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 651
<> 144:ef7eb2e8f9f7 652 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 653 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 654 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 655 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 656 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 657 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 658 void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 659 void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 660 void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 661 /**
<> 144:ef7eb2e8f9f7 662 * @}
<> 144:ef7eb2e8f9f7 663 */
<> 144:ef7eb2e8f9f7 664
AnnaBridge 165:e614a9f1c9e2 665 /** @addtogroup UART_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 666 * @{
<> 144:ef7eb2e8f9f7 667 */
<> 144:ef7eb2e8f9f7 668 /* Peripheral Control functions ************************************************/
<> 144:ef7eb2e8f9f7 669 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 670 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 671 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 672 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
<> 144:ef7eb2e8f9f7 673 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 674 /**
AnnaBridge 165:e614a9f1c9e2 675 * @}
AnnaBridge 165:e614a9f1c9e2 676 */
<> 144:ef7eb2e8f9f7 677
AnnaBridge 165:e614a9f1c9e2 678 /** @addtogroup UART_Exported_Functions_Group4
AnnaBridge 165:e614a9f1c9e2 679 * @{
AnnaBridge 165:e614a9f1c9e2 680 */
AnnaBridge 165:e614a9f1c9e2 681 /* Peripheral State functions **************************************************/
AnnaBridge 165:e614a9f1c9e2 682 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 683 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
AnnaBridge 165:e614a9f1c9e2 684 /**
AnnaBridge 165:e614a9f1c9e2 685 * @}
AnnaBridge 165:e614a9f1c9e2 686 */
AnnaBridge 165:e614a9f1c9e2 687
AnnaBridge 165:e614a9f1c9e2 688 /**
AnnaBridge 165:e614a9f1c9e2 689 * @}
AnnaBridge 165:e614a9f1c9e2 690 */
AnnaBridge 165:e614a9f1c9e2 691 /* Private types -------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 692 /* Private variables ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 693 /* Private constants ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 694 /** @defgroup UART_Private_Constants UART Private Constants
AnnaBridge 165:e614a9f1c9e2 695 * @{
AnnaBridge 165:e614a9f1c9e2 696 */
AnnaBridge 165:e614a9f1c9e2 697 /** @brief UART interruptions flag mask
AnnaBridge 165:e614a9f1c9e2 698 *
AnnaBridge 165:e614a9f1c9e2 699 */
AnnaBridge 165:e614a9f1c9e2 700 #define UART_IT_MASK 0x0000FFFFU
AnnaBridge 165:e614a9f1c9e2 701
AnnaBridge 165:e614a9f1c9e2 702 #define UART_CR1_REG_INDEX 1U
AnnaBridge 165:e614a9f1c9e2 703 #define UART_CR2_REG_INDEX 2U
AnnaBridge 165:e614a9f1c9e2 704 #define UART_CR3_REG_INDEX 3U
<> 144:ef7eb2e8f9f7 705 /**
<> 144:ef7eb2e8f9f7 706 * @}
<> 144:ef7eb2e8f9f7 707 */
<> 144:ef7eb2e8f9f7 708
AnnaBridge 165:e614a9f1c9e2 709 /* Private macros ------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 710 /** @defgroup UART_Private_Macros UART Private Macros
<> 144:ef7eb2e8f9f7 711 * @{
<> 144:ef7eb2e8f9f7 712 */
AnnaBridge 165:e614a9f1c9e2 713 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
AnnaBridge 165:e614a9f1c9e2 714 ((LENGTH) == UART_WORDLENGTH_9B))
AnnaBridge 165:e614a9f1c9e2 715 #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
AnnaBridge 165:e614a9f1c9e2 716 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
AnnaBridge 165:e614a9f1c9e2 717 ((STOPBITS) == UART_STOPBITS_2))
AnnaBridge 165:e614a9f1c9e2 718 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
AnnaBridge 165:e614a9f1c9e2 719 ((PARITY) == UART_PARITY_EVEN) || \
AnnaBridge 165:e614a9f1c9e2 720 ((PARITY) == UART_PARITY_ODD))
AnnaBridge 165:e614a9f1c9e2 721 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
AnnaBridge 165:e614a9f1c9e2 722 (((CONTROL) == UART_HWCONTROL_NONE) || \
AnnaBridge 165:e614a9f1c9e2 723 ((CONTROL) == UART_HWCONTROL_RTS) || \
AnnaBridge 165:e614a9f1c9e2 724 ((CONTROL) == UART_HWCONTROL_CTS) || \
AnnaBridge 165:e614a9f1c9e2 725 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
AnnaBridge 165:e614a9f1c9e2 726 #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U))
AnnaBridge 165:e614a9f1c9e2 727 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
AnnaBridge 165:e614a9f1c9e2 728 ((STATE) == UART_STATE_ENABLE))
AnnaBridge 165:e614a9f1c9e2 729 #if defined(USART_CR1_OVER8)
AnnaBridge 165:e614a9f1c9e2 730 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
AnnaBridge 165:e614a9f1c9e2 731 ((SAMPLING) == UART_OVERSAMPLING_8))
AnnaBridge 165:e614a9f1c9e2 732 #endif /* USART_CR1_OVER8 */
AnnaBridge 165:e614a9f1c9e2 733 #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
AnnaBridge 165:e614a9f1c9e2 734 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
AnnaBridge 165:e614a9f1c9e2 735 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
AnnaBridge 165:e614a9f1c9e2 736 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
AnnaBridge 165:e614a9f1c9e2 737 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
AnnaBridge 165:e614a9f1c9e2 738 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 4500001U)
AnnaBridge 165:e614a9f1c9e2 739 #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
AnnaBridge 165:e614a9f1c9e2 740
AnnaBridge 165:e614a9f1c9e2 741 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
AnnaBridge 165:e614a9f1c9e2 742 #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
AnnaBridge 165:e614a9f1c9e2 743 #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
AnnaBridge 165:e614a9f1c9e2 744 /* UART BRR = mantissa + overflow + fraction
AnnaBridge 165:e614a9f1c9e2 745 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
AnnaBridge 165:e614a9f1c9e2 746 #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
AnnaBridge 165:e614a9f1c9e2 747 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \
AnnaBridge 165:e614a9f1c9e2 748 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
AnnaBridge 165:e614a9f1c9e2 749
AnnaBridge 165:e614a9f1c9e2 750 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
AnnaBridge 165:e614a9f1c9e2 751 #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
AnnaBridge 165:e614a9f1c9e2 752 #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U)
AnnaBridge 165:e614a9f1c9e2 753 /* UART BRR = mantissa + overflow + fraction
AnnaBridge 165:e614a9f1c9e2 754 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
AnnaBridge 165:e614a9f1c9e2 755 #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
AnnaBridge 165:e614a9f1c9e2 756 ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
AnnaBridge 165:e614a9f1c9e2 757 (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
AnnaBridge 165:e614a9f1c9e2 758 /**
AnnaBridge 165:e614a9f1c9e2 759 * @}
AnnaBridge 165:e614a9f1c9e2 760 */
<> 144:ef7eb2e8f9f7 761
AnnaBridge 165:e614a9f1c9e2 762 /* Private functions ---------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 763 /** @defgroup UART_Private_Functions UART Private Functions
AnnaBridge 165:e614a9f1c9e2 764 * @{
<> 144:ef7eb2e8f9f7 765 */
<> 144:ef7eb2e8f9f7 766
<> 144:ef7eb2e8f9f7 767 /**
<> 144:ef7eb2e8f9f7 768 * @}
<> 144:ef7eb2e8f9f7 769 */
<> 144:ef7eb2e8f9f7 770
<> 144:ef7eb2e8f9f7 771 /**
<> 144:ef7eb2e8f9f7 772 * @}
<> 144:ef7eb2e8f9f7 773 */
<> 144:ef7eb2e8f9f7 774
<> 144:ef7eb2e8f9f7 775 /**
<> 144:ef7eb2e8f9f7 776 * @}
<> 144:ef7eb2e8f9f7 777 */
<> 144:ef7eb2e8f9f7 778
<> 144:ef7eb2e8f9f7 779 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 780 }
<> 144:ef7eb2e8f9f7 781 #endif
<> 144:ef7eb2e8f9f7 782
<> 144:ef7eb2e8f9f7 783 #endif /* __STM32F1xx_HAL_UART_H */
<> 144:ef7eb2e8f9f7 784
<> 144:ef7eb2e8f9f7 785 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/