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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_iwdg.c@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
187:0387e8f68319 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f1xx_hal_iwdg.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief IWDG HAL module driver.
AnnaBridge 165:e614a9f1c9e2 6 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 7 * functionalities of the Independent Watchdog (IWDG) peripheral:
AnnaBridge 165:e614a9f1c9e2 8 * + Initialization and Start functions
<> 144:ef7eb2e8f9f7 9 * + IO operation functions
AnnaBridge 165:e614a9f1c9e2 10 *
AnnaBridge 165:e614a9f1c9e2 11 @verbatim
AnnaBridge 165:e614a9f1c9e2 12 ==============================================================================
AnnaBridge 165:e614a9f1c9e2 13 ##### IWDG Generic features #####
AnnaBridge 165:e614a9f1c9e2 14 ==============================================================================
AnnaBridge 165:e614a9f1c9e2 15 [..]
<> 144:ef7eb2e8f9f7 16 (+) The IWDG can be started by either software or hardware (configurable
<> 144:ef7eb2e8f9f7 17 through option byte).
AnnaBridge 165:e614a9f1c9e2 18
AnnaBridge 165:e614a9f1c9e2 19 (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
AnnaBridge 165:e614a9f1c9e2 20 if the main clock fails.
AnnaBridge 165:e614a9f1c9e2 21
AnnaBridge 187:0387e8f68319 22 (+) Once the IWDG is started, the LSI is forced ON and both can not be
AnnaBridge 165:e614a9f1c9e2 23 disabled. The counter starts counting down from the reset value (0xFFF).
AnnaBridge 187:0387e8f68319 24 When it reaches the end of count value (0x000) a reset signal is
AnnaBridge 165:e614a9f1c9e2 25 generated (IWDG reset).
AnnaBridge 165:e614a9f1c9e2 26
AnnaBridge 165:e614a9f1c9e2 27 (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
AnnaBridge 165:e614a9f1c9e2 28 the IWDG_RLR value is reloaded in the counter and the watchdog reset is
AnnaBridge 165:e614a9f1c9e2 29 prevented.
AnnaBridge 165:e614a9f1c9e2 30
<> 144:ef7eb2e8f9f7 31 (+) The IWDG is implemented in the VDD voltage domain that is still functional
<> 144:ef7eb2e8f9f7 32 in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
AnnaBridge 165:e614a9f1c9e2 33 IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
<> 144:ef7eb2e8f9f7 34 reset occurs.
<> 144:ef7eb2e8f9f7 35
AnnaBridge 165:e614a9f1c9e2 36 (+) Debug mode : When the microcontroller enters debug mode (core halted),
AnnaBridge 165:e614a9f1c9e2 37 the IWDG counter either continues to work normally or stops, depending
AnnaBridge 165:e614a9f1c9e2 38 on DBG_IWDG_STOP configuration bit in DBG module, accessible through
AnnaBridge 165:e614a9f1c9e2 39 __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
AnnaBridge 165:e614a9f1c9e2 40
AnnaBridge 165:e614a9f1c9e2 41 [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
AnnaBridge 165:e614a9f1c9e2 42 The IWDG timeout may vary due to LSI frequency dispersion. STM32F1xx
AnnaBridge 165:e614a9f1c9e2 43 devices provide the capability to measure the LSI frequency (LSI clock
AnnaBridge 165:e614a9f1c9e2 44 connected internally to TIM5 CH4 input capture). The measured value
AnnaBridge 165:e614a9f1c9e2 45 can be used to have an IWDG timeout with an acceptable accuracy.
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 48 ==============================================================================
AnnaBridge 165:e614a9f1c9e2 49 [..]
AnnaBridge 165:e614a9f1c9e2 50 (#) Use IWDG using HAL_IWDG_Init() function to :
AnnaBridge 165:e614a9f1c9e2 51 (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
AnnaBridge 165:e614a9f1c9e2 52 clock is forced ON and IWDG counter starts downcounting.
AnnaBridge 165:e614a9f1c9e2 53 (++) Enable write access to configuration register: IWDG_PR & IWDG_RLR.
AnnaBridge 165:e614a9f1c9e2 54 (++) Configure the IWDG prescaler and counter reload value. This reload
AnnaBridge 165:e614a9f1c9e2 55 value will be loaded in the IWDG counter each time the watchdog is
AnnaBridge 165:e614a9f1c9e2 56 reloaded, then the IWDG will start counting down from this value.
AnnaBridge 165:e614a9f1c9e2 57 (++) wait for status flags to be reset"
AnnaBridge 165:e614a9f1c9e2 58
AnnaBridge 165:e614a9f1c9e2 59 (#) Then the application program must refresh the IWDG counter at regular
<> 144:ef7eb2e8f9f7 60 intervals during normal operation to prevent an MCU reset, using
AnnaBridge 165:e614a9f1c9e2 61 HAL_IWDG_Refresh() function.
AnnaBridge 165:e614a9f1c9e2 62
<> 144:ef7eb2e8f9f7 63 *** IWDG HAL driver macros list ***
<> 144:ef7eb2e8f9f7 64 ====================================
<> 144:ef7eb2e8f9f7 65 [..]
AnnaBridge 165:e614a9f1c9e2 66 Below the list of most used macros in IWDG HAL driver:
<> 144:ef7eb2e8f9f7 67 (+) __HAL_IWDG_START: Enable the IWDG peripheral
AnnaBridge 165:e614a9f1c9e2 68 (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
AnnaBridge 165:e614a9f1c9e2 69 the reload register
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 @endverbatim
<> 144:ef7eb2e8f9f7 72 ******************************************************************************
<> 144:ef7eb2e8f9f7 73 * @attention
<> 144:ef7eb2e8f9f7 74 *
<> 144:ef7eb2e8f9f7 75 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 76 *
<> 144:ef7eb2e8f9f7 77 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 78 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 79 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 80 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 81 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 82 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 165:e614a9f1c9e2 83 * and/or other materials provided with the distribution
<> 144:ef7eb2e8f9f7 84 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 85 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 86 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 87 *
<> 144:ef7eb2e8f9f7 88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 91 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 92 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 93 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 94 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 95 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 96 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 97 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 98 *
<> 144:ef7eb2e8f9f7 99 ******************************************************************************
AnnaBridge 165:e614a9f1c9e2 100 */
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 103 #include "stm32f1xx_hal.h"
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 /** @addtogroup STM32F1xx_HAL_Driver
<> 144:ef7eb2e8f9f7 106 * @{
<> 144:ef7eb2e8f9f7 107 */
<> 144:ef7eb2e8f9f7 108
AnnaBridge 165:e614a9f1c9e2 109 #ifdef HAL_IWDG_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 110 /** @defgroup IWDG IWDG
<> 144:ef7eb2e8f9f7 111 * @brief IWDG HAL module driver.
<> 144:ef7eb2e8f9f7 112 * @{
<> 144:ef7eb2e8f9f7 113 */
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 116 /* Private define ------------------------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 117 /** @defgroup IWDG_Private_Defines IWDG Private Defines
<> 144:ef7eb2e8f9f7 118 * @{
<> 144:ef7eb2e8f9f7 119 */
AnnaBridge 187:0387e8f68319 120 /* Status register need 5 RC LSI divided by prescaler clock to be updated. With
AnnaBridge 165:e614a9f1c9e2 121 higher prescaler (256), and according to HSI variation, we need to wait at
AnnaBridge 165:e614a9f1c9e2 122 least 6 cycles so 48 ms. */
AnnaBridge 165:e614a9f1c9e2 123 #define HAL_IWDG_DEFAULT_TIMEOUT 48U
<> 144:ef7eb2e8f9f7 124 /**
<> 144:ef7eb2e8f9f7 125 * @}
<> 144:ef7eb2e8f9f7 126 */
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 129 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 130 /* Private function prototypes -----------------------------------------------*/
AnnaBridge 165:e614a9f1c9e2 131 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 132
AnnaBridge 165:e614a9f1c9e2 133 /** @addtogroup IWDG_Exported_Functions
<> 144:ef7eb2e8f9f7 134 * @{
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136
AnnaBridge 165:e614a9f1c9e2 137 /** @addtogroup IWDG_Exported_Functions_Group1
AnnaBridge 165:e614a9f1c9e2 138 * @brief Initialization and Start functions.
AnnaBridge 165:e614a9f1c9e2 139 *
AnnaBridge 165:e614a9f1c9e2 140 @verbatim
<> 144:ef7eb2e8f9f7 141 ===============================================================================
AnnaBridge 165:e614a9f1c9e2 142 ##### Initialization and Start functions #####
<> 144:ef7eb2e8f9f7 143 ===============================================================================
AnnaBridge 165:e614a9f1c9e2 144 [..] This section provides functions allowing to:
AnnaBridge 165:e614a9f1c9e2 145 (+) Initialize the IWDG according to the specified parameters in the
AnnaBridge 165:e614a9f1c9e2 146 IWDG_InitTypeDef of associated handle.
AnnaBridge 165:e614a9f1c9e2 147 (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
AnnaBridge 165:e614a9f1c9e2 148 is reloaded in order to exit function with correct time base.
AnnaBridge 165:e614a9f1c9e2 149
<> 144:ef7eb2e8f9f7 150 @endverbatim
<> 144:ef7eb2e8f9f7 151 * @{
<> 144:ef7eb2e8f9f7 152 */
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 /**
AnnaBridge 165:e614a9f1c9e2 155 * @brief Initialize the IWDG according to the specified parameters in the
AnnaBridge 165:e614a9f1c9e2 156 * IWDG_InitTypeDef and start watchdog. Before exiting function,
AnnaBridge 165:e614a9f1c9e2 157 * watchdog is refreshed in order to have correct time base.
AnnaBridge 165:e614a9f1c9e2 158 * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 159 * the configuration information for the specified IWDG module.
<> 144:ef7eb2e8f9f7 160 * @retval HAL status
<> 144:ef7eb2e8f9f7 161 */
<> 144:ef7eb2e8f9f7 162 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
<> 144:ef7eb2e8f9f7 163 {
AnnaBridge 165:e614a9f1c9e2 164 uint32_t tickstart;
AnnaBridge 165:e614a9f1c9e2 165
<> 144:ef7eb2e8f9f7 166 /* Check the IWDG handle allocation */
AnnaBridge 187:0387e8f68319 167 if (hiwdg == NULL)
<> 144:ef7eb2e8f9f7 168 {
<> 144:ef7eb2e8f9f7 169 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 170 }
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 /* Check the parameters */
<> 144:ef7eb2e8f9f7 173 assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
<> 144:ef7eb2e8f9f7 174 assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
AnnaBridge 165:e614a9f1c9e2 175 assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
<> 144:ef7eb2e8f9f7 176
AnnaBridge 165:e614a9f1c9e2 177 /* Enable IWDG. LSI is turned on automaticaly */
AnnaBridge 165:e614a9f1c9e2 178 __HAL_IWDG_START(hiwdg);
<> 144:ef7eb2e8f9f7 179
AnnaBridge 165:e614a9f1c9e2 180 /* Enable write access to IWDG_PR and IWDG_RLR registers by writing 0x5555 in KR */
AnnaBridge 165:e614a9f1c9e2 181 IWDG_ENABLE_WRITE_ACCESS(hiwdg);
<> 144:ef7eb2e8f9f7 182
AnnaBridge 165:e614a9f1c9e2 183 /* Write to IWDG registers the Prescaler & Reload values to work with */
AnnaBridge 165:e614a9f1c9e2 184 hiwdg->Instance->PR = hiwdg->Init.Prescaler;
AnnaBridge 165:e614a9f1c9e2 185 hiwdg->Instance->RLR = hiwdg->Init.Reload;
<> 144:ef7eb2e8f9f7 186
AnnaBridge 165:e614a9f1c9e2 187 /* Check pending flag, if previous update not done, return timeout */
<> 144:ef7eb2e8f9f7 188 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 189
AnnaBridge 165:e614a9f1c9e2 190 /* Wait for register to be updated */
AnnaBridge 187:0387e8f68319 191 while (hiwdg->Instance->SR != RESET)
<> 144:ef7eb2e8f9f7 192 {
AnnaBridge 187:0387e8f68319 193 if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
<> 144:ef7eb2e8f9f7 194 {
<> 144:ef7eb2e8f9f7 195 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 196 }
<> 144:ef7eb2e8f9f7 197 }
AnnaBridge 165:e614a9f1c9e2 198
<> 144:ef7eb2e8f9f7 199 /* Reload IWDG counter with value defined in the reload register */
<> 144:ef7eb2e8f9f7 200 __HAL_IWDG_RELOAD_COUNTER(hiwdg);
AnnaBridge 165:e614a9f1c9e2 201
<> 144:ef7eb2e8f9f7 202 /* Return function status */
<> 144:ef7eb2e8f9f7 203 return HAL_OK;
<> 144:ef7eb2e8f9f7 204 }
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 /**
<> 144:ef7eb2e8f9f7 207 * @}
<> 144:ef7eb2e8f9f7 208 */
<> 144:ef7eb2e8f9f7 209
AnnaBridge 165:e614a9f1c9e2 210 /** @addtogroup IWDG_Exported_Functions_Group2
AnnaBridge 165:e614a9f1c9e2 211 * @brief IO operation functions
AnnaBridge 165:e614a9f1c9e2 212 *
AnnaBridge 165:e614a9f1c9e2 213 @verbatim
<> 144:ef7eb2e8f9f7 214 ===============================================================================
AnnaBridge 165:e614a9f1c9e2 215 ##### IO operation functions #####
AnnaBridge 165:e614a9f1c9e2 216 ===============================================================================
AnnaBridge 165:e614a9f1c9e2 217 [..] This section provides functions allowing to:
AnnaBridge 165:e614a9f1c9e2 218 (+) Refresh the IWDG.
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 @endverbatim
<> 144:ef7eb2e8f9f7 221 * @{
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 /**
AnnaBridge 165:e614a9f1c9e2 225 * @brief Refresh the IWDG.
AnnaBridge 165:e614a9f1c9e2 226 * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 227 * the configuration information for the specified IWDG module.
AnnaBridge 165:e614a9f1c9e2 228 * @retval HAL status
<> 144:ef7eb2e8f9f7 229 */
AnnaBridge 165:e614a9f1c9e2 230 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
<> 144:ef7eb2e8f9f7 231 {
AnnaBridge 165:e614a9f1c9e2 232 /* Reload IWDG counter with value defined in the reload register */
AnnaBridge 165:e614a9f1c9e2 233 __HAL_IWDG_RELOAD_COUNTER(hiwdg);
AnnaBridge 165:e614a9f1c9e2 234
AnnaBridge 165:e614a9f1c9e2 235 /* Return function status */
AnnaBridge 165:e614a9f1c9e2 236 return HAL_OK;
<> 144:ef7eb2e8f9f7 237 }
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /**
<> 144:ef7eb2e8f9f7 240 * @}
<> 144:ef7eb2e8f9f7 241 */
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 /**
<> 144:ef7eb2e8f9f7 244 * @}
<> 144:ef7eb2e8f9f7 245 */
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 #endif /* HAL_IWDG_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 248 /**
<> 144:ef7eb2e8f9f7 249 * @}
<> 144:ef7eb2e8f9f7 250 */
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 /**
<> 144:ef7eb2e8f9f7 253 * @}
<> 144:ef7eb2e8f9f7 254 */
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/