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mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

drivers/QSPI.cpp@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
Parent:
188:bcfe06ba3d64 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 188:bcfe06ba3d64 1 /* mbed Microcontroller Library
AnnaBridge 188:bcfe06ba3d64 2 * Copyright (c) 2006-2018 ARM Limited
AnnaBridge 189:f392fc9709a3 3 * SPDX-License-Identifier: Apache-2.0
AnnaBridge 188:bcfe06ba3d64 4 *
AnnaBridge 188:bcfe06ba3d64 5 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 188:bcfe06ba3d64 6 * you may not use this file except in compliance with the License.
AnnaBridge 188:bcfe06ba3d64 7 * You may obtain a copy of the License at
AnnaBridge 188:bcfe06ba3d64 8 *
AnnaBridge 188:bcfe06ba3d64 9 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 188:bcfe06ba3d64 10 *
AnnaBridge 188:bcfe06ba3d64 11 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 188:bcfe06ba3d64 12 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 188:bcfe06ba3d64 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 188:bcfe06ba3d64 14 * See the License for the specific language governing permissions and
AnnaBridge 188:bcfe06ba3d64 15 * limitations under the License.
AnnaBridge 188:bcfe06ba3d64 16 */
AnnaBridge 188:bcfe06ba3d64 17
AnnaBridge 188:bcfe06ba3d64 18 #include "drivers/QSPI.h"
AnnaBridge 188:bcfe06ba3d64 19 #include "platform/mbed_critical.h"
AnnaBridge 188:bcfe06ba3d64 20 #include <string.h>
AnnaBridge 188:bcfe06ba3d64 21
AnnaBridge 188:bcfe06ba3d64 22 #if DEVICE_QSPI
AnnaBridge 188:bcfe06ba3d64 23
AnnaBridge 188:bcfe06ba3d64 24 namespace mbed {
AnnaBridge 188:bcfe06ba3d64 25
AnnaBridge 188:bcfe06ba3d64 26 QSPI *QSPI::_owner = NULL;
AnnaBridge 188:bcfe06ba3d64 27 SingletonPtr<PlatformMutex> QSPI::_mutex;
AnnaBridge 188:bcfe06ba3d64 28
AnnaBridge 188:bcfe06ba3d64 29 QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, int mode) : _qspi()
AnnaBridge 188:bcfe06ba3d64 30 {
AnnaBridge 188:bcfe06ba3d64 31 _qspi_io0 = io0;
AnnaBridge 188:bcfe06ba3d64 32 _qspi_io1 = io1;
AnnaBridge 188:bcfe06ba3d64 33 _qspi_io2 = io2;
AnnaBridge 188:bcfe06ba3d64 34 _qspi_io3 = io3;
AnnaBridge 188:bcfe06ba3d64 35 _qspi_clk = sclk;
AnnaBridge 188:bcfe06ba3d64 36 _qspi_cs = ssel;
AnnaBridge 188:bcfe06ba3d64 37 _inst_width = QSPI_CFG_BUS_SINGLE;
AnnaBridge 188:bcfe06ba3d64 38 _address_width = QSPI_CFG_BUS_SINGLE;
AnnaBridge 188:bcfe06ba3d64 39 _address_size = QSPI_CFG_ADDR_SIZE_24;
AnnaBridge 188:bcfe06ba3d64 40 _alt_width = QSPI_CFG_BUS_SINGLE;
AnnaBridge 188:bcfe06ba3d64 41 _alt_size = QSPI_CFG_ALT_SIZE_8;
AnnaBridge 188:bcfe06ba3d64 42 _data_width = QSPI_CFG_BUS_SINGLE;
AnnaBridge 188:bcfe06ba3d64 43 _num_dummy_cycles = 0;
AnnaBridge 188:bcfe06ba3d64 44 _mode = mode;
AnnaBridge 188:bcfe06ba3d64 45 _hz = ONE_MHZ;
AnnaBridge 188:bcfe06ba3d64 46 _initialized = false;
AnnaBridge 188:bcfe06ba3d64 47
AnnaBridge 188:bcfe06ba3d64 48 //Go ahead init the device here with the default config
AnnaBridge 188:bcfe06ba3d64 49 bool success = _initialize();
AnnaBridge 188:bcfe06ba3d64 50 MBED_ASSERT(success);
AnnaBridge 188:bcfe06ba3d64 51 }
AnnaBridge 188:bcfe06ba3d64 52
AnnaBridge 188:bcfe06ba3d64 53 qspi_status_t QSPI::configure_format(qspi_bus_width_t inst_width, qspi_bus_width_t address_width, qspi_address_size_t address_size, qspi_bus_width_t alt_width, qspi_alt_size_t alt_size, qspi_bus_width_t data_width, int dummy_cycles)
AnnaBridge 188:bcfe06ba3d64 54 {
AnnaBridge 188:bcfe06ba3d64 55 qspi_status_t ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 56
AnnaBridge 188:bcfe06ba3d64 57 lock();
AnnaBridge 188:bcfe06ba3d64 58 _inst_width = inst_width;
AnnaBridge 188:bcfe06ba3d64 59 _address_width = address_width;
AnnaBridge 188:bcfe06ba3d64 60 _address_size = address_size;
AnnaBridge 188:bcfe06ba3d64 61 _alt_width = alt_width;
AnnaBridge 188:bcfe06ba3d64 62 _alt_size = alt_size;
AnnaBridge 188:bcfe06ba3d64 63 _data_width = data_width;
AnnaBridge 188:bcfe06ba3d64 64 _num_dummy_cycles = dummy_cycles;
AnnaBridge 188:bcfe06ba3d64 65
AnnaBridge 188:bcfe06ba3d64 66 unlock();
AnnaBridge 188:bcfe06ba3d64 67
AnnaBridge 188:bcfe06ba3d64 68 return ret_status;
AnnaBridge 188:bcfe06ba3d64 69 }
AnnaBridge 188:bcfe06ba3d64 70
AnnaBridge 188:bcfe06ba3d64 71 qspi_status_t QSPI::set_frequency(int hz)
AnnaBridge 188:bcfe06ba3d64 72 {
AnnaBridge 188:bcfe06ba3d64 73 qspi_status_t ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 74
AnnaBridge 188:bcfe06ba3d64 75 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 76 lock();
AnnaBridge 188:bcfe06ba3d64 77 _hz = hz;
AnnaBridge 188:bcfe06ba3d64 78 //If the same owner, just change freq.
AnnaBridge 188:bcfe06ba3d64 79 //Otherwise we may have to change mode as well, so call _acquire
AnnaBridge 188:bcfe06ba3d64 80 if (_owner == this) {
AnnaBridge 188:bcfe06ba3d64 81 if (QSPI_STATUS_OK != qspi_frequency(&_qspi, _hz)) {
AnnaBridge 188:bcfe06ba3d64 82 ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 83 }
AnnaBridge 188:bcfe06ba3d64 84 } else {
AnnaBridge 188:bcfe06ba3d64 85 _acquire();
AnnaBridge 188:bcfe06ba3d64 86 }
AnnaBridge 188:bcfe06ba3d64 87 unlock();
AnnaBridge 188:bcfe06ba3d64 88 } else {
AnnaBridge 188:bcfe06ba3d64 89 ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 90 }
AnnaBridge 188:bcfe06ba3d64 91
AnnaBridge 188:bcfe06ba3d64 92 return ret_status;
AnnaBridge 188:bcfe06ba3d64 93 }
AnnaBridge 188:bcfe06ba3d64 94
AnnaBridge 188:bcfe06ba3d64 95 qspi_status_t QSPI::read(int address, char *rx_buffer, size_t *rx_length)
AnnaBridge 188:bcfe06ba3d64 96 {
AnnaBridge 188:bcfe06ba3d64 97 qspi_status_t ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 98
AnnaBridge 188:bcfe06ba3d64 99 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 100 if ((rx_length != NULL) && (rx_buffer != NULL)) {
AnnaBridge 188:bcfe06ba3d64 101 if (*rx_length != 0) {
AnnaBridge 188:bcfe06ba3d64 102 lock();
AnnaBridge 188:bcfe06ba3d64 103 if (true == _acquire()) {
AnnaBridge 188:bcfe06ba3d64 104 _build_qspi_command(-1, address, -1);
AnnaBridge 188:bcfe06ba3d64 105 if (QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) {
AnnaBridge 188:bcfe06ba3d64 106 ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 107 }
AnnaBridge 188:bcfe06ba3d64 108 }
AnnaBridge 188:bcfe06ba3d64 109 unlock();
AnnaBridge 188:bcfe06ba3d64 110 }
AnnaBridge 188:bcfe06ba3d64 111 } else {
AnnaBridge 188:bcfe06ba3d64 112 ret_status = QSPI_STATUS_INVALID_PARAMETER;
AnnaBridge 188:bcfe06ba3d64 113 }
AnnaBridge 188:bcfe06ba3d64 114 }
AnnaBridge 188:bcfe06ba3d64 115
AnnaBridge 188:bcfe06ba3d64 116 return ret_status;
AnnaBridge 188:bcfe06ba3d64 117 }
AnnaBridge 188:bcfe06ba3d64 118
AnnaBridge 188:bcfe06ba3d64 119 qspi_status_t QSPI::write(int address, const char *tx_buffer, size_t *tx_length)
AnnaBridge 188:bcfe06ba3d64 120 {
AnnaBridge 188:bcfe06ba3d64 121 qspi_status_t ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 122
AnnaBridge 188:bcfe06ba3d64 123 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 124 if ((tx_length != NULL) && (tx_buffer != NULL)) {
AnnaBridge 188:bcfe06ba3d64 125 if (*tx_length != 0) {
AnnaBridge 188:bcfe06ba3d64 126 lock();
AnnaBridge 188:bcfe06ba3d64 127 if (true == _acquire()) {
AnnaBridge 188:bcfe06ba3d64 128 _build_qspi_command(-1, address, -1);
AnnaBridge 188:bcfe06ba3d64 129 if (QSPI_STATUS_OK == qspi_write(&_qspi, &_qspi_command, tx_buffer, tx_length)) {
AnnaBridge 188:bcfe06ba3d64 130 ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 131 }
AnnaBridge 188:bcfe06ba3d64 132 }
AnnaBridge 188:bcfe06ba3d64 133 unlock();
AnnaBridge 188:bcfe06ba3d64 134 }
AnnaBridge 188:bcfe06ba3d64 135 } else {
AnnaBridge 188:bcfe06ba3d64 136 ret_status = QSPI_STATUS_INVALID_PARAMETER;
AnnaBridge 188:bcfe06ba3d64 137 }
AnnaBridge 188:bcfe06ba3d64 138 }
AnnaBridge 188:bcfe06ba3d64 139
AnnaBridge 188:bcfe06ba3d64 140 return ret_status;
AnnaBridge 188:bcfe06ba3d64 141 }
AnnaBridge 188:bcfe06ba3d64 142
AnnaBridge 188:bcfe06ba3d64 143 qspi_status_t QSPI::read(int instruction, int alt, int address, char *rx_buffer, size_t *rx_length)
AnnaBridge 188:bcfe06ba3d64 144 {
AnnaBridge 188:bcfe06ba3d64 145 qspi_status_t ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 146
AnnaBridge 188:bcfe06ba3d64 147 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 148 if ((rx_length != NULL) && (rx_buffer != NULL)) {
AnnaBridge 188:bcfe06ba3d64 149 if (*rx_length != 0) {
AnnaBridge 188:bcfe06ba3d64 150 lock();
AnnaBridge 188:bcfe06ba3d64 151 if (true == _acquire()) {
AnnaBridge 188:bcfe06ba3d64 152 _build_qspi_command(instruction, address, alt);
AnnaBridge 188:bcfe06ba3d64 153 if (QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) {
AnnaBridge 188:bcfe06ba3d64 154 ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 155 }
AnnaBridge 188:bcfe06ba3d64 156 }
AnnaBridge 188:bcfe06ba3d64 157 unlock();
AnnaBridge 188:bcfe06ba3d64 158 }
AnnaBridge 188:bcfe06ba3d64 159 } else {
AnnaBridge 188:bcfe06ba3d64 160 ret_status = QSPI_STATUS_INVALID_PARAMETER;
AnnaBridge 188:bcfe06ba3d64 161 }
AnnaBridge 188:bcfe06ba3d64 162 }
AnnaBridge 188:bcfe06ba3d64 163
AnnaBridge 188:bcfe06ba3d64 164 return ret_status;
AnnaBridge 188:bcfe06ba3d64 165 }
AnnaBridge 188:bcfe06ba3d64 166
AnnaBridge 188:bcfe06ba3d64 167 qspi_status_t QSPI::write(int instruction, int alt, int address, const char *tx_buffer, size_t *tx_length)
AnnaBridge 188:bcfe06ba3d64 168 {
AnnaBridge 188:bcfe06ba3d64 169 qspi_status_t ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 170
AnnaBridge 188:bcfe06ba3d64 171 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 172 if ((tx_length != NULL) && (tx_buffer != NULL)) {
AnnaBridge 188:bcfe06ba3d64 173 if (*tx_length != 0) {
AnnaBridge 188:bcfe06ba3d64 174 lock();
AnnaBridge 188:bcfe06ba3d64 175 if (true == _acquire()) {
AnnaBridge 188:bcfe06ba3d64 176 _build_qspi_command(instruction, address, alt);
AnnaBridge 188:bcfe06ba3d64 177 if (QSPI_STATUS_OK == qspi_write(&_qspi, &_qspi_command, tx_buffer, tx_length)) {
AnnaBridge 188:bcfe06ba3d64 178 ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 179 }
AnnaBridge 188:bcfe06ba3d64 180 }
AnnaBridge 188:bcfe06ba3d64 181 unlock();
AnnaBridge 188:bcfe06ba3d64 182 }
AnnaBridge 188:bcfe06ba3d64 183 } else {
AnnaBridge 188:bcfe06ba3d64 184 ret_status = QSPI_STATUS_INVALID_PARAMETER;
AnnaBridge 188:bcfe06ba3d64 185 }
AnnaBridge 188:bcfe06ba3d64 186 }
AnnaBridge 188:bcfe06ba3d64 187
AnnaBridge 188:bcfe06ba3d64 188 return ret_status;
AnnaBridge 188:bcfe06ba3d64 189 }
AnnaBridge 188:bcfe06ba3d64 190
AnnaBridge 188:bcfe06ba3d64 191 qspi_status_t QSPI::command_transfer(int instruction, int address, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length)
AnnaBridge 188:bcfe06ba3d64 192 {
AnnaBridge 188:bcfe06ba3d64 193 qspi_status_t ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 194
AnnaBridge 188:bcfe06ba3d64 195 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 196 lock();
AnnaBridge 188:bcfe06ba3d64 197 if (true == _acquire()) {
AnnaBridge 188:bcfe06ba3d64 198 _build_qspi_command(instruction, address, -1); //We just need the command
AnnaBridge 188:bcfe06ba3d64 199 if (QSPI_STATUS_OK == qspi_command_transfer(&_qspi, &_qspi_command, (const void *)tx_buffer, tx_length, (void *)rx_buffer, rx_length)) {
AnnaBridge 188:bcfe06ba3d64 200 ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 201 }
AnnaBridge 188:bcfe06ba3d64 202 }
AnnaBridge 188:bcfe06ba3d64 203 unlock();
AnnaBridge 188:bcfe06ba3d64 204 }
AnnaBridge 188:bcfe06ba3d64 205
AnnaBridge 188:bcfe06ba3d64 206 return ret_status;
AnnaBridge 188:bcfe06ba3d64 207 }
AnnaBridge 188:bcfe06ba3d64 208
AnnaBridge 188:bcfe06ba3d64 209 void QSPI::lock()
AnnaBridge 188:bcfe06ba3d64 210 {
AnnaBridge 188:bcfe06ba3d64 211 _mutex->lock();
AnnaBridge 188:bcfe06ba3d64 212 }
AnnaBridge 188:bcfe06ba3d64 213
AnnaBridge 188:bcfe06ba3d64 214 void QSPI::unlock()
AnnaBridge 188:bcfe06ba3d64 215 {
AnnaBridge 188:bcfe06ba3d64 216 _mutex->unlock();
AnnaBridge 188:bcfe06ba3d64 217 }
AnnaBridge 188:bcfe06ba3d64 218
AnnaBridge 188:bcfe06ba3d64 219 // Note: Private helper function to initialize qspi HAL
AnnaBridge 188:bcfe06ba3d64 220 bool QSPI::_initialize()
AnnaBridge 188:bcfe06ba3d64 221 {
AnnaBridge 188:bcfe06ba3d64 222 if (_mode != 0 && _mode != 1) {
AnnaBridge 188:bcfe06ba3d64 223 _initialized = false;
AnnaBridge 188:bcfe06ba3d64 224 return _initialized;
AnnaBridge 188:bcfe06ba3d64 225 }
AnnaBridge 188:bcfe06ba3d64 226
AnnaBridge 188:bcfe06ba3d64 227 qspi_status_t ret = qspi_init(&_qspi, _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs, _hz, _mode);
AnnaBridge 188:bcfe06ba3d64 228 if (QSPI_STATUS_OK == ret) {
AnnaBridge 188:bcfe06ba3d64 229 _initialized = true;
AnnaBridge 188:bcfe06ba3d64 230 } else {
AnnaBridge 188:bcfe06ba3d64 231 _initialized = false;
AnnaBridge 188:bcfe06ba3d64 232 }
AnnaBridge 188:bcfe06ba3d64 233
AnnaBridge 188:bcfe06ba3d64 234 return _initialized;
AnnaBridge 188:bcfe06ba3d64 235 }
AnnaBridge 188:bcfe06ba3d64 236
AnnaBridge 188:bcfe06ba3d64 237 // Note: Private function with no locking
AnnaBridge 188:bcfe06ba3d64 238 bool QSPI::_acquire()
AnnaBridge 188:bcfe06ba3d64 239 {
AnnaBridge 188:bcfe06ba3d64 240 if (_owner != this) {
AnnaBridge 188:bcfe06ba3d64 241 //This will set freq as well
AnnaBridge 188:bcfe06ba3d64 242 _initialize();
AnnaBridge 188:bcfe06ba3d64 243 _owner = this;
AnnaBridge 188:bcfe06ba3d64 244 }
AnnaBridge 188:bcfe06ba3d64 245
AnnaBridge 188:bcfe06ba3d64 246 return _initialized;
AnnaBridge 188:bcfe06ba3d64 247 }
AnnaBridge 188:bcfe06ba3d64 248
AnnaBridge 188:bcfe06ba3d64 249 void QSPI::_build_qspi_command(int instruction, int address, int alt)
AnnaBridge 188:bcfe06ba3d64 250 {
AnnaBridge 188:bcfe06ba3d64 251 memset(&_qspi_command, 0, sizeof(qspi_command_t));
AnnaBridge 188:bcfe06ba3d64 252 //Set up instruction phase parameters
AnnaBridge 188:bcfe06ba3d64 253 _qspi_command.instruction.bus_width = _inst_width;
AnnaBridge 188:bcfe06ba3d64 254 if (instruction != -1) {
AnnaBridge 188:bcfe06ba3d64 255 _qspi_command.instruction.value = instruction;
AnnaBridge 188:bcfe06ba3d64 256 _qspi_command.instruction.disabled = false;
AnnaBridge 188:bcfe06ba3d64 257 } else {
AnnaBridge 188:bcfe06ba3d64 258 _qspi_command.instruction.disabled = true;
AnnaBridge 188:bcfe06ba3d64 259 }
AnnaBridge 188:bcfe06ba3d64 260
AnnaBridge 188:bcfe06ba3d64 261 //Set up address phase parameters
AnnaBridge 188:bcfe06ba3d64 262 _qspi_command.address.bus_width = _address_width;
AnnaBridge 188:bcfe06ba3d64 263 _qspi_command.address.size = _address_size;
AnnaBridge 188:bcfe06ba3d64 264 if (address != -1) {
AnnaBridge 188:bcfe06ba3d64 265 _qspi_command.address.value = address;
AnnaBridge 188:bcfe06ba3d64 266 _qspi_command.address.disabled = false;
AnnaBridge 188:bcfe06ba3d64 267 } else {
AnnaBridge 188:bcfe06ba3d64 268 _qspi_command.address.disabled = true;
AnnaBridge 188:bcfe06ba3d64 269 }
AnnaBridge 188:bcfe06ba3d64 270
AnnaBridge 188:bcfe06ba3d64 271 //Set up alt phase parameters
AnnaBridge 188:bcfe06ba3d64 272 _qspi_command.alt.bus_width = _alt_width;
AnnaBridge 188:bcfe06ba3d64 273 _qspi_command.alt.size = _alt_size;
AnnaBridge 188:bcfe06ba3d64 274 if (alt != -1) {
AnnaBridge 188:bcfe06ba3d64 275 _qspi_command.alt.value = alt;
AnnaBridge 188:bcfe06ba3d64 276 _qspi_command.alt.disabled = false;
AnnaBridge 188:bcfe06ba3d64 277 } else {
AnnaBridge 188:bcfe06ba3d64 278 _qspi_command.alt.disabled = true;
AnnaBridge 188:bcfe06ba3d64 279 }
AnnaBridge 188:bcfe06ba3d64 280
AnnaBridge 188:bcfe06ba3d64 281 _qspi_command.dummy_count = _num_dummy_cycles;
AnnaBridge 188:bcfe06ba3d64 282
AnnaBridge 188:bcfe06ba3d64 283 //Set up bus width for data phase
AnnaBridge 188:bcfe06ba3d64 284 _qspi_command.data.bus_width = _data_width;
AnnaBridge 188:bcfe06ba3d64 285 }
AnnaBridge 188:bcfe06ba3d64 286
AnnaBridge 188:bcfe06ba3d64 287 } // namespace mbed
AnnaBridge 188:bcfe06ba3d64 288
AnnaBridge 188:bcfe06ba3d64 289 #endif