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mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_exti.h@165:e614a9f1c9e2, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:39:01 2017 +0100
Revision:
165:e614a9f1c9e2
Parent:
161:2cc1468da177
Child:
182:a56a73fd2a6f
This updates the lib to the mbed lib v 143

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 161:2cc1468da177 1 /**
<> 161:2cc1468da177 2 ******************************************************************************
<> 161:2cc1468da177 3 * @file stm32f7xx_ll_exti.h
<> 161:2cc1468da177 4 * @author MCD Application Team
<> 161:2cc1468da177 5 * @version V1.2.0
<> 161:2cc1468da177 6 * @date 30-December-2016
<> 161:2cc1468da177 7 * @brief Header file of EXTI LL module.
<> 161:2cc1468da177 8 ******************************************************************************
<> 161:2cc1468da177 9 * @attention
<> 161:2cc1468da177 10 *
<> 161:2cc1468da177 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 161:2cc1468da177 12 *
<> 161:2cc1468da177 13 * Redistribution and use in source and binary forms, with or without modification,
<> 161:2cc1468da177 14 * are permitted provided that the following conditions are met:
<> 161:2cc1468da177 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 161:2cc1468da177 16 * this list of conditions and the following disclaimer.
<> 161:2cc1468da177 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 161:2cc1468da177 18 * this list of conditions and the following disclaimer in the documentation
<> 161:2cc1468da177 19 * and/or other materials provided with the distribution.
<> 161:2cc1468da177 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 161:2cc1468da177 21 * may be used to endorse or promote products derived from this software
<> 161:2cc1468da177 22 * without specific prior written permission.
<> 161:2cc1468da177 23 *
<> 161:2cc1468da177 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 161:2cc1468da177 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 161:2cc1468da177 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 161:2cc1468da177 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 161:2cc1468da177 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 161:2cc1468da177 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 161:2cc1468da177 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 161:2cc1468da177 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 161:2cc1468da177 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 161:2cc1468da177 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 161:2cc1468da177 34 *
<> 161:2cc1468da177 35 ******************************************************************************
<> 161:2cc1468da177 36 */
<> 161:2cc1468da177 37
<> 161:2cc1468da177 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 161:2cc1468da177 39 #ifndef __STM32F7xx_LL_EXTI_H
<> 161:2cc1468da177 40 #define __STM32F7xx_LL_EXTI_H
<> 161:2cc1468da177 41
<> 161:2cc1468da177 42 #ifdef __cplusplus
<> 161:2cc1468da177 43 extern "C" {
<> 161:2cc1468da177 44 #endif
<> 161:2cc1468da177 45
<> 161:2cc1468da177 46 /* Includes ------------------------------------------------------------------*/
<> 161:2cc1468da177 47 #include "stm32f7xx.h"
<> 161:2cc1468da177 48
<> 161:2cc1468da177 49 /** @addtogroup STM32F7xx_LL_Driver
<> 161:2cc1468da177 50 * @{
<> 161:2cc1468da177 51 */
<> 161:2cc1468da177 52
<> 161:2cc1468da177 53 #if defined (EXTI)
<> 161:2cc1468da177 54
<> 161:2cc1468da177 55 /** @defgroup EXTI_LL EXTI
<> 161:2cc1468da177 56 * @{
<> 161:2cc1468da177 57 */
<> 161:2cc1468da177 58
<> 161:2cc1468da177 59 /* Private types -------------------------------------------------------------*/
<> 161:2cc1468da177 60 /* Private variables ---------------------------------------------------------*/
<> 161:2cc1468da177 61 /* Private constants ---------------------------------------------------------*/
<> 161:2cc1468da177 62 /* Private Macros ------------------------------------------------------------*/
<> 161:2cc1468da177 63 #if defined(USE_FULL_LL_DRIVER)
<> 161:2cc1468da177 64 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
<> 161:2cc1468da177 65 * @{
<> 161:2cc1468da177 66 */
<> 161:2cc1468da177 67 /**
<> 161:2cc1468da177 68 * @}
<> 161:2cc1468da177 69 */
<> 161:2cc1468da177 70 #endif /*USE_FULL_LL_DRIVER*/
<> 161:2cc1468da177 71 /* Exported types ------------------------------------------------------------*/
<> 161:2cc1468da177 72 #if defined(USE_FULL_LL_DRIVER)
<> 161:2cc1468da177 73 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
<> 161:2cc1468da177 74 * @{
<> 161:2cc1468da177 75 */
<> 161:2cc1468da177 76 typedef struct
<> 161:2cc1468da177 77 {
<> 161:2cc1468da177 78
<> 161:2cc1468da177 79 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
<> 161:2cc1468da177 80 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
<> 161:2cc1468da177 81
<> 161:2cc1468da177 82 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
<> 161:2cc1468da177 83 This parameter can be set either to ENABLE or DISABLE */
<> 161:2cc1468da177 84
<> 161:2cc1468da177 85 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
<> 161:2cc1468da177 86 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
<> 161:2cc1468da177 87
<> 161:2cc1468da177 88 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
<> 161:2cc1468da177 89 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
<> 161:2cc1468da177 90 } LL_EXTI_InitTypeDef;
<> 161:2cc1468da177 91
<> 161:2cc1468da177 92 /**
<> 161:2cc1468da177 93 * @}
<> 161:2cc1468da177 94 */
<> 161:2cc1468da177 95 #endif /*USE_FULL_LL_DRIVER*/
<> 161:2cc1468da177 96
<> 161:2cc1468da177 97 /* Exported constants --------------------------------------------------------*/
<> 161:2cc1468da177 98 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
<> 161:2cc1468da177 99 * @{
<> 161:2cc1468da177 100 */
<> 161:2cc1468da177 101
<> 161:2cc1468da177 102 /** @defgroup EXTI_LL_EC_LINE LINE
<> 161:2cc1468da177 103 * @{
<> 161:2cc1468da177 104 */
<> 161:2cc1468da177 105 #define LL_EXTI_LINE_0 EXTI_IMR_IM0 /*!< Extended line 0 */
<> 161:2cc1468da177 106 #define LL_EXTI_LINE_1 EXTI_IMR_IM1 /*!< Extended line 1 */
<> 161:2cc1468da177 107 #define LL_EXTI_LINE_2 EXTI_IMR_IM2 /*!< Extended line 2 */
<> 161:2cc1468da177 108 #define LL_EXTI_LINE_3 EXTI_IMR_IM3 /*!< Extended line 3 */
<> 161:2cc1468da177 109 #define LL_EXTI_LINE_4 EXTI_IMR_IM4 /*!< Extended line 4 */
<> 161:2cc1468da177 110 #define LL_EXTI_LINE_5 EXTI_IMR_IM5 /*!< Extended line 5 */
<> 161:2cc1468da177 111 #define LL_EXTI_LINE_6 EXTI_IMR_IM6 /*!< Extended line 6 */
<> 161:2cc1468da177 112 #define LL_EXTI_LINE_7 EXTI_IMR_IM7 /*!< Extended line 7 */
<> 161:2cc1468da177 113 #define LL_EXTI_LINE_8 EXTI_IMR_IM8 /*!< Extended line 8 */
<> 161:2cc1468da177 114 #define LL_EXTI_LINE_9 EXTI_IMR_IM9 /*!< Extended line 9 */
<> 161:2cc1468da177 115 #define LL_EXTI_LINE_10 EXTI_IMR_IM10 /*!< Extended line 10 */
<> 161:2cc1468da177 116 #define LL_EXTI_LINE_11 EXTI_IMR_IM11 /*!< Extended line 11 */
<> 161:2cc1468da177 117 #define LL_EXTI_LINE_12 EXTI_IMR_IM12 /*!< Extended line 12 */
<> 161:2cc1468da177 118 #define LL_EXTI_LINE_13 EXTI_IMR_IM13 /*!< Extended line 13 */
<> 161:2cc1468da177 119 #define LL_EXTI_LINE_14 EXTI_IMR_IM14 /*!< Extended line 14 */
<> 161:2cc1468da177 120 #define LL_EXTI_LINE_15 EXTI_IMR_IM15 /*!< Extended line 15 */
<> 161:2cc1468da177 121 #if defined(EXTI_IMR_IM16)
<> 161:2cc1468da177 122 #define LL_EXTI_LINE_16 EXTI_IMR_IM16 /*!< Extended line 16 */
<> 161:2cc1468da177 123 #endif
<> 161:2cc1468da177 124 #define LL_EXTI_LINE_17 EXTI_IMR_IM17 /*!< Extended line 17 */
<> 161:2cc1468da177 125 #if defined(EXTI_IMR_IM18)
<> 161:2cc1468da177 126 #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */
<> 161:2cc1468da177 127 #endif
<> 161:2cc1468da177 128 #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */
<> 161:2cc1468da177 129 #if defined(EXTI_IMR_IM20)
<> 161:2cc1468da177 130 #define LL_EXTI_LINE_20 EXTI_IMR_IM20 /*!< Extended line 20 */
<> 161:2cc1468da177 131 #endif
<> 161:2cc1468da177 132 #if defined(EXTI_IMR_IM21)
<> 161:2cc1468da177 133 #define LL_EXTI_LINE_21 EXTI_IMR_IM21 /*!< Extended line 21 */
<> 161:2cc1468da177 134 #endif
<> 161:2cc1468da177 135 #if defined(EXTI_IMR_IM22)
<> 161:2cc1468da177 136 #define LL_EXTI_LINE_22 EXTI_IMR_IM22 /*!< Extended line 22 */
<> 161:2cc1468da177 137 #endif
<> 161:2cc1468da177 138 #define LL_EXTI_LINE_23 EXTI_IMR_IM23 /*!< Extended line 23 */
<> 161:2cc1468da177 139 #if defined(EXTI_IMR_IM24)
<> 161:2cc1468da177 140 #define LL_EXTI_LINE_24 EXTI_IMR_IM24 /*!< Extended line 24 */
<> 161:2cc1468da177 141 #endif
<> 161:2cc1468da177 142 #if defined(EXTI_IMR_IM25)
<> 161:2cc1468da177 143 #define LL_EXTI_LINE_25 EXTI_IMR_IM25 /*!< Extended line 25 */
<> 161:2cc1468da177 144 #endif
<> 161:2cc1468da177 145 #if defined(EXTI_IMR_IM26)
<> 161:2cc1468da177 146 #define LL_EXTI_LINE_26 EXTI_IMR_IM26 /*!< Extended line 26 */
<> 161:2cc1468da177 147 #endif
<> 161:2cc1468da177 148 #if defined(EXTI_IMR_IM27)
<> 161:2cc1468da177 149 #define LL_EXTI_LINE_27 EXTI_IMR_IM27 /*!< Extended line 27 */
<> 161:2cc1468da177 150 #endif
<> 161:2cc1468da177 151 #if defined(EXTI_IMR_IM28)
<> 161:2cc1468da177 152 #define LL_EXTI_LINE_28 EXTI_IMR_IM28 /*!< Extended line 28 */
<> 161:2cc1468da177 153 #endif
<> 161:2cc1468da177 154 #if defined(EXTI_IMR_IM29)
<> 161:2cc1468da177 155 #define LL_EXTI_LINE_29 EXTI_IMR_IM29 /*!< Extended line 29 */
<> 161:2cc1468da177 156 #endif
<> 161:2cc1468da177 157 #if defined(EXTI_IMR_IM30)
<> 161:2cc1468da177 158 #define LL_EXTI_LINE_30 EXTI_IMR_IM30 /*!< Extended line 30 */
<> 161:2cc1468da177 159 #endif
<> 161:2cc1468da177 160 #if defined(EXTI_IMR_IM31)
<> 161:2cc1468da177 161 #define LL_EXTI_LINE_31 EXTI_IMR_IM31 /*!< Extended line 31 */
<> 161:2cc1468da177 162 #endif
<> 161:2cc1468da177 163 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR_IM /*!< All Extended line not reserved*/
<> 161:2cc1468da177 164
<> 161:2cc1468da177 165
<> 161:2cc1468da177 166 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
<> 161:2cc1468da177 167
<> 161:2cc1468da177 168 #if defined(USE_FULL_LL_DRIVER)
<> 161:2cc1468da177 169 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
<> 161:2cc1468da177 170 #endif /*USE_FULL_LL_DRIVER*/
<> 161:2cc1468da177 171
<> 161:2cc1468da177 172 /**
<> 161:2cc1468da177 173 * @}
<> 161:2cc1468da177 174 */
<> 161:2cc1468da177 175 #if defined(USE_FULL_LL_DRIVER)
<> 161:2cc1468da177 176
<> 161:2cc1468da177 177 /** @defgroup EXTI_LL_EC_MODE Mode
<> 161:2cc1468da177 178 * @{
<> 161:2cc1468da177 179 */
<> 161:2cc1468da177 180 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
<> 161:2cc1468da177 181 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
<> 161:2cc1468da177 182 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
<> 161:2cc1468da177 183 /**
<> 161:2cc1468da177 184 * @}
<> 161:2cc1468da177 185 */
<> 161:2cc1468da177 186
<> 161:2cc1468da177 187 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
<> 161:2cc1468da177 188 * @{
<> 161:2cc1468da177 189 */
<> 161:2cc1468da177 190 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
<> 161:2cc1468da177 191 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
<> 161:2cc1468da177 192 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
<> 161:2cc1468da177 193 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
<> 161:2cc1468da177 194
<> 161:2cc1468da177 195 /**
<> 161:2cc1468da177 196 * @}
<> 161:2cc1468da177 197 */
<> 161:2cc1468da177 198
<> 161:2cc1468da177 199
<> 161:2cc1468da177 200 #endif /*USE_FULL_LL_DRIVER*/
<> 161:2cc1468da177 201
<> 161:2cc1468da177 202
<> 161:2cc1468da177 203 /**
<> 161:2cc1468da177 204 * @}
<> 161:2cc1468da177 205 */
<> 161:2cc1468da177 206
<> 161:2cc1468da177 207 /* Exported macro ------------------------------------------------------------*/
<> 161:2cc1468da177 208 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
<> 161:2cc1468da177 209 * @{
<> 161:2cc1468da177 210 */
<> 161:2cc1468da177 211
<> 161:2cc1468da177 212 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
<> 161:2cc1468da177 213 * @{
<> 161:2cc1468da177 214 */
<> 161:2cc1468da177 215
<> 161:2cc1468da177 216 /**
<> 161:2cc1468da177 217 * @brief Write a value in EXTI register
<> 161:2cc1468da177 218 * @param __REG__ Register to be written
<> 161:2cc1468da177 219 * @param __VALUE__ Value to be written in the register
<> 161:2cc1468da177 220 * @retval None
<> 161:2cc1468da177 221 */
<> 161:2cc1468da177 222 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
<> 161:2cc1468da177 223
<> 161:2cc1468da177 224 /**
<> 161:2cc1468da177 225 * @brief Read a value in EXTI register
<> 161:2cc1468da177 226 * @param __REG__ Register to be read
<> 161:2cc1468da177 227 * @retval Register value
<> 161:2cc1468da177 228 */
<> 161:2cc1468da177 229 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
<> 161:2cc1468da177 230 /**
<> 161:2cc1468da177 231 * @}
<> 161:2cc1468da177 232 */
<> 161:2cc1468da177 233
<> 161:2cc1468da177 234
<> 161:2cc1468da177 235 /**
<> 161:2cc1468da177 236 * @}
<> 161:2cc1468da177 237 */
<> 161:2cc1468da177 238
<> 161:2cc1468da177 239
<> 161:2cc1468da177 240
<> 161:2cc1468da177 241 /* Exported functions --------------------------------------------------------*/
<> 161:2cc1468da177 242 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
<> 161:2cc1468da177 243 * @{
<> 161:2cc1468da177 244 */
<> 161:2cc1468da177 245 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
<> 161:2cc1468da177 246 * @{
<> 161:2cc1468da177 247 */
<> 161:2cc1468da177 248
<> 161:2cc1468da177 249 /**
<> 161:2cc1468da177 250 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
<> 161:2cc1468da177 251 * @note The reset value for the direct or internal lines (see RM)
<> 161:2cc1468da177 252 * is set to 1 in order to enable the interrupt by default.
<> 161:2cc1468da177 253 * Bits are set automatically at Power on.
<> 161:2cc1468da177 254 * @rmtoll IMR IMx LL_EXTI_EnableIT_0_31
<> 161:2cc1468da177 255 * @param ExtiLine This parameter can be one of the following values:
<> 161:2cc1468da177 256 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 257 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 258 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 259 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 260 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 261 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 262 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 263 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 264 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 265 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 266 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 267 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 268 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 269 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 270 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 271 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 272 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 273 * @arg @ref LL_EXTI_LINE_17
<> 161:2cc1468da177 274 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 275 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 276 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 277 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 278 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 279 * @arg @ref LL_EXTI_LINE_23
<> 161:2cc1468da177 280 * @arg @ref LL_EXTI_LINE_24(*)
<> 161:2cc1468da177 281 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 161:2cc1468da177 282 * @note (*): Available in some devices
<> 161:2cc1468da177 283 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 284 * @retval None
<> 161:2cc1468da177 285 */
<> 161:2cc1468da177 286 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 287 {
<> 161:2cc1468da177 288 SET_BIT(EXTI->IMR, ExtiLine);
<> 161:2cc1468da177 289 }
<> 161:2cc1468da177 290
<> 161:2cc1468da177 291 /**
<> 161:2cc1468da177 292 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
<> 161:2cc1468da177 293 * @note The reset value for the direct or internal lines (see RM)
<> 161:2cc1468da177 294 * is set to 1 in order to enable the interrupt by default.
<> 161:2cc1468da177 295 * Bits are set automatically at Power on.
<> 161:2cc1468da177 296 * @rmtoll IMR IMx LL_EXTI_DisableIT_0_31
<> 161:2cc1468da177 297 * @param ExtiLine This parameter can be one of the following values:
<> 161:2cc1468da177 298 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 299 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 300 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 301 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 302 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 303 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 304 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 305 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 306 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 307 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 308 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 309 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 310 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 311 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 312 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 313 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 314 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 315 * @arg @ref LL_EXTI_LINE_17
<> 161:2cc1468da177 316 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 317 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 318 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 319 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 320 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 321 * @arg @ref LL_EXTI_LINE_23
<> 161:2cc1468da177 322 * @arg @ref LL_EXTI_LINE_24(*)
<> 161:2cc1468da177 323 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 161:2cc1468da177 324 * @note (*): Available in some devices
<> 161:2cc1468da177 325 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 326 * @retval None
<> 161:2cc1468da177 327 */
<> 161:2cc1468da177 328 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 329 {
<> 161:2cc1468da177 330 CLEAR_BIT(EXTI->IMR, ExtiLine);
<> 161:2cc1468da177 331 }
<> 161:2cc1468da177 332
<> 161:2cc1468da177 333
<> 161:2cc1468da177 334 /**
<> 161:2cc1468da177 335 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
<> 161:2cc1468da177 336 * @note The reset value for the direct or internal lines (see RM)
<> 161:2cc1468da177 337 * is set to 1 in order to enable the interrupt by default.
<> 161:2cc1468da177 338 * Bits are set automatically at Power on.
<> 161:2cc1468da177 339 * @rmtoll IMR IMx LL_EXTI_IsEnabledIT_0_31
<> 161:2cc1468da177 340 * @param ExtiLine This parameter can be one of the following values:
<> 161:2cc1468da177 341 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 342 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 343 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 344 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 345 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 346 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 347 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 348 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 349 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 350 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 351 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 352 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 353 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 354 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 355 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 356 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 357 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 358 * @arg @ref LL_EXTI_LINE_17
<> 161:2cc1468da177 359 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 360 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 361 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 362 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 363 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 364 * @arg @ref LL_EXTI_LINE_23
<> 161:2cc1468da177 365 * @arg @ref LL_EXTI_LINE_24(*)
<> 161:2cc1468da177 366 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 161:2cc1468da177 367 * @note (*): Available in some devices
<> 161:2cc1468da177 368 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 369 * @retval State of bit (1 or 0).
<> 161:2cc1468da177 370 */
<> 161:2cc1468da177 371 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 372 {
<> 161:2cc1468da177 373 return (READ_BIT(EXTI->IMR, ExtiLine) == (ExtiLine));
<> 161:2cc1468da177 374 }
<> 161:2cc1468da177 375
<> 161:2cc1468da177 376
<> 161:2cc1468da177 377 /**
<> 161:2cc1468da177 378 * @}
<> 161:2cc1468da177 379 */
<> 161:2cc1468da177 380
<> 161:2cc1468da177 381 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
<> 161:2cc1468da177 382 * @{
<> 161:2cc1468da177 383 */
<> 161:2cc1468da177 384
<> 161:2cc1468da177 385 /**
<> 161:2cc1468da177 386 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
<> 161:2cc1468da177 387 * @rmtoll EMR EMx LL_EXTI_EnableEvent_0_31
<> 161:2cc1468da177 388 * @param ExtiLine This parameter can be one of the following values:
<> 161:2cc1468da177 389 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 390 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 391 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 392 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 393 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 394 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 395 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 396 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 397 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 398 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 399 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 400 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 401 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 402 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 403 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 404 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 405 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 406 * @arg @ref LL_EXTI_LINE_17
<> 161:2cc1468da177 407 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 408 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 409 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 410 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 411 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 412 * @arg @ref LL_EXTI_LINE_23
<> 161:2cc1468da177 413 * @arg @ref LL_EXTI_LINE_24(*)
<> 161:2cc1468da177 414 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 161:2cc1468da177 415 * @note (*): Available in some devices
<> 161:2cc1468da177 416 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 417 * @retval None
<> 161:2cc1468da177 418 */
<> 161:2cc1468da177 419 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 420 {
<> 161:2cc1468da177 421 SET_BIT(EXTI->EMR, ExtiLine);
<> 161:2cc1468da177 422
<> 161:2cc1468da177 423 }
<> 161:2cc1468da177 424
<> 161:2cc1468da177 425
<> 161:2cc1468da177 426 /**
<> 161:2cc1468da177 427 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
<> 161:2cc1468da177 428 * @rmtoll EMR EMx LL_EXTI_DisableEvent_0_31
<> 161:2cc1468da177 429 * @param ExtiLine This parameter can be one of the following values:
<> 161:2cc1468da177 430 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 431 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 432 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 433 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 434 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 435 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 436 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 437 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 438 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 439 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 440 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 441 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 442 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 443 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 444 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 445 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 446 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 447 * @arg @ref LL_EXTI_LINE_17
<> 161:2cc1468da177 448 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 449 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 450 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 451 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 452 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 453 * @arg @ref LL_EXTI_LINE_23
<> 161:2cc1468da177 454 * @arg @ref LL_EXTI_LINE_24(*)
<> 161:2cc1468da177 455 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 161:2cc1468da177 456 * @note (*): Available in some devices
<> 161:2cc1468da177 457 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 458 * @retval None
<> 161:2cc1468da177 459 */
<> 161:2cc1468da177 460 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 461 {
<> 161:2cc1468da177 462 CLEAR_BIT(EXTI->EMR, ExtiLine);
<> 161:2cc1468da177 463 }
<> 161:2cc1468da177 464
<> 161:2cc1468da177 465
<> 161:2cc1468da177 466 /**
<> 161:2cc1468da177 467 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
<> 161:2cc1468da177 468 * @rmtoll EMR EMx LL_EXTI_IsEnabledEvent_0_31
<> 161:2cc1468da177 469 * @param ExtiLine This parameter can be one of the following values:
<> 161:2cc1468da177 470 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 471 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 472 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 473 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 474 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 475 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 476 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 477 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 478 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 479 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 480 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 481 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 482 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 483 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 484 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 485 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 486 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 487 * @arg @ref LL_EXTI_LINE_17
<> 161:2cc1468da177 488 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 489 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 490 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 491 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 492 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 493 * @arg @ref LL_EXTI_LINE_23
<> 161:2cc1468da177 494 * @arg @ref LL_EXTI_LINE_24(*)
<> 161:2cc1468da177 495 * @arg @ref LL_EXTI_LINE_ALL_0_31
<> 161:2cc1468da177 496 * @note (*): Available in some devices
<> 161:2cc1468da177 497 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 498 * @retval State of bit (1 or 0).
<> 161:2cc1468da177 499 */
<> 161:2cc1468da177 500 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 501 {
<> 161:2cc1468da177 502 return (READ_BIT(EXTI->EMR, ExtiLine) == (ExtiLine));
<> 161:2cc1468da177 503
<> 161:2cc1468da177 504 }
<> 161:2cc1468da177 505
<> 161:2cc1468da177 506
<> 161:2cc1468da177 507 /**
<> 161:2cc1468da177 508 * @}
<> 161:2cc1468da177 509 */
<> 161:2cc1468da177 510
<> 161:2cc1468da177 511 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
<> 161:2cc1468da177 512 * @{
<> 161:2cc1468da177 513 */
<> 161:2cc1468da177 514
<> 161:2cc1468da177 515 /**
<> 161:2cc1468da177 516 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 161:2cc1468da177 517 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 161:2cc1468da177 518 * generated on these lines. If a rising edge on a configurable interrupt
<> 161:2cc1468da177 519 * line occurs during a write operation in the EXTI_RTSR register, the
<> 161:2cc1468da177 520 * pending bit is not set.
<> 161:2cc1468da177 521 * Rising and falling edge triggers can be set for
<> 161:2cc1468da177 522 * the same interrupt line. In this case, both generate a trigger
<> 161:2cc1468da177 523 * condition.
<> 161:2cc1468da177 524 * @rmtoll RTSR RTx LL_EXTI_EnableRisingTrig_0_31
<> 161:2cc1468da177 525 * @param ExtiLine This parameter can be a combination of the following values:
<> 161:2cc1468da177 526 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 527 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 528 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 529 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 530 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 531 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 532 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 533 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 534 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 535 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 536 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 537 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 538 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 539 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 540 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 541 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 542 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 543 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 544 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 545 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 546 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 547 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 548 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 549 * @retval None
<> 161:2cc1468da177 550 */
<> 161:2cc1468da177 551 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 552 {
<> 161:2cc1468da177 553 SET_BIT(EXTI->RTSR, ExtiLine);
<> 161:2cc1468da177 554
<> 161:2cc1468da177 555 }
<> 161:2cc1468da177 556
<> 161:2cc1468da177 557
<> 161:2cc1468da177 558 /**
<> 161:2cc1468da177 559 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
<> 161:2cc1468da177 560 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 161:2cc1468da177 561 * generated on these lines. If a rising edge on a configurable interrupt
<> 161:2cc1468da177 562 * line occurs during a write operation in the EXTI_RTSR register, the
<> 161:2cc1468da177 563 * pending bit is not set.
<> 161:2cc1468da177 564 * Rising and falling edge triggers can be set for
<> 161:2cc1468da177 565 * the same interrupt line. In this case, both generate a trigger
<> 161:2cc1468da177 566 * condition.
<> 161:2cc1468da177 567 * @rmtoll RTSR RTx LL_EXTI_DisableRisingTrig_0_31
<> 161:2cc1468da177 568 * @param ExtiLine This parameter can be a combination of the following values:
<> 161:2cc1468da177 569 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 570 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 571 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 572 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 573 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 574 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 575 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 576 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 577 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 578 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 579 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 580 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 581 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 582 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 583 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 584 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 585 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 586 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 587 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 588 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 589 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 590 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 591 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 592 * @retval None
<> 161:2cc1468da177 593 */
<> 161:2cc1468da177 594 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 595 {
<> 161:2cc1468da177 596 CLEAR_BIT(EXTI->RTSR, ExtiLine);
<> 161:2cc1468da177 597
<> 161:2cc1468da177 598 }
<> 161:2cc1468da177 599
<> 161:2cc1468da177 600
<> 161:2cc1468da177 601 /**
<> 161:2cc1468da177 602 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
<> 161:2cc1468da177 603 * @rmtoll RTSR RTx LL_EXTI_IsEnabledRisingTrig_0_31
<> 161:2cc1468da177 604 * @param ExtiLine This parameter can be a combination of the following values:
<> 161:2cc1468da177 605 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 606 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 607 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 608 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 609 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 610 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 611 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 612 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 613 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 614 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 615 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 616 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 617 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 618 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 619 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 620 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 621 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 622 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 623 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 624 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 625 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 626 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 627 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 628 * @retval State of bit (1 or 0).
<> 161:2cc1468da177 629 */
<> 161:2cc1468da177 630 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 631 {
<> 161:2cc1468da177 632 return (READ_BIT(EXTI->RTSR, ExtiLine) == (ExtiLine));
<> 161:2cc1468da177 633 }
<> 161:2cc1468da177 634
<> 161:2cc1468da177 635
<> 161:2cc1468da177 636 /**
<> 161:2cc1468da177 637 * @}
<> 161:2cc1468da177 638 */
<> 161:2cc1468da177 639
<> 161:2cc1468da177 640 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
<> 161:2cc1468da177 641 * @{
<> 161:2cc1468da177 642 */
<> 161:2cc1468da177 643
<> 161:2cc1468da177 644 /**
<> 161:2cc1468da177 645 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 161:2cc1468da177 646 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 161:2cc1468da177 647 * generated on these lines. If a falling edge on a configurable interrupt
<> 161:2cc1468da177 648 * line occurs during a write operation in the EXTI_FTSR register, the
<> 161:2cc1468da177 649 * pending bit is not set.
<> 161:2cc1468da177 650 * Rising and falling edge triggers can be set for
<> 161:2cc1468da177 651 * the same interrupt line. In this case, both generate a trigger
<> 161:2cc1468da177 652 * condition.
<> 161:2cc1468da177 653 * @rmtoll FTSR FTx LL_EXTI_EnableFallingTrig_0_31
<> 161:2cc1468da177 654 * @param ExtiLine This parameter can be a combination of the following values:
<> 161:2cc1468da177 655 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 656 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 657 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 658 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 659 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 660 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 661 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 662 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 663 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 664 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 665 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 666 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 667 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 668 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 669 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 670 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 671 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 672 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 673 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 674 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 675 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 676 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 677 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 678 * @retval None
<> 161:2cc1468da177 679 */
<> 161:2cc1468da177 680 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 681 {
<> 161:2cc1468da177 682 SET_BIT(EXTI->FTSR, ExtiLine);
<> 161:2cc1468da177 683 }
<> 161:2cc1468da177 684
<> 161:2cc1468da177 685
<> 161:2cc1468da177 686 /**
<> 161:2cc1468da177 687 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
<> 161:2cc1468da177 688 * @note The configurable wakeup lines are edge-triggered. No glitch must be
<> 161:2cc1468da177 689 * generated on these lines. If a Falling edge on a configurable interrupt
<> 161:2cc1468da177 690 * line occurs during a write operation in the EXTI_FTSR register, the
<> 161:2cc1468da177 691 * pending bit is not set.
<> 161:2cc1468da177 692 * Rising and falling edge triggers can be set for the same interrupt line.
<> 161:2cc1468da177 693 * In this case, both generate a trigger condition.
<> 161:2cc1468da177 694 * @rmtoll FTSR FTx LL_EXTI_DisableFallingTrig_0_31
<> 161:2cc1468da177 695 * @param ExtiLine This parameter can be a combination of the following values:
<> 161:2cc1468da177 696 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 697 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 698 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 699 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 700 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 701 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 702 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 703 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 704 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 705 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 706 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 707 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 708 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 709 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 710 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 711 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 712 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 713 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 714 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 715 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 716 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 717 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 718 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 719 * @retval None
<> 161:2cc1468da177 720 */
<> 161:2cc1468da177 721 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 722 {
<> 161:2cc1468da177 723 CLEAR_BIT(EXTI->FTSR, ExtiLine);
<> 161:2cc1468da177 724 }
<> 161:2cc1468da177 725
<> 161:2cc1468da177 726
<> 161:2cc1468da177 727 /**
<> 161:2cc1468da177 728 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
<> 161:2cc1468da177 729 * @rmtoll FTSR FTx LL_EXTI_IsEnabledFallingTrig_0_31
<> 161:2cc1468da177 730 * @param ExtiLine This parameter can be a combination of the following values:
<> 161:2cc1468da177 731 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 732 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 733 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 734 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 735 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 736 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 737 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 738 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 739 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 740 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 741 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 742 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 743 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 744 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 745 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 746 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 747 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 748 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 749 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 750 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 751 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 752 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 753 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 754 * @retval State of bit (1 or 0).
<> 161:2cc1468da177 755 */
<> 161:2cc1468da177 756 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 757 {
<> 161:2cc1468da177 758 return (READ_BIT(EXTI->FTSR, ExtiLine) == (ExtiLine));
<> 161:2cc1468da177 759 }
<> 161:2cc1468da177 760
<> 161:2cc1468da177 761
<> 161:2cc1468da177 762 /**
<> 161:2cc1468da177 763 * @}
<> 161:2cc1468da177 764 */
<> 161:2cc1468da177 765
<> 161:2cc1468da177 766 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
<> 161:2cc1468da177 767 * @{
<> 161:2cc1468da177 768 */
<> 161:2cc1468da177 769
<> 161:2cc1468da177 770 /**
<> 161:2cc1468da177 771 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
<> 161:2cc1468da177 772 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
<> 161:2cc1468da177 773 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
<> 161:2cc1468da177 774 * resulting in an interrupt request generation.
<> 161:2cc1468da177 775 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
<> 161:2cc1468da177 776 * register (by writing a 1 into the bit)
<> 161:2cc1468da177 777 * @rmtoll SWIER SWIx LL_EXTI_GenerateSWI_0_31
<> 161:2cc1468da177 778 * @param ExtiLine This parameter can be a combination of the following values:
<> 161:2cc1468da177 779 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 780 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 781 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 782 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 783 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 784 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 785 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 786 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 787 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 788 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 789 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 790 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 791 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 792 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 793 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 794 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 795 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 796 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 797 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 798 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 799 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 800 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 801 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 802 * @retval None
<> 161:2cc1468da177 803 */
<> 161:2cc1468da177 804 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 805 {
<> 161:2cc1468da177 806 SET_BIT(EXTI->SWIER, ExtiLine);
<> 161:2cc1468da177 807 }
<> 161:2cc1468da177 808
<> 161:2cc1468da177 809
<> 161:2cc1468da177 810 /**
<> 161:2cc1468da177 811 * @}
<> 161:2cc1468da177 812 */
<> 161:2cc1468da177 813
<> 161:2cc1468da177 814 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
<> 161:2cc1468da177 815 * @{
<> 161:2cc1468da177 816 */
<> 161:2cc1468da177 817
<> 161:2cc1468da177 818 /**
<> 161:2cc1468da177 819 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
<> 161:2cc1468da177 820 * @note This bit is set when the selected edge event arrives on the interrupt
<> 161:2cc1468da177 821 * line. This bit is cleared by writing a 1 to the bit.
<> 161:2cc1468da177 822 * @rmtoll PR PIFx LL_EXTI_IsActiveFlag_0_31
<> 161:2cc1468da177 823 * @param ExtiLine This parameter can be a combination of the following values:
<> 161:2cc1468da177 824 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 825 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 826 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 827 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 828 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 829 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 830 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 831 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 832 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 833 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 834 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 835 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 836 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 837 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 838 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 839 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 840 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 841 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 842 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 843 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 844 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 845 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 846 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 847 * @retval State of bit (1 or 0).
<> 161:2cc1468da177 848 */
<> 161:2cc1468da177 849 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 850 {
<> 161:2cc1468da177 851 return (READ_BIT(EXTI->PR, ExtiLine) == (ExtiLine));
<> 161:2cc1468da177 852 }
<> 161:2cc1468da177 853
<> 161:2cc1468da177 854
<> 161:2cc1468da177 855 /**
<> 161:2cc1468da177 856 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
<> 161:2cc1468da177 857 * @note This bit is set when the selected edge event arrives on the interrupt
<> 161:2cc1468da177 858 * line. This bit is cleared by writing a 1 to the bit.
<> 161:2cc1468da177 859 * @rmtoll PR PIFx LL_EXTI_ReadFlag_0_31
<> 161:2cc1468da177 860 * @param ExtiLine This parameter can be a combination of the following values:
<> 161:2cc1468da177 861 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 862 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 863 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 864 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 865 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 866 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 867 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 868 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 869 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 870 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 871 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 872 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 873 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 874 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 875 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 876 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 877 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 878 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 879 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 880 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 881 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 882 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 883 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 884 * @retval @note This bit is set when the selected edge event arrives on the interrupt
<> 161:2cc1468da177 885 */
<> 161:2cc1468da177 886 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 887 {
<> 161:2cc1468da177 888 return (uint32_t)(READ_BIT(EXTI->PR, ExtiLine));
<> 161:2cc1468da177 889 }
<> 161:2cc1468da177 890
<> 161:2cc1468da177 891
<> 161:2cc1468da177 892 /**
<> 161:2cc1468da177 893 * @brief Clear ExtLine Flags for Lines in range 0 to 31
<> 161:2cc1468da177 894 * @note This bit is set when the selected edge event arrives on the interrupt
<> 161:2cc1468da177 895 * line. This bit is cleared by writing a 1 to the bit.
<> 161:2cc1468da177 896 * @rmtoll PR PIFx LL_EXTI_ClearFlag_0_31
<> 161:2cc1468da177 897 * @param ExtiLine This parameter can be a combination of the following values:
<> 161:2cc1468da177 898 * @arg @ref LL_EXTI_LINE_0
<> 161:2cc1468da177 899 * @arg @ref LL_EXTI_LINE_1
<> 161:2cc1468da177 900 * @arg @ref LL_EXTI_LINE_2
<> 161:2cc1468da177 901 * @arg @ref LL_EXTI_LINE_3
<> 161:2cc1468da177 902 * @arg @ref LL_EXTI_LINE_4
<> 161:2cc1468da177 903 * @arg @ref LL_EXTI_LINE_5
<> 161:2cc1468da177 904 * @arg @ref LL_EXTI_LINE_6
<> 161:2cc1468da177 905 * @arg @ref LL_EXTI_LINE_7
<> 161:2cc1468da177 906 * @arg @ref LL_EXTI_LINE_8
<> 161:2cc1468da177 907 * @arg @ref LL_EXTI_LINE_9
<> 161:2cc1468da177 908 * @arg @ref LL_EXTI_LINE_10
<> 161:2cc1468da177 909 * @arg @ref LL_EXTI_LINE_11
<> 161:2cc1468da177 910 * @arg @ref LL_EXTI_LINE_12
<> 161:2cc1468da177 911 * @arg @ref LL_EXTI_LINE_13
<> 161:2cc1468da177 912 * @arg @ref LL_EXTI_LINE_14
<> 161:2cc1468da177 913 * @arg @ref LL_EXTI_LINE_15
<> 161:2cc1468da177 914 * @arg @ref LL_EXTI_LINE_16
<> 161:2cc1468da177 915 * @arg @ref LL_EXTI_LINE_18
<> 161:2cc1468da177 916 * @arg @ref LL_EXTI_LINE_19
<> 161:2cc1468da177 917 * @arg @ref LL_EXTI_LINE_20
<> 161:2cc1468da177 918 * @arg @ref LL_EXTI_LINE_21
<> 161:2cc1468da177 919 * @arg @ref LL_EXTI_LINE_22
<> 161:2cc1468da177 920 * @note Please check each device line mapping for EXTI Line availability
<> 161:2cc1468da177 921 * @retval None
<> 161:2cc1468da177 922 */
<> 161:2cc1468da177 923 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
<> 161:2cc1468da177 924 {
<> 161:2cc1468da177 925 WRITE_REG(EXTI->PR, ExtiLine);
<> 161:2cc1468da177 926 }
<> 161:2cc1468da177 927
<> 161:2cc1468da177 928
<> 161:2cc1468da177 929 /**
<> 161:2cc1468da177 930 * @}
<> 161:2cc1468da177 931 */
<> 161:2cc1468da177 932
<> 161:2cc1468da177 933 #if defined(USE_FULL_LL_DRIVER)
<> 161:2cc1468da177 934 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
<> 161:2cc1468da177 935 * @{
<> 161:2cc1468da177 936 */
<> 161:2cc1468da177 937
<> 161:2cc1468da177 938 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 161:2cc1468da177 939 uint32_t LL_EXTI_DeInit(void);
<> 161:2cc1468da177 940 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
<> 161:2cc1468da177 941
<> 161:2cc1468da177 942
<> 161:2cc1468da177 943 /**
<> 161:2cc1468da177 944 * @}
<> 161:2cc1468da177 945 */
<> 161:2cc1468da177 946 #endif /* USE_FULL_LL_DRIVER */
<> 161:2cc1468da177 947
<> 161:2cc1468da177 948 /**
<> 161:2cc1468da177 949 * @}
<> 161:2cc1468da177 950 */
<> 161:2cc1468da177 951
<> 161:2cc1468da177 952 /**
<> 161:2cc1468da177 953 * @}
<> 161:2cc1468da177 954 */
<> 161:2cc1468da177 955
<> 161:2cc1468da177 956 #endif /* EXTI */
<> 161:2cc1468da177 957
<> 161:2cc1468da177 958 /**
<> 161:2cc1468da177 959 * @}
<> 161:2cc1468da177 960 */
<> 161:2cc1468da177 961
<> 161:2cc1468da177 962 #ifdef __cplusplus
<> 161:2cc1468da177 963 }
<> 161:2cc1468da177 964 #endif
<> 161:2cc1468da177 965
<> 161:2cc1468da177 966 #endif /* __STM32F7xx_LL_EXTI_H */
<> 161:2cc1468da177 967
<> 161:2cc1468da177 968 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/