mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_iwdg.h@165:e614a9f1c9e2, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:39:01 2017 +0100
Revision:
165:e614a9f1c9e2
Parent:
161:2cc1468da177
Child:
168:9672193075cf
This updates the lib to the mbed lib v 143

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_iwdg.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 161:2cc1468da177 5 * @version V1.2.0
<> 161:2cc1468da177 6 * @date 30-December-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of IWDG HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F7xx_HAL_IWDG_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F7xx_HAL_IWDG_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f7xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @defgroup IWDG IWDG
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup IWDG_Exported_Types IWDG Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief IWDG Init structure definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
<> 144:ef7eb2e8f9f7 68 This parameter can be a value of @ref IWDG_Prescaler */
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
<> 144:ef7eb2e8f9f7 71 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
<> 144:ef7eb2e8f9f7 74 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 } IWDG_InitTypeDef;
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 /**
<> 144:ef7eb2e8f9f7 79 * @brief IWDG Handle Structure definition
<> 144:ef7eb2e8f9f7 80 */
<> 144:ef7eb2e8f9f7 81 typedef struct
<> 144:ef7eb2e8f9f7 82 {
<> 144:ef7eb2e8f9f7 83 IWDG_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 }IWDG_HandleTypeDef;
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 /**
<> 144:ef7eb2e8f9f7 90 * @}
<> 144:ef7eb2e8f9f7 91 */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 94 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
<> 144:ef7eb2e8f9f7 95 * @{
<> 144:ef7eb2e8f9f7 96 */
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 /** @defgroup IWDG_Prescaler IWDG Prescaler
<> 144:ef7eb2e8f9f7 99 * @{
<> 144:ef7eb2e8f9f7 100 */
<> 144:ef7eb2e8f9f7 101 #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
<> 144:ef7eb2e8f9f7 102 #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
<> 144:ef7eb2e8f9f7 103 #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
<> 144:ef7eb2e8f9f7 104 #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
<> 144:ef7eb2e8f9f7 105 #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
<> 144:ef7eb2e8f9f7 106 #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
<> 144:ef7eb2e8f9f7 107 #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
<> 144:ef7eb2e8f9f7 108 /**
<> 144:ef7eb2e8f9f7 109 * @}
<> 144:ef7eb2e8f9f7 110 */
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 /** @defgroup IWDG_Window_option IWDG Window option
<> 144:ef7eb2e8f9f7 113 * @{
<> 144:ef7eb2e8f9f7 114 */
<> 144:ef7eb2e8f9f7 115 #define IWDG_WINDOW_DISABLE IWDG_WINR_WIN
<> 144:ef7eb2e8f9f7 116 /**
<> 144:ef7eb2e8f9f7 117 * @}
<> 144:ef7eb2e8f9f7 118 */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 /**
<> 144:ef7eb2e8f9f7 121 * @}
<> 144:ef7eb2e8f9f7 122 */
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 125 /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
<> 144:ef7eb2e8f9f7 126 * @{
<> 144:ef7eb2e8f9f7 127 */
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 /**
<> 144:ef7eb2e8f9f7 130 * @brief Enable the IWDG peripheral.
<> 144:ef7eb2e8f9f7 131 * @param __HANDLE__: IWDG handle
<> 144:ef7eb2e8f9f7 132 * @retval None
<> 144:ef7eb2e8f9f7 133 */
<> 144:ef7eb2e8f9f7 134 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 /**
<> 144:ef7eb2e8f9f7 137 * @brief Reload IWDG counter with value defined in the reload register
<> 144:ef7eb2e8f9f7 138 * (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled).
<> 144:ef7eb2e8f9f7 139 * @param __HANDLE__: IWDG handle
<> 144:ef7eb2e8f9f7 140 * @retval None
<> 144:ef7eb2e8f9f7 141 */
<> 144:ef7eb2e8f9f7 142 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 /**
<> 144:ef7eb2e8f9f7 145 * @}
<> 144:ef7eb2e8f9f7 146 */
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 149 /** @defgroup IWDG_Exported_Functions IWDG Exported Functions
<> 144:ef7eb2e8f9f7 150 * @{
<> 144:ef7eb2e8f9f7 151 */
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
<> 144:ef7eb2e8f9f7 154 * @{
<> 144:ef7eb2e8f9f7 155 */
<> 144:ef7eb2e8f9f7 156 /* Initialization/Start functions ********************************************/
<> 144:ef7eb2e8f9f7 157 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
<> 144:ef7eb2e8f9f7 158 /**
<> 144:ef7eb2e8f9f7 159 * @}
<> 144:ef7eb2e8f9f7 160 */
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 163 * @{
<> 144:ef7eb2e8f9f7 164 */
<> 144:ef7eb2e8f9f7 165 /* I/O operation functions ****************************************************/
<> 144:ef7eb2e8f9f7 166 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
<> 144:ef7eb2e8f9f7 167 /**
<> 144:ef7eb2e8f9f7 168 * @}
<> 144:ef7eb2e8f9f7 169 */
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 /**
<> 144:ef7eb2e8f9f7 172 * @}
<> 144:ef7eb2e8f9f7 173 */
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 176 /** @defgroup IWDG_Private_Constants IWDG Private Constants
<> 144:ef7eb2e8f9f7 177 * @{
<> 144:ef7eb2e8f9f7 178 */
<> 144:ef7eb2e8f9f7 179
<> 144:ef7eb2e8f9f7 180 /**
<> 144:ef7eb2e8f9f7 181 * @brief IWDG Key Register BitMask
<> 144:ef7eb2e8f9f7 182 */
<> 144:ef7eb2e8f9f7 183 #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */
<> 144:ef7eb2e8f9f7 184 #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */
<> 144:ef7eb2e8f9f7 185 #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */
<> 144:ef7eb2e8f9f7 186 #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 /**
<> 144:ef7eb2e8f9f7 189 * @}
<> 144:ef7eb2e8f9f7 190 */
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 193 /** @defgroup IWDG_Private_Macros IWDG Private Macros
<> 144:ef7eb2e8f9f7 194 * @{
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /**
<> 144:ef7eb2e8f9f7 198 * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
<> 144:ef7eb2e8f9f7 199 * @param __HANDLE__: IWDG handle
<> 144:ef7eb2e8f9f7 200 * @retval None
<> 144:ef7eb2e8f9f7 201 */
<> 144:ef7eb2e8f9f7 202 #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 /**
<> 144:ef7eb2e8f9f7 205 * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
<> 144:ef7eb2e8f9f7 206 * @param __HANDLE__: IWDG handle
<> 144:ef7eb2e8f9f7 207 * @retval None
<> 144:ef7eb2e8f9f7 208 */
<> 144:ef7eb2e8f9f7 209 #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 /**
<> 144:ef7eb2e8f9f7 212 * @brief Check IWDG prescaler value.
<> 144:ef7eb2e8f9f7 213 * @param __PRESCALER__: IWDG prescaler value
<> 144:ef7eb2e8f9f7 214 * @retval None
<> 144:ef7eb2e8f9f7 215 */
<> 144:ef7eb2e8f9f7 216 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
<> 144:ef7eb2e8f9f7 217 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
<> 144:ef7eb2e8f9f7 218 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
<> 144:ef7eb2e8f9f7 219 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
<> 144:ef7eb2e8f9f7 220 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
<> 144:ef7eb2e8f9f7 221 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
<> 144:ef7eb2e8f9f7 222 ((__PRESCALER__) == IWDG_PRESCALER_256))
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 /**
<> 144:ef7eb2e8f9f7 225 * @brief Check IWDG reload value.
<> 144:ef7eb2e8f9f7 226 * @param __RELOAD__: IWDG reload value
<> 144:ef7eb2e8f9f7 227 * @retval None
<> 144:ef7eb2e8f9f7 228 */
<> 144:ef7eb2e8f9f7 229 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 /**
<> 144:ef7eb2e8f9f7 232 * @brief Check IWDG window value.
<> 144:ef7eb2e8f9f7 233 * @param __WINDOW__: IWDG window value
<> 144:ef7eb2e8f9f7 234 * @retval None
<> 144:ef7eb2e8f9f7 235 */
<> 144:ef7eb2e8f9f7 236 #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 /**
<> 144:ef7eb2e8f9f7 239 * @}
<> 144:ef7eb2e8f9f7 240 */
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 /**
<> 144:ef7eb2e8f9f7 243 * @}
<> 144:ef7eb2e8f9f7 244 */
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 /**
<> 144:ef7eb2e8f9f7 247 * @}
<> 144:ef7eb2e8f9f7 248 */
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 252 }
<> 144:ef7eb2e8f9f7 253 #endif
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 #endif /* __STM32F7xx_HAL_IWDG_H */
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/