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mbed library sources. Supersedes mbed-src.

Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_gpio_ex.h@165:e614a9f1c9e2, 2017-05-26 (annotated)

Committer:: AnnaBridge
Date:: Fri May 26 12:39:01 2017 +0100
Revision:: 165:e614a9f1c9e2
Parent:: 161:2cc1468da177
Child:: 168:9672193075cf

This updates the lib to the mbed lib v 143

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	144:ef7eb2e8f9f7	1	/**
<>	144:ef7eb2e8f9f7	2	******************************************************************************
<>	144:ef7eb2e8f9f7	3	* @file stm32f7xx_hal_gpio_ex.h
<>	144:ef7eb2e8f9f7	4	* @author MCD Application Team
<>	161:2cc1468da177	5	* @version V1.2.0
<>	161:2cc1468da177	6	* @date 30-December-2016
<>	144:ef7eb2e8f9f7	7	* @brief Header file of GPIO HAL Extension module.
<>	144:ef7eb2e8f9f7	8	******************************************************************************
<>	144:ef7eb2e8f9f7	9	* @attention
<>	144:ef7eb2e8f9f7	10	*
<>	144:ef7eb2e8f9f7	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<>	144:ef7eb2e8f9f7	12	*
<>	144:ef7eb2e8f9f7	13	* Redistribution and use in source and binary forms, with or without modification,
<>	144:ef7eb2e8f9f7	14	* are permitted provided that the following conditions are met:
<>	144:ef7eb2e8f9f7	15	* 1. Redistributions of source code must retain the above copyright notice,
<>	144:ef7eb2e8f9f7	16	* this list of conditions and the following disclaimer.
<>	144:ef7eb2e8f9f7	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	144:ef7eb2e8f9f7	18	* this list of conditions and the following disclaimer in the documentation
<>	144:ef7eb2e8f9f7	19	* and/or other materials provided with the distribution.
<>	144:ef7eb2e8f9f7	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	144:ef7eb2e8f9f7	21	* may be used to endorse or promote products derived from this software
<>	144:ef7eb2e8f9f7	22	* without specific prior written permission.
<>	144:ef7eb2e8f9f7	23	*
<>	144:ef7eb2e8f9f7	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	144:ef7eb2e8f9f7	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	144:ef7eb2e8f9f7	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	144:ef7eb2e8f9f7	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	144:ef7eb2e8f9f7	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	144:ef7eb2e8f9f7	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	144:ef7eb2e8f9f7	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	144:ef7eb2e8f9f7	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	144:ef7eb2e8f9f7	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	144:ef7eb2e8f9f7	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	144:ef7eb2e8f9f7	34	*
<>	144:ef7eb2e8f9f7	35	******************************************************************************
<>	144:ef7eb2e8f9f7	36	*/
<>	144:ef7eb2e8f9f7	37
<>	144:ef7eb2e8f9f7	38	/* Define to prevent recursive inclusion -------------------------------------*/
<>	144:ef7eb2e8f9f7	39	#ifndef __STM32F7xx_HAL_GPIO_EX_H
<>	144:ef7eb2e8f9f7	40	#define __STM32F7xx_HAL_GPIO_EX_H
<>	144:ef7eb2e8f9f7	41
<>	144:ef7eb2e8f9f7	42	#ifdef __cplusplus
<>	144:ef7eb2e8f9f7	43	extern "C" {
<>	144:ef7eb2e8f9f7	44	#endif
<>	144:ef7eb2e8f9f7	45
<>	144:ef7eb2e8f9f7	46	/* Includes ------------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	47	#include "stm32f7xx_hal_def.h"
<>	144:ef7eb2e8f9f7	48
<>	144:ef7eb2e8f9f7	49	/** @addtogroup STM32F7xx_HAL_Driver
<>	144:ef7eb2e8f9f7	50	* @{
<>	144:ef7eb2e8f9f7	51	*/
<>	144:ef7eb2e8f9f7	52
<>	144:ef7eb2e8f9f7	53	/** @defgroup GPIOEx GPIOEx
<>	144:ef7eb2e8f9f7	54	* @{
<>	144:ef7eb2e8f9f7	55	*/
<>	144:ef7eb2e8f9f7	56
<>	144:ef7eb2e8f9f7	57	/* Exported types ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	58
<>	144:ef7eb2e8f9f7	59	/* Exported constants --------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	60	/** @defgroup GPIOEx_Exported_Constants GPIO Exported Constants
<>	144:ef7eb2e8f9f7	61	* @{
<>	144:ef7eb2e8f9f7	62	*/
<>	144:ef7eb2e8f9f7	63
<>	144:ef7eb2e8f9f7	64	/** @defgroup GPIO_Alternate_function_selection GPIO Alternate Function Selection
<>	144:ef7eb2e8f9f7	65	* @{
<>	144:ef7eb2e8f9f7	66	*/
<>	157:ff67d9f36b67	67	/--------------- STM32F74xxx/STM32F75xxx/STM32F76xxx/STM32F77xxx -------------/
<>	157:ff67d9f36b67	68	#if defined (STM32F745xx) \|\| defined (STM32F746xx) \|\| defined (STM32F756xx) \|\| defined (STM32F765xx) \|\| defined (STM32F767xx) \|\|\
<>	157:ff67d9f36b67	69	defined (STM32F769xx) \|\| defined (STM32F777xx) \|\| defined (STM32F779xx)
<>	144:ef7eb2e8f9f7	70	/**
<>	144:ef7eb2e8f9f7	71	* @brief AF 0 selection
<>	144:ef7eb2e8f9f7	72	*/
<>	144:ef7eb2e8f9f7	73	#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00U) /* RTC_50Hz Alternate Function mapping */
<>	144:ef7eb2e8f9f7	74	#define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO (MCO1 and MCO2) Alternate Function mapping */
<>	144:ef7eb2e8f9f7	75	#define GPIO_AF0_SWJ ((uint8_t)0x00U) /* SWJ (SWD and JTAG) Alternate Function mapping */
<>	144:ef7eb2e8f9f7	76	#define GPIO_AF0_TRACE ((uint8_t)0x00U) /* TRACE Alternate Function mapping */
<>	144:ef7eb2e8f9f7	77
<>	144:ef7eb2e8f9f7	78	/**
<>	144:ef7eb2e8f9f7	79	* @brief AF 1 selection
<>	144:ef7eb2e8f9f7	80	*/
<>	144:ef7eb2e8f9f7	81	#define GPIO_AF1_TIM1 ((uint8_t)0x01U) /* TIM1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	82	#define GPIO_AF1_TIM2 ((uint8_t)0x01U) /* TIM2 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	83	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	84	#define GPIO_AF1_UART5 ((uint8_t)0x01U) /* UART5 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	85	#define GPIO_AF1_I2C4 ((uint8_t)0x01U) /* I2C4 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	86	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	87
<>	144:ef7eb2e8f9f7	88	/**
<>	144:ef7eb2e8f9f7	89	* @brief AF 2 selection
<>	144:ef7eb2e8f9f7	90	*/
<>	144:ef7eb2e8f9f7	91	#define GPIO_AF2_TIM3 ((uint8_t)0x02U) /* TIM3 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	92	#define GPIO_AF2_TIM4 ((uint8_t)0x02U) /* TIM4 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	93	#define GPIO_AF2_TIM5 ((uint8_t)0x02U) /* TIM5 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	94
<>	144:ef7eb2e8f9f7	95	/**
<>	144:ef7eb2e8f9f7	96	* @brief AF 3 selection
<>	144:ef7eb2e8f9f7	97	*/
<>	144:ef7eb2e8f9f7	98	#define GPIO_AF3_TIM8 ((uint8_t)0x03U) /* TIM8 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	99	#define GPIO_AF3_TIM9 ((uint8_t)0x03U) /* TIM9 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	100	#define GPIO_AF3_TIM10 ((uint8_t)0x03U) /* TIM10 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	101	#define GPIO_AF3_TIM11 ((uint8_t)0x03U) /* TIM11 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	102	#define GPIO_AF3_LPTIM1 ((uint8_t)0x03U) /* LPTIM1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	103	#define GPIO_AF3_CEC ((uint8_t)0x03U) /* CEC Alternate Function mapping */
<>	144:ef7eb2e8f9f7	104	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	105	#define GPIO_AF3_DFSDM1 ((uint8_t)0x03U) /* DFSDM1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	106	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	107	/**
<>	144:ef7eb2e8f9f7	108	* @brief AF 4 selection
<>	144:ef7eb2e8f9f7	109	*/
<>	144:ef7eb2e8f9f7	110	#define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	111	#define GPIO_AF4_I2C2 ((uint8_t)0x04U) /* I2C2 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	112	#define GPIO_AF4_I2C3 ((uint8_t)0x04U) /* I2C3 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	113	#define GPIO_AF4_I2C4 ((uint8_t)0x04U) /* I2C4 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	114	#define GPIO_AF4_CEC ((uint8_t)0x04U) /* CEC Alternate Function mapping */
<>	144:ef7eb2e8f9f7	115	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	116	#define GPIO_AF4_USART1 ((uint8_t)0x04) /* USART1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	117	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	118
<>	144:ef7eb2e8f9f7	119	/**
<>	144:ef7eb2e8f9f7	120	* @brief AF 5 selection
<>	144:ef7eb2e8f9f7	121	*/
<>	144:ef7eb2e8f9f7	122	#define GPIO_AF5_SPI1 ((uint8_t)0x05U) /* SPI1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	123	#define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2/I2S2 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	124	#define GPIO_AF5_SPI3 ((uint8_t)0x05U) /* SPI3/I2S3 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	125	#define GPIO_AF5_SPI4 ((uint8_t)0x05U) /* SPI4 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	126	#define GPIO_AF5_SPI5 ((uint8_t)0x05U) /* SPI5 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	127	#define GPIO_AF5_SPI6 ((uint8_t)0x05U) /* SPI6 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	128
<>	144:ef7eb2e8f9f7	129	/**
<>	144:ef7eb2e8f9f7	130	* @brief AF 6 selection
<>	144:ef7eb2e8f9f7	131	*/
<>	144:ef7eb2e8f9f7	132	#define GPIO_AF6_SPI3 ((uint8_t)0x06U) /* SPI3/I2S3 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	133	#define GPIO_AF6_SAI1 ((uint8_t)0x06U) /* SAI1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	134	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	135	#define GPIO_AF6_UART4 ((uint8_t)0x06U) /* UART4 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	136	#define GPIO_AF6_DFSDM1 ((uint8_t)0x06U) /* DFSDM1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	137	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	138
<>	144:ef7eb2e8f9f7	139	/**
<>	144:ef7eb2e8f9f7	140	* @brief AF 7 selection
<>	144:ef7eb2e8f9f7	141	*/
<>	144:ef7eb2e8f9f7	142	#define GPIO_AF7_USART1 ((uint8_t)0x07U) /* USART1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	143	#define GPIO_AF7_USART2 ((uint8_t)0x07U) /* USART2 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	144	#define GPIO_AF7_USART3 ((uint8_t)0x07U) /* USART3 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	145	#define GPIO_AF7_UART5 ((uint8_t)0x07U) /* UART5 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	146	#define GPIO_AF7_SPDIFRX ((uint8_t)0x07U) /* SPDIF-RX Alternate Function mapping */
<>	144:ef7eb2e8f9f7	147	#define GPIO_AF7_SPI2 ((uint8_t)0x07U) /* SPI2 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	148	#define GPIO_AF7_SPI3 ((uint8_t)0x07U) /* SPI3 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	149	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	150	#define GPIO_AF7_SPI6 ((uint8_t)0x07U) /* SPI6 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	151	#define GPIO_AF7_DFSDM1 ((uint8_t)0x07U) /* DFSDM1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	152	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	153
<>	144:ef7eb2e8f9f7	154	/**
<>	144:ef7eb2e8f9f7	155	* @brief AF 8 selection
<>	144:ef7eb2e8f9f7	156	*/
<>	144:ef7eb2e8f9f7	157	#define GPIO_AF8_UART4 ((uint8_t)0x08U) /* UART4 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	158	#define GPIO_AF8_UART5 ((uint8_t)0x08U) /* UART5 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	159	#define GPIO_AF8_USART6 ((uint8_t)0x08U) /* USART6 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	160	#define GPIO_AF8_UART7 ((uint8_t)0x08U) /* UART7 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	161	#define GPIO_AF8_UART8 ((uint8_t)0x08U) /* UART8 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	162	#define GPIO_AF8_SPDIFRX ((uint8_t)0x08U) /* SPIDIF-RX Alternate Function mapping */
<>	144:ef7eb2e8f9f7	163	#define GPIO_AF8_SAI2 ((uint8_t)0x08U) /* SAI2 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	164	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	165	#define GPIO_AF8_SPI6 ((uint8_t)0x08U) /* SPI6 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	166	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	167
<>	144:ef7eb2e8f9f7	168
<>	144:ef7eb2e8f9f7	169	/**
<>	144:ef7eb2e8f9f7	170	* @brief AF 9 selection
<>	144:ef7eb2e8f9f7	171	*/
<>	144:ef7eb2e8f9f7	172	#define GPIO_AF9_CAN1 ((uint8_t)0x09U) /* CAN1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	173	#define GPIO_AF9_CAN2 ((uint8_t)0x09U) /* CAN2 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	174	#define GPIO_AF9_TIM12 ((uint8_t)0x09U) /* TIM12 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	175	#define GPIO_AF9_TIM13 ((uint8_t)0x09U) /* TIM13 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	176	#define GPIO_AF9_TIM14 ((uint8_t)0x09U) /* TIM14 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	177	#define GPIO_AF9_QUADSPI ((uint8_t)0x09U) /* QUADSPI Alternate Function mapping */
<>	144:ef7eb2e8f9f7	178	#if defined(STM32F746xx) \|\| defined(STM32F756xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	179	#define GPIO_AF9_LTDC ((uint8_t)0x09U) /* LCD-TFT Alternate Function mapping */
<>	144:ef7eb2e8f9f7	180	#endif /* STM32F746xx \|\| STM32F756xx \|\| STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	181	#if defined(STM32F746xx) \|\| defined(STM32F756xx) \|\| defined(STM32F765xx) \|\| defined(STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	182	#define GPIO_AF9_FMC ((uint8_t)0x09U) /* FMC Alternate Function mapping */
<>	144:ef7eb2e8f9f7	183	#endif /* STM32F746xx \|\| STM32F756xx \|\| STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	184	/**
<>	144:ef7eb2e8f9f7	185	* @brief AF 10 selection
<>	144:ef7eb2e8f9f7	186	*/
<>	144:ef7eb2e8f9f7	187	#define GPIO_AF10_OTG_FS ((uint8_t)0xAU) /* OTG_FS Alternate Function mapping */
<>	144:ef7eb2e8f9f7	188	#define GPIO_AF10_OTG_HS ((uint8_t)0xAU) /* OTG_HS Alternate Function mapping */
<>	144:ef7eb2e8f9f7	189	#define GPIO_AF10_QUADSPI ((uint8_t)0xAU) /* QUADSPI Alternate Function mapping */
<>	144:ef7eb2e8f9f7	190	#define GPIO_AF10_SAI2 ((uint8_t)0xAU) /* SAI2 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	191	#if defined (STM32F765xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	192	#define GPIO_AF10_DFSDM1 ((uint8_t)0x0AU) /* DFSDM1 Alternate Function mapping */
<>	157:ff67d9f36b67	193	#define GPIO_AF10_SDMMC2 ((uint8_t)0x0AU) /* SDMMC2 Alternate Function mapping */
<>	157:ff67d9f36b67	194	#define GPIO_AF10_LTDC ((uint8_t)0x0AU) /* LCD-TFT Alternate Function mapping */
<>	144:ef7eb2e8f9f7	195	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	196
<>	144:ef7eb2e8f9f7	197	/**
<>	144:ef7eb2e8f9f7	198	* @brief AF 11 selection
<>	144:ef7eb2e8f9f7	199	*/
<>	144:ef7eb2e8f9f7	200	#define GPIO_AF11_ETH ((uint8_t)0x0BU) /* ETHERNET Alternate Function mapping */
<>	144:ef7eb2e8f9f7	201	#if defined(STM32F765xx) \|\| defined (STM32F767xx) \|\| defined (STM32F769xx) \|\| defined (STM32F777xx) \|\| defined (STM32F779xx)
<>	144:ef7eb2e8f9f7	202	#define GPIO_AF11_CAN3 ((uint8_t)0x0BU) /* CAN3 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	203	#define GPIO_AF11_SDMMC2 ((uint8_t)0x0BU) /* SDMMC2 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	204	#define GPIO_AF11_I2C4 ((uint8_t)0x0BU) /* I2C4 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	205	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	206
<>	144:ef7eb2e8f9f7	207	/**
<>	144:ef7eb2e8f9f7	208	* @brief AF 12 selection
<>	144:ef7eb2e8f9f7	209	*/
<>	144:ef7eb2e8f9f7	210	#define GPIO_AF12_FMC ((uint8_t)0xCU) /* FMC Alternate Function mapping */
<>	144:ef7eb2e8f9f7	211	#define GPIO_AF12_OTG_HS_FS ((uint8_t)0xCU) /* OTG HS configured in FS, Alternate Function mapping */
<>	144:ef7eb2e8f9f7	212	#define GPIO_AF12_SDMMC1 ((uint8_t)0xCU) /* SDMMC1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	213	#if defined(STM32F765xx) \|\| defined (STM32F767xx) \|\| defined (STM32F769xx) \|\| defined (STM32F777xx) \|\| defined (STM32F779xx)
<>	144:ef7eb2e8f9f7	214	#define GPIO_AF12_MDIOS ((uint8_t)0xCU) /* SDMMC1 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	215	#define GPIO_AF12_UART7 ((uint8_t)0xCU) /* UART7 Alternate Function mapping */
<>	144:ef7eb2e8f9f7	216	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	217
<>	144:ef7eb2e8f9f7	218	/**
<>	144:ef7eb2e8f9f7	219	* @brief AF 13 selection
<>	144:ef7eb2e8f9f7	220	*/
<>	144:ef7eb2e8f9f7	221	#define GPIO_AF13_DCMI ((uint8_t)0x0DU) /* DCMI Alternate Function mapping */
<>	144:ef7eb2e8f9f7	222	#if defined (STM32F769xx) \|\| defined (STM32F779xx)
<>	144:ef7eb2e8f9f7	223	#define GPIO_AF13_DSI ((uint8_t)0x0DU) /* DSI Alternate Function mapping */
<>	144:ef7eb2e8f9f7	224	#endif /* STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	225	#if defined(STM32F746xx) \|\| defined(STM32F756xx) \|\| defined(STM32F767xx) \|\| defined(STM32F769xx) \|\| defined(STM32F777xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	226	#define GPIO_AF13_LTDC ((uint8_t)0x0DU) /* LTDC Alternate Function mapping */
<>	144:ef7eb2e8f9f7	227
<>	144:ef7eb2e8f9f7	228	/**
<>	144:ef7eb2e8f9f7	229	* @brief AF 14 selection
<>	144:ef7eb2e8f9f7	230	*/
<>	144:ef7eb2e8f9f7	231	#define GPIO_AF14_LTDC ((uint8_t)0x0EU) /* LCD-TFT Alternate Function mapping */
<>	144:ef7eb2e8f9f7	232	#endif /* STM32F746xx \|\| STM32F756xx \|\| STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	144:ef7eb2e8f9f7	233	/**
<>	144:ef7eb2e8f9f7	234	* @brief AF 15 selection
<>	144:ef7eb2e8f9f7	235	*/
<>	144:ef7eb2e8f9f7	236	#define GPIO_AF15_EVENTOUT ((uint8_t)0x0FU) /* EVENTOUT Alternate Function mapping */
<>	157:ff67d9f36b67	237	#endif /* STM32F745xx \|\| STM32F746xx \|\| STM32F756xx \|\| STM32F765xx \|\| STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	157:ff67d9f36b67	238	/----------------------------------------------------------------------------/
<>	144:ef7eb2e8f9f7	239
<>	161:2cc1468da177	240	/---------------------------- STM32F72xxx/STM32F73xxx -----------------------/
<>	161:2cc1468da177	241	#if defined(STM32F722xx) \|\| defined(STM32F723xx) \|\| defined(STM32F732xx) \|\| defined(STM32F733xx)
<>	161:2cc1468da177	242	/**
<>	161:2cc1468da177	243	* @brief AF 0 selection
<>	161:2cc1468da177	244	*/
<>	161:2cc1468da177	245	#define GPIO_AF0_RTC_50Hz ((uint8_t)0x00U) /* RTC_50Hz Alternate Function mapping */
<>	161:2cc1468da177	246	#define GPIO_AF0_MCO ((uint8_t)0x00U) /* MCO (MCO1 and MCO2) Alternate Function mapping */
<>	161:2cc1468da177	247	#define GPIO_AF0_SWJ ((uint8_t)0x00U) /* SWJ (SWD and JTAG) Alternate Function mapping */
<>	161:2cc1468da177	248	#define GPIO_AF0_TRACE ((uint8_t)0x00U) /* TRACE Alternate Function mapping */
<>	161:2cc1468da177	249
<>	161:2cc1468da177	250	/**
<>	161:2cc1468da177	251	* @brief AF 1 selection
<>	161:2cc1468da177	252	*/
<>	161:2cc1468da177	253	#define GPIO_AF1_TIM1 ((uint8_t)0x01U) /* TIM1 Alternate Function mapping */
<>	161:2cc1468da177	254	#define GPIO_AF1_TIM2 ((uint8_t)0x01U) /* TIM2 Alternate Function mapping */
<>	161:2cc1468da177	255
<>	161:2cc1468da177	256	/**
<>	161:2cc1468da177	257	* @brief AF 2 selection
<>	161:2cc1468da177	258	*/
<>	161:2cc1468da177	259	#define GPIO_AF2_TIM3 ((uint8_t)0x02U) /* TIM3 Alternate Function mapping */
<>	161:2cc1468da177	260	#define GPIO_AF2_TIM4 ((uint8_t)0x02U) /* TIM4 Alternate Function mapping */
<>	161:2cc1468da177	261	#define GPIO_AF2_TIM5 ((uint8_t)0x02U) /* TIM5 Alternate Function mapping */
<>	161:2cc1468da177	262
<>	161:2cc1468da177	263	/**
<>	161:2cc1468da177	264	* @brief AF 3 selection
<>	161:2cc1468da177	265	*/
<>	161:2cc1468da177	266	#define GPIO_AF3_TIM8 ((uint8_t)0x03U) /* TIM8 Alternate Function mapping */
<>	161:2cc1468da177	267	#define GPIO_AF3_TIM9 ((uint8_t)0x03U) /* TIM9 Alternate Function mapping */
<>	161:2cc1468da177	268	#define GPIO_AF3_TIM10 ((uint8_t)0x03U) /* TIM10 Alternate Function mapping */
<>	161:2cc1468da177	269	#define GPIO_AF3_TIM11 ((uint8_t)0x03U) /* TIM11 Alternate Function mapping */
<>	161:2cc1468da177	270	#define GPIO_AF3_LPTIM1 ((uint8_t)0x03U) /* LPTIM1 Alternate Function mapping */
<>	161:2cc1468da177	271
<>	161:2cc1468da177	272	/**
<>	161:2cc1468da177	273	* @brief AF 4 selection
<>	161:2cc1468da177	274	*/
<>	161:2cc1468da177	275	#define GPIO_AF4_I2C1 ((uint8_t)0x04U) /* I2C1 Alternate Function mapping */
<>	161:2cc1468da177	276	#define GPIO_AF4_I2C2 ((uint8_t)0x04U) /* I2C2 Alternate Function mapping */
<>	161:2cc1468da177	277	#define GPIO_AF4_I2C3 ((uint8_t)0x04U) /* I2C3 Alternate Function mapping */
<>	161:2cc1468da177	278
<>	161:2cc1468da177	279	/**
<>	161:2cc1468da177	280	* @brief AF 5 selection
<>	161:2cc1468da177	281	*/
<>	161:2cc1468da177	282	#define GPIO_AF5_SPI1 ((uint8_t)0x05U) /* SPI1 Alternate Function mapping */
<>	161:2cc1468da177	283	#define GPIO_AF5_SPI2 ((uint8_t)0x05U) /* SPI2/I2S2 Alternate Function mapping */
<>	161:2cc1468da177	284	#define GPIO_AF5_SPI3 ((uint8_t)0x05U) /* SPI3/I2S3 Alternate Function mapping */
<>	161:2cc1468da177	285	#define GPIO_AF5_SPI4 ((uint8_t)0x05U) /* SPI4 Alternate Function mapping */
<>	161:2cc1468da177	286	#define GPIO_AF5_SPI5 ((uint8_t)0x05U) /* SPI5 Alternate Function mapping */
<>	161:2cc1468da177	287
<>	161:2cc1468da177	288	/**
<>	161:2cc1468da177	289	* @brief AF 6 selection
<>	161:2cc1468da177	290	*/
<>	161:2cc1468da177	291	#define GPIO_AF6_SPI3 ((uint8_t)0x06U) /* SPI3/I2S3 Alternate Function mapping */
<>	161:2cc1468da177	292	#define GPIO_AF6_SAI1 ((uint8_t)0x06U) /* SAI1 Alternate Function mapping */
<>	161:2cc1468da177	293
<>	161:2cc1468da177	294	/**
<>	161:2cc1468da177	295	* @brief AF 7 selection
<>	161:2cc1468da177	296	*/
<>	161:2cc1468da177	297	#define GPIO_AF7_USART1 ((uint8_t)0x07U) /* USART1 Alternate Function mapping */
<>	161:2cc1468da177	298	#define GPIO_AF7_USART2 ((uint8_t)0x07U) /* USART2 Alternate Function mapping */
<>	161:2cc1468da177	299	#define GPIO_AF7_USART3 ((uint8_t)0x07U) /* USART3 Alternate Function mapping */
<>	161:2cc1468da177	300	#define GPIO_AF7_UART5 ((uint8_t)0x07U) /* UART5 Alternate Function mapping */
<>	161:2cc1468da177	301	#define GPIO_AF7_SPI2 ((uint8_t)0x07U) /* SPI2 Alternate Function mapping */
<>	161:2cc1468da177	302	#define GPIO_AF7_SPI3 ((uint8_t)0x07U) /* SPI3 Alternate Function mapping */
<>	161:2cc1468da177	303
<>	161:2cc1468da177	304	/**
<>	161:2cc1468da177	305	* @brief AF 8 selection
<>	161:2cc1468da177	306	*/
<>	161:2cc1468da177	307	#define GPIO_AF8_UART4 ((uint8_t)0x08U) /* UART4 Alternate Function mapping */
<>	161:2cc1468da177	308	#define GPIO_AF8_UART5 ((uint8_t)0x08U) /* UART5 Alternate Function mapping */
<>	161:2cc1468da177	309	#define GPIO_AF8_USART6 ((uint8_t)0x08U) /* USART6 Alternate Function mapping */
<>	161:2cc1468da177	310	#define GPIO_AF8_UART7 ((uint8_t)0x08U) /* UART7 Alternate Function mapping */
<>	161:2cc1468da177	311	#define GPIO_AF8_UART8 ((uint8_t)0x08U) /* UART8 Alternate Function mapping */
<>	161:2cc1468da177	312	#define GPIO_AF8_SAI2 ((uint8_t)0x08U) /* SAI2 Alternate Function mapping */
<>	161:2cc1468da177	313
<>	161:2cc1468da177	314	/**
<>	161:2cc1468da177	315	* @brief AF 9 selection
<>	161:2cc1468da177	316	*/
<>	161:2cc1468da177	317	#define GPIO_AF9_CAN1 ((uint8_t)0x09U) /* CAN1 Alternate Function mapping */
<>	161:2cc1468da177	318	#define GPIO_AF9_TIM12 ((uint8_t)0x09U) /* TIM12 Alternate Function mapping */
<>	161:2cc1468da177	319	#define GPIO_AF9_TIM13 ((uint8_t)0x09U) /* TIM13 Alternate Function mapping */
<>	161:2cc1468da177	320	#define GPIO_AF9_TIM14 ((uint8_t)0x09U) /* TIM14 Alternate Function mapping */
<>	161:2cc1468da177	321	#define GPIO_AF9_QUADSPI ((uint8_t)0x09U) /* QUADSPI Alternate Function mapping */
<>	161:2cc1468da177	322
<>	161:2cc1468da177	323	/**
<>	161:2cc1468da177	324	* @brief AF 10 selection
<>	161:2cc1468da177	325	*/
<>	161:2cc1468da177	326	#define GPIO_AF10_OTG_FS ((uint8_t)0xAU) /* OTG_FS Alternate Function mapping */
<>	161:2cc1468da177	327	#define GPIO_AF10_OTG_HS ((uint8_t)0xAU) /* OTG_HS Alternate Function mapping */
<>	161:2cc1468da177	328	#define GPIO_AF10_QUADSPI ((uint8_t)0xAU) /* QUADSPI Alternate Function mapping */
<>	161:2cc1468da177	329	#define GPIO_AF10_SAI2 ((uint8_t)0xAU) /* SAI2 Alternate Function mapping */
<>	161:2cc1468da177	330	#define GPIO_AF10_SDMMC2 ((uint8_t)0x0AU) /* SDMMC2 Alternate Function mapping */
<>	161:2cc1468da177	331
<>	161:2cc1468da177	332	/**
<>	161:2cc1468da177	333	* @brief AF 11 selection
<>	161:2cc1468da177	334	*/
<>	161:2cc1468da177	335	#define GPIO_AF11_SDMMC2 ((uint8_t)0x0BU) /* SDMMC2 Alternate Function mapping */
<>	161:2cc1468da177	336
<>	161:2cc1468da177	337	/**
<>	161:2cc1468da177	338	* @brief AF 12 selection
<>	161:2cc1468da177	339	*/
<>	161:2cc1468da177	340	#define GPIO_AF12_FMC ((uint8_t)0xCU) /* FMC Alternate Function mapping */
<>	161:2cc1468da177	341	#define GPIO_AF12_OTG_HS_FS ((uint8_t)0xCU) /* OTG HS configured in FS, Alternate Function mapping */
<>	161:2cc1468da177	342	#define GPIO_AF12_SDMMC1 ((uint8_t)0xCU) /* SDMMC1 Alternate Function mapping */
<>	161:2cc1468da177	343
<>	161:2cc1468da177	344	/**
<>	161:2cc1468da177	345	* @brief AF 13 selection
<>	161:2cc1468da177	346	*/
<>	161:2cc1468da177	347	#define GPIO_AF13_RNG ((uint8_t)0x0DU) /* RNG Alternate Function mapping */
<>	161:2cc1468da177	348
<>	161:2cc1468da177	349	/**
<>	161:2cc1468da177	350	* @brief AF 15 selection
<>	161:2cc1468da177	351	*/
<>	161:2cc1468da177	352	#define GPIO_AF15_EVENTOUT ((uint8_t)0x0FU) /* EVENTOUT Alternate Function mapping */
<>	161:2cc1468da177	353	#endif /* STM32F722xx \|\| STM32F723xx \|\| STM32F732xx \|\| STM32F733xx */
<>	161:2cc1468da177	354	/----------------------------------------------------------------------------/
<>	161:2cc1468da177	355
<>	144:ef7eb2e8f9f7	356	/**
<>	144:ef7eb2e8f9f7	357	* @}
<>	144:ef7eb2e8f9f7	358	*/
<>	144:ef7eb2e8f9f7	359
<>	144:ef7eb2e8f9f7	360	/**
<>	144:ef7eb2e8f9f7	361	* @}
<>	144:ef7eb2e8f9f7	362	*/
<>	144:ef7eb2e8f9f7	363
<>	144:ef7eb2e8f9f7	364	/* Exported macro ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	365	/** @defgroup GPIOEx_Exported_Macros GPIO Exported Macros
<>	144:ef7eb2e8f9f7	366	* @{
<>	144:ef7eb2e8f9f7	367	*/
<>	144:ef7eb2e8f9f7	368	/**
<>	144:ef7eb2e8f9f7	369	* @}
<>	144:ef7eb2e8f9f7	370	*/
<>	144:ef7eb2e8f9f7	371
<>	144:ef7eb2e8f9f7	372	/* Exported functions --------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	373	/** @defgroup GPIOEx_Exported_Functions GPIO Exported Functions
<>	144:ef7eb2e8f9f7	374	* @{
<>	144:ef7eb2e8f9f7	375	*/
<>	144:ef7eb2e8f9f7	376	/**
<>	144:ef7eb2e8f9f7	377	* @}
<>	144:ef7eb2e8f9f7	378	*/
<>	144:ef7eb2e8f9f7	379	/* Private types -------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	380	/* Private variables ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	381	/* Private constants ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	382	/** @defgroup GPIOEx_Private_Constants GPIO Private Constants
<>	144:ef7eb2e8f9f7	383	* @{
<>	144:ef7eb2e8f9f7	384	*/
<>	144:ef7eb2e8f9f7	385
<>	144:ef7eb2e8f9f7	386	/**
<>	144:ef7eb2e8f9f7	387	* @brief GPIO pin available on the platform
<>	144:ef7eb2e8f9f7	388	*/
<>	144:ef7eb2e8f9f7	389	/* Defines the available pins per GPIOs */
<>	144:ef7eb2e8f9f7	390	#define GPIOA_PIN_AVAILABLE GPIO_PIN_All
<>	144:ef7eb2e8f9f7	391	#define GPIOB_PIN_AVAILABLE GPIO_PIN_All
<>	144:ef7eb2e8f9f7	392	#define GPIOC_PIN_AVAILABLE GPIO_PIN_All
<>	144:ef7eb2e8f9f7	393	#define GPIOD_PIN_AVAILABLE GPIO_PIN_All
<>	144:ef7eb2e8f9f7	394	#define GPIOE_PIN_AVAILABLE GPIO_PIN_All
<>	144:ef7eb2e8f9f7	395	#define GPIOF_PIN_AVAILABLE GPIO_PIN_All
<>	144:ef7eb2e8f9f7	396	#define GPIOG_PIN_AVAILABLE GPIO_PIN_All
<>	144:ef7eb2e8f9f7	397	#define GPIOI_PIN_AVAILABLE GPIO_PIN_All
<>	144:ef7eb2e8f9f7	398	#define GPIOJ_PIN_AVAILABLE GPIO_PIN_All
<>	144:ef7eb2e8f9f7	399	#define GPIOH_PIN_AVAILABLE GPIO_PIN_All
<>	144:ef7eb2e8f9f7	400	#define GPIOK_PIN_AVAILABLE (GPIO_PIN_0 \| GPIO_PIN_1 \| GPIO_PIN_3 \| GPIO_PIN_4 \| \
<>	144:ef7eb2e8f9f7	401	GPIO_PIN_5 \| GPIO_PIN_6 \| GPIO_PIN_7)
<>	144:ef7eb2e8f9f7	402
<>	144:ef7eb2e8f9f7	403	/**
<>	144:ef7eb2e8f9f7	404	* @}
<>	144:ef7eb2e8f9f7	405	*/
<>	144:ef7eb2e8f9f7	406
<>	144:ef7eb2e8f9f7	407	/* Private macros ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	408	/** @defgroup GPIOEx_Private_Macros GPIO Private Macros
<>	144:ef7eb2e8f9f7	409	* @{
<>	144:ef7eb2e8f9f7	410	*/
<>	144:ef7eb2e8f9f7	411	/** @defgroup GPIOEx_Get_Port_Index GPIO Get Port Index
<>	144:ef7eb2e8f9f7	412	* @{
<>	144:ef7eb2e8f9f7	413	*/
<>	157:ff67d9f36b67	414	#if defined (STM32F745xx) \|\| defined (STM32F746xx) \|\| defined (STM32F756xx) \|\| defined (STM32F765xx) \|\|\
<>	157:ff67d9f36b67	415	defined (STM32F767xx) \|\| defined (STM32F769xx) \|\| defined (STM32F777xx) \|\| defined (STM32F779xx)
<>	144:ef7eb2e8f9f7	416	#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
<>	144:ef7eb2e8f9f7	417	((__GPIOx__) == (GPIOB))? 1U :\
<>	144:ef7eb2e8f9f7	418	((__GPIOx__) == (GPIOC))? 2U :\
<>	144:ef7eb2e8f9f7	419	((__GPIOx__) == (GPIOD))? 3U :\
<>	144:ef7eb2e8f9f7	420	((__GPIOx__) == (GPIOE))? 4U :\
<>	144:ef7eb2e8f9f7	421	((__GPIOx__) == (GPIOF))? 5U :\
<>	144:ef7eb2e8f9f7	422	((__GPIOx__) == (GPIOG))? 6U :\
<>	144:ef7eb2e8f9f7	423	((__GPIOx__) == (GPIOH))? 7U :\
<>	144:ef7eb2e8f9f7	424	((__GPIOx__) == (GPIOI))? 8U :\
<>	157:ff67d9f36b67	425	((__GPIOx__) == (GPIOJ))? 9U : 10U)
<>	157:ff67d9f36b67	426	#endif /* STM32F745xx \|\| STM32F746xx \|\| STM32F756xx \|\| STM32F765xx \|\| STM32F767xx \|\| STM32F769xx \|\| STM32F777xx \|\| STM32F779xx */
<>	157:ff67d9f36b67	427
<>	161:2cc1468da177	428	#if defined (STM32F722xx) \|\| defined (STM32F723xx) \|\| defined (STM32F732xx) \|\| defined (STM32F733xx)
<>	161:2cc1468da177	429	#define GPIO_GET_INDEX(__GPIOx__) (uint8_t)(((__GPIOx__) == (GPIOA))? 0U :\
<>	161:2cc1468da177	430	((__GPIOx__) == (GPIOB))? 1U :\
<>	161:2cc1468da177	431	((__GPIOx__) == (GPIOC))? 2U :\
<>	161:2cc1468da177	432	((__GPIOx__) == (GPIOD))? 3U :\
<>	161:2cc1468da177	433	((__GPIOx__) == (GPIOE))? 4U :\
<>	161:2cc1468da177	434	((__GPIOx__) == (GPIOF))? 5U :\
<>	161:2cc1468da177	435	((__GPIOx__) == (GPIOG))? 6U :\
<>	161:2cc1468da177	436	((__GPIOx__) == (GPIOH))? 7U : 8U)
<>	161:2cc1468da177	437	#endif /* STM32F722xx \|\| STM32F723xx \|\| STM32F732xx \|\| STM32F733xx */
<>	144:ef7eb2e8f9f7	438	/**
<>	144:ef7eb2e8f9f7	439	* @}
<>	144:ef7eb2e8f9f7	440	*/
<>	144:ef7eb2e8f9f7	441
<>	144:ef7eb2e8f9f7	442	#define IS_GPIO_PIN_AVAILABLE(__INSTANCE__,__PIN__) \
<>	144:ef7eb2e8f9f7	443	((((__INSTANCE__) == GPIOA) && (((__PIN__) & (GPIOA_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOA_PIN_AVAILABLE)) == (GPIOA_PIN_AVAILABLE))) \|\| \
<>	144:ef7eb2e8f9f7	444	(((__INSTANCE__) == GPIOB) && (((__PIN__) & (GPIOB_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOB_PIN_AVAILABLE)) == (GPIOB_PIN_AVAILABLE))) \|\| \
<>	144:ef7eb2e8f9f7	445	(((__INSTANCE__) == GPIOC) && (((__PIN__) & (GPIOC_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOC_PIN_AVAILABLE)) == (GPIOC_PIN_AVAILABLE))) \|\| \
<>	144:ef7eb2e8f9f7	446	(((__INSTANCE__) == GPIOD) && (((__PIN__) & (GPIOD_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOD_PIN_AVAILABLE)) == (GPIOD_PIN_AVAILABLE))) \|\| \
<>	144:ef7eb2e8f9f7	447	(((__INSTANCE__) == GPIOE) && (((__PIN__) & (GPIOE_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOE_PIN_AVAILABLE)) == (GPIOE_PIN_AVAILABLE))) \|\| \
<>	144:ef7eb2e8f9f7	448	(((__INSTANCE__) == GPIOF) && (((__PIN__) & (GPIOF_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOF_PIN_AVAILABLE)) == (GPIOF_PIN_AVAILABLE))) \|\| \
<>	144:ef7eb2e8f9f7	449	(((__INSTANCE__) == GPIOG) && (((__PIN__) & (GPIOG_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOG_PIN_AVAILABLE)) == (GPIOG_PIN_AVAILABLE))) \|\| \
<>	144:ef7eb2e8f9f7	450	(((__INSTANCE__) == GPIOI) && (((__PIN__) & (GPIOI_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOI_PIN_AVAILABLE)) == (GPIOI_PIN_AVAILABLE))) \|\| \
<>	144:ef7eb2e8f9f7	451	(((__INSTANCE__) == GPIOJ) && (((__PIN__) & (GPIOJ_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOJ_PIN_AVAILABLE)) == (GPIOJ_PIN_AVAILABLE))) \|\| \
<>	144:ef7eb2e8f9f7	452	(((__INSTANCE__) == GPIOK) && (((__PIN__) & (GPIOK_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOK_PIN_AVAILABLE)) == (GPIOK_PIN_AVAILABLE))) \|\| \
<>	144:ef7eb2e8f9f7	453	(((__INSTANCE__) == GPIOH) && (((__PIN__) & (GPIOH_PIN_AVAILABLE)) != 0) && (((__PIN__) \| (GPIOH_PIN_AVAILABLE)) == (GPIOH_PIN_AVAILABLE))))
<>	144:ef7eb2e8f9f7	454	/** @defgroup GPIOEx_IS_Alternat_function_selection GPIO Check Alternate Function
<>	144:ef7eb2e8f9f7	455	* @{
<>	144:ef7eb2e8f9f7	456	*/
<>	144:ef7eb2e8f9f7	457	#if defined(STM32F756xx) \|\| defined(STM32F746xx)
<>	144:ef7eb2e8f9f7	458	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
<>	144:ef7eb2e8f9f7	459	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
<>	144:ef7eb2e8f9f7	460	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
<>	144:ef7eb2e8f9f7	461	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
<>	144:ef7eb2e8f9f7	462	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
<>	144:ef7eb2e8f9f7	463	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
<>	144:ef7eb2e8f9f7	464	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
<>	144:ef7eb2e8f9f7	465	((AF) == GPIO_AF3_CEC) \|\| ((AF) == GPIO_AF4_CEC) \|\| \
<>	144:ef7eb2e8f9f7	466	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
<>	144:ef7eb2e8f9f7	467	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF4_I2C4) \|\| \
<>	144:ef7eb2e8f9f7	468	((AF) == GPIO_AF5_SPI1) \|\| ((AF) == GPIO_AF5_SPI2) \|\| \
<>	144:ef7eb2e8f9f7	469	((AF) == GPIO_AF5_SPI3) \|\| ((AF) == GPIO_AF5_SPI4) \|\| \
<>	144:ef7eb2e8f9f7	470	((AF) == GPIO_AF5_SPI5) \|\| ((AF) == GPIO_AF5_SPI6) \|\| \
<>	144:ef7eb2e8f9f7	471	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
<>	144:ef7eb2e8f9f7	472	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
<>	144:ef7eb2e8f9f7	473	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
<>	144:ef7eb2e8f9f7	474	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
<>	144:ef7eb2e8f9f7	475	((AF) == GPIO_AF7_SPDIFRX) \|\| ((AF) == GPIO_AF8_SPDIFRX) \|\| \
<>	144:ef7eb2e8f9f7	476	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
<>	144:ef7eb2e8f9f7	477	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
<>	144:ef7eb2e8f9f7	478	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
<>	144:ef7eb2e8f9f7	479	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_CAN2) \|\| \
<>	144:ef7eb2e8f9f7	480	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
<>	144:ef7eb2e8f9f7	481	((AF) == GPIO_AF9_TIM14) \|\| ((AF) == GPIO_AF9_QUADSPI) \|\| \
<>	144:ef7eb2e8f9f7	482	((AF) == GPIO_AF9_LTDC) \|\| ((AF) == GPIO_AF10_OTG_FS) \|\| \
<>	144:ef7eb2e8f9f7	483	((AF) == GPIO_AF10_OTG_HS) \|\| ((AF) == GPIO_AF10_SAI2) \|\| \
<>	144:ef7eb2e8f9f7	484	((AF) == GPIO_AF10_QUADSPI) \|\| ((AF) == GPIO_AF11_ETH) \|\| \
<>	144:ef7eb2e8f9f7	485	((AF) == GPIO_AF12_OTG_HS_FS) \|\| ((AF) == GPIO_AF12_SDMMC1) \|\| \
<>	144:ef7eb2e8f9f7	486	((AF) == GPIO_AF12_FMC) \|\| ((AF) == GPIO_AF15_EVENTOUT) \|\| \
<>	144:ef7eb2e8f9f7	487	((AF) == GPIO_AF13_DCMI) \|\| ((AF) == GPIO_AF14_LTDC))
<>	144:ef7eb2e8f9f7	488	#elif defined(STM32F745xx)
<>	157:ff67d9f36b67	489	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
<>	144:ef7eb2e8f9f7	490	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
<>	157:ff67d9f36b67	491	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
<>	144:ef7eb2e8f9f7	492	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
<>	144:ef7eb2e8f9f7	493	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
<>	144:ef7eb2e8f9f7	494	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
<>	144:ef7eb2e8f9f7	495	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
<>	144:ef7eb2e8f9f7	496	((AF) == GPIO_AF3_CEC) \|\| ((AF) == GPIO_AF4_CEC) \|\| \
<>	144:ef7eb2e8f9f7	497	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
<>	144:ef7eb2e8f9f7	498	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF4_I2C4) \|\| \
<>	144:ef7eb2e8f9f7	499	((AF) == GPIO_AF5_SPI1) \|\| ((AF) == GPIO_AF5_SPI2) \|\| \
<>	144:ef7eb2e8f9f7	500	((AF) == GPIO_AF5_SPI3) \|\| ((AF) == GPIO_AF5_SPI4) \|\| \
<>	144:ef7eb2e8f9f7	501	((AF) == GPIO_AF5_SPI5) \|\| ((AF) == GPIO_AF5_SPI6) \|\| \
<>	144:ef7eb2e8f9f7	502	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
<>	144:ef7eb2e8f9f7	503	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
<>	144:ef7eb2e8f9f7	504	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
<>	144:ef7eb2e8f9f7	505	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
<>	144:ef7eb2e8f9f7	506	((AF) == GPIO_AF7_SPDIFRX) \|\| ((AF) == GPIO_AF8_SPDIFRX) \|\| \
<>	144:ef7eb2e8f9f7	507	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
<>	144:ef7eb2e8f9f7	508	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
<>	144:ef7eb2e8f9f7	509	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
<>	144:ef7eb2e8f9f7	510	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_CAN2) \|\| \
<>	144:ef7eb2e8f9f7	511	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
<>	144:ef7eb2e8f9f7	512	((AF) == GPIO_AF9_TIM14) \|\| ((AF) == GPIO_AF9_QUADSPI) \|\| \
<>	144:ef7eb2e8f9f7	513	((AF) == GPIO_AF13_DCMI) \|\| ((AF) == GPIO_AF10_OTG_FS) \|\| \
<>	144:ef7eb2e8f9f7	514	((AF) == GPIO_AF10_OTG_HS) \|\| ((AF) == GPIO_AF10_SAI2) \|\| \
<>	144:ef7eb2e8f9f7	515	((AF) == GPIO_AF10_QUADSPI) \|\| ((AF) == GPIO_AF11_ETH) \|\| \
<>	157:ff67d9f36b67	516	((AF) == GPIO_AF12_OTG_HS_FS) \|\| ((AF) == GPIO_AF12_SDMMC1) \|\| \
<>	144:ef7eb2e8f9f7	517	((AF) == GPIO_AF12_FMC) \|\| ((AF) == GPIO_AF15_EVENTOUT))
<>	144:ef7eb2e8f9f7	518	#elif defined(STM32F767xx) \|\| defined(STM32F777xx)
<>	144:ef7eb2e8f9f7	519	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
<>	144:ef7eb2e8f9f7	520	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
<>	144:ef7eb2e8f9f7	521	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
<>	144:ef7eb2e8f9f7	522	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
<>	144:ef7eb2e8f9f7	523	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
<>	144:ef7eb2e8f9f7	524	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
<>	144:ef7eb2e8f9f7	525	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
<>	144:ef7eb2e8f9f7	526	((AF) == GPIO_AF3_CEC) \|\| ((AF) == GPIO_AF4_CEC) \|\| \
<>	144:ef7eb2e8f9f7	527	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
<>	144:ef7eb2e8f9f7	528	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF4_I2C4) \|\| \
<>	144:ef7eb2e8f9f7	529	((AF) == GPIO_AF5_SPI1) \|\| ((AF) == GPIO_AF5_SPI2) \|\| \
<>	144:ef7eb2e8f9f7	530	((AF) == GPIO_AF5_SPI3) \|\| ((AF) == GPIO_AF5_SPI4) \|\| \
<>	144:ef7eb2e8f9f7	531	((AF) == GPIO_AF5_SPI5) \|\| ((AF) == GPIO_AF5_SPI6) \|\| \
<>	144:ef7eb2e8f9f7	532	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
<>	144:ef7eb2e8f9f7	533	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
<>	144:ef7eb2e8f9f7	534	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
<>	144:ef7eb2e8f9f7	535	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
<>	144:ef7eb2e8f9f7	536	((AF) == GPIO_AF7_SPDIFRX) \|\| ((AF) == GPIO_AF8_SPDIFRX) \|\| \
<>	144:ef7eb2e8f9f7	537	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
<>	144:ef7eb2e8f9f7	538	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
<>	144:ef7eb2e8f9f7	539	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
<>	144:ef7eb2e8f9f7	540	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_CAN2) \|\| \
<>	144:ef7eb2e8f9f7	541	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
<>	144:ef7eb2e8f9f7	542	((AF) == GPIO_AF9_TIM14) \|\| ((AF) == GPIO_AF9_QUADSPI) \|\| \
<>	144:ef7eb2e8f9f7	543	((AF) == GPIO_AF10_OTG_FS) \|\| ((AF) == GPIO_AF9_LTDC) \|\| \
<>	144:ef7eb2e8f9f7	544	((AF) == GPIO_AF10_OTG_HS) \|\| ((AF) == GPIO_AF10_SAI2) \|\| \
<>	144:ef7eb2e8f9f7	545	((AF) == GPIO_AF10_QUADSPI) \|\| ((AF) == GPIO_AF11_ETH) \|\| \
<>	157:ff67d9f36b67	546	((AF) == GPIO_AF10_SDMMC2) \|\| ((AF) == GPIO_AF11_SDMMC2) \|\| \
<>	144:ef7eb2e8f9f7	547	((AF) == GPIO_AF11_CAN3) \|\| ((AF) == GPIO_AF12_OTG_HS_FS) \|\| \
<>	144:ef7eb2e8f9f7	548	((AF) == GPIO_AF12_SDMMC1) \|\| ((AF) == GPIO_AF12_FMC) \|\| \
<>	144:ef7eb2e8f9f7	549	((AF) == GPIO_AF15_EVENTOUT) \|\| ((AF) == GPIO_AF13_DCMI) \|\| \
<>	157:ff67d9f36b67	550	((AF) == GPIO_AF14_LTDC))
<>	144:ef7eb2e8f9f7	551	#elif defined(STM32F769xx) \|\| defined(STM32F779xx)
<>	144:ef7eb2e8f9f7	552	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
<>	144:ef7eb2e8f9f7	553	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
<>	144:ef7eb2e8f9f7	554	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
<>	144:ef7eb2e8f9f7	555	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
<>	144:ef7eb2e8f9f7	556	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
<>	144:ef7eb2e8f9f7	557	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
<>	144:ef7eb2e8f9f7	558	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
<>	144:ef7eb2e8f9f7	559	((AF) == GPIO_AF3_CEC) \|\| ((AF) == GPIO_AF4_CEC) \|\| \
<>	144:ef7eb2e8f9f7	560	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
<>	144:ef7eb2e8f9f7	561	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF4_I2C4) \|\| \
<>	144:ef7eb2e8f9f7	562	((AF) == GPIO_AF5_SPI1) \|\| ((AF) == GPIO_AF5_SPI2) \|\| \
<>	144:ef7eb2e8f9f7	563	((AF) == GPIO_AF5_SPI3) \|\| ((AF) == GPIO_AF5_SPI4) \|\| \
<>	144:ef7eb2e8f9f7	564	((AF) == GPIO_AF5_SPI5) \|\| ((AF) == GPIO_AF5_SPI6) \|\| \
<>	144:ef7eb2e8f9f7	565	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
<>	144:ef7eb2e8f9f7	566	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
<>	144:ef7eb2e8f9f7	567	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
<>	144:ef7eb2e8f9f7	568	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
<>	144:ef7eb2e8f9f7	569	((AF) == GPIO_AF7_SPDIFRX) \|\| ((AF) == GPIO_AF8_SPDIFRX) \|\| \
<>	144:ef7eb2e8f9f7	570	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
<>	144:ef7eb2e8f9f7	571	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
<>	144:ef7eb2e8f9f7	572	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
<>	144:ef7eb2e8f9f7	573	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_CAN2) \|\| \
<>	144:ef7eb2e8f9f7	574	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
<>	144:ef7eb2e8f9f7	575	((AF) == GPIO_AF9_TIM14) \|\| ((AF) == GPIO_AF9_QUADSPI) \|\| \
<>	144:ef7eb2e8f9f7	576	((AF) == GPIO_AF9_LTDC) \|\| ((AF) == GPIO_AF10_OTG_FS) \|\| \
<>	144:ef7eb2e8f9f7	577	((AF) == GPIO_AF10_OTG_HS) \|\| ((AF) == GPIO_AF10_SAI2) \|\| \
<>	144:ef7eb2e8f9f7	578	((AF) == GPIO_AF10_QUADSPI) \|\| ((AF) == GPIO_AF11_ETH) \|\| \
<>	157:ff67d9f36b67	579	((AF) == GPIO_AF10_SDMMC2) \|\| ((AF) == GPIO_AF11_SDMMC2) \|\| \
<>	144:ef7eb2e8f9f7	580	((AF) == GPIO_AF11_CAN3) \|\| ((AF) == GPIO_AF12_OTG_HS_FS) \|\| \
<>	144:ef7eb2e8f9f7	581	((AF) == GPIO_AF12_SDMMC1) \|\| ((AF) == GPIO_AF12_FMC) \|\| \
<>	144:ef7eb2e8f9f7	582	((AF) == GPIO_AF15_EVENTOUT) \|\| ((AF) == GPIO_AF13_DCMI) \|\| \
<>	144:ef7eb2e8f9f7	583	((AF) == GPIO_AF14_LTDC) \|\| ((AF) == GPIO_AF13_DSI))
<>	144:ef7eb2e8f9f7	584	#elif defined(STM32F765xx)
<>	144:ef7eb2e8f9f7	585	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
<>	144:ef7eb2e8f9f7	586	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
<>	144:ef7eb2e8f9f7	587	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
<>	144:ef7eb2e8f9f7	588	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
<>	144:ef7eb2e8f9f7	589	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
<>	144:ef7eb2e8f9f7	590	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
<>	144:ef7eb2e8f9f7	591	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
<>	144:ef7eb2e8f9f7	592	((AF) == GPIO_AF3_CEC) \|\| ((AF) == GPIO_AF4_CEC) \|\| \
<>	144:ef7eb2e8f9f7	593	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
<>	144:ef7eb2e8f9f7	594	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF4_I2C4) \|\| \
<>	144:ef7eb2e8f9f7	595	((AF) == GPIO_AF5_SPI1) \|\| ((AF) == GPIO_AF5_SPI2) \|\| \
<>	144:ef7eb2e8f9f7	596	((AF) == GPIO_AF5_SPI3) \|\| ((AF) == GPIO_AF5_SPI4) \|\| \
<>	144:ef7eb2e8f9f7	597	((AF) == GPIO_AF5_SPI5) \|\| ((AF) == GPIO_AF5_SPI6) \|\| \
<>	144:ef7eb2e8f9f7	598	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
<>	144:ef7eb2e8f9f7	599	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
<>	144:ef7eb2e8f9f7	600	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
<>	144:ef7eb2e8f9f7	601	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
<>	144:ef7eb2e8f9f7	602	((AF) == GPIO_AF7_SPDIFRX) \|\| ((AF) == GPIO_AF8_SPDIFRX) \|\| \
<>	144:ef7eb2e8f9f7	603	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
<>	144:ef7eb2e8f9f7	604	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
<>	144:ef7eb2e8f9f7	605	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
<>	144:ef7eb2e8f9f7	606	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_CAN2) \|\| \
<>	144:ef7eb2e8f9f7	607	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
<>	144:ef7eb2e8f9f7	608	((AF) == GPIO_AF9_TIM14) \|\| ((AF) == GPIO_AF9_QUADSPI) \|\| \
<>	144:ef7eb2e8f9f7	609	((AF) == GPIO_AF10_OTG_HS) \|\| ((AF) == GPIO_AF10_SAI2) \|\| \
<>	144:ef7eb2e8f9f7	610	((AF) == GPIO_AF10_QUADSPI) \|\| ((AF) == GPIO_AF11_ETH) \|\| \
<>	157:ff67d9f36b67	611	((AF) == GPIO_AF10_SDMMC2) \|\| ((AF) == GPIO_AF11_SDMMC2) \|\| \
<>	144:ef7eb2e8f9f7	612	((AF) == GPIO_AF11_CAN3) \|\| ((AF) == GPIO_AF12_OTG_HS_FS) \|\| \
<>	144:ef7eb2e8f9f7	613	((AF) == GPIO_AF12_SDMMC1) \|\| ((AF) == GPIO_AF12_FMC) \|\| \
<>	144:ef7eb2e8f9f7	614	((AF) == GPIO_AF15_EVENTOUT) \|\| ((AF) == GPIO_AF13_DCMI) \|\| \
<>	144:ef7eb2e8f9f7	615	((AF) == GPIO_AF10_OTG_FS))
<>	161:2cc1468da177	616	#elif defined (STM32F722xx) \|\| defined (STM32F723xx) \|\| defined (STM32F732xx) \|\| defined (STM32F733xx)
<>	161:2cc1468da177	617	#define IS_GPIO_AF(AF) (((AF) == GPIO_AF0_RTC_50Hz) \|\| ((AF) == GPIO_AF1_TIM1) \|\| \
<>	161:2cc1468da177	618	((AF) == GPIO_AF0_SWJ) \|\| ((AF) == GPIO_AF0_TRACE) \|\| \
<>	161:2cc1468da177	619	((AF) == GPIO_AF0_MCO) \|\| ((AF) == GPIO_AF1_TIM2) \|\| \
<>	161:2cc1468da177	620	((AF) == GPIO_AF2_TIM3) \|\| ((AF) == GPIO_AF2_TIM4) \|\| \
<>	161:2cc1468da177	621	((AF) == GPIO_AF2_TIM5) \|\| ((AF) == GPIO_AF3_TIM8) \|\| \
<>	161:2cc1468da177	622	((AF) == GPIO_AF3_TIM9) \|\| ((AF) == GPIO_AF3_TIM10) \|\| \
<>	161:2cc1468da177	623	((AF) == GPIO_AF3_TIM11) \|\| ((AF) == GPIO_AF3_LPTIM1) \|\| \
<>	161:2cc1468da177	624	((AF) == GPIO_AF4_I2C1) \|\| ((AF) == GPIO_AF4_I2C2) \|\| \
<>	161:2cc1468da177	625	((AF) == GPIO_AF4_I2C3) \|\| ((AF) == GPIO_AF5_SPI1) \|\| \
<>	161:2cc1468da177	626	((AF) == GPIO_AF5_SPI2) \|\| ((AF) == GPIO_AF5_SPI3) \|\| \
<>	161:2cc1468da177	627	((AF) == GPIO_AF5_SPI4) \|\| ((AF) == GPIO_AF5_SPI5) \|\| \
<>	161:2cc1468da177	628	((AF) == GPIO_AF6_SPI3) \|\| ((AF) == GPIO_AF6_SAI1) \|\| \
<>	161:2cc1468da177	629	((AF) == GPIO_AF7_SPI3) \|\| ((AF) == GPIO_AF7_SPI2) \|\| \
<>	161:2cc1468da177	630	((AF) == GPIO_AF7_USART1) \|\| ((AF) == GPIO_AF7_USART2) \|\| \
<>	161:2cc1468da177	631	((AF) == GPIO_AF7_USART3) \|\| ((AF) == GPIO_AF7_UART5) \|\| \
<>	161:2cc1468da177	632	((AF) == GPIO_AF8_SAI2) \|\| ((AF) == GPIO_AF8_USART6) \|\| \
<>	161:2cc1468da177	633	((AF) == GPIO_AF8_UART4) \|\| ((AF) == GPIO_AF8_UART5) \|\| \
<>	161:2cc1468da177	634	((AF) == GPIO_AF8_UART7) \|\| ((AF) == GPIO_AF8_UART8) \|\| \
<>	161:2cc1468da177	635	((AF) == GPIO_AF9_CAN1) \|\| ((AF) == GPIO_AF9_TIM12) \|\| \
<>	161:2cc1468da177	636	((AF) == GPIO_AF9_TIM12) \|\| ((AF) == GPIO_AF9_TIM14) \|\| \
<>	161:2cc1468da177	637	((AF) == GPIO_AF9_QUADSPI) \|\| ((AF) == GPIO_AF10_OTG_HS) \|\| \
<>	161:2cc1468da177	638	((AF) == GPIO_AF10_SAI2) \|\| ((AF) == GPIO_AF10_QUADSPI) \|\| \
<>	161:2cc1468da177	639	((AF) == GPIO_AF10_SDMMC2) \|\| ((AF) == GPIO_AF11_SDMMC2) \|\| \
<>	161:2cc1468da177	640	((AF) == GPIO_AF12_OTG_HS_FS) \|\| ((AF) == GPIO_AF12_SDMMC1) \|\| \
<>	161:2cc1468da177	641	((AF) == GPIO_AF12_FMC) \|\| ((AF) == GPIO_AF15_EVENTOUT) \|\| \
<>	161:2cc1468da177	642	((AF) == GPIO_AF10_OTG_FS))
<>	144:ef7eb2e8f9f7	643	#endif /* STM32F756xx \|\| STM32F746xx */
<>	144:ef7eb2e8f9f7	644	/**
<>	144:ef7eb2e8f9f7	645	* @}
<>	144:ef7eb2e8f9f7	646	*/
<>	144:ef7eb2e8f9f7	647
<>	144:ef7eb2e8f9f7	648	/**
<>	144:ef7eb2e8f9f7	649	* @}
<>	144:ef7eb2e8f9f7	650	*/
<>	144:ef7eb2e8f9f7	651
<>	144:ef7eb2e8f9f7	652	/* Private functions ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	653	/** @defgroup GPIOEx_Private_Functions GPIO Private Functions
<>	144:ef7eb2e8f9f7	654	* @{
<>	144:ef7eb2e8f9f7	655	*/
<>	144:ef7eb2e8f9f7	656
<>	144:ef7eb2e8f9f7	657	/**
<>	144:ef7eb2e8f9f7	658	* @}
<>	144:ef7eb2e8f9f7	659	*/
<>	144:ef7eb2e8f9f7	660
<>	144:ef7eb2e8f9f7	661	/**
<>	144:ef7eb2e8f9f7	662	* @}
<>	144:ef7eb2e8f9f7	663	*/
<>	144:ef7eb2e8f9f7	664
<>	144:ef7eb2e8f9f7	665	/**
<>	144:ef7eb2e8f9f7	666	* @}
<>	144:ef7eb2e8f9f7	667	*/
<>	144:ef7eb2e8f9f7	668
<>	144:ef7eb2e8f9f7	669	#ifdef __cplusplus
<>	144:ef7eb2e8f9f7	670	}
<>	144:ef7eb2e8f9f7	671	#endif
<>	144:ef7eb2e8f9f7	672
<>	144:ef7eb2e8f9f7	673	#endif /* __STM32F7xx_HAL_GPIO_EX_H */
<>	144:ef7eb2e8f9f7	674
<>	144:ef7eb2e8f9f7	675	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/