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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_adc_ex.h@165:e614a9f1c9e2, 2017-05-26 (annotated)

Committer:
AnnaBridge
Date:
Fri May 26 12:39:01 2017 +0100
Revision:
165:e614a9f1c9e2
Parent:
161:2cc1468da177
Child:
168:9672193075cf
This updates the lib to the mbed lib v 143

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f7xx_hal_adc.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 161:2cc1468da177 5 * @version V1.2.0
<> 161:2cc1468da177 6 * @date 30-December-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of ADC HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F7xx_ADC_EX_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F7xx_ADC_EX_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f7xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F7xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup ADCEx
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup ADCEx_Exported_Types ADC Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief ADC Configuration injected Channel structure definition
<> 144:ef7eb2e8f9f7 64 * @note Parameters of this structure are shared within 2 scopes:
<> 144:ef7eb2e8f9f7 65 * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset
<> 144:ef7eb2e8f9f7 66 * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode,
<> 144:ef7eb2e8f9f7 67 * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv.
<> 144:ef7eb2e8f9f7 68 * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state.
<> 144:ef7eb2e8f9f7 69 * ADC state can be either:
<> 144:ef7eb2e8f9f7 70 * - For all parameters: ADC disabled
<> 144:ef7eb2e8f9f7 71 * - For all except parameters 'InjectedDiscontinuousConvMode' and 'AutoInjectedConv': ADC enabled without conversion on going on injected group.
<> 144:ef7eb2e8f9f7 72 * - For parameters 'ExternalTrigInjecConv' and 'ExternalTrigInjecConvEdge': ADC enabled, even with conversion on going on injected group.
<> 144:ef7eb2e8f9f7 73 */
<> 144:ef7eb2e8f9f7 74 typedef struct
<> 144:ef7eb2e8f9f7 75 {
<> 144:ef7eb2e8f9f7 76 uint32_t InjectedChannel; /*!< Selection of ADC channel to configure
<> 144:ef7eb2e8f9f7 77 This parameter can be a value of @ref ADC_channels
<> 144:ef7eb2e8f9f7 78 Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */
<> 144:ef7eb2e8f9f7 79 uint32_t InjectedRank; /*!< Rank in the injected group sequencer
<> 144:ef7eb2e8f9f7 80 This parameter must be a value of @ref ADCEx_injected_rank
<> 144:ef7eb2e8f9f7 81 Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
<> 144:ef7eb2e8f9f7 82 uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel.
<> 144:ef7eb2e8f9f7 83 Unit: ADC clock cycles
<> 144:ef7eb2e8f9f7 84 Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits).
<> 144:ef7eb2e8f9f7 85 This parameter can be a value of @ref ADC_sampling_times
<> 144:ef7eb2e8f9f7 86 Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
<> 144:ef7eb2e8f9f7 87 If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
<> 144:ef7eb2e8f9f7 88 Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
<> 144:ef7eb2e8f9f7 89 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
<> 144:ef7eb2e8f9f7 90 Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */
<> 144:ef7eb2e8f9f7 91 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only).
<> 144:ef7eb2e8f9f7 92 Offset value must be a positive number.
<> 144:ef7eb2e8f9f7 93 Depending of ADC resolution selected (12, 10, 8 or 6 bits),
<> 144:ef7eb2e8f9f7 94 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */
<> 144:ef7eb2e8f9f7 95 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer.
<> 144:ef7eb2e8f9f7 96 To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
<> 144:ef7eb2e8f9f7 97 This parameter must be a number between Min_Data = 1 and Max_Data = 4.
<> 144:ef7eb2e8f9f7 98 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
<> 144:ef7eb2e8f9f7 99 configure a channel on injected group can impact the configuration of other channels previously set. */
<> 144:ef7eb2e8f9f7 100 uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
<> 144:ef7eb2e8f9f7 101 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
<> 144:ef7eb2e8f9f7 102 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
<> 144:ef7eb2e8f9f7 103 This parameter can be set to ENABLE or DISABLE.
<> 144:ef7eb2e8f9f7 104 Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one.
<> 144:ef7eb2e8f9f7 105 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
<> 144:ef7eb2e8f9f7 106 configure a channel on injected group can impact the configuration of other channels previously set. */
<> 144:ef7eb2e8f9f7 107 uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one
<> 144:ef7eb2e8f9f7 108 This parameter can be set to ENABLE or DISABLE.
<> 144:ef7eb2e8f9f7 109 Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE)
<> 144:ef7eb2e8f9f7 110 Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START)
<> 144:ef7eb2e8f9f7 111 Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete.
<> 144:ef7eb2e8f9f7 112 To maintain JAUTO always enabled, DMA must be configured in circular mode.
<> 144:ef7eb2e8f9f7 113 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
<> 144:ef7eb2e8f9f7 114 configure a channel on injected group can impact the configuration of other channels previously set. */
<> 144:ef7eb2e8f9f7 115 uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group.
<> 144:ef7eb2e8f9f7 116 If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled.
<> 144:ef7eb2e8f9f7 117 If set to external trigger source, triggering is on event rising edge.
<> 144:ef7eb2e8f9f7 118 This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected
<> 144:ef7eb2e8f9f7 119 Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion).
<> 144:ef7eb2e8f9f7 120 If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly)
<> 144:ef7eb2e8f9f7 121 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
<> 144:ef7eb2e8f9f7 122 configure a channel on injected group can impact the configuration of other channels previously set. */
<> 144:ef7eb2e8f9f7 123 uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group.
<> 144:ef7eb2e8f9f7 124 This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected.
<> 144:ef7eb2e8f9f7 125 If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded.
<> 144:ef7eb2e8f9f7 126 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to
<> 144:ef7eb2e8f9f7 127 configure a channel on injected group can impact the configuration of other channels previously set. */
<> 144:ef7eb2e8f9f7 128 }ADC_InjectionConfTypeDef;
<> 144:ef7eb2e8f9f7 129 /**
<> 144:ef7eb2e8f9f7 130 * @}
<> 144:ef7eb2e8f9f7 131 */
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 /**
<> 144:ef7eb2e8f9f7 134 * @brief ADC Configuration multi-mode structure definition
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136 typedef struct
<> 144:ef7eb2e8f9f7 137 {
<> 144:ef7eb2e8f9f7 138 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
<> 144:ef7eb2e8f9f7 139 This parameter can be a value of @ref ADCEx_Common_mode */
<> 144:ef7eb2e8f9f7 140 uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
<> 144:ef7eb2e8f9f7 141 This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
<> 144:ef7eb2e8f9f7 142 uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
<> 144:ef7eb2e8f9f7 143 This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
<> 144:ef7eb2e8f9f7 144 }ADC_MultiModeTypeDef;
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146 /**
<> 144:ef7eb2e8f9f7 147 * @}
<> 144:ef7eb2e8f9f7 148 */
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 151 /** @defgroup ADCEx_Exported_Constants ADC Exported Constants
<> 144:ef7eb2e8f9f7 152 * @{
<> 144:ef7eb2e8f9f7 153 */
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /** @defgroup ADCEx_Common_mode ADC Common Mode
<> 144:ef7eb2e8f9f7 156 * @{
<> 144:ef7eb2e8f9f7 157 */
<> 144:ef7eb2e8f9f7 158 #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 159 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
<> 144:ef7eb2e8f9f7 160 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
<> 144:ef7eb2e8f9f7 161 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
<> 144:ef7eb2e8f9f7 162 #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
<> 144:ef7eb2e8f9f7 163 #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
<> 144:ef7eb2e8f9f7 164 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
<> 144:ef7eb2e8f9f7 165 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
<> 144:ef7eb2e8f9f7 166 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
<> 144:ef7eb2e8f9f7 167 #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
<> 144:ef7eb2e8f9f7 168 #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
<> 144:ef7eb2e8f9f7 169 #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
<> 144:ef7eb2e8f9f7 170 #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
<> 144:ef7eb2e8f9f7 171 /**
<> 144:ef7eb2e8f9f7 172 * @}
<> 144:ef7eb2e8f9f7 173 */
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode
<> 144:ef7eb2e8f9f7 176 * @{
<> 144:ef7eb2e8f9f7 177 */
<> 144:ef7eb2e8f9f7 178 #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000U) /*!< DMA mode disabled */
<> 144:ef7eb2e8f9f7 179 #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
<> 144:ef7eb2e8f9f7 180 #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
<> 144:ef7eb2e8f9f7 181 #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
<> 144:ef7eb2e8f9f7 182 /**
<> 144:ef7eb2e8f9f7 183 * @}
<> 144:ef7eb2e8f9f7 184 */
<> 144:ef7eb2e8f9f7 185
<> 144:ef7eb2e8f9f7 186 /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected
<> 144:ef7eb2e8f9f7 187 * @{
<> 144:ef7eb2e8f9f7 188 */
<> 144:ef7eb2e8f9f7 189 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 190 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
<> 144:ef7eb2e8f9f7 191 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
<> 144:ef7eb2e8f9f7 192 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
<> 144:ef7eb2e8f9f7 193 /**
<> 144:ef7eb2e8f9f7 194 * @}
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected
<> 144:ef7eb2e8f9f7 198 * @{
<> 144:ef7eb2e8f9f7 199 */
<> 144:ef7eb2e8f9f7 200 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 201 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)ADC_CR2_JEXTSEL_0)
<> 144:ef7eb2e8f9f7 202 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)ADC_CR2_JEXTSEL_1)
<> 144:ef7eb2e8f9f7 203 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
<> 144:ef7eb2e8f9f7 204 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)ADC_CR2_JEXTSEL_2)
<> 144:ef7eb2e8f9f7 205 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
<> 144:ef7eb2e8f9f7 208 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO2 ((uint32_t)ADC_CR2_JEXTSEL_3)
<> 144:ef7eb2e8f9f7 209 #define ADC_EXTERNALTRIGINJECCONV_T8_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
<> 144:ef7eb2e8f9f7 210 #define ADC_EXTERNALTRIGINJECCONV_T8_TRGO2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
<> 144:ef7eb2e8f9f7 211 #define ADC_EXTERNALTRIGINJECCONV_T3_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
<> 144:ef7eb2e8f9f7 212 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
<> 144:ef7eb2e8f9f7 213 #define ADC_EXTERNALTRIGINJECCONV_T3_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
<> 144:ef7eb2e8f9f7 214 #define ADC_EXTERNALTRIGINJECCONV_T6_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
<> 144:ef7eb2e8f9f7 215 #define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1)
<> 144:ef7eb2e8f9f7 216 /**
<> 144:ef7eb2e8f9f7 217 * @}
<> 144:ef7eb2e8f9f7 218 */
<> 144:ef7eb2e8f9f7 219
<> 161:2cc1468da177 220 /** @defgroup ADCEx_injected_rank ADC Injected Channel Rank
<> 144:ef7eb2e8f9f7 221 * @{
<> 144:ef7eb2e8f9f7 222 */
<> 144:ef7eb2e8f9f7 223 #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001U)
<> 144:ef7eb2e8f9f7 224 #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002U)
<> 144:ef7eb2e8f9f7 225 #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003U)
<> 144:ef7eb2e8f9f7 226 #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004U)
<> 144:ef7eb2e8f9f7 227 /**
<> 144:ef7eb2e8f9f7 228 * @}
<> 144:ef7eb2e8f9f7 229 */
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 /** @defgroup ADCEx_channels ADC Specific Channels
<> 144:ef7eb2e8f9f7 232 * @{
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | 0x10000000U)
<> 144:ef7eb2e8f9f7 235 /**
<> 144:ef7eb2e8f9f7 236 * @}
<> 144:ef7eb2e8f9f7 237 */
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /**
<> 144:ef7eb2e8f9f7 240 * @}
<> 144:ef7eb2e8f9f7 241 */
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 244 /** @defgroup ADC_Exported_Macros ADC Exported Macros
<> 144:ef7eb2e8f9f7 245 * @{
<> 144:ef7eb2e8f9f7 246 */
<> 144:ef7eb2e8f9f7 247 /**
<> 144:ef7eb2e8f9f7 248 * @}
<> 144:ef7eb2e8f9f7 249 */
<> 144:ef7eb2e8f9f7 250
<> 144:ef7eb2e8f9f7 251 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 252 /** @addtogroup ADCEx_Exported_Functions
<> 144:ef7eb2e8f9f7 253 * @{
<> 144:ef7eb2e8f9f7 254 */
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /** @addtogroup ADCEx_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 257 * @{
<> 144:ef7eb2e8f9f7 258 */
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 /* I/O operation functions ******************************************************/
<> 144:ef7eb2e8f9f7 261 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
<> 144:ef7eb2e8f9f7 262 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
<> 144:ef7eb2e8f9f7 263 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 264 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
<> 144:ef7eb2e8f9f7 265 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
<> 144:ef7eb2e8f9f7 266 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
<> 144:ef7eb2e8f9f7 267 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
<> 144:ef7eb2e8f9f7 268 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
<> 144:ef7eb2e8f9f7 269 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
<> 144:ef7eb2e8f9f7 270 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 /* Peripheral Control functions *************************************************/
<> 144:ef7eb2e8f9f7 273 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
<> 144:ef7eb2e8f9f7 274 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 /**
<> 144:ef7eb2e8f9f7 277 * @}
<> 144:ef7eb2e8f9f7 278 */
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /**
<> 144:ef7eb2e8f9f7 281 * @}
<> 144:ef7eb2e8f9f7 282 */
<> 144:ef7eb2e8f9f7 283 /* Private types -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 284 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 285 /* Private constants ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 286 /** @defgroup ADCEx_Private_Constants ADC Private Constants
<> 144:ef7eb2e8f9f7 287 * @{
<> 144:ef7eb2e8f9f7 288 */
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290 /**
<> 144:ef7eb2e8f9f7 291 * @}
<> 144:ef7eb2e8f9f7 292 */
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 295 /** @defgroup ADCEx_Private_Macros ADC Private Macros
<> 144:ef7eb2e8f9f7 296 * @{
<> 144:ef7eb2e8f9f7 297 */
<> 144:ef7eb2e8f9f7 298 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \
<> 144:ef7eb2e8f9f7 299 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR))
<> 144:ef7eb2e8f9f7 300
<> 144:ef7eb2e8f9f7 301 #define IS_ADC_MODE(__MODE__) (((__MODE__) == ADC_MODE_INDEPENDENT) || \
<> 144:ef7eb2e8f9f7 302 ((__MODE__) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
<> 144:ef7eb2e8f9f7 303 ((__MODE__) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
<> 144:ef7eb2e8f9f7 304 ((__MODE__) == ADC_DUALMODE_INJECSIMULT) || \
<> 144:ef7eb2e8f9f7 305 ((__MODE__) == ADC_DUALMODE_REGSIMULT) || \
<> 144:ef7eb2e8f9f7 306 ((__MODE__) == ADC_DUALMODE_INTERL) || \
<> 144:ef7eb2e8f9f7 307 ((__MODE__) == ADC_DUALMODE_ALTERTRIG) || \
<> 144:ef7eb2e8f9f7 308 ((__MODE__) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
<> 144:ef7eb2e8f9f7 309 ((__MODE__) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
<> 144:ef7eb2e8f9f7 310 ((__MODE__) == ADC_TRIPLEMODE_INJECSIMULT) || \
<> 144:ef7eb2e8f9f7 311 ((__MODE__) == ADC_TRIPLEMODE_REGSIMULT) || \
<> 144:ef7eb2e8f9f7 312 ((__MODE__) == ADC_TRIPLEMODE_INTERL) || \
<> 144:ef7eb2e8f9f7 313 ((__MODE__) == ADC_TRIPLEMODE_ALTERTRIG))
<> 144:ef7eb2e8f9f7 314 #define IS_ADC_DMA_ACCESS_MODE(__MODE__) (((__MODE__) == ADC_DMAACCESSMODE_DISABLED) || \
<> 144:ef7eb2e8f9f7 315 ((__MODE__) == ADC_DMAACCESSMODE_1) || \
<> 144:ef7eb2e8f9f7 316 ((__MODE__) == ADC_DMAACCESSMODE_2) || \
<> 144:ef7eb2e8f9f7 317 ((__MODE__) == ADC_DMAACCESSMODE_3))
<> 144:ef7eb2e8f9f7 318 #define IS_ADC_EXT_INJEC_TRIG_EDGE(__EDGE__) (((__EDGE__) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
<> 144:ef7eb2e8f9f7 319 ((__EDGE__) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
<> 144:ef7eb2e8f9f7 320 ((__EDGE__) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
<> 144:ef7eb2e8f9f7 321 ((__EDGE__) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
<> 144:ef7eb2e8f9f7 322 #define IS_ADC_EXT_INJEC_TRIG(__INJTRIG__) (((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
<> 144:ef7eb2e8f9f7 323 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
<> 144:ef7eb2e8f9f7 324 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
<> 144:ef7eb2e8f9f7 325 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
<> 144:ef7eb2e8f9f7 326 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
<> 144:ef7eb2e8f9f7 327 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
<> 144:ef7eb2e8f9f7 328 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
<> 144:ef7eb2e8f9f7 329 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO2) || \
<> 144:ef7eb2e8f9f7 330 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T8_TRGO) || \
<> 144:ef7eb2e8f9f7 331 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T8_TRGO2) || \
<> 144:ef7eb2e8f9f7 332 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T3_CC3) || \
<> 144:ef7eb2e8f9f7 333 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
<> 144:ef7eb2e8f9f7 334 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T3_CC1) || \
<> 144:ef7eb2e8f9f7 335 ((__INJTRIG__) == ADC_EXTERNALTRIGINJECCONV_T6_TRGO) || \
<> 161:2cc1468da177 336 ((__INJTRIG__) == ADC_INJECTED_SOFTWARE_START))
<> 161:2cc1468da177 337 #define IS_ADC_INJECTED_RANK(__RANK__) (((__RANK__) == ADC_INJECTED_RANK_1) || \
<> 161:2cc1468da177 338 ((__RANK__) == ADC_INJECTED_RANK_2) || \
<> 161:2cc1468da177 339 ((__RANK__) == ADC_INJECTED_RANK_3) || \
<> 161:2cc1468da177 340 ((__RANK__) == ADC_INJECTED_RANK_4))
<> 144:ef7eb2e8f9f7 341 #define IS_ADC_INJECTED_LENGTH(__LENGTH__) (((__LENGTH__) >= ((uint32_t)1)) && ((__LENGTH__) <= ((uint32_t)4)))
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 /**
<> 144:ef7eb2e8f9f7 344 * @brief Set the selected injected Channel rank.
<> 144:ef7eb2e8f9f7 345 * @param _CHANNELNB_: Channel number.
<> 144:ef7eb2e8f9f7 346 * @param _RANKNB_: Rank number.
<> 144:ef7eb2e8f9f7 347 * @param _JSQR_JL_: Sequence length.
<> 144:ef7eb2e8f9f7 348 * @retval None
<> 144:ef7eb2e8f9f7 349 */
<> 144:ef7eb2e8f9f7 350 #define ADC_JSQR(_CHANNELNB_, _RANKNB_,_JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))
<> 144:ef7eb2e8f9f7 351 /**
<> 144:ef7eb2e8f9f7 352 * @}
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 356 /** @defgroup ADCEx_Private_Functions ADC Private Functions
<> 144:ef7eb2e8f9f7 357 * @{
<> 144:ef7eb2e8f9f7 358 */
<> 144:ef7eb2e8f9f7 359
<> 144:ef7eb2e8f9f7 360 /**
<> 144:ef7eb2e8f9f7 361 * @}
<> 144:ef7eb2e8f9f7 362 */
<> 144:ef7eb2e8f9f7 363
<> 144:ef7eb2e8f9f7 364 /**
<> 144:ef7eb2e8f9f7 365 * @}
<> 144:ef7eb2e8f9f7 366 */
<> 144:ef7eb2e8f9f7 367
<> 144:ef7eb2e8f9f7 368 /**
<> 144:ef7eb2e8f9f7 369 * @}
<> 144:ef7eb2e8f9f7 370 */
<> 144:ef7eb2e8f9f7 371
<> 144:ef7eb2e8f9f7 372 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 373 }
<> 144:ef7eb2e8f9f7 374 #endif
<> 144:ef7eb2e8f9f7 375
<> 144:ef7eb2e8f9f7 376 #endif /*__STM32F7xx_ADC_EX_H */
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378
<> 144:ef7eb2e8f9f7 379 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/