mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/cmsis/TARGET_NXP/TARGET_LPC13XX/cmsis_nvic.c@41:dfc7461ac1b6, 2015-12-30 (annotated)

Committer:
mbed_official
Date:
Wed Dec 30 20:00:09 2015 +0000
Revision:
41:dfc7461ac1b6
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 47ed325497da40955623b19a5f04cb91342f0544



Full URL: https://github.com/mbedmicro/mbed/commit/47ed325497da40955623b19a5f04cb91342f0544/



[MTS_DRAGONFLY_F411RE] Dragonfly pin updates

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * CMSIS-style functionality to support dynamic vectors
bogdanm 0:9b334a45a8ff 3 *******************************************************************************
bogdanm 0:9b334a45a8ff 4 * Copyright (c) 2011 ARM Limited. All rights reserved.
bogdanm 0:9b334a45a8ff 5 * All rights reserved.
bogdanm 0:9b334a45a8ff 6 *
bogdanm 0:9b334a45a8ff 7 * Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 8 * modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 11 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 12 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 13 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 14 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 15 * 3. Neither the name of ARM Limited nor the names of its contributors
bogdanm 0:9b334a45a8ff 16 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 17 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 18 *
bogdanm 0:9b334a45a8ff 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 26 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 29 *******************************************************************************
bogdanm 0:9b334a45a8ff 30 */
bogdanm 0:9b334a45a8ff 31 #include "cmsis_nvic.h"
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 #define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Location of vectors in RAM
bogdanm 0:9b334a45a8ff 34 #define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
bogdanm 0:9b334a45a8ff 37 uint32_t *vectors = (uint32_t*)SCB->VTOR;
bogdanm 0:9b334a45a8ff 38 uint32_t i;
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 // Copy and switch to dynamic vectors if the first time called
bogdanm 0:9b334a45a8ff 41 if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
bogdanm 0:9b334a45a8ff 42 uint32_t *old_vectors = vectors;
bogdanm 0:9b334a45a8ff 43 vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
bogdanm 0:9b334a45a8ff 44 for (i=0; i<NVIC_NUM_VECTORS; i++) {
bogdanm 0:9b334a45a8ff 45 vectors[i] = old_vectors[i];
bogdanm 0:9b334a45a8ff 46 }
bogdanm 0:9b334a45a8ff 47 SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
bogdanm 0:9b334a45a8ff 48 }
bogdanm 0:9b334a45a8ff 49 vectors[IRQn + 16] = vector;
bogdanm 0:9b334a45a8ff 50 }
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 uint32_t NVIC_GetVector(IRQn_Type IRQn) {
bogdanm 0:9b334a45a8ff 53 uint32_t *vectors = (uint32_t*)SCB->VTOR;
bogdanm 0:9b334a45a8ff 54 return vectors[IRQn + 16];
bogdanm 0:9b334a45a8ff 55 }
bogdanm 0:9b334a45a8ff 56