mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_GCC_ARM/startup_stm32f769xx.s@158:b23ee177fd68, 2017-02-14 (annotated)

Committer:
Kojto
Date:
Tue Feb 14 14:44:10 2017 +0000
Revision:
158:b23ee177fd68
Parent:
targets/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F767ZI/device/TOOLCHAIN_GCC_ARM/startup_stm32f769xx.s@150:02e0a0aed4ec 
This updates the lib to the mbed lib v136

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 147:30b64687e01f 1 /**
<> 147:30b64687e01f 2 ******************************************************************************
<> 147:30b64687e01f 3 * @file startup_stm32f769xx.s
<> 147:30b64687e01f 4 * @author MCD Application Team
<> 147:30b64687e01f 5 * @version V1.1.0
<> 147:30b64687e01f 6 * @date 22-April-2016
<> 147:30b64687e01f 7 * @brief STM32F769xx Devices vector table for GCC based toolchain.
<> 147:30b64687e01f 8 * This module performs:
<> 147:30b64687e01f 9 * - Set the initial SP
<> 147:30b64687e01f 10 * - Set the initial PC == Reset_Handler,
<> 147:30b64687e01f 11 * - Set the vector table entries with the exceptions ISR address
<> 147:30b64687e01f 12 * - Branches to main in the C library (which eventually
<> 147:30b64687e01f 13 * calls main()).
<> 147:30b64687e01f 14 * After Reset the Cortex-M7 processor is in Thread mode,
<> 147:30b64687e01f 15 * priority is Privileged, and the Stack is set to Main.
<> 147:30b64687e01f 16 ******************************************************************************
<> 147:30b64687e01f 17 * @attention
<> 147:30b64687e01f 18 *
<> 147:30b64687e01f 19 * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
<> 147:30b64687e01f 20 *
<> 147:30b64687e01f 21 * Redistribution and use in source and binary forms, with or without modification,
<> 147:30b64687e01f 22 * are permitted provided that the following conditions are met:
<> 147:30b64687e01f 23 * 1. Redistributions of source code must retain the above copyright notice,
<> 147:30b64687e01f 24 * this list of conditions and the following disclaimer.
<> 147:30b64687e01f 25 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 147:30b64687e01f 26 * this list of conditions and the following disclaimer in the documentation
<> 147:30b64687e01f 27 * and/or other materials provided with the distribution.
<> 147:30b64687e01f 28 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 147:30b64687e01f 29 * may be used to endorse or promote products derived from this software
<> 147:30b64687e01f 30 * without specific prior written permission.
<> 147:30b64687e01f 31 *
<> 147:30b64687e01f 32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 147:30b64687e01f 33 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 147:30b64687e01f 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 147:30b64687e01f 35 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 147:30b64687e01f 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 147:30b64687e01f 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 147:30b64687e01f 38 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 147:30b64687e01f 39 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 147:30b64687e01f 40 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 147:30b64687e01f 41 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 147:30b64687e01f 42 *
<> 147:30b64687e01f 43 ******************************************************************************
<> 147:30b64687e01f 44 */
<> 147:30b64687e01f 45
<> 147:30b64687e01f 46 .syntax unified
<> 147:30b64687e01f 47 .cpu cortex-m7
<> 147:30b64687e01f 48 .fpu softvfp
<> 147:30b64687e01f 49 .thumb
<> 147:30b64687e01f 50
<> 147:30b64687e01f 51 .global g_pfnVectors
<> 147:30b64687e01f 52 .global Default_Handler
<> 147:30b64687e01f 53
<> 147:30b64687e01f 54 /* start address for the initialization values of the .data section.
<> 147:30b64687e01f 55 defined in linker script */
<> 147:30b64687e01f 56 .word _sidata
<> 147:30b64687e01f 57 /* start address for the .data section. defined in linker script */
<> 147:30b64687e01f 58 .word _sdata
<> 147:30b64687e01f 59 /* end address for the .data section. defined in linker script */
<> 147:30b64687e01f 60 .word _edata
<> 147:30b64687e01f 61 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
<> 147:30b64687e01f 62
<> 147:30b64687e01f 63 /**
<> 147:30b64687e01f 64 * @brief This is the code that gets called when the processor first
<> 147:30b64687e01f 65 * starts execution following a reset event. Only the absolutely
<> 147:30b64687e01f 66 * necessary set is performed, after which the application
<> 147:30b64687e01f 67 * supplied main() routine is called.
<> 147:30b64687e01f 68 * @param None
<> 147:30b64687e01f 69 * @retval : None
<> 147:30b64687e01f 70 */
<> 147:30b64687e01f 71
<> 147:30b64687e01f 72 .section .text.Reset_Handler
<> 147:30b64687e01f 73 .weak Reset_Handler
<> 147:30b64687e01f 74 .type Reset_Handler, %function
<> 147:30b64687e01f 75 Reset_Handler:
<> 147:30b64687e01f 76 ldr sp, =_estack /* set stack pointer */
<> 147:30b64687e01f 77
<> 147:30b64687e01f 78 /* Copy the data segment initializers from flash to SRAM */
<> 147:30b64687e01f 79 movs r1, #0
<> 147:30b64687e01f 80 b LoopCopyDataInit
<> 147:30b64687e01f 81
<> 147:30b64687e01f 82 CopyDataInit:
<> 147:30b64687e01f 83 ldr r3, =_sidata
<> 147:30b64687e01f 84 ldr r3, [r3, r1]
<> 147:30b64687e01f 85 str r3, [r0, r1]
<> 147:30b64687e01f 86 adds r1, r1, #4
<> 147:30b64687e01f 87
<> 147:30b64687e01f 88 LoopCopyDataInit:
<> 147:30b64687e01f 89 ldr r0, =_sdata
<> 147:30b64687e01f 90 ldr r3, =_edata
<> 147:30b64687e01f 91 adds r2, r0, r1
<> 147:30b64687e01f 92 cmp r2, r3
<> 147:30b64687e01f 93 bcc CopyDataInit
<> 147:30b64687e01f 94
<> 147:30b64687e01f 95 /* Call the clock system initialization function.*/
<> 147:30b64687e01f 96 bl SystemInit
<> 147:30b64687e01f 97 /* Call static constructors */
<> 147:30b64687e01f 98 //bl __libc_init_array
<> 147:30b64687e01f 99 /* Call the application's entry point.*/
<> 147:30b64687e01f 100 //bl main
<> 147:30b64687e01f 101 // Calling the crt0 'cold-start' entry point. There __libc_init_array is called
<> 147:30b64687e01f 102 // and when existing hardware_init_hook() and software_init_hook() before
<> 147:30b64687e01f 103 // starting main(). software_init_hook() is available and has to be called due
<> 147:30b64687e01f 104 // to initializsation when using rtos.
<> 147:30b64687e01f 105 bl _start
<> 147:30b64687e01f 106 bx lr
<> 147:30b64687e01f 107 .size Reset_Handler, .-Reset_Handler
<> 147:30b64687e01f 108
<> 147:30b64687e01f 109 /**
<> 147:30b64687e01f 110 * @brief This is the code that gets called when the processor receives an
<> 147:30b64687e01f 111 * unexpected interrupt. This simply enters an infinite loop, preserving
<> 147:30b64687e01f 112 * the system state for examination by a debugger.
<> 147:30b64687e01f 113 * @param None
<> 147:30b64687e01f 114 * @retval None
<> 147:30b64687e01f 115 */
<> 147:30b64687e01f 116 .section .text.Default_Handler,"ax",%progbits
<> 147:30b64687e01f 117 Default_Handler:
<> 147:30b64687e01f 118 Infinite_Loop:
<> 147:30b64687e01f 119 b Infinite_Loop
<> 147:30b64687e01f 120 .size Default_Handler, .-Default_Handler
<> 147:30b64687e01f 121 /******************************************************************************
<> 147:30b64687e01f 122 *
<> 147:30b64687e01f 123 * The minimal vector table for a Cortex M7. Note that the proper constructs
<> 147:30b64687e01f 124 * must be placed on this to ensure that it ends up at physical address
<> 147:30b64687e01f 125 * 0x0000.0000.
<> 147:30b64687e01f 126 *
<> 147:30b64687e01f 127 *******************************************************************************/
<> 147:30b64687e01f 128 .section .isr_vector,"a",%progbits
<> 147:30b64687e01f 129 .type g_pfnVectors, %object
<> 147:30b64687e01f 130 .size g_pfnVectors, .-g_pfnVectors
<> 147:30b64687e01f 131
<> 147:30b64687e01f 132
<> 147:30b64687e01f 133 g_pfnVectors:
<> 147:30b64687e01f 134 .word _estack
<> 147:30b64687e01f 135 .word Reset_Handler
<> 147:30b64687e01f 136
<> 147:30b64687e01f 137 .word NMI_Handler
<> 147:30b64687e01f 138 .word HardFault_Handler
<> 147:30b64687e01f 139 .word MemManage_Handler
<> 147:30b64687e01f 140 .word BusFault_Handler
<> 147:30b64687e01f 141 .word UsageFault_Handler
<> 147:30b64687e01f 142 .word 0
<> 147:30b64687e01f 143 .word 0
<> 147:30b64687e01f 144 .word 0
<> 147:30b64687e01f 145 .word 0
<> 147:30b64687e01f 146 .word SVC_Handler
<> 147:30b64687e01f 147 .word DebugMon_Handler
<> 147:30b64687e01f 148 .word 0
<> 147:30b64687e01f 149 .word PendSV_Handler
<> 147:30b64687e01f 150 .word SysTick_Handler
<> 147:30b64687e01f 151
<> 147:30b64687e01f 152 /* External Interrupts */
<> 147:30b64687e01f 153 .word WWDG_IRQHandler /* Window WatchDog */
<> 147:30b64687e01f 154 .word PVD_IRQHandler /* PVD through EXTI Line detection */
<> 147:30b64687e01f 155 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
<> 147:30b64687e01f 156 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
<> 147:30b64687e01f 157 .word FLASH_IRQHandler /* FLASH */
<> 147:30b64687e01f 158 .word RCC_IRQHandler /* RCC */
<> 147:30b64687e01f 159 .word EXTI0_IRQHandler /* EXTI Line0 */
<> 147:30b64687e01f 160 .word EXTI1_IRQHandler /* EXTI Line1 */
<> 147:30b64687e01f 161 .word EXTI2_IRQHandler /* EXTI Line2 */
<> 147:30b64687e01f 162 .word EXTI3_IRQHandler /* EXTI Line3 */
<> 147:30b64687e01f 163 .word EXTI4_IRQHandler /* EXTI Line4 */
<> 147:30b64687e01f 164 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
<> 147:30b64687e01f 165 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
<> 147:30b64687e01f 166 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
<> 147:30b64687e01f 167 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
<> 147:30b64687e01f 168 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
<> 147:30b64687e01f 169 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
<> 147:30b64687e01f 170 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
<> 147:30b64687e01f 171 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
<> 147:30b64687e01f 172 .word CAN1_TX_IRQHandler /* CAN1 TX */
<> 147:30b64687e01f 173 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
<> 147:30b64687e01f 174 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
<> 147:30b64687e01f 175 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
<> 147:30b64687e01f 176 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
<> 147:30b64687e01f 177 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
<> 147:30b64687e01f 178 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
<> 147:30b64687e01f 179 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
<> 147:30b64687e01f 180 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
<> 147:30b64687e01f 181 .word TIM2_IRQHandler /* TIM2 */
<> 147:30b64687e01f 182 .word TIM3_IRQHandler /* TIM3 */
<> 147:30b64687e01f 183 .word TIM4_IRQHandler /* TIM4 */
<> 147:30b64687e01f 184 .word I2C1_EV_IRQHandler /* I2C1 Event */
<> 147:30b64687e01f 185 .word I2C1_ER_IRQHandler /* I2C1 Error */
<> 147:30b64687e01f 186 .word I2C2_EV_IRQHandler /* I2C2 Event */
<> 147:30b64687e01f 187 .word I2C2_ER_IRQHandler /* I2C2 Error */
<> 147:30b64687e01f 188 .word SPI1_IRQHandler /* SPI1 */
<> 147:30b64687e01f 189 .word SPI2_IRQHandler /* SPI2 */
<> 147:30b64687e01f 190 .word USART1_IRQHandler /* USART1 */
<> 147:30b64687e01f 191 .word USART2_IRQHandler /* USART2 */
<> 147:30b64687e01f 192 .word USART3_IRQHandler /* USART3 */
<> 147:30b64687e01f 193 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
<> 147:30b64687e01f 194 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
<> 147:30b64687e01f 195 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
<> 147:30b64687e01f 196 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
<> 147:30b64687e01f 197 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
<> 147:30b64687e01f 198 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
<> 147:30b64687e01f 199 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
<> 147:30b64687e01f 200 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
<> 147:30b64687e01f 201 .word FMC_IRQHandler /* FMC */
<> 147:30b64687e01f 202 .word SDMMC1_IRQHandler /* SDMMC1 */
<> 147:30b64687e01f 203 .word TIM5_IRQHandler /* TIM5 */
<> 147:30b64687e01f 204 .word SPI3_IRQHandler /* SPI3 */
<> 147:30b64687e01f 205 .word UART4_IRQHandler /* UART4 */
<> 147:30b64687e01f 206 .word UART5_IRQHandler /* UART5 */
<> 147:30b64687e01f 207 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
<> 147:30b64687e01f 208 .word TIM7_IRQHandler /* TIM7 */
<> 147:30b64687e01f 209 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
<> 147:30b64687e01f 210 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
<> 147:30b64687e01f 211 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
<> 147:30b64687e01f 212 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
<> 147:30b64687e01f 213 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
<> 147:30b64687e01f 214 .word ETH_IRQHandler /* Ethernet */
<> 147:30b64687e01f 215 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
<> 147:30b64687e01f 216 .word CAN2_TX_IRQHandler /* CAN2 TX */
<> 147:30b64687e01f 217 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
<> 147:30b64687e01f 218 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
<> 147:30b64687e01f 219 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
<> 147:30b64687e01f 220 .word OTG_FS_IRQHandler /* USB OTG FS */
<> 147:30b64687e01f 221 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
<> 147:30b64687e01f 222 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
<> 147:30b64687e01f 223 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
<> 147:30b64687e01f 224 .word USART6_IRQHandler /* USART6 */
<> 147:30b64687e01f 225 .word I2C3_EV_IRQHandler /* I2C3 event */
<> 147:30b64687e01f 226 .word I2C3_ER_IRQHandler /* I2C3 error */
<> 147:30b64687e01f 227 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
<> 147:30b64687e01f 228 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
<> 147:30b64687e01f 229 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
<> 147:30b64687e01f 230 .word OTG_HS_IRQHandler /* USB OTG HS */
<> 147:30b64687e01f 231 .word DCMI_IRQHandler /* DCMI */
<> 147:30b64687e01f 232 .word 0 /* Reserved */
<> 147:30b64687e01f 233 .word RNG_IRQHandler /* RNG */
<> 147:30b64687e01f 234 .word FPU_IRQHandler /* FPU */
<> 147:30b64687e01f 235 .word UART7_IRQHandler /* UART7 */
<> 147:30b64687e01f 236 .word UART8_IRQHandler /* UART8 */
<> 147:30b64687e01f 237 .word SPI4_IRQHandler /* SPI4 */
<> 147:30b64687e01f 238 .word SPI5_IRQHandler /* SPI5 */
<> 147:30b64687e01f 239 .word SPI6_IRQHandler /* SPI6 */
<> 147:30b64687e01f 240 .word SAI1_IRQHandler /* SAI1 */
<> 147:30b64687e01f 241 .word LTDC_IRQHandler /* LTDC */
<> 147:30b64687e01f 242 .word LTDC_ER_IRQHandler /* LTDC error */
<> 147:30b64687e01f 243 .word DMA2D_IRQHandler /* DMA2D */
<> 147:30b64687e01f 244 .word SAI2_IRQHandler /* SAI2 */
<> 147:30b64687e01f 245 .word QUADSPI_IRQHandler /* QUADSPI */
<> 147:30b64687e01f 246 .word LPTIM1_IRQHandler /* LPTIM1 */
<> 147:30b64687e01f 247 .word CEC_IRQHandler /* HDMI_CEC */
<> 147:30b64687e01f 248 .word I2C4_EV_IRQHandler /* I2C4 Event */
<> 147:30b64687e01f 249 .word I2C4_ER_IRQHandler /* I2C4 Error */
<> 147:30b64687e01f 250 .word SPDIF_RX_IRQHandler /* SPDIF_RX */
<> 147:30b64687e01f 251 .word DSI_IRQHandler /* DSI */
<> 147:30b64687e01f 252 .word DFSDM1_FLT0_IRQHandler /* DFSDM1 Filter 0 global Interrupt */
<> 147:30b64687e01f 253 .word DFSDM1_FLT1_IRQHandler /* DFSDM1 Filter 1 global Interrupt */
<> 147:30b64687e01f 254 .word DFSDM1_FLT2_IRQHandler /* DFSDM1 Filter 2 global Interrupt */
<> 147:30b64687e01f 255 .word DFSDM1_FLT3_IRQHandler /* DFSDM1 Filter 3 global Interrupt */
<> 147:30b64687e01f 256 .word SDMMC2_IRQHandler /* SDMMC2 */
<> 147:30b64687e01f 257 .word CAN3_TX_IRQHandler /* CAN3 TX */
<> 147:30b64687e01f 258 .word CAN3_RX0_IRQHandler /* CAN3 RX0 */
<> 147:30b64687e01f 259 .word CAN3_RX1_IRQHandler /* CAN3 RX1 */
<> 147:30b64687e01f 260 .word CAN3_SCE_IRQHandler /* CAN3 SCE */
<> 147:30b64687e01f 261 .word JPEG_IRQHandler /* JPEG */
<> 147:30b64687e01f 262 .word MDIOS_IRQHandler /* MDIOS */
<> 147:30b64687e01f 263
<> 147:30b64687e01f 264 /*******************************************************************************
<> 147:30b64687e01f 265 *
<> 147:30b64687e01f 266 * Provide weak aliases for each Exception handler to the Default_Handler.
<> 147:30b64687e01f 267 * As they are weak aliases, any function with the same name will override
<> 147:30b64687e01f 268 * this definition.
<> 147:30b64687e01f 269 *
<> 147:30b64687e01f 270 *******************************************************************************/
<> 147:30b64687e01f 271 .weak NMI_Handler
<> 147:30b64687e01f 272 .thumb_set NMI_Handler,Default_Handler
<> 147:30b64687e01f 273
<> 147:30b64687e01f 274 .weak HardFault_Handler
<> 147:30b64687e01f 275 .thumb_set HardFault_Handler,Default_Handler
<> 147:30b64687e01f 276
<> 147:30b64687e01f 277 .weak MemManage_Handler
<> 147:30b64687e01f 278 .thumb_set MemManage_Handler,Default_Handler
<> 147:30b64687e01f 279
<> 147:30b64687e01f 280 .weak BusFault_Handler
<> 147:30b64687e01f 281 .thumb_set BusFault_Handler,Default_Handler
<> 147:30b64687e01f 282
<> 147:30b64687e01f 283 .weak UsageFault_Handler
<> 147:30b64687e01f 284 .thumb_set UsageFault_Handler,Default_Handler
<> 147:30b64687e01f 285
<> 147:30b64687e01f 286 .weak SVC_Handler
<> 147:30b64687e01f 287 .thumb_set SVC_Handler,Default_Handler
<> 147:30b64687e01f 288
<> 147:30b64687e01f 289 .weak DebugMon_Handler
<> 147:30b64687e01f 290 .thumb_set DebugMon_Handler,Default_Handler
<> 147:30b64687e01f 291
<> 147:30b64687e01f 292 .weak PendSV_Handler
<> 147:30b64687e01f 293 .thumb_set PendSV_Handler,Default_Handler
<> 147:30b64687e01f 294
<> 147:30b64687e01f 295 .weak SysTick_Handler
<> 147:30b64687e01f 296 .thumb_set SysTick_Handler,Default_Handler
<> 147:30b64687e01f 297
<> 147:30b64687e01f 298 .weak WWDG_IRQHandler
<> 147:30b64687e01f 299 .thumb_set WWDG_IRQHandler,Default_Handler
<> 147:30b64687e01f 300
<> 147:30b64687e01f 301 .weak PVD_IRQHandler
<> 147:30b64687e01f 302 .thumb_set PVD_IRQHandler,Default_Handler
<> 147:30b64687e01f 303
<> 147:30b64687e01f 304 .weak TAMP_STAMP_IRQHandler
<> 147:30b64687e01f 305 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
<> 147:30b64687e01f 306
<> 147:30b64687e01f 307 .weak RTC_WKUP_IRQHandler
<> 147:30b64687e01f 308 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
<> 147:30b64687e01f 309
<> 147:30b64687e01f 310 .weak FLASH_IRQHandler
<> 147:30b64687e01f 311 .thumb_set FLASH_IRQHandler,Default_Handler
<> 147:30b64687e01f 312
<> 147:30b64687e01f 313 .weak RCC_IRQHandler
<> 147:30b64687e01f 314 .thumb_set RCC_IRQHandler,Default_Handler
<> 147:30b64687e01f 315
<> 147:30b64687e01f 316 .weak EXTI0_IRQHandler
<> 147:30b64687e01f 317 .thumb_set EXTI0_IRQHandler,Default_Handler
<> 147:30b64687e01f 318
<> 147:30b64687e01f 319 .weak EXTI1_IRQHandler
<> 147:30b64687e01f 320 .thumb_set EXTI1_IRQHandler,Default_Handler
<> 147:30b64687e01f 321
<> 147:30b64687e01f 322 .weak EXTI2_IRQHandler
<> 147:30b64687e01f 323 .thumb_set EXTI2_IRQHandler,Default_Handler
<> 147:30b64687e01f 324
<> 147:30b64687e01f 325 .weak EXTI3_IRQHandler
<> 147:30b64687e01f 326 .thumb_set EXTI3_IRQHandler,Default_Handler
<> 147:30b64687e01f 327
<> 147:30b64687e01f 328 .weak EXTI4_IRQHandler
<> 147:30b64687e01f 329 .thumb_set EXTI4_IRQHandler,Default_Handler
<> 147:30b64687e01f 330
<> 147:30b64687e01f 331 .weak DMA1_Stream0_IRQHandler
<> 147:30b64687e01f 332 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
<> 147:30b64687e01f 333
<> 147:30b64687e01f 334 .weak DMA1_Stream1_IRQHandler
<> 147:30b64687e01f 335 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
<> 147:30b64687e01f 336
<> 147:30b64687e01f 337 .weak DMA1_Stream2_IRQHandler
<> 147:30b64687e01f 338 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
<> 147:30b64687e01f 339
<> 147:30b64687e01f 340 .weak DMA1_Stream3_IRQHandler
<> 147:30b64687e01f 341 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
<> 147:30b64687e01f 342
<> 147:30b64687e01f 343 .weak DMA1_Stream4_IRQHandler
<> 147:30b64687e01f 344 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
<> 147:30b64687e01f 345
<> 147:30b64687e01f 346 .weak DMA1_Stream5_IRQHandler
<> 147:30b64687e01f 347 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
<> 147:30b64687e01f 348
<> 147:30b64687e01f 349 .weak DMA1_Stream6_IRQHandler
<> 147:30b64687e01f 350 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
<> 147:30b64687e01f 351
<> 147:30b64687e01f 352 .weak ADC_IRQHandler
<> 147:30b64687e01f 353 .thumb_set ADC_IRQHandler,Default_Handler
<> 147:30b64687e01f 354
<> 147:30b64687e01f 355 .weak CAN1_TX_IRQHandler
<> 147:30b64687e01f 356 .thumb_set CAN1_TX_IRQHandler,Default_Handler
<> 147:30b64687e01f 357
<> 147:30b64687e01f 358 .weak CAN1_RX0_IRQHandler
<> 147:30b64687e01f 359 .thumb_set CAN1_RX0_IRQHandler,Default_Handler
<> 147:30b64687e01f 360
<> 147:30b64687e01f 361 .weak CAN1_RX1_IRQHandler
<> 147:30b64687e01f 362 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
<> 147:30b64687e01f 363
<> 147:30b64687e01f 364 .weak CAN1_SCE_IRQHandler
<> 147:30b64687e01f 365 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
<> 147:30b64687e01f 366
<> 147:30b64687e01f 367 .weak EXTI9_5_IRQHandler
<> 147:30b64687e01f 368 .thumb_set EXTI9_5_IRQHandler,Default_Handler
<> 147:30b64687e01f 369
<> 147:30b64687e01f 370 .weak TIM1_BRK_TIM9_IRQHandler
<> 147:30b64687e01f 371 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
<> 147:30b64687e01f 372
<> 147:30b64687e01f 373 .weak TIM1_UP_TIM10_IRQHandler
<> 147:30b64687e01f 374 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
<> 147:30b64687e01f 375
<> 147:30b64687e01f 376 .weak TIM1_TRG_COM_TIM11_IRQHandler
<> 147:30b64687e01f 377 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
<> 147:30b64687e01f 378
<> 147:30b64687e01f 379 .weak TIM1_CC_IRQHandler
<> 147:30b64687e01f 380 .thumb_set TIM1_CC_IRQHandler,Default_Handler
<> 147:30b64687e01f 381
<> 147:30b64687e01f 382 .weak TIM2_IRQHandler
<> 147:30b64687e01f 383 .thumb_set TIM2_IRQHandler,Default_Handler
<> 147:30b64687e01f 384
<> 147:30b64687e01f 385 .weak TIM3_IRQHandler
<> 147:30b64687e01f 386 .thumb_set TIM3_IRQHandler,Default_Handler
<> 147:30b64687e01f 387
<> 147:30b64687e01f 388 .weak TIM4_IRQHandler
<> 147:30b64687e01f 389 .thumb_set TIM4_IRQHandler,Default_Handler
<> 147:30b64687e01f 390
<> 147:30b64687e01f 391 .weak I2C1_EV_IRQHandler
<> 147:30b64687e01f 392 .thumb_set I2C1_EV_IRQHandler,Default_Handler
<> 147:30b64687e01f 393
<> 147:30b64687e01f 394 .weak I2C1_ER_IRQHandler
<> 147:30b64687e01f 395 .thumb_set I2C1_ER_IRQHandler,Default_Handler
<> 147:30b64687e01f 396
<> 147:30b64687e01f 397 .weak I2C2_EV_IRQHandler
<> 147:30b64687e01f 398 .thumb_set I2C2_EV_IRQHandler,Default_Handler
<> 147:30b64687e01f 399
<> 147:30b64687e01f 400 .weak I2C2_ER_IRQHandler
<> 147:30b64687e01f 401 .thumb_set I2C2_ER_IRQHandler,Default_Handler
<> 147:30b64687e01f 402
<> 147:30b64687e01f 403 .weak SPI1_IRQHandler
<> 147:30b64687e01f 404 .thumb_set SPI1_IRQHandler,Default_Handler
<> 147:30b64687e01f 405
<> 147:30b64687e01f 406 .weak SPI2_IRQHandler
<> 147:30b64687e01f 407 .thumb_set SPI2_IRQHandler,Default_Handler
<> 147:30b64687e01f 408
<> 147:30b64687e01f 409 .weak USART1_IRQHandler
<> 147:30b64687e01f 410 .thumb_set USART1_IRQHandler,Default_Handler
<> 147:30b64687e01f 411
<> 147:30b64687e01f 412 .weak USART2_IRQHandler
<> 147:30b64687e01f 413 .thumb_set USART2_IRQHandler,Default_Handler
<> 147:30b64687e01f 414
<> 147:30b64687e01f 415 .weak USART3_IRQHandler
<> 147:30b64687e01f 416 .thumb_set USART3_IRQHandler,Default_Handler
<> 147:30b64687e01f 417
<> 147:30b64687e01f 418 .weak EXTI15_10_IRQHandler
<> 147:30b64687e01f 419 .thumb_set EXTI15_10_IRQHandler,Default_Handler
<> 147:30b64687e01f 420
<> 147:30b64687e01f 421 .weak RTC_Alarm_IRQHandler
<> 147:30b64687e01f 422 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
<> 147:30b64687e01f 423
<> 147:30b64687e01f 424 .weak OTG_FS_WKUP_IRQHandler
<> 147:30b64687e01f 425 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
<> 147:30b64687e01f 426
<> 147:30b64687e01f 427 .weak TIM8_BRK_TIM12_IRQHandler
<> 147:30b64687e01f 428 .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
<> 147:30b64687e01f 429
<> 147:30b64687e01f 430 .weak TIM8_UP_TIM13_IRQHandler
<> 147:30b64687e01f 431 .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
<> 147:30b64687e01f 432
<> 147:30b64687e01f 433 .weak TIM8_TRG_COM_TIM14_IRQHandler
<> 147:30b64687e01f 434 .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
<> 147:30b64687e01f 435
<> 147:30b64687e01f 436 .weak TIM8_CC_IRQHandler
<> 147:30b64687e01f 437 .thumb_set TIM8_CC_IRQHandler,Default_Handler
<> 147:30b64687e01f 438
<> 147:30b64687e01f 439 .weak DMA1_Stream7_IRQHandler
<> 147:30b64687e01f 440 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
<> 147:30b64687e01f 441
<> 147:30b64687e01f 442 .weak FMC_IRQHandler
<> 147:30b64687e01f 443 .thumb_set FMC_IRQHandler,Default_Handler
<> 147:30b64687e01f 444
<> 147:30b64687e01f 445 .weak SDMMC1_IRQHandler
<> 147:30b64687e01f 446 .thumb_set SDMMC1_IRQHandler,Default_Handler
<> 147:30b64687e01f 447
<> 147:30b64687e01f 448 .weak TIM5_IRQHandler
<> 147:30b64687e01f 449 .thumb_set TIM5_IRQHandler,Default_Handler
<> 147:30b64687e01f 450
<> 147:30b64687e01f 451 .weak SPI3_IRQHandler
<> 147:30b64687e01f 452 .thumb_set SPI3_IRQHandler,Default_Handler
<> 147:30b64687e01f 453
<> 147:30b64687e01f 454 .weak UART4_IRQHandler
<> 147:30b64687e01f 455 .thumb_set UART4_IRQHandler,Default_Handler
<> 147:30b64687e01f 456
<> 147:30b64687e01f 457 .weak UART5_IRQHandler
<> 147:30b64687e01f 458 .thumb_set UART5_IRQHandler,Default_Handler
<> 147:30b64687e01f 459
<> 147:30b64687e01f 460 .weak TIM6_DAC_IRQHandler
<> 147:30b64687e01f 461 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
<> 147:30b64687e01f 462
<> 147:30b64687e01f 463 .weak TIM7_IRQHandler
<> 147:30b64687e01f 464 .thumb_set TIM7_IRQHandler,Default_Handler
<> 147:30b64687e01f 465
<> 147:30b64687e01f 466 .weak DMA2_Stream0_IRQHandler
<> 147:30b64687e01f 467 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
<> 147:30b64687e01f 468
<> 147:30b64687e01f 469 .weak DMA2_Stream1_IRQHandler
<> 147:30b64687e01f 470 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
<> 147:30b64687e01f 471
<> 147:30b64687e01f 472 .weak DMA2_Stream2_IRQHandler
<> 147:30b64687e01f 473 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
<> 147:30b64687e01f 474
<> 147:30b64687e01f 475 .weak DMA2_Stream3_IRQHandler
<> 147:30b64687e01f 476 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
<> 147:30b64687e01f 477
<> 147:30b64687e01f 478 .weak DMA2_Stream4_IRQHandler
<> 147:30b64687e01f 479 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
<> 147:30b64687e01f 480
<> 147:30b64687e01f 481 .weak DMA2_Stream4_IRQHandler
<> 147:30b64687e01f 482 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
<> 147:30b64687e01f 483
<> 147:30b64687e01f 484 .weak ETH_IRQHandler
<> 147:30b64687e01f 485 .thumb_set ETH_IRQHandler,Default_Handler
<> 147:30b64687e01f 486
<> 147:30b64687e01f 487 .weak ETH_WKUP_IRQHandler
<> 147:30b64687e01f 488 .thumb_set ETH_WKUP_IRQHandler,Default_Handler
<> 147:30b64687e01f 489
<> 147:30b64687e01f 490 .weak CAN2_TX_IRQHandler
<> 147:30b64687e01f 491 .thumb_set CAN2_TX_IRQHandler,Default_Handler
<> 147:30b64687e01f 492
<> 147:30b64687e01f 493 .weak CAN2_RX0_IRQHandler
<> 147:30b64687e01f 494 .thumb_set CAN2_RX0_IRQHandler,Default_Handler
<> 147:30b64687e01f 495
<> 147:30b64687e01f 496 .weak CAN2_RX1_IRQHandler
<> 147:30b64687e01f 497 .thumb_set CAN2_RX1_IRQHandler,Default_Handler
<> 147:30b64687e01f 498
<> 147:30b64687e01f 499 .weak CAN2_SCE_IRQHandler
<> 147:30b64687e01f 500 .thumb_set CAN2_SCE_IRQHandler,Default_Handler
<> 147:30b64687e01f 501
<> 147:30b64687e01f 502 .weak OTG_FS_IRQHandler
<> 147:30b64687e01f 503 .thumb_set OTG_FS_IRQHandler,Default_Handler
<> 147:30b64687e01f 504
<> 147:30b64687e01f 505 .weak DMA2_Stream5_IRQHandler
<> 147:30b64687e01f 506 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
<> 147:30b64687e01f 507
<> 147:30b64687e01f 508 .weak DMA2_Stream6_IRQHandler
<> 147:30b64687e01f 509 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
<> 147:30b64687e01f 510
<> 147:30b64687e01f 511 .weak DMA2_Stream7_IRQHandler
<> 147:30b64687e01f 512 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
<> 147:30b64687e01f 513
<> 147:30b64687e01f 514 .weak USART6_IRQHandler
<> 147:30b64687e01f 515 .thumb_set USART6_IRQHandler,Default_Handler
<> 147:30b64687e01f 516
<> 147:30b64687e01f 517 .weak I2C3_EV_IRQHandler
<> 147:30b64687e01f 518 .thumb_set I2C3_EV_IRQHandler,Default_Handler
<> 147:30b64687e01f 519
<> 147:30b64687e01f 520 .weak I2C3_ER_IRQHandler
<> 147:30b64687e01f 521 .thumb_set I2C3_ER_IRQHandler,Default_Handler
<> 147:30b64687e01f 522
<> 147:30b64687e01f 523 .weak OTG_HS_EP1_OUT_IRQHandler
<> 147:30b64687e01f 524 .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
<> 147:30b64687e01f 525
<> 147:30b64687e01f 526 .weak OTG_HS_EP1_IN_IRQHandler
<> 147:30b64687e01f 527 .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
<> 147:30b64687e01f 528
<> 147:30b64687e01f 529 .weak OTG_HS_WKUP_IRQHandler
<> 147:30b64687e01f 530 .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
<> 147:30b64687e01f 531
<> 147:30b64687e01f 532 .weak OTG_HS_IRQHandler
<> 147:30b64687e01f 533 .thumb_set OTG_HS_IRQHandler,Default_Handler
<> 147:30b64687e01f 534
<> 147:30b64687e01f 535 .weak DCMI_IRQHandler
<> 147:30b64687e01f 536 .thumb_set DCMI_IRQHandler,Default_Handler
<> 147:30b64687e01f 537
<> 147:30b64687e01f 538 .weak RNG_IRQHandler
<> 147:30b64687e01f 539 .thumb_set RNG_IRQHandler,Default_Handler
<> 147:30b64687e01f 540
<> 147:30b64687e01f 541 .weak FPU_IRQHandler
<> 147:30b64687e01f 542 .thumb_set FPU_IRQHandler,Default_Handler
<> 147:30b64687e01f 543
<> 147:30b64687e01f 544 .weak UART7_IRQHandler
<> 147:30b64687e01f 545 .thumb_set UART7_IRQHandler,Default_Handler
<> 147:30b64687e01f 546
<> 147:30b64687e01f 547 .weak UART8_IRQHandler
<> 147:30b64687e01f 548 .thumb_set UART8_IRQHandler,Default_Handler
<> 147:30b64687e01f 549
<> 147:30b64687e01f 550 .weak SPI4_IRQHandler
<> 147:30b64687e01f 551 .thumb_set SPI4_IRQHandler,Default_Handler
<> 147:30b64687e01f 552
<> 147:30b64687e01f 553 .weak SPI5_IRQHandler
<> 147:30b64687e01f 554 .thumb_set SPI5_IRQHandler,Default_Handler
<> 147:30b64687e01f 555
<> 147:30b64687e01f 556 .weak SPI6_IRQHandler
<> 147:30b64687e01f 557 .thumb_set SPI6_IRQHandler,Default_Handler
<> 147:30b64687e01f 558
<> 147:30b64687e01f 559 .weak SAI1_IRQHandler
<> 147:30b64687e01f 560 .thumb_set SAI1_IRQHandler,Default_Handler
<> 147:30b64687e01f 561
<> 147:30b64687e01f 562 .weak LTDC_IRQHandler
<> 147:30b64687e01f 563 .thumb_set LTDC_IRQHandler,Default_Handler
<> 147:30b64687e01f 564
<> 147:30b64687e01f 565 .weak LTDC_ER_IRQHandler
<> 147:30b64687e01f 566 .thumb_set LTDC_ER_IRQHandler,Default_Handler
<> 147:30b64687e01f 567
<> 147:30b64687e01f 568 .weak DMA2D_IRQHandler
<> 147:30b64687e01f 569 .thumb_set DMA2D_IRQHandler,Default_Handler
<> 147:30b64687e01f 570
<> 147:30b64687e01f 571 .weak SAI2_IRQHandler
<> 147:30b64687e01f 572 .thumb_set SAI2_IRQHandler,Default_Handler
<> 147:30b64687e01f 573
<> 147:30b64687e01f 574 .weak QUADSPI_IRQHandler
<> 147:30b64687e01f 575 .thumb_set QUADSPI_IRQHandler,Default_Handler
<> 147:30b64687e01f 576
<> 147:30b64687e01f 577 .weak LPTIM1_IRQHandler
<> 147:30b64687e01f 578 .thumb_set LPTIM1_IRQHandler,Default_Handler
<> 147:30b64687e01f 579
<> 147:30b64687e01f 580 .weak CEC_IRQHandler
<> 147:30b64687e01f 581 .thumb_set CEC_IRQHandler,Default_Handler
<> 147:30b64687e01f 582
<> 147:30b64687e01f 583 .weak I2C4_EV_IRQHandler
<> 147:30b64687e01f 584 .thumb_set I2C4_EV_IRQHandler,Default_Handler
<> 147:30b64687e01f 585
<> 147:30b64687e01f 586 .weak I2C4_ER_IRQHandler
<> 147:30b64687e01f 587 .thumb_set I2C4_ER_IRQHandler,Default_Handler
<> 147:30b64687e01f 588
<> 147:30b64687e01f 589 .weak SPDIF_RX_IRQHandler
<> 147:30b64687e01f 590 .thumb_set SPDIF_RX_IRQHandler,Default_Handler
<> 147:30b64687e01f 591
<> 147:30b64687e01f 592 .weak DSI_IRQHandler
<> 147:30b64687e01f 593 .thumb_set DSI_IRQHandler,Default_Handler
<> 147:30b64687e01f 594
<> 147:30b64687e01f 595 .weak DFSDM1_FLT0_IRQHandler
<> 147:30b64687e01f 596 .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
<> 147:30b64687e01f 597
<> 147:30b64687e01f 598 .weak DFSDM1_FLT1_IRQHandler
<> 147:30b64687e01f 599 .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
<> 147:30b64687e01f 600
<> 147:30b64687e01f 601 .weak DFSDM1_FLT2_IRQHandler
<> 147:30b64687e01f 602 .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
<> 147:30b64687e01f 603
<> 147:30b64687e01f 604 .weak DFSDM1_FLT3_IRQHandler
<> 147:30b64687e01f 605 .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
<> 147:30b64687e01f 606
<> 147:30b64687e01f 607 .weak SDMMC2_IRQHandler
<> 147:30b64687e01f 608 .thumb_set SDMMC2_IRQHandler,Default_Handler
<> 147:30b64687e01f 609
<> 147:30b64687e01f 610 .weak CAN3_TX_IRQHandler
<> 147:30b64687e01f 611 .thumb_set CAN3_TX_IRQHandler,Default_Handler
<> 147:30b64687e01f 612
<> 147:30b64687e01f 613 .weak CAN3_RX0_IRQHandler
<> 147:30b64687e01f 614 .thumb_set CAN3_RX0_IRQHandler,Default_Handler
<> 147:30b64687e01f 615
<> 147:30b64687e01f 616 .weak CAN3_RX1_IRQHandler
<> 147:30b64687e01f 617 .thumb_set CAN3_RX1_IRQHandler,Default_Handler
<> 147:30b64687e01f 618
<> 147:30b64687e01f 619 .weak CAN3_SCE_IRQHandler
<> 147:30b64687e01f 620 .thumb_set CAN3_SCE_IRQHandler,Default_Handler
<> 147:30b64687e01f 621
<> 147:30b64687e01f 622 .weak JPEG_IRQHandler
<> 147:30b64687e01f 623 .thumb_set JPEG_IRQHandler,Default_Handler
<> 147:30b64687e01f 624
<> 147:30b64687e01f 625 .weak MDIOS_IRQHandler
<> 147:30b64687e01f 626 .thumb_set MDIOS_IRQHandler,Default_Handler
<> 147:30b64687e01f 627
<> 147:30b64687e01f 628 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 147:30b64687e01f 629